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UBA1707 Cordless telephone, answering machine line interface
Objective specification File under Integrated Circuits, IC03 1997 Nov 07
Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
FEATURES Line interface · Low DC line voltage; operates down to 1.2 V (excluding polarity guard) · Voltage regulator with adjustable DC voltage · DC mask for voltage and current regulation · Line current limitation for protection · Electronic hook switch control input · Transmit amplifier with: Symmetrical inputs Fixed gain Large signals handling capability. · Receive amplifier with fixed gain · Transmit and receive amplifiers AGC for line loss compensation. Auxiliary amplifier · Fixed gain. Loudspeaker channel · Dual inputs · Rail-to-rail output stage for single-ended load drive · High output current capability · Dynamic limiter to prevent distortion · Digital volume control · Fixed maximum gain. General purpose switches · Three switches with open-collector. 3-wires serial bus interface Allows to control: · DC mask (voltage or current regulation) · Receive amplifier mute function ORDERING INFORMATION TYPE NUMBER UBA1707T UBA1707TS PACKAGE NAME SO28 SSOP28 DESCRIPTION plastic small outline package; 28 leads; body width 7.5 mm plastic shrink small outline package; 28 leads; body width 5.3 mm · AGC: On/off Slope Istart line current. · Auxiliary amplifier mute function · Loudspeaker channel: Input selection Volume setting Dynamic limiter inhibition Power-down mode. · General purpose switches state · Global power-down mode. Supply
UBA1707
Operates with external supply voltage from 3.0 to 5.5 V. APPLICATIONS · Cordless base stations · Answering machines · Mains or battery-powered telephone sets. GENERAL DESCRIPTION The UBA1707 is a BiCMOS integrated circuit intended for use in mains-powered telecom terminals. It performs all speech and line interface functions, DC mask for voltage or current regulation and electronic hook switch control. The device includes an auxiliary amplifier, a loudspeaker channel and general purpose switches. Most of the characteristics are programmable via a 3-wire serial bus interface.
VERSION SOT136-1 SOT341-1
1997 Nov 07
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Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
UBA1707
QUICK REFERENCE DATA Iline = 15 mA; VCC = 3.3 V; RSLPE = 10 ; AGC pin connected to GND; Zline = 600 ; ZSET = 619 ; EHI = HIGH; f = 1 kHz; Tamb = 25 °C; bit AGC at logic 1, all other configuration bits at logic 0; measured in test circuit of Fig.17; unless otherwise specified. SYMBOL VCC ICC Iline VLN RREGC PARAMETER operating voltage range current consumption from pin VCC line current operating range DC line voltage DC mask slope in current regulation mode voltage gain transmit amplifier from TXI to LN Gv(trx) gain control range for transmit and receive amplifiers with respect to Iline = 15 mA voltage gain from AXI to AXO voltage gain from LSAI1 or LSAI2 to LSAO for maximum volume voltage gain adjustment range for loudspeaker channel voltage gain adjustment step for loudspeaker channel VTXI = 50 mV (RMS) Iline = 90 mA 11 37 - 12 38 6.5 13 39 - dB dB dB receive amplifier from RXI to RXO VRXI = 2 mV (RMS) Iline > 35 mA (typical); RLVI = 1 M; RRGL = 7.15 k; bit CRC = 1 normal operation; bit PD = 0 power-down mode; bit PD = 1 normal operation with reduced performance CONDITIONS MIN. 3.0 - - 11 tbf tbf - TYP. - 2.2 110 - - 3.1 1.4 MAX. 5.5 tbf tbf 130 11 tbf - UNIT V mA µA mA mA V k
Gv(trx)
Gv(AX) Gv(LSA) Gv(LSA) Gv(LSA)s
VAXI = 2 mV (RMS) VLSAI = 8 mV (RMS); bits LSA1 = 1 and LSA2 = 1 bits (VOL0, VOL1 and VOL2) from (0, 0, 0) to (1, 1, 1) VOL0 from 0 to 1
30.5 26.5 - -
32 28 21 3
33.5 29.5 - -
dB dB dB dB
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Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
BLOCK DIAGRAM
handbook, full pagewidth
UBA1707
VCC
25
UBA1707
LINE INTERFACE
22
GND
RXM
RXI 10 V 2Vd EHI TXI+ TXI- 18 17 V I I 2Vd
8
RXO
2
LN ZSET
LN +
300 mV 1 SLPE RSLPE
RAGC2
RAGC1
3
REG CREG
AGC
9
AGC 2 EHI
LOW VOLTAGE PART
EHI
SAGC, AGC
CURRENT LIMITATION
SLPE
VCC 11 6 7 EHI LCC CST CCST VCC TPDARL D
REG
LN -
600 mV
CRC
RRGL 200 nA RGL 5 4 LVI RLVI TNSW TNON-HOOK
AXM
AXI 15
AUXILIARY AMPLIFIER
16 2Vd AXO
ISA1
LSAI1 26 V 2Vd I 0.5VCC
LOUDSPEAKER CHANNEL
24 VCC 28 LSAO DLC CDLC
ISPD
LSAI2 27 2Vd V I
ISA2
ISPD
DYNAMIC LIMITER
DLCI ISPD
VOLUME CONTROL LSPGND 23
VOL0 TO 3 VOL2
GENERAL SWITCHES
3 19 SERIAL INTERFACE SUPPLY 21 20 SWI1 SWI2 SWI3
SWC1, SWC2, SWC3
19
PD
13 EN 14 CLK 12 DATA
MGK705
Bit names are given in italics.
Fig.1 Block diagram.
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Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
PINNING SYMBOL SLPE LN REG LVI RGL LCC CST RXO AGC RXI EHI DATA EN CLK AXI AXO TXI- TXI+ SWI3 SWI2 SWI1 GND LSPGND LSAO VCC LSAI1 LSAI2 DLC PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 DESCRIPTION connection for slope resistor positive line terminal line voltage regulator decoupling negative line voltage sense input reference for current regulation mode line current control output input for stability capacitor receive amplifier output automatic gain control/line loss compensation adjustment receiver amplifier input electronic hook switch control input serial bus data input programming serial bus enable input serial bus clock input auxiliary amplifier input auxiliary amplifier output inverted transmit amplifier input non-inverted transmit amplifier input NPN open-collector output 3 NPN open-collector output 2 NPN open-collector output 1 ground reference ground reference for the loudspeaker amplifier loudspeaker amplifier output supply voltage loudspeaker amplifier input 1 loudspeaker amplifier input 2 dynamic limiter timing adjustment
CST 7
handbook, halfpage
UBA1707
SLPE 1 LN 2 REG 3 LVI 4 RGL 5 LCC 6
28 DLC 27 LSAI2 26 LSAI1 25 VCC 24 LSAO 23 LSPGND 22 GND
UBA1707
RXO 8 AGC 9 RXI 10 EHI 11 DATA 12 EN 13 CLK 14
MGK704
21 SWI1 20 SWI2 19 SWI3 18 TXI+ 17 TXI- 16 AXO 15 AXI
Fig.2 Pin configuration.
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Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
FUNCTIONAL DESCRIPTION All data given in this chapter are typical values, except when otherwise specified. Supply (pins VCC and GND; bits PD and LSPD) The UBA1707 must be supplied with an external stabilized voltage source between pins VCC and GND. Pins GND and LSPGND must be connected together. · The automatic gain control · The DC mask management · The low voltage area characteristics.
UBA1707
In the same way, changing the value of ZSET also affects the characteristics. The IC has been optimized for Vref = 3.0 V and ZSET = 619 .
MGK706
Without any signal, with the loudspeaker channel enabled at minimum volume and without any general purpose switch selected, the internal current consumption is 2.2 mA at VCC = 3.3 V. Each selected switch (pins SWI1, SWI2, or SWI3) increases the current consumption by 530 µA. The supply current can be reduced when the loudspeaker channel is not used by switching it off (bit LSPD at logic 1). The current consumption is then decreased by approximately 800 µA at minimum volume. To drastically reduce current consumption, the UBA1707 is provided with a power-down mode controlled by bit PD. When bit PD is at logic 1, the current consumption from VCC becomes 110 µA. In this mode, the serial interface is the only function which remains active. Line interface DC CHARACTERISTICS (PINS LN, SLPE, REG, CST, LVI, LCC, RGL AND GND; BIT CRC) The IC generates a stabilized reference voltage (Vref) between pins LN and SLPE. This reference voltage is equal to 3.0 V, is temperature compensated and can be adjusted by means of an external resistor (RVA). It can be increased by connecting the RVA resistor between pins REG and SLPE (see Fig.3). The voltage at pin REG is used by the internal regulator to generate the stabilized reference voltage and is decoupled by a capacitor (CREG) which is connected to GND. This capacitor, converted into an equivalent inductance (see Section "Set impedance") realizes the set impedance conversion from its DC value (RSLPE) to its AC value (ZSET in the audio-frequency range). Figure 4 illustrates the reference voltage supply configuration. As can be seen from Fig.4, part of the line current flows into the ZSET impedance network and is not sensed by the UBA1707. Therefore using the RVA resistor to change value of the reference voltage will also modify all parameters related to the line current such as:
handbook, halfpage
8.5
Vref (V)
7.5
6.5
5.5
4.5
(1)
3.5
(2)
2.5 103
104
105
RVA ()
106
(1) Influence of RVA on Vref. (2) Vref without influence of RVA.
Fig.3 Reference voltage adjustment with RVA.
The IC regulates the line voltage at pin LN which can be calculated as follows: V LN = V ref + R SLPE × I SLPE I SLPE = I line I ZSET I* I line I ZSET Where: Iline = line current IZSET = current flowing through ZSET I* = current consumed between LN and GND (approximately 100 µA). The preferred value for RSLPE is 10 . Changing RSLPE will affect more than the DC characteristics; it also influences the transmit gain, the gain control characteristics, the sidetone level and the maximum output swing on the line.
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Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
UBA1707
handbook, full pagewidth
LN+ ILN Rp 35 k I* IZSET ZSET LN Iline
UBA1707
619
Vd Rd 4 k REG CREG 4.7 µF ISLPE SLPE RSLPE 10 GND
MGK707
Fig.4 Reference voltage supply configuration.
handbook, full pagewidth
ILN Rp 35 k Vref Vd Rd 4 k REG CREG 4.7 µF GND ISLPE SLPE RSLPE 10 LCC EHI VEHI HOOK SWITCH MANAGEMENT LN
Iline
LN+
Zline
UBA1707
IZSET ZSET Rexch
619 Vline
Vexch
TNSW
VCE (TNSW) LN-
MGK708
Fig.5 Line current settling simplified configuration.
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Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
The DC line current flowing into the set is determined by the exchange supply voltage (Vexch), the feeding bridge resistance (Rexch), the DC resistors of the telephone line (Rline) and the set (RSET), the reference voltage (Vref) and the voltage introduced by the transistor (TNSW) used as line interrupter (see Fig.5). With a line current below Ilow (8 mA with ZSET = 619 ), the internal reference voltage (Vref) is automatically adjusted to a lower value. This means that more sets can operate in parallel with DC line voltages (excluding the polarity guard) down to 1.2 V. At line current below Ilow, the circuit has limited transmit and receive levels. This is called the low voltage area. Figure 6 shows in more details how the UBA1707, in association with some external components, manages the line interrupter (TNSW external transistor). In on-hook conditions (voltage at pin EHI is LOW), the voltage at pin LCC is pulled-up to the supply voltage level (VCC) to turn off the TPDARL transistor. As a result, because of the RPLD resistor, the TNSW and TNON-HOOK transistors are switched off. The TNON-HOOK transistor disconnects the RLVI resistor from the LN- line terminal in order to guarantee a high on-hook impedance.
UBA1707
In off-hook conditions (voltage at pin EHI is HIGH), an operational amplifier drives (at pin LCC) the base of TPDARL which forms a current amplifier structure in association with TNSW. The line current flows through TNSW transistor. The TNON-HOOK transistor is forced into deep saturation. A virtual ground is created at pin LVI because of the operational amplifier. A DC current (ILVI) is sourced from pin LVI into the RLVI resistor in order to generate a voltage source. Thus the voltage between pin GND and the negative line terminal (LN-) becomes: VCE (TNSW) = RLVI × ILVI + VCE (TNON-HOOK) RLVI × ILVI The voltage Vline between the line terminals LN+ and LN- can be calculated as follows: Vline Vref + RSLPE × (Iline - IZSET) + VCE (TNSW) Where: Iline = line current IZSET = current flowing through ZSET.
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andbook, full pagewidth
1997 Nov 07
Rp LN LN+ ILN IZSET Iline 35 k
Philips Semiconductors
UBA1707
Vref 8.2 V Vd ISLPE
REG
ZSET 619
CREG Rd SLPE VCC ILVIV 200 nA LCC ILVI TPDARL Vline RPLU 150 k CURRENT LIMITATION 4 k RSLPE 10
4.7 µF
EHI
VEHI
Cordless telephone, answering machine line interface
CURRENT REGULATION MODE MANAGEMENT
9
LVI CLVI RLVI 1 M RON-HOOK TNON-HOOK 100 k DPROT DSW 22 pF 470 pF CCST GND CST RPLD 20 k
CRC
RGL
RRGL
7.15 k
TNSW Iline LN-
MGK709
Bit names are given in italics.
Objective specification
UBA1707
Fig.6 Line interrupter management and DC mask regulation configuration.
Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
The UBA1707 offers the possibility to choose two kinds of regulations for the DC characteristic between the line terminals LN+ and LN- (see Fig.7): · Voltage regulation mode · Current regulation mode.
UBA1707
Therefore VCE (TNSW) RLVI × ILVIV = 200 mV in typical application (see Fig.18). The slope Vline/Iline of the Vline, Iline characteristic is RREGV RSLPE.
Current regulation mode
In current regulation mode (bit CRC at logic 1), when the line current is lower than Iknee = 35 mA (with ZSET = 619 ), VCE (TNSW) is fixed by means of a 200 nA DC constant current ILVIV flowing through RLVI. When the line current is higher than 35 mA, an additional current (proportional to the line current) flows through RLVI. As a result, TNSW works as a DC voltage source increasing with the line current. VCE (TNSW) can be calculated as follows: R SLPE V CE ( TN SW ) R LVI × --------------- × ( I line I knee ) + I LVIV R RGL Where: Iline = line current RRGL = resistor connected at pin RGL.
handbook, halfpage
Vline
(1)
(2)
(3)
Iline Iprot (4)
MGK710
Ilow
Iknee
(1) Low voltage area. (2) Small slope (determined by RSLPE). (3) Small slope (dashed line; determined by RSLPE) in voltage regulation mode. High slope (full line; determined by RSLPE, RLVI and RRGL) in current regulation mode. (4) Current limitation.
The slope Vline/Iline of the Vline, Iline characteristic is determined by the ratio of resistors connected at pins SLPE, LVI and RGL, as follows: R SLPE R REGC R SLPE + R LVI × --------------- = 1400 in typical R RGL application (see Fig.18).
Current limitation
Whatever the selected mode is, the line current is limited to approximately 140 mA. This current is sensed on SLPE, for this purpose the external zener diode must be connected between pins LN and SLPE. The speech function no longer operates in this condition. ELECTRONIC HOOK SWITCH CONTROL (PIN EHI) The electronic hook switch input (EHI) controls the state of TPDARL transistor. When the voltage applied at pin EHI is LOW, TPDARL transistor is turned off. Voltage at pin LCC is pulled up to supply voltage (VCC). TNSW and TNON-HOOK transistors are also turned off by means of a pull-down resistor (RPLD). When the voltage applied at pin EHI is HIGH, TPDARL transistor is driven by the operational amplifier at pin LCC and the regulation mode selected is operating. An internal 150 k pull-up resistor is connected between pins LCC and VCC.
Fig.7
General form of the DC mask as a function of regulation mode.
The regulation mode is selected by the bit CRC via the serial interface. The DC mask regulation is realised by adjusting the DC voltage VCE (TNSW) between pin GND and line terminal LN- as a function of the line current.
Voltage regulation mode
In voltage regulation mode (bit CRC at logic 0), VCE (TNSW) voltage is fixed by means of a 200 nA DC constant current ILVIV flowing through RLVI.
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Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
The EHI input can also be used for pulse dialling or register recall (timed loop break). During line breaks (voltage at pin EHI is LOW or open-circuit), the voltage regulator is switched off and the capacitor at pin REG is internally disconnected to prevent its discharge. As a result, the voltage stabilizer will have negligible switch-on delay after line interruptions. This minimizes the contribution of the IC to the current waveform during pulse dialling or register recall. When the UBA1707 is in power-down mode (bit PD at logic 1), the TPDARL transistor is forced to be turned off whatever the voltage applied at pin EHI. SET IMPEDANCE In the audio frequency range, the dynamic impedance between pins LN and GND (illustrated in Fig.8) is mainly determined by the ZSET impedance. The impedance introduced by the external TNSW transistor connected between pin GND and the negative line terminal (LN-) is negligible.
UBA1707
TRANSMIT AMPLIFIER (PINS TXI+ AND TXI-) The UBA1707 has symmetrical transmit inputs TXI+ and TXI-. The input impedance between pins TXI+ or TXI- and GND is 20 k. The voltage gain from pins TXI+ or TXI- to pin LN is set at 12 dB with 600 line load (Zline) and 619 set impedance. The inputs are biased at 2 × Vd 1.4 V, with Vd representing the diode voltage. Automatic gain control is provided on this amplifier for line loss compensation. RECEIVE AMPLIFIER (PINS RXI AND RXO; BIT RXM) The receive amplifier (see Fig.9) has one input (RXI) and one output (RXO). The input impedance between pins RXI and GND is 20 k. The rail-to-rail output stage is designed to drive a 500 µA peak current. The output impedance at pin RXO is approximately 100 . The voltage gain from pin RXI to pin RXO is set at 38 dB. This gain value compensates typically the attenuation of the anti-sidetone network (see Fig.10). The output as well as the input are biased at 2 × Vd 1.4 V. Automatic gain control is provided on this amplifier for line loss compensation. This amplifier can be muted by activating the receive mute function (bit RXM at logic 1).
handbook, halfpage
LN RP REG CREG 4.7 µF
MGL215
LEQ Vref SLPE RSLPE 10 GND
ZSET 619
Leq = CREG × RSLPE × RP RP = internal resistance = 35 k.
Fig.8
Equivalent impedance between LN and GND.
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Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
UBA1707
handbook, full pagewidth
RXI V 2Vd from AGC I
RXM
RXO
I 2Vd
V
UBA1707
MGK711
Bit names are given in italics.
Fig.9 Receive amplifier.
SIDETONE SUPPRESSION The UBA1707 anti-sidetone network comprising ZSET//Zline, Rast1, Rast2, Rast3, RSLPE and Zbal (see Fig.10) suppresses the transmitted signal in the received signal. Maximum compensation is obtained when the following conditions are fulfilled: RSLPE × Rast1 = ZSET × (Rast2 + Rast3) ( R ast2 × ( R ast3 + R SLPE ) ) k = ------------------------------------------------------------------( R ast1 × R SLPE ) Zbal = k × Zline The scale factor `k' is chosen to meet the compatibility with a standard capacitor from the E6 or E12 range for Zbal. In practice, Zline varies considerably with the line type and the line length.
Therefore, the value chosen for Zbal should be for an average line length which gives satisfactory sidetone suppression with short and long lines. The suppression also depends on the accuracy of the match between Zbal and the impedance of the average line. The anti-sidetone network for the UBA1707 (see Fig.18) attenuates the receiving signal from the line by 38 dB before it enters the receiving amplifier. The attenuation is almost constant over the whole audio frequency range. A Wheatstone bridge configuration (see Fig.11) may also be used. More information on the balancing of an anti-sidetone bridge can be obtained in our publication "Applications Handbook for Wired Telecom Systems, IC03b", order number 9397 750 00811.
handbook, full pagewidth
LN
Zline
ZSET
Rast1
GND
Im
RXI ZRXI Rast2
RSLPE Rast3 SLPE Zbal
MGL216
Fig.10 Equivalent circuit of UBA1707 anti-sidetone bridge.
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Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
UBA1707
handbook, full pagewidth
LN
Zline
ZSET
Zbal
GND
Im
RXI ZRXI
RSLPE
Rast1 RA SLPE
MGL217
Fig.11 Equivalent circuit of an anti-sidetone network in a Wheatstone bridge configuration.
AUTOMATIC GAIN CONTROL (PIN AGC; BITS RAGC1, RAGC2, SAGC AND AGC) The UBA1707 performs automatic line loss compensation. The automatic gain control varies the gain of the transmit amplifier and the gain of the receive amplifier in accordance with the DC line current. The control range is 6.5 dB (which roughly corresponds to a line length of 5.5 km for a 0.5 mm diameter twisted-pair copper cable with a DC resistance of 176 /km and an average attenuation of 1.2 dB/km). When the line current is greater than Istop, the voltage gains are minimum. When the line current is less than Istart, the voltage gains are maximum. When the AGC pin is connected to pin GND, the start line current (Istart) can be chosen between 23 and 30 mA via bits RAGC1 and RAGC2 through the serial interface. Two values for the Istop/Istart ratio (slope of the AGC) are possible via the bit SAGC through the serial interface. When bit SAGC is at logic 0 then Istop = 2.7 × Istart (optimized for voltage regulation mode). When SAGC is at logic 1 then Istop = 1.9 × Istart (optimized for current regulation mode).
An external resistor RAGC (connected between pins GND and AGC) enables the Istart and Istop line currents to be increased (the ratio between Istart and Istop is not affected by this external resistor). So internal and external adjustments of the automatic gain control allow optimization of the IC for many configurations of exchange supply voltage and feeding bridge resistance. Part of the line current flows into the ZSET impedance network. The IC has been optimized for ZSET = 619 . Changing this 619 value slightly modifies Istop and Istart line currents as well as the value of the two AGC slopes. The automatic gain control function can be disabled by setting the AGC bit to logic 0 via the serial interface or when pin AGC is left open-circuit. In this case both of the voltage gains are maximum.
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Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
Auxiliary amplifier (pins AXI and AXO; bit AXM)
UBA1707
The auxiliary amplifier (see Fig.12) has one input (AXI) and one output (AXO). The input impedance between pins AXI and GND is 3.65 k. The rail-to-rail output stage is designed to drive a 500 µA peak current. The output impedance at pin AXO is approximately 100 . The output as well as the input are biased at 2 × Vd 1.4 V DC voltage. The voltage gain from pin AXI to pin AXO is set at 32 dB.The amplifier can be muted by setting bit AXM at logic 1 via the serial interface. In this case, the input impedance between pins AXI and GND is infinite.
handbook, full pagewidth
AXM
AXI AXO 2Vd
MGK712
UBA1707
Bit names are given in italics.
Fig.12 Auxiliary amplifier.
Loudspeaker channel (see Fig.13) LOUDSPEAKER AMPLIFIER (PINS LSAI1, LSAI2, LSAO AND LSPGND; BITS LSPD, LSA1 AND LSA2) The loudspeaker amplifier has two symmetrical inputs LSAI1 and LSAI2 selectable independently by the bits LSA1 and LSA2 respectively. The input impedance between pins LSAI1or LSAI2 and GND is typically 20 k. Each of these two inputs stages can accommodate signals up to 500 mV (RMS) at room temperature for less than 2% of Total Harmonic Distortion (THD) at minimum voltage gain. The inputs are biased at 2 × Vd 1.4 V DC voltage (whatever the state of bits LSA1 and LSA2).
The rail-to-rail output stage is designed to power a loudspeaker connected as a single-ended load (between pins LSAO and LSPGND). The output LSAO is able to drive a 150 mA peak current. As a result, it can drive loudspeaker loads down to 8 at VCC = 3.3 V and 16 at VCC = 5.0 V. The output is biased at 1/2VCC. Its output voltage capability is specified for continuous wave drive and depends on the value of VCC. In order to avoid crosstalk from the loudspeaker to other amplifiers, the loudspeaker current flows via pin LSPGND. This pin must be externally connected to pin GND. The nominal value of the voltage gain for maximum volume from pins LSAI1 or LSAI2 to pin LSAO is set at 28 dB. This amplifier is no longer supplied by setting the LSPD bit at logic 1 via the serial interface.
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Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
UBA1707
handbook, full pagewidth
ISPD ISA1
VCC I V
UBA1707
LSAI1 2Vd V I 0.5VCC
LSAO DLC CLSAO LSP
ISA2
LSAI2 2Vd V I
ISPD
DYNAMIC LIMITER
DLCI
CDLC
ISPD
LSPGND
ISPD
VOLUME CONTROL
VOL0 TO 3 VOL2
MGK713
Bit names are given in italics.
Fig.13 Loudspeaker channel.
DYNAMIC LIMITER (PIN DLC; BIT DLCI) The dynamic limiter of the UBA1707 prevents clipping of the loudspeaker output stage and protects the operation of the circuit when the supply voltage at VCC falls below 2.7 V. Hard clipping of the loudspeaker output stage is prevented by rapidly reducing the gain when the output stage starts to saturate. The time in which gain reduction is effected (clipping attack time) is approximately a few milliseconds. The circuit stays in the reduced gain mode until the peaks of the loudspeaker signals no longer cause saturation. The gain of the loudspeaker amplifier then returns to its normal value within the clipping release time (typically 250 ms). Both attack and release times are proportional to the value of the capacitor CDLC. The total harmonic distortion of the loudspeaker output stage, in reduced gain mode, stays below 5% up to 10 dB (minimum) of input voltage overdrive [providing VLSAI is below 500 mV (RMS)].
When the supply voltage drops below an internal threshold voltage of 2.7 V, the gain of the loudspeaker amplifier is rapidly reduced (approximately 1 ms). When the supply voltage exceeds 2.7 V, the gain of the loudspeaker amplifier is increased again. The hard clipping of the dynamic limiter can be inhibited by setting the DLCI bit at logic 1, via the serial interface. The dynamic limiter is no longer supplied by setting the LSPD bit at logic 1. In this case, the CDLC capacitor charge is maintained to allow the gain of the loudspeaker amplifier to return to its nominal value as soon as the loudspeaker channel is supplied again. VOLUME CONTROL (BITS VOL0, VOL1 AND VOL2) The loudspeaker amplifier voltage gain can be reduced in steps of 3 dB via the serial interface (via bits VOL0, VOL1 and VOL2). These bits provide 7 steps of voltage gain adjustment. The voltage gain is maximum when all bits are at logic 1 and is reduced by 21 dB when all bits are at logic 0.
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Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
General purpose switches (pins SWI1, SWI2 and SWI3; bits SWC1, SWC2 and SWC3) The UBA1707 is equipped with 3 general purpose open-collector switches which short the pins SWI1, SWI2 and SWI3 to ground. They are respectively controlled by bits SWC1, SWC2 and SWC3 and have an operating voltage limited to 12 V. The outputs have to be current biased. For a bias current between 2 and 20 mA, the AC impedance is 30 maximum. Serial interface (pins DATA, CLK and EN) A simple 3-wire unidirectional serial bus is used to program the circuit. The 3 wires of the bus are EN, CLK and DATA. The data sent to the device is loaded in bursts framed by EN. Programming clock edges (falling edges) and their appropriate data bits are ignored until EN goes active HIGH. The programmed information is loaded into the addressed register when EN returns inactive (LOW) or left open-circuit.
UBA1707
During normal operation, EN should be kept LOW. Only the last 8 bits serially clocked into the device are retained within the programming register. Additional leading bits are ignored and no check is made on the number of clock pulses. It can always capture new programming data even during global power-down (bit PD at logic 1). Data is entered with the most significant bit first. The leading 6 bits make up the data field (bits D0 to D5) while the trailing 2 bits are the address field (bits ADO and AD1). The first bit entered is D5, the last bit AD0. This organisation allows to send only the number of bits of the addressed register. Figure 16 shows the serial timing diagram. Table 1 gives the list of registers. When the supply voltage VCC drops below 2.5 V, all register files are set in the initial state (see Table 1) defined by the power-up reset. At start-up, the circuit is in power-down mode. In the event that the IC is used in a noisy environment, it is advised to periodically refresh the content of registers.
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Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
Table 1 BIT NAME Register description FUNCTION POLARITY DATA ADDRESS
UBA1707
STATE AT POWER-UP RESET 0 0 0 0 0
Register 0: general purpose switches state and DC mask regulation mode SWC1 SWC2 SWC3 un CRC SWI1 output connection SWI2 output connection SWI3 output connection unused current regulation mode 0: SWI1 switched-off 1: SWI1 switched-on 0: SWI2 switched-off 1: SWI2 switched-on 0: SWI3 switched-off 1: SWI3 switched-on must be set to logic 0 0: voltage regulation 1: current regulation D0 D1 D2 D3 D4 (AD1, AD0) = (0,0)
Register 1: automatic gain control RAGC1 RAGC2 SAGC AGC AGC range selection 1 AGC range selection 2 AGC slope selection line loss compensation mode D0 D1 D2 D3 (AD1, AD0) = (0,1) 0 0 0 0
0: 2.7 type slope; note 1 1: 1.9 type slope; note 1 0: AGC inhibited 1: AGC enabled 0: LSAI1 unselected 1: LSAI1 selected 0: LSAI2 unselected 1: LSAI2 selected 0: channel on 1: channel in power-down
Register 2: loudspeaker channel LSA1 LSA2 LSPD VOL0 VOL1 VOL2 AXM RXM PD DLCI loudspeaker channel input 1 selection loudspeaker channel input 2 selection loudspeaker channel power-down volume control (least significant bit) volume control volume control (most significant bit) auxiliary amplifier mute receive amplifier mute reduced consumption mode dynamic limiter inhibit 0: amplifier enabled 1: amplifier muted 0: amplifier enabled 1: amplifier muted 0: normal operating mode 1: power-down mode 0: limiter enabled 1: limiter inhibited D0 D1 D2 D3 D4 D5 D0 D1 D2 D3 (AD1, AD0) = (1,1) (AD1, AD0) = (1,0) 0 0 0 0 0 0 0 0 1 0
Register 3: mute functions and power-down
Note 1. See Section "Automatic gain control (pin AGC; bits RAGC1, RAGC2, SAGC and AGC)".
1997 Nov 07
17
Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VCC VLN PARAMETER supply voltage on pin VCC positive continuous line voltage on pin LN repetitive line voltage during switch-on or line interruption VSWIn Vn(max) ILN ISWIn Ptot voltage on pins SWI1, SWI2, and SWI3 maximum voltage on all other pins current sunk by pin LN continuous current sunk by pins SWI1, SWI2, and SWI3 total power dissipation UBA1707T UBA1707TS Tstg Tamb IC storage temperature operating ambient temperature see Figs 14 and 15 bit SWCn = 1 Tamb = 75 °C; see Figs 14 and 15 continuous during switching CONDITIONS MIN. GND - 0.4 GND - 0.4 GND - 0.4 GND - 0.4 GND - 0.4 GND - 0.4 - -
UBA1707
MAX. 5.5 12.0 13.2 12.0 13.2 VCC + 0.4 150 20 V V V V V V
UNIT
mA mA
- - -40 -25
625 416 +125 +75
mW mW °C °C
THERMAL CHARACTERISTICS SYMBOL Rth j-a UBA1707T UBA1707TS PARAMETER thermal resistance from junction to ambient CONDITIONS in free air 80 120 K/W K/W VALUE UNIT
1997 Nov 07
18
Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
UBA1707
handbook, full pagewidth
150 ILN (mA) 130
MGK714
no power delivered to the loudspeaker
(4)
(3)
(2)
(1)
110
90 Vref 70 with power delivered to the loudspeaker 50
30 2 3 4 5 6 7 8 9 10 11 VLN - VSLPE (V) 12
LINE (1)
The line current value can be calculated from ILN value as follows: I LN × ( R SET + R SLPE ) + V LN V SLPE I line = --------------------------------------------------------------------------------------------- where RSET is the resistive part of ZSET. R SET
Tamb (°C) 45 55 65 75
Ptot (mW) 1000 875 750 625
(2) (3) (4)
When power is delivered to a loudspeaker with RL impedance, the curves must be shifted to the left by: V CC V ref = ------------------------------------------ with maximum power dissipated by the loudspeaker amplifier (dotted line given for VCC = 5.5 V, RL = 16 ). 2 2 × × R L × I LN
2
Fig.14 Safe operating area (UBA1707T).
1997 Nov 07
19
Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
UBA1707
handbook, full pagewidth
140
MGK715
ILN (mA)
no power delivered to the loudspeaker
120
100
(4) (3) (2) (1)
80 Vref 60
40 with power delivered to the loudspeaker
20 2 3 4 5 6 7 8 9 10 11 VLN - VSLPE (V) 12
LINE (1)
The line current value can be calculated from ILN value as follows: I LN × ( R SET + R SLPE ) + V LN V SLPE I line = --------------------------------------------------------------------------------------------- where RSET is the resistive part of ZSET. R SET
Tamb (°C) 45 55 65 75
Ptot (mW) 666 583 500 416
(2) (3) (4)
When power is delivered to a loudspeaker with RL impedance, the curves must be shifted to the left by: V CC V ref = ------------------------------------------ with maximum power dissipated by the loudspeaker amplifier (dotted line given for VCC = 5.5 V, RL = 16 ). 2 2 × × R L × I LN
2
Fig.15 Safe operating area (UBA1707TS).
1997 Nov 07
20
Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
UBA1707
CHARACTERISTICS Iline = 15 mA; VCC = 3.3 V; RSLPE = 10 ; AGC pin connected to GND; Zline = 600 ; ZSET = 619 ; EHI = HIGH; f = 1 kHz; Tamb = 25 °C; bit AGC at logic 1, all other configuration bits at logic 0; measured in test circuit of Fig.17; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supply (pins VCC and GND; bit PD) VCC ICC ICC(pd) operating supply voltage current consumption from pin VCC current consumption from pin VCC in power-down mode bit PD = 1 3.0 - - - 2.2 110 5.5 tbf tbf V mA µA
Line interface (pins LN, SLPE and REG) DC CHARACTERISTICS Vref VLN stabilized voltage between pins LN and SLPE DC line voltage between pins LN and GND Iline = 11 to 140 mA Iline = 2 mA Iline = 4 mA Iline = 15 mA Iline = 140 mA VLN(Rext) DC line voltage between pins LN and SLPE with an external resistor RVA DC line voltage variation with temperature referenced to 25 °C RVA(SLPE-REG) = 8 k tbf - - tbf - - 3.0 1.2 1.8 3.1 4.35 4.5 tbf - - tbf - - V V V V V V
VLN(T)
Tamb = -25 to +75 °C
-
tbf
-
mV
Masks regulation (pins LCC, LVI, CST and RGL; bit CRC) DC CHARACTERISTICS ILCC(max) Rint(LCC) maximum current sunk by pin LCC internal resistance between pins VCC and LCC current sourced from pin LVI bit CRC = 0 200 - - 150 - - µA k
Voltage regulation mode
ILVIV Iknee RREGC - - 200 - - - nA
Current regulation mode
start line current for current regulation mode DC mask slope in current regulation mode bit CRC = 1 35 1.4 mA k
Iline > Iknee; RLVI = 1 M; - RRGL = 7.15 k; bit CRC = 1 -
Current limitation
Iprot current limitation level 140 - mA
1997 Nov 07
21
Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
SYMBOL PARAMETER CONDITIONS MIN. TYP. - - 1.5
UBA1707
MAX.
UNIT
Electronic hook-switch control (pin EHI) VIH VIL Ibias Zi HIGH-level input voltage LOW-level input voltage input bias current VCC = 3.0 to 5.5 V input level = HIGH 2.3 GND - 0.4 0 VCC + 0.4 0.3VCC 3 - - 13 - - V V µA
Transmit amplifier (pins TXI+, TXI- and LN) input impedance between pins TXI+ and GND - or TXI- and GND between pins TXI+ and TXI- - Gv(TX) Gv(TX)(f) Gv(TX)(T) voltage gain from TXI+/TXI- to LN VTXI = 50 mV (RMS) 11 - - 20 36 12 ±0.3 ±0.3 k k dB dB dB
voltage gain variation with f = 300 to 3400 Hz frequency referenced to 1 kHz voltage gain variation with temperature referenced to 25 °C common mode rejection ratio power supply rejection ratio maximum sending signal (RMS value) maximum transmit input voltage (RMS value) for 2% THD on pin LN noise output voltage at pin LN Iline = 15 mA; THD = 2% Iline = 4 mA; THD = 10% Iline = 15 mA Iline = 90 mA pins TXI+ and TXI- short-circuited through 200 in series with 10 µF; psophometrically weighted (P53 curve) Tamb = -25 to +75 °C
CMRR PSRR VLN(max)(rms) ViTX(max)(rms)
- - 1.2 - - - -
tbf 36 1.4 0.26 0.35 0.75 -74
- - - - - - -
dB dB V V V V dBm p
Vno(LN)
Receive amplifier (pins RXI and RXO; bit RXM) Zi Gv(RX) Gv(RX)(f) Gv(RX)(T) input impedance between pins RXI and GND voltage gain from RXI to RXO VRXI = 2 mV (RMS) voltage gain variation with f = 300 to 3400 Hz frequency referenced to 1 kHz voltage gain variation with temperature referenced to 25 °C power supply rejection ratio total harmonic distortion VRXI = 2 mV (RMS) VRXI = 12.5 mV (RMS) VRXI = 19.5 mV (RMS); Iline = 90 mA Tamb = -25 to +75 °C - 37 - - 20 38 ±0.3 ±0.3 - 39 - - k dB dB dB
PSRR THD
- - - -
70 0.03 2 2
- - - -
dB % % %
1997 Nov 07
22
Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
SYMBOL Vno(RXO)(rms) PARAMETER noise output voltage at pin RXO (RMS value) voltage gain reduction from pin RXI to RXO when muted CONDITIONS RXI open-circuit; psophometrically weighted (P53 curve) VRXI = 10 mV (RMS); bit RXM = 1 - MIN. TYP. -81 -
UBA1707
MAX.
UNIT dBVp
Gv(RX)(m)
-
80
-
dB
Automatic gain control (pin AGC; bits RAGC1, RAGC2, SAGC and AGC) Gv(trx) gain control range for transmit and receive amplifiers with respect to Iline = 15 mA highest line current for maximum gain Iline = 90 mA - 6.5 - dB
Istart
bits RAGC1 = 1; RAGC2 = 1 - bits RAGC1 = 1; RAGC2 = 0 - bits RAGC1 = 0; RAGC2 = 1 - bits RAGC1 = 0; RAGC2 = 0 -
23 25.5 27.5 30 62 44 -
- - - - - - ±0.2
mA mA mA mA mA mA dB
Istop
lowest line current for minimum gain when Istart = 23 mA gain variation for transmit and receive amplifiers when AGC is off
bits SAGC = 0; RAGC1 = 1; RAGC2 = 1 bits SAGC = 1; RAGC1 = 1; RAGC2 = 1 bit AGC = 0; Iline = 15 to 140 mA
- - -
Gv(trxoff)
Amplifiers AUXILIARY AMPLIFIER (PINS AXI AND AXO; BIT AXM) Zi Gv(AX) Gv(AX)(f) Gv(AX)(T) input impedance between pins AXI and GND voltage gain from pin AXI to AXO VAXI = 2 mV (RMS) - 30.5 - - 3.65 32 ±0.3 ±0.3 - 33.5 - - k dB dB dB
voltage gain variation with f = 300 to 3400 Hz frequency referenced to 1 kHz voltage gain variation with temperature referenced to 25 °C power supply rejection ratio noise output voltage at pin AXO (RMS value) Tamb = -25 to +75 °C
PSRR Vno(AXO)(rms)
- pin AXI connected to pin - GND through 200 in series with 10 µF; psophometrically weighted (P53 curve) -
82 -83
- -
dB dBVp
Gv(AX)(m)
voltage gain reduction from VAXI = 10 mV (RMS); pin AXI to AXO when amplifier bit AXM = 1 muted
80
-
dB
1997 Nov 07
23
Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
SYMBOL PARAMETER CONDITIONS MIN. TYP.
UBA1707
MAX.
UNIT
LOUDSPEAKER CHANNEL (PINS LSAI1, LSAI2, LSAO, DLC AND LSPGND; BITS LSA1, LSA2, LSPD, VOL0, VOL1, VOL2 AND DLCI)
Loudspeaker amplifier
Zi Gv(LSA) input impedance between pins bits LSA1 = 1, LSA2 = 1 LSAI1 or LSAI2 and GND voltage gain from LSAI1 or LSAI2 to LSAO for maximum volume VLSAI = 8 mV (RMS); bits LSA1 = 1, LSA2 = 1 - 26.5 20 28 - 29.5 k dB
Gv(LSA)(f) Gv(LSA)(T)
voltage gain variation with VLSAI = 8 mV (RMS); frequency referenced to 1 kHz f = 300 to 3400 Hz voltage gain variation with temperature referenced to 25 °C maximum input voltage between pins LSAI1 or LSAI2 and GND (RMS value) Tamb = -25 to +75 °C
- -
±0.3 ±0.3
- -
dB dB
VLSAI(rms)
VCC = 5.0 V; Gv(LSA) = 7 dB; - for 2% of THD in input stage
500
-
mV
Vno(LSAO)(rms) noise output voltage at pin LSAO (RMS value)
pin LSAI1 (with bits LSA1 = 1, LSA2 = 0) or pin LSAI2 (with bits LSA1 = 0, LSA2 = 1) connected to pin GND through 200 in series with 10 µF; psophometrically weighted (P53 curve)
-
-80
-
dBVp
Output capability
VLSAO(p-p) output voltage capability at pin VCC = 5.0 V; LSAO (peak-to-peak value) Gv(LSA) = 28 dB; VLSAI = 100 mV (RMS); RL = 16 VCC = 3.3 V; Gv(LSA) = 28 dB; VLSAI = 100 mV (RMS); RL = 8 ILSAO(max) maximum current capability at pin LSAO (peak value) 3.5 4.0 - V
-
2.4
-
V
150
-
-
mA
1997 Nov 07
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Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
SYMBOL PARAMETER CONDITIONS MIN. TYP.
UBA1707
MAX.
UNIT
Dynamic limiter
tatt attack time VCC = 3 V; Gv(LSA) = 28 dB when VLSAI jumps from 20 mV (RMS) to 20 mV (RMS) + 10 dB; bit DLCI = 0 when VCC drops below 2.7 V; bit DLCI = don't care trel release time VCC = 3 V; Gv(LSA) = 28 dB; when VLSAI jumps from 20 mV (RMS) + 10 dB to 20 mV (RMS); bit DLCI = 0 VCC = 3 V; Gv(LSA) = 28 dB; t > tatt - - 5 ms
-
1
-
ms
-
250
-
ms
THD
total harmonic distortion at VLSAI = 20 mV (RMS) + 10 dB
-
0.5
5
%
Volume control
Gv(LSA) Gv(LSA)(s) Zi(off) voltage gain adjustment range bits (VOL0, VOL1, VOL2)fro m (0, 0, 0) to (1, 1, 1) voltage gain adjustment step VOL0 from 0 to 1 - - 21 3 - - - - dB dB
Switches (pins SWI1, SWI2 and SWI3; bits SWC1, SWC2 and SWC3) AC impedance between pins SWIn and GND when not selected bit SWCn = 0 50 k
Zi(on)
AC impedance between pins 2 mA < ISWIn < 20 mA; SWIn and GND when selected bit SWCn = 1
-
-
30
Serial interface (pins DATA, CLK and EN) VIH VIL Ibias Ci HIGH-level input voltage LOW-level input voltage input bias current input capacitance at pins DATA, CLK and EN VCC = 3 to 5.5 V input level = HIGH 2.3 GND - 0.4 0 - - - 1.5 tbf VCC + 0.4 0.3VCC 3 - V V µA pF
1997 Nov 07
25
Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
SERIAL BUS TIMING CHARACTERISTICS VCC = 3.3 V; Tamb = 25 °C; unless otherwise specified. SYMBOL Serial programming clock; pin CLK fclk tSTART tEND tW(min) tSU;EN tSU;DATA tHD;DATA clock frequency 0 300 - - - - - - PARAMETER MIN.
UBA1707
MAX.
UNIT
kHz µs µs µs µs µs µs
Enable programming; pin EN delay to falling clock edge delay from last rising clock edge minimum inactive pulse width enable set-up time to next clock edge tbf tbf tbf tbf
Serial data; pin DATA input data to clock set-up time input data to clock hold time tbf tbf
handbook, full pagewidth
tW tHD;DATA 1/fclk tSU;EN
tSU;DATA CLK
DATA
D5
D4
AD1
AD0
EN
tSTART
tEND
MGK716
Fig.16 Serial bus timing diagram.
1997 Nov 07
26
ok, full pagewidth
1997 Nov 07
VRXI VLN 220 nF from microcontroller CRXI LN DATA EN 12 28 TXI+ 18 15 1 µF VTXI 16 17 AXO CLSAI2 220 nF CLSAI1 LSAI1 26 25 24 6 LCC TPDARL MPSA92 CLCC 6.8 pF 1 M 22 pF
MGK717
Philips Semiconductors
GND CLK 14 DLC 220 nF CAXI VAXI 10 8 CDLC RXI RXO 22 19 20 21 11 13
SWI3
SWI2
SWI1
EHI
2
AXI
TEST AND APPLICATION INFORMATION
Cline
100 µF TXI-
619
ZSET 27
CEMC
UBA1707
LSAI2
10 nF
VLSAI2
ICC VCC
Cordless telephone, answering machine line interface
Iline VVCC 7 CST CREG 4.7 µF RRGL 7.15 k LVI REG AGC RGL 4 3 9 5 1 SLPE
Zline
220 nF LSAO 23 LSPGND RSPLE 10 CLSAO 220 µF
27
CCST 470 pF RLVI CLVI RON-HOOK TNON-HOOK MPSA42 DSW 1N4148 100 k DPROT 1N4148 RPLD 20 k
600
VLSAI1
CVCC
10 µF
RLSAO 16
TNSW
BUX86
Objective specification
UBA1707
Fig.17 Test circuit.
1997 Nov 07
Rast1 Rast2 3.92 k CRXI VLN 392 CRXO LN DATA EN 12 1 TXI+ 18 15 AXO LSAI2 GND 22 ICC VCC 25 24 6 LCC TPDARL MPSA92 CLCC(4) 6.8 pF 1 M 22 pF
MGK718
260 k 100 nF Rast3
ok, full pagewidth
BZX79C8V2 Zbal
Philips Semiconductors
MICROCONTROLLER
SWI3 CLK 14 SLPE AXI 10 CAXI 1 µF CAXO CLSAI2 100 nF CLSAI1 26 LSAI1 100 nF LSAO 28 RGL RRGL 7.15 k DLC CDLC 220 nF 23 LSPGND CLSAO 220 µF RSLPE 10 8 RXI RXO 19 20 21 11 13
SWI2
SWI1
EHI
2 CTXIP 100 nF
CTXIM TXI- 17
16
ZSET 100 nF 27
619
CEMC(3)
UBA1707
10 nF
Cordless telephone, answering machine line interface
28
VVCC 7 CST CLVI(2) 470 pF 4.7 µF CREG LVI REG AGC 4 3 9 5 CVCC 10 µF CCST RLVI RON-HOOK DSW 100 k DPROT 1N4148 1N4148 RPLD 20 k MPSA42 TNON-HOOK
(1)
BRIDGE 4 × BAS11
a/b
BOD BR211-240
LSP 16
b/a
TNSW )
BUX86
(MPSA42
(1) (2) (3) (4)
In case of low line current in voltage regulation mode. Only required in current regulation mode. To improve EMC performance; necessary for stability. To improve stability only in current regulation mode.
Objective specification
UBA1707
Fig.18 Typical application.
Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
PACKAGE OUTLINES SO28: plastic small outline package; 28 leads; body width 7.5 mm
UBA1707
SOT136-1
D
E
A X
c y HE v M A
Z 28 15
Q A2 A1 pin 1 index Lp L 1 e bp 14 w M detail X (A 3) A
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 2.65 0.10 A1 0.30 0.10 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 c 0.32 0.23 D (1) 18.1 17.7 0.71 0.69 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.050 HE 10.65 10.00 L 1.4 Lp 1.1 0.4 Q 1.1 1.0 0.043 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z
(1)
0.9 0.4 0.035 0.016
0.012 0.096 0.004 0.089
0.019 0.013 0.014 0.009
0.419 0.043 0.055 0.394 0.016
8o 0o
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT136-1 REFERENCES IEC 075E06 JEDEC MS-013AE EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-01-24 97-05-22
1997 Nov 07
29
Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
UBA1707
SSOP28: plastic shrink small outline package; 28 leads; body width 5.3 mm
SOT341-1
D
E
A X
c y HE v M A
Z 28 15
Q A2 pin 1 index A1 (A 3) Lp L 1 e bp 14 w M detail X A
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 2.0 A1 0.21 0.05 A2 1.80 1.65 A3 0.25 bp 0.38 0.25 c 0.20 0.09 D (1) 10.4 10.0 E (1) 5.4 5.2 e 0.65 HE 7.9 7.6 L 1.25 Lp 1.03 0.63 Q 0.9 0.7 v 0.2 w 0.13 y 0.1 Z (1) 1.1 0.7 8 0o
o
Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION SOT341-1 REFERENCES IEC JEDEC MO-150AH EIAJ EUROPEAN PROJECTION
ISSUE DATE 93-09-08 95-02-04
1997 Nov 07
30
Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). Reflow soldering Reflow soldering techniques are suitable for all SO and SSOP packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C. Wave soldering SO Wave soldering techniques can be used for all SO packages if the following conditions are observed: · A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. · The longitudinal axis of the package footprint must be parallel to the solder flow. · The package footprint must incorporate solder thieves at the downstream end. SSOP
UBA1707
Wave soldering is not recommended for SSOP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices. If wave soldering cannot be avoided, the following conditions must be observed: · A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. · The longitudinal axis of the package footprint must be parallel to the solder flow and must incorporate solder thieves at the downstream end. Even with these conditions, only consider wave soldering SSOP packages that have a body width of 4.4 mm, that is SSOP16 (SOT369-1) or SSOP20 (SOT266-1). METHOD (SO AND SSOP) During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C.
1997 Nov 07
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Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
UBA1707
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1997 Nov 07
32
Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
NOTES
UBA1707
1997 Nov 07
33
Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
NOTES
UBA1707
1997 Nov 07
34
Philips Semiconductors
Objective specification
Cordless telephone, answering machine line interface
NOTES
UBA1707
1997 Nov 07
35
Philips Semiconductors a worldwide company
Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 160 1010, Fax. +43 160 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 689 211, Fax. +359 2 689 102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S, Tel. +45 32 88 2636, Fax. +45 31 57 0044 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615800, Fax. +358 9 61580920 France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex, Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427 Germany: Hammerbrookstraße 69, D-20097 HAMBURG, Tel. +49 40 23 53 60, Fax. +49 40 23 536 300 Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS, Tel. +30 1 4894 339/239, Fax. +30 1 4814 240 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: see Singapore Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3, 20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. +27 11 470 5911, Fax. +27 11 470 5494 South America: Rua do Rocio 220, 5th floor, Suite 51, 04552-903 São Paulo, SÃO PAULO - SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 829 1849 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 3 301 6312, Fax. +34 3 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 632 2000, Fax. +46 8 632 2745 Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH, Tel. +41 1 488 2686, Fax. +41 1 481 7730 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 625 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 © Philips Electronics N.V. 1997
Internet: http://www.semiconductors.philips.com
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Printed in The Netherlands
417027/1200/01/pp36
Date of release: 1997 Nov 07
Document order number:
9397 750 02638