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DTC-9.4
Ref. No. 3771
SERVICE MANUAL Jun, 2003
AV CONTROLLER
MODEL DTC-9.4
Ð
CONT
+
MUTE
LIGHT
+
CH
Ð
VOL
Black model
BMDD 120V AC, 60Hz
SAFETY-RELATED COMPONENT
WARNING!!
COMPONENTS IDENTIFIED BY MARK ON THE
SCHEMATIC DIAGRAM AND IN THE PARTS LIST ARE
CRITICAL FOR RISK OF FIRE AND ELECTRIC SHOCK.
REPLACE THESE COMPONENTS WITH ONKYO
PARTS WHOSE PART NUMBERS APPEAR AS SHOWN
IN THIS MANUAL.
MAKE LEAKAGE-CURRENT OR RESISTANCE
MEASUREMENTS TO DETERMINE THAT EXPOSED
PARTS ARE ACCEPTABLY INSULATED FROM THE
SUPPLY CIRCUIT BEFORE RETURNING THE
APPLIANCE TO THE CUSTOMER.
DTC-9.4
CONFIRMATION PROCEDURES
Test Mode
1. Turn POWER button on.
2. Press and hold down CD button, then press DISPLAY and STANDBY/ON buttons.
3. After "TEST " on the FL tube is displayed, press CD button to set the unit to the test mode of FL tube.
Note: VIDEO 1:TEST-1 VIDEO 2 :TEST-2
VIDEO 3 :TEST-3 VIDEO 4:TEST-4
Test mode of FL tube
ZONE 2....UP
REC OUT......DOWN
UP DOWN
direction All segments direction
light on.
ZONE 2 REC OUT
"43210987654321"
light on.
The segments of even
number light on .
The segments of odd
number light on .
The segments of odd
number light on .
a:Net-tune function "N":avaiable b:Optical input 4 "4":avaiable
MAC address c:Tuner aria "U":USA and Canad "E":Europe "W":Worldiwde " ":Japan
d:RDS function "R":avaiable e:Video format "P":PAL/NTSC auto "N":NTSC
f:3 line Y/C separation function "3":avaiable
Displayed of Initializing
g:Video converer function: "C":avaiable
"abcdefghijklmn" h:12V trigger function "A":A/B/Zone2 "Z":Zone 2 only
light on. i:Dimmer interlock function "D":avaiable
j:Zone 2 Lineout function "L":avaiable
N4U N3CADL HU
k:AAC function "A":avaiable
l: Dolby headphone function "H":avaiable m: THX Ultra2:"U":avaiable
n:Number of component video inputs "4": 4 inputs " ": 2 inputs
Note: All functions " ": No avaiable AAC: Japanese model only
Press POWER button
to finish the test mode of FL tube.
DTC-9.4
SUB MICROPROCESSOR-TERMINAL DESCRIPTION
DTC-9.4
DTC-9.4
MAIN MICROPROCESSOR-TERMINAL DESCRIPTION
No. Function I/O Description No. Function I/O Description
1 DSPDA O Serial data output pin to transfer the data to DSP, DIR, Net-tune DAC and Second PLL ICs. 51 ~CODECPD O Power down output pin of CODEC IC.
2 DSPCL O Serial clock output pin to transfer the data to DSP, DIR and Net-tune DAC ICs. 52 UPSMPL O Clock select output pin for up-sampling.
3 TNCL CLK Serial clock output pin for the tone control ICs. 53 ~DSP1RST O Reset output pin of first DSP IC.
4 Z2LMUT O Muting control signal output pin for line of zone 2 channel. 54 DSP1PM O PLL initializing output pin of first DSP IC.
5 HPMUT O Muting control signal output pin for headphone. 55 DSP1GP8 O PCM or Non PCM information output pin of first DSP IC.
6 Z2MUT O Muting control signal output pin for zone 2 channel when the power source is turned on. 56 DSP1BST O Host I/F bootstrap output pin of first DSP IC.
7 AMUT O Muting control signal output pin of analog section. 57 ~DSP1HCS O Host I/F chip select output pin of first DSP IC.
8 VSS External data bus width select pin. 58 ~DSP2RST O Second DSP reset output pin.
9 VSS Processor mode select pin 59 DSP2BST O Host I/F bootstrap output pin of second DSP IC.
10 ~PRTCTTHM I Detection input pin for thermal protector. Not used. 60 ~DSP2HCS O Host I/F chip select output pin of second DSP IC.
11 SEC1H O Primary voltage select pin for main amplifier. Not used. 61 (2ndBOOT) O "L" fixed output pin.
12 ~RESET System reset input pin 62 VCC Power supply pin. Apply +5V.
13 XOUT System clock output pin. Connect 16MHz ceramic resonator between #13 and #15. 63 (2ndPAGESEL O "H" fixed output pin.
14 VSS Ground pin. 64 VSS Power supply pin. Ground
15 XIN System clock input pin. Connect 16MHz ceramic resonator between #13 and #15. 65 (HPAGE) O "L" fixed output pin.
16 VCC Power supply pin. Apply 5V. 66 DTCDACCL O Clock output pin for DAC of DTC.D
17 I Not used. 67 DTCDACCS O Chip select output pin for DAC of DTC.D
18 PRTCTV I Detection input pin for protection circuit of abnormal voltage and current. 68 DTCDACDA O data output pin for DAC of DTC.D
19 RDSCL I Serial clock input pin of RDS demodulator. 69 (2ndGP10) O "L" fixed output pin.
20 ~POFF I Power failure detection input pin. 70 ~DSP2HACN I Host I/F acknowledgement input pin of second DSP.2
21 ~RDSID I Identification input pin of RDS demodulator. 71 ~DSP1HACN I Host I/F acknowledgement input pin of first DSP.1.
22 RDSDA I Serial data input pin to transfer RDS demodulator. 72 DSP2HDOUT I Host I/F serial data output pin to second DSP IC.
23 ~XPOR O Reset output pin to multi media microprocessor when power is turned on. 73 DIRINT1 I INT 1 input pin of DIR IC.
24 ~XDACS O Chip select output pin of DAC for Net tune. 74 DIRINT0 I INT 0 input pin of DIR IC.
25 ~XDARST O Reset signal output pin of DAC for Net tune. 75 ~TNCS2 O Chip select output pin to tone control IC.
26 ~TNCS1 O Chip select output pin for tone control IC of front channel. 76 VPOWER O Power supply relay control output pin of video circuit.
27 NPOWER O Power supply control output pin of audio circuit. 77 12VTRGB O 12V trigger output pin B.
28 TNDA O Serial data output pin to tone control IC. 78 12VTRGA O 12V trigger output pin A.
29 IICSCL O Serial clock output pin to Y/C, Component separation IC. 79 12VTRGZ O 12V trigger output pin ZONE 2.
30 IICSDA O Serial data output pin to Y/C, Component separation IC. 80 SPRLZ2 O Speaker relay control output pin for Zone 2.
31 ~XPOWER O Power supply control output pin. Not used. 81 SPRLF O Speaker relay control output pin for all channels.
32 ~SUBRESET O Reset signal output pin for sub microprocessor. 82 APOWER O Power supply relay control output pin of audio circuit.
33 ~SUBPOFF O Power off output pin to sub microprocessor 83 PLLCE O Chip enable output pin to PLL IC.
34 ~SUBREQ I Transfer request signal input pin for sub microprocessor. 84 TUMUT O Muting control output pin for tuner section.
35 MAINSO O Serial data output pin to transfer data between main and sub microprocessor. 85 ~SD I Detection input pin for signal strength.
36 MAINSI I Serial data input pin to transfer data between main and sub microprocessor. 86 ~STEREO I Detection input pin for FM stereo broadcast.
37 MAINSCK O Serial clock output pin to transfer data between main and sub microprocessor. 87 AFSTB O Strobe signal output pin of analog function switch ICs.
38 ~MAINREQ O Request signal output pin to transfer data between main and sub microprocessor. 88 AFDA O Serial data output pin for function switch ICs.
39 P57 O Not used. 89 AFCL O Serial clock output pin for function switch ICs.
40 (2ndBTACT) O Not used. 90 VPCL O Serial clock output pin for electric volume and PLL ICs.
41 P55 I Mode setting pin to write the program on flash microprocessor. 91 VPDA O Serial data output pin for electric volume and PLL ICs.
42 ~DIRCS O Chip select output pin to DIR(AK4114) IC. 92 VLSTB O Strobe output pin of electrical volume.
43 ~DIRRST O Reset output pin to DIR IC. 93 CDT0 I Serial data input pin for DSP and DIR ICs.
44 DFS O DFS output pin of DAC and CODEC ICs. 94 DSP1GP9 I Permission information input pin to read bit stream information of first DSP.
45 ~DAPD O Power down output pin of DAC. 95 DSP1GP10 I INTREQ input pin of first DSP IC.
46 P50 I Write mode setting pin of flash microprocessor. 96 VSS Ground pin for A/D converter.
47 K I Lock input pin of second PLL IC. 97 VOLH I Input pin to measure the output voltage of main amplifier.
DTC-9.4
48 2NDPLLCL O Clock output pin to second PLL IC. 98 VREF Reference voltage input pin for A/D converter.
49 2NDPLLCS O Chip select output pin of second PLL IC. 99 VCC Power supply pin for A/D converter.
50 EX O Input select output pin of net tune. 100 DSP1HDOUT I Serial data output pin of host I/F of first DSP.
DTC-9.4
A B C D
SUB MICROPROCESSOR-CONNECTION DIAGRAM
1
P204
RI
F1 1
F1 2
NP 3
NP 4
INITIALIZING
1G 5
2G 6
3G 7 Q7202
4G 8 BUFFER
P7481
5G 9
6G 10 PHONES
7G 11
76 NETTUNE
8G 12
SUBPOFF
MAINREQ
SYSOUT
OPTO4
HPDET
9G 13
2 10G 14
RI
11G 15
12G 16
80
79
78
77
75
74
73
72
71
13G 17
14G 18
15G 19 81
SYNC
16G 20 82
NC 21 Y SIGNAL 83
13G 12G ISS
NC 22 64 1 DETECTOR 84
Q7504 14G 2 11G 85
NC 23 63 CIRCUIT
15G 3 10G FLRES 86
NC 24 16G 62
4 9G 87
NC 25 Q7503 61
5 8G 88
NC 26 60
P1 6 7G TUNER
P1 27 59 89
P2 7 6G INITIALIZING VIDEO
P2 28 58 90
P3 8 5G ZONE2
P3 29 57 91
P4 9 4G INITIALIZING 1 2 V , D I M
P4 30 56 92
P5 3G K3
HNA-16MMT
P5 31 55 10 93
P6 11 2G K2
Q7501
P6 32 54 94
P7 12 1G K1
P7 33 53 95
P8 FLRES AVSS
3 P8 34
P9 35
P9
52
51
13
14
FLCS1 K0
96
97
P10 FLOSDCL VREF
P10 36 50 15 98
P11 16 FLOSDDA AVCC
P11 37 49 99
P12 17
P12 38 48 100
P13 18
P13 39 47
P14 19
10
M66005FP
P14 40 46
1
2
3
4
5
6
7
8
9
P15 20
P15 41 45
CNVSS
DIMPWM
MAININ
REMIN
VDDA
BYTE
P16
Q7502
P16 42 44 21
P17 22
P17 43 43
P18 23 P36 FLCS1
P18 44 42
P19 24 P35 FLOSDCL
P19 45 41
P20 P34 FLOSDDA
OSDCS
P20 46 40 25
P21 26 P33
P21 47 39 P32
P22 27
P22 48 38
P23 28 P31
P23 49 37
P24 29 P30
P24 50 36
P25 30 P29 Q2001
P25 51 35 P28
P26 31 LC74761M
P26 52 34 -VP
P27
P27 53 33 32 15 RST
P28 54 14 SW4
4 13 SW3
P29 55 12 SW2
P30 56 11 SW1
P31 57 10 OSDSCK
P32 58 9 OSDDATA
P33 59 8 OSDCS
P34 60 7 VSYNCOUT
6 XTALOUT2 Q2
P35 61 5 XTALIN2
NC 62 4 HSYNCOUT VID
NP 63 3 XTALOUT1 SW
NP 64 29 2 XTALIN1
SYNCDET 1
Vss
F2 65
F2 66
U7201
K0
S7559 REMOTE SENSOR
S7568 S7567 S7566 S7565 S7563 S7562 S7561
THX SURROUND S7564
STEREO OFF ZONE 2 REC Z2 LEVL> Z2 LEVL<
DISPLAY K1
S7578 S7577 S7576 S7575 S7573 S7572 S7571 S7541 +B
TUNING UP TUNING MENU MEMORY DSP > DSP < STANDBY
DOWN DIMMER
/ON
5 S7551 S7549 S7548 S7546 S7545 S7544 S7543 S7542
K2
Q
S7547
TAPE VIDEO 5 VIDEO 4 VIDEO 3 VIDEO 2 VIDEO 1 DVD AUDIO SEL PURE AUDIO
K3
S7579 S7558 S7557 S7556 S7555 S7554 S7553 S7552 S7574 P
ENTER PRESET < PRESET > EXIT NET CD PHONO TUNER FM MODE
DTC-9.4
A B C D
SUB MICROPROCESSOR-CONNECTION DIAGRAM
+B
D7533
D7534
+B +B RED
D7535
Q7534 +B GREEN
1 D7521 D7532 D7531 D7530 D7529 D7527 D7522 D7526 D7525 D7524 D7523
UPSPL
Q7536
Q7535
Q7537
DVD NET CD TUNER T1 V1 V5 V4 V3 V2
PHONO
PURE
Q7532 Q7531 Q7530 Q7529 Q7527 Q7522 Q7526 Q7525 Q7524 Q7523
Q7521
RZNET
RZV1
RZV4
RZPH
RZCD
RZAM
RZV5
RZV3
RZV2
RZT1
RZDVD
Q7202
STBY
BUFFER
Q7533
+B
SYSOUT
RZNET
RZDVD
HPDET
UPSPL
RZAM
RZCD
2
PURE
RZPH
VDST
VCC2
STBY
VSS2
RZT1
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
LEDGRE
50 LEDRED
49 RZV1
48 RZV5
47
46 RZV4
45
44 RZV3
43 RZV2
Q7201 42
41 VBJ
M30624FGAFP 40
VAJ 33 38
39
SUBREQ 34
38 VOLUME
MAINSCK 37 Q7000
37
MAINSO 35 MAIN S7569
36 SUBSO 36
3 35
34
RTS1
MAICROPROCESSOR
CLK1
33 RXD1
32 TXD1
31
10
11
12
13
14
15
16
17
18
19
VSYNC 20
21
22
23
24
25
26
27
28
232RX 29
232TX 30
7
8
CNVSS9
~RESET
MAININ
VDDA
VDCL
BYTE
VCC1
XOUT
VSS1
XIN
TRIGGER 12V
P203
+5V
+5V
X7201 R204
R202
1K
16MHz Q202 1K
2SA1162
4
Q2010 VIDEO SELECT
VIDEO SELECTOR CONTROL
SW TC9273 SIGNAL
RS-232
P201
1 VDD C4+ 20
PD4721GS
IR-IN
2 C1+ GND19
+B
3 VCC C4- 18
4 C1- VSS17
5 Q211
P202
5 C5+ STBY16
Q201
IR-OUT 6 C5- VCHA15
232TXD
7 14
PC817X 8 13
9 12
232RXD
10 11
DTC-9.4
A B C D
MAIN MICRPROCESSOR-CONNECTION DIAGRAM
Shows a left channel only.
LEFT CH.
BAL PRE
Q5814 Q5834 OUTPUT
RN1241 RN1241 SURROU
BACK
RN1241
Q5824
1 Q604,Q607, Q4401 Q4400
Q5844
Q616 TONE LEFT CH.
TONE RN1241 BAL PRE
NETTUNE CONTROL CONTROL OUTPUT
PCB NJU7308G NJU7308G
Q7001
RESET PIN
POWER
FAILURE
DET.
Q2821
VIDEO
ENCODER X7000
16MHz
TA1270BF OSC
2
~PRTCTTHM
~XDARST
NPOWER
~XDACS
PRTCTV
~RESET
~TNCS1
~RDSID
RDSDA
CNVSS
~XPOR
RDSCL
IICSDA
SEC1H
Z2MUT
~POFF
AMUT
XOUT
TNDA
BYTE
IISCL
VCC
VSS
P85
XIN
11
10
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
9
8
7
~XPOWER 31
~SUBRESET 32
Q7201 ~SUBPOFF 33
~SUBREQ
SUB 34
MAINSO 35
MICROPROCESSOR MAINSI
M30624FGFP 36
MAINSCK 37
~MAINREQ 38
Q7000
P57 39
3 P56 40
P55
Q103
~DIRCS
41 M30624FGAFP
AD/DA CONVERTER 42
~DIRRST 43
AK4528VF DFS 44
~DAPD 45
P50 46
Q160 2NDPLLLOCK 47
SECONDARY 2NDPLLCL 48
PLL 2NDPLLCS 49
TC9246F EX 50
70
71
72
73
74
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
~CODECPD
UPSMPL
~DSP1RST
DSP1PM
DSP1GP8
DSP1BST
~DSP1HCS
~DSP2RST
DSP2BST
~DSP2HCS
P31
VCC
P30
VSS
P27
DTCDACCL
DTCDACCS
DTCDACDA
P23
~DSP2HACN
~DSP1HACN
DSP2HDOUT
DIRINT1
DIRINT0
TNCS2
4
Q131 DIR
AK4141VQ
DSPDA
DSPCL
Q190
TC74HC157 34
33
Q700 Q703
FIRST SECONDARY
5 Q121 DSP DSP
TC74VHCT00 MB86D41 MB86344
Q5101
192kHz DAC
WM8740
DTC-9.4
A B C D
MAIN MICRPROCESSOR-CONNECTION DIAGRAM
EFT CH.
AL PRE
UTPUT
Shows a left channel only. Shows a left channel only. Shows a left channel only.
LEFT CH.
BAL PRE LEFT CH. CENTER/SUB SURROUND
SURROUND
OUTPUT PRE WOOFER PRE LEFT CH.
BACK Q5812 Q5832 Q4600 Q4610 OUTPUT Q4602 Q4612 OUTPUT Q4603 Q4613 PRE
1 Q605
OUTPUT
RN1241 RN1241 RN1441 RN1441 RN1441 RN1441 RN1441 RN1441
EFT CH. D/A RN1241
AL PRE Q5822
OUTPUT CONVERTER Q5842
WM8716
RN1241 LEFT CH. SURROUND
BAL PRE BACK PRE
OUTPUT Q4605 Q4615 OUTPUT
Q4200
RN1441 RN1441 FRONT CHANNEL
ELECTRONIC
VOLUME
TC94A07F
HP
TERMINAL
Q4812 Q4814 Q4201
RN1441 RN1441 CENTER/SUBWOOFER
CHANNELS
2 ELECTRONIC