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CIRCUIT
TABLE OF CONTENTS SYSTEM BLOCK DIAGRAM POWER BLOCK DIAGRAM REVISION HISTORY FUNC TEST POWER CONNECTOR / POWER ALIAS SIGNAL ALIAS 2.5V VREG 1.2V VREG 3.3V/5V PWRON SWITCHING SMU CPU LOGIC ANALYZER CONNECTOR CPU FAN 2 AND SYSTEM FAN CONTROL CPU FAN 1 CONTROL I2C CONNECTIONS INDICATOR LED U3LITE CORE SHASTA CORE U3LITE MISC SHASTA SERIAL PULSAR POWER PULSAR CLOCKS U3LITE APPLE PI NEO APPLE PI CPU STRAPS NEO POWER & BYPASS CPU BYPASS CPU VREG CPU VREG CPU VREG OUTPUT CAPS CPU DIODE CONDITIONER U3LITE MEMORY SERIES TERMINATION DIMMS PARALLEL TERMINATION PARALLEL TERMINATION VTT VREG
BLOCK
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48 49 50 51 52 53 54 55 56 57 58 59 60* 62* 64 74* 75* 76 77* 80* 83 84* 87 88* 90 91* 92 94 95* 96* 97* 98* 99* 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70
CIRCUIT
TOP
* PAGES WHERE MASTER PAGE IS IN A DIFFERENT SCHEMATIC
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PROCESSOR MEMORY
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U3LITE AGP GPU AGP GPU VREG EXTERNAL TMDS TRANSMITTER GPU FRAME BUFFER FRAME BUFFER TERMINATION GRAPHICS DDR SDRAM A GRAPHICS DDR SDRAM B GPU STRAPS GPU DAC & CLOCKS GPU DVI & STRAPS EXT VGA & TMDS U3LITE HYPERTRANSPORT SHASTA HYPERTRANSPORT HYPERTRANSPORT LA CONNECTORS SHASTA PCI BOOT ROM AIRPORT EXTREME USB2 PCI SHASTA DISK DISK CONNECTORS SHASTA ETHERNET ETHERNET PHY & CONNECTORS SHASTA FIREWIRE FIREWIRE A PHY & CONNECTORS USB HOST INTERFACE USB DEVICE INTERFACE MODEM CONNECTOR AUDIO CODEC, LINE IN, MIC IN HEADPHONE / LINE OUT SPEAKER AMP AUDIO CONNECTORS AUDIO POWER SUPPLIES
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BLOCK
GRAPHICS
HT
PCI DISK ETHERNET FIREWIRE USB
MODEM
AUDIO
8
7
6
U2900
5
CPU
NEO 10S
PAGE 29
4
3
2
1
U1300
U1301
J5900, J5901 J5902, J5903 17",20" INVERTER
SMU
PAGE 13 32-BIT APPLE PI ELASTIC INTERFACE 1.2V/900MHZ J4000 J4001 PAGE 28
RTC
PAGE 13
D
TMDS EXT VGA
PAGE 59
U5400, U5401
U4900 64-BIT FRAME BUFFER 2.6V/540MHZ
MAIN MEMORY
APPLE PI
U3 32-BIT 8X AGP 0.8V/533MHZ
4X = 1.5V I/O = 1.5V
FRAME BUFFER A
PAGE 54
GPU
NV18B/NV34
PAGE 49
PAGE 37
AGP
PAGE 48
U3LITE
CORE
PAGE 22
64/128-BIT MAIN MEMORY 2.6V/400MHZ
333MHZ SUPPORTED
SERIES TERM
PAGE 38
DIMMS
PARALLEL TERM
PAGES 44&45
PAGE 40
MISC
64-BIT FRAME BUFFER 2.6V/540MHZ PAGE 24
HYPERTRANSPORT
PAGE 60
8-BIT HYPERTRANSPORT 1.2V/400MHZ
CONTROL = 2.5V
U5500, U5501 U2600
PULSAR
C
FRAME BUFFER B
PAGE 55
I2C
PAGE 18
POWER
PAGE 26
CLOCKS
PAGE 27
J6400 J6401 J6402
HT DEBUG
PAGE 64 U7500
BOOTROM
JXXXX
SATA/150
1.2V/1.5GHZ
PAGE 83 J8302
PAGE 62 PAGE 80
PAGE 74
PCI
EDUCATION: NOT USED GOOD,BETTER,BEST: HARD DRIVE
SATA CONNECTOR
HYPERTRANSPORT
U2300
FOR DEVELOPMENT ONLY
SATA/150
1.2V/1.5GHZ
PAGE 83 PAGE 80
J8301
B
EDUCATION: HARD DRIVE GOOD,BETTER,BEST: OPTICAL
UATA CONNECTOR
PAGE 83
UATA/133
3.3V/133MHZ
ETHERNET FIREWIRE
A
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GMII (3.3V/125MHz) 8-bit TX & 8-bit RX
U8700
PAGE 84
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CORE
PAGE 25
SHASTA
UATA
GPIO/PCI64
SATA DEV CONNECTOR
NCs
PAGE 23
PAGE 91
PAGE 88
PAGE 25 SCCA I2S0 I2S1
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PAGE 75
32-bit PCI (5V-3.3V/33MHz)
m e h c
1 J7600
U7700
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2 3
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J9210/J9220/J9230
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To Shasta SCCA
D
USB CONNECTORS
PAGE 92
J9400
MICRODASH MODEM
CONNECTOR
PAGE 94
J9240
4
5
BLUETOOTH CONNECTOR
PAGE 92
C
USB
PAGE 91
AIRPORT EXTREME CONNECTOR
PAGE 76
USB 2.0
uPD720101 PCI
PAGE 77
10/100 ETHERNET
BCM5221
PAGE 87
SATA1
SATA
SATA2
J9401
I2S
CTL-LESS / SOFT MODEM CONNECTOR
PAGE 94
B
SCCB I2S2
1394 OHCI (3.3V/98MHz) 8-bit TX/RX
U9500
S/PDIF
OPTICAL OUT J9803
AUDIO CODEC PCM3052
PAGE 95
COMBO OUT CONNECTOR LINE OUT AMP
PAGE 97 J9801 PAGE 98 LINE OUT
U9000
FIREWIRE A 802A
PAGE 90 0 1
LINE IN AMP
2 Diff pairs PAGE 97
SPEAKER AMP
PAGE 97
SPEAKER
CONNECTOR
PAGE 98
A
4 Diff pairs J8700
J9000, J9001
J9800
J9802
ETHERNET CONNECTOR
PAGE 87
FIREWIRE A CONNECTORS
PAGE 90
LINE IN
CONNECTOR
PAGE 98
MIC
CONNECTOR
PAGE 98
8
7
6
5
4
3
2
1
8
7
6
5
4
3
2
SYS_POWERUP_L
1
SMU
POWER SEQUENCE PIN
J700 PAGE 7
SYS_POWERUP_L
POWER CONNECTOR
PP12V_RUN
20" PANEL POWER 20" LCD INVERTER
10
TURN_ON_SHASTA_CORE_L TURN_ON_PP1V2_L
10
D
PP24V_RUN
FW CONN 20" LCD INVERTER
PP5V_RUN
HDD & OPTICAL
PP5V_ALL
PP3V3_RUN
PCI BUS AUDIO CODEC
PP3V3_ALL LINEAR
PAGE 11
3.3V
FW PHY SMU
PP5V_RUN_CPU
6 7 30 31 36
C
PP5V_RUN_AUDIO LINEAR
PAGE 99
CPU CORE SWITCHER
PAGE 33
PP2V5_RUN_CPU_AVDD
ALIAS
CPU_AVDD_EN
31
LINEAR
CPU AVDD
PP5V_PWRON FET SWITCH
PAGE 11
SC2643VX*1 SC1211*4
GPUL
PAGE 31
5V
HP/LINEOUT AMP
2.5V
5V
0.8~1.2V
USB CONN UDASH MODEM
PP4V5_RUN_AUDIO LINEAR
PAGE 99
4.5V
AUDIO CODEC
PP2V5_RUN FET SWITCH
PAGE 9
B
A
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RAM TERM GRAPHIC FB
PP1V25_RAM_VTT LINEAR IN
RAM VTT
-s p to
PAGE 9
PP2V5_PWRON SWITCHER
IRU3037CS
2.62V
SHASTA HT DDR DIMM
m e h c
PP3V3_PWRON FET SWITCH
PAGE 11
3.3V
ENET PHY USB2 HOST MODEM & BT
GPU CORE SWITCHER
PAGE 50
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5V
PP1V2_SHASTA_CORE
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IN
SMU_PWRSEQ_P1_0 SMU_PWRSEQ_P1_1 SMU_PWRSEQ_P9_5
13
13
13
(PWR_GOOD_SB_CORE)
D
SMU_PWRSEQ_P9_6
13
(PWR_GOOD_PP2V5)
SMU_PWRSEQ_P1_2
13
(TURN_ON_VTT)
PP3V3_ALL
1
R331
10K
5% 1/16W MF 2 402
PWR_GOOD_SB_CORE
SWITCHER
IN
C
PAGE 10
IRU3037ACS
SHASTA CORE
1.2V
IRU3037CS
NV18B/NV34
11 23 10 6
1.6/1.4V
3 RAIL_CTL_NEG 8
LM339A V+
SOI 14
PP1V2_PWRON_SB_VCORE
U3LITE CORE SWITCHER
R330
1 5% 1/16W MF 402
100K 2 COMPARE_SB_CORE
1
U1100
9
GND
12
PAGE 22
IRU3037CS
C330
1.5V
U3LITE CORE
PP2V5_PWRON
PP1V2_PWRON FET SWITCH IN
PAGE 10 PWRON_SD PWRON_DISK_SB
PP1V2_RUN FET SWITCH
PAGE 10
20% 16V 2 CERM 402
0.01UF
IN
IN
HT BUS API BUS
PP1V5_PWRON LINEAR
PP5V_ALL PP3V3_ALL
PAGE 50
1.5V
PULSAR CORE
1
R342
150K
1
5% 1/16W MF 2 402
R341
10K
B
3 6
PS_2V_REF
LM339A V+
SOI 1
PP1V5_RUN POWER SW
PAGE 50 AGP BUS
5% 1/16W MF 2 402
R340
1 5% 1/16W MF 402
100K 2
1
U1100
COMPARE_PP2V5
7
PWR_GOOD_PP2V5
GND
12
C340
1.25V
0.01UF
1
20% 16V 2 CERM 402
R343
100K
5% 1/16W MF 2 402
46
TURN_ON_VTT
A
5
4
3
2
1
8
DATE
10/08/03 10/13/03
7
DESCRIPTION
PROTO RELEASE (REV 09) CHANGED ALL 4 NB AVDDS TO PP1V5_PWRON_NB_AVDD RAIL TERMINATION FOR VSP CLOCK NOW TRACKS PP1V2_HT RAIL TERMINATION FOR NB CLOCK NOW TRACKS PP1V2_EI_NB RAIL TERMINATION FOR CPU CLOCK NOW TRACKS PP1V2_EI_CPU RAIL NO STUFFED R1303 BECAUSE WHITE LED IS ACTIVE HIGH ADDED 5 PULLDOWNS FOR CPU VID SIGNALS UNCONNECTED THERMAL PAD FOR U9600 HEADPHONE AMP CHECKIN 09001 ADDED 4 SMT NUTS U3600 PIN 6 TO PP5V_RUN CHECKIN 09002 SWAPPED EI_CPU_TO_NB_AD17 WITH EI_CPU_TO_NB_AD24 ON J1400 BOM CHANGES FOR R2910, R5727, R9139, R9810 MAIN PROTO RELEASE (REV 10) REPINNED J9240 BLUETOOTH CONNECTOR MANY MIN_NECK_WIDTH UPDATES DC-DC UPDATES ON PAGES 9,10,22,33,34,50 NEW CONNECTORS FOR MODEM AND PATA ADDED GAP FILLER CHANGED PART NUMBER OF NV18B MOVED SERIES TERM FOR PULSAR CLOCKS TO LOGIC ANALYZER PAGE ADDED NET_SPACING_TYPE=PROC_DIFF TO TDIODE_POS, TDIODE_NEG, KPVDD2, AND KPGND2 CHANGED PULSAR 2.2UF CAPS TO 10% MASTER PAGE SYNC CHECKIN 10001 NEW AIRPORT CONNECTOR ADDED LEDS FOR 5V ALL RAIL AND PANEL POWER CHANGED DS870X TO LED870X TO FOLLOW CONVENTION REPLACED POWER CONNECTOR MASTER PAGE SYNC RELEASE REV 11 J8301 PATA CONNECTOR ROTATED 180 DEGREES MIN_LINE_WIDTH AND MIN_NECK_WIDTH UPDATES THROUGHOUT ADDED EMI-SPRING AND TIED TO GND_CHASSIS_MODEM UPDATED CRYSTAL CONSTRAINTS FIREWIRE NET NAME CHANGES TO MATCH NAMING CONVENTION CHANGED Q1001 TO NTD60N02R CHANGED PULSAR SERIES TERM R2707, R2719, R2701, R2761, R2779 TO 0 OHM CHANGED ZH700 AND ZH701 TO HOL-315R138 CHANGED 20" INVERTER TO 518-0141 CHANGED U3LITE P/N TO V1.1 MASTER PAGE SYNC CHECKIN 11001 PLL-LOCK LED CHANGED TO GREEN SMU PART# UPDATED DC/DC NET NAME FIXES ON PAGES 9,10,22 ADDED SERIAL SIGNALS TO AIRPORT CARD FOR NEW MARTY CARD PULSAR SERIES TERM - CHANGED R2705,R2711,R2702 TO 0 OHM. CHANGED SHASTA P/N TO V1.1 UPDATED POWER SEQUENCING TO MATCH SMU PINOUT 1.4 NO_TEST UPDATES ADDED 6 OUTPUT CAPS (124-0322) TO CPU VCORE VREG MASTER PAGE SYNC CHECKIN 11002 - EVT DESIGN REVIEW
6
5
4
3
2
1
11/19/03
STUFFING CHANGES FOR ETHERNET RESET CHANGED XW3302 TO LAYER 6 SHORT POWER BUTTON CONNECTOR SYMBOL UPDATED UPDATED CRITICAL LIST CHANGE Y5700 TO 4 PIN CRYSTAL CHECKIN 12005 CHANGED R2700 TO 22OHM AND NOSTUFFED CPU VID SET TO 1.475V J1400 CHANGED TO NOSTUFF CHANGED HALF OF DIMM AND VTT DECOUPLING TO 1UF EVT1 RELEASE (REV 13)
11/20/03
D
10/14/03
10/15/03
11/03/03
11/04/03
C
11/10/03
11/11/03
R2770 -> 20 OHM
B
11/13/03
CHANGED CRYSTAL Y5700 TO 197S0026 LED3002, LED3600, AND LED800 CHANGED TO D3002, D3610, AND D810 P/N 378S0042 CPU POWER SUPPLY FETS - VISHAY USED ON SAMSUNG BOMS AND ON SEMI ON HYNIX BOMS CHANGED INPUT CAPS TO 124-0323 INPUT AND OUTPUT CERM CAPS MARKED AS CRITICAL NEW LARGER CAP FOR VTT VREG. C4609 CHANGED TO 128S0022. C4608 NOSTUFFED BOMOPTIONS AND SCHEMATIC CLEANUP TO AGP (BUSY, STOP, TYPEDET, GCDET) CHANGED 20" INVERTER DECOUPLING TO TWO 1UF 1210 CAPS ADDED MORE POWER AND GROUND SHORTS FOR AUDIO ADDED NET_SPACING_TYPE=PROC_DIFF TO DIFF PAIRS THAT DIDN'T HAVE IT MASTER PAGE SYNC RELEASE REV 12
11/14/03
CHANGED PCI_CLK33M_SB_EXT NET NAME ON PAGE 27 FOR REUSE. ALIAS ADDED ON PAGE 8 ADDED ECSET FOR PLS_EXTCLK NET. DROPPED PROP DELAY FROM OTHER CRYSTALS ALIASED PP5V_AUDIO TO PP5V_RUN RAIL ADDED CIRCUIT SO 5V RAIL TO 17" INVERTER COMES UP AFTER 12V R2742 CHANGED TO 806 OHM MASTER PAGE SYNC CHECKIN 12001 CHANGED J8303 TO 5 PIN CONNECTOR CHANGED MICRODASH MODEM HEIGHT AND CHANGED TO DEVELOPMENT BOM OPTION PIN SWAPPED L5908 FOR ROUTING STUFFED TMDS INDUCTORS AND NOSTUFFED 0 OHM RESISTORS CHANGED MODEM STANDOFFS TO 862-0035 AND ADDED ELECTRICAL CONNECTIONS ADDED TWO MORE SMT NUTS FOR CPU HEATSINK CHANGED LED700,701,702,5900,8301,8700,8701,8702 AND D3001 TO 378S0045 MASTER PAGE SYNC CHECKIN 12002 NO_TEST, FUNC_TEST UPDATES CHECKIN 12003
11/15/03 11/17/03
A
11/17/03
11/18/03
CHASSIS MODEM NO LONGER TIES TO REST OF CHASSIS ADDED CAPS TO GROUND FOR CPU HEATSINK SMT NUTS CHANGED CRYSTAL FILTERING FOR PULSAR MOVED RAM_CKE SIGNALS TO 62 OHM VTT PARALLEL TERM WITH 4.7K PULL-DOWN ADDED POWER SEQUENCING FOR VTT VREG MASTER PAGE SYNC CHECKIN 12004
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p la
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m e h c
a
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D
C
B
A
8
7
5
4
3
2
1
8
I3 I4 I5 I6 I7 I8 I9 I10
7
TP_BUF_RST TP_DFPCLK TP_DFPCLK_L TP_DFPD0 TP_DFPD1 TP_DFPD2 TP_DFPD3 TP_DFPD5 TP_DFPD6 TP_EXT_TMDS_CKM TP_EXT_TMDS_CKP TP_EXT_TMDS_D0M TP_EXT_TMDS_D0P TP_EXT_TMDS_D1M TP_EXT_TMDS_D1P TP_EXT_TMDS_D2M TP_EXT_TMDS_D2P TP_FBBCS1_L TP_GPU_INTB_L TP_GPU_THERMA TP_GPU_THERMC TP_IFP1VREF TP_NVAGP_TDO TP_TMDS_TXD3M TP_TMDS_TXD3P TP_TMDS_TXD7M TP_TMDS_TXD7P TP_VIPHCLK TP_FRWRLPS TP_AGP_MB_AGP8X_DET_L TP_ATTENTION TP_ENET_CLK125M_GTX TP_ENET_TXD<7> TP_ENET_TXD<4> TP_ENET_TXD<5> TP_FW_CLK98M_LCLK TP_AFN TP_PSRO1 TP_PSRO2 TP_PSYNCOUT TP_USB2_PWREN<2> TP_USB2_PWREN<3> TP_USB2_PWREN<4> TP_PROC_TRIGGER_OUT TP_NEC_AMC TP_NEC_NANDTEST TP_NEC_NTEST1 TP_NEC_SMC TP_NEC_SMI_L TP_NEC_SRCLK TP_NEC_SRDATA TP_NEC_SRMOD TP_NEC_TEB TP_NEC_TEST TP_PLS_CLK_66M_0 TP_PLS_CLK_66M_1 TP_PLS_REF_CML TP_PLS_TEST1 TP_PLS_TEST2 TP_PLS_TEST3 TP_SB_FSTEST TP_SB_PLLTEST TP_VREF_CG TP_SB_NC_P7 TP_SB_NC_P8 TP_SB_NC_R3 TP_SB_NC_R4 TP_SB_NC_R5 TP_SB_NC_R6 TP_SB_NC_R7 TP_SB_NC_R8 TP_SB_NC_T1 TP_SB_NC_T2 TP_SB_NC_T3 TP_SB_NC_T4 TP_SB_NC_T5 TP_SB_NC_T6 TP_SB_NC_T7 TP_SB_NC_T8 TP_SB_NC_U1 TP_SB_NC_U2 TP_SB_NC_U3 TP_SB_NC_U4 TP_SB_NC_U5 TP_SB_NC_U6 TP_SB_NC_V1 TP_SB_NC_V2 TP_SB_NC_V3 TP_SB_NC_V4 TP_SB_NC_W1 TP_SB_NC_W3 TP_SB_NC_Y1 TP_SB_NC_Y3 TP_SATA_CLK25M TP_ENET_TCK TP_USB2_PWREN<0> TP_USB2_PWREN<1> TP_DUMMY_A TP_DUMMY_B TP_RAM_CKE_R<2>
57 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58
6
I434 I433 I436 I435 I437 I439 I438 I440 I441 I442 I444 I443 I445 I446
I781
5
90 90 90 90 90 90 90 90 90 90 90
4
IN IN IN IN IN IN IN IN IN IN IN
3
FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE
IN
11 7
2
PP12V_RUN
1
PP5V_RUN PP24V_RUN
D
I295 I296 I297 I298 I300 I299 I302
NO_TEST=TRUE NO_TEST=YES NO_TEST=YES NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=YES NO_TEST=TRUE NO_TEST=YES NO_TEST=YES NO_TEST=TRUE NO_TEST=YES NO_TEST=YES NO_TEST=YES NO_TEST=YES NO_TEST=YES NO_TEST=YES NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=YES NO_TEST=YES NO_TEST=TRUE NO_TEST=YES NO_TEST=TRUE NO_TEST=YES NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE
NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE NO_TEST=TRUE
TP_RAM_CKE_R<3> 37 TP_RAM_CKE_R<6> 37 TP_RAM_CKE_R<7> 37 TP_RAM_CS_L_R<10> 37 TP_RAM_CS_L_R<11> 37 TP_RAM_CS_L_R<2> 37 TP_RAM_CS_L_R<3> 37 TP_RAM_MUXEN0 37 TP_RAM_MUXEN4 37 TP_NB_PM_SLEEP0 24 TP_J4000_SJRESET_L 40 TP_J4001_SJRESET_L 40 TP_CMP_SPARE 36 TP_ENET_TXD<6> 87 U2100_UNUSED 21
FW_VP_PORT1 FW_TPO1P FW_TPO1N FW_TPI1P FW_TPI1N FW_VP_PORT2 FW_TPO2P FW_TPO2N FW_TPI2P FW_TPI2N FW_VGND PCI_AD<31..0> PCI_CBE_L<3..0> PCI_CLK33M_AIRPORT PCI_SLOTA_REQ_L PCI_SLOTA_GNT_L PCI_SLOTA_INT_L PCI_RESET_L PCI_FRAME_L PCI_TRDY_L PCI_IRDY_L PCI_STOP_L PCI_DEVSEL_L PCI_PAR PCI_SLOTA_IDSEL ROM_CS_L ROM_OE_L ROM_WE_L ROM_ONBOARD_CS_L AIRPORT_CLKRUN_L_PD USB_BT_N USB_BT_P USB2_PORT1_N_F USB2_PORT1_P_F USB2_PORT2_N_F USB2_PORT2_P_F USB2_PORT3_N_F USB2_PORT3_P_F PP5V_USB2_PORT1_F PP5V_USB2_PORT2_F PP5V_USB2_PORT3_F
IN IN IN IN
11
11
PP12V_RUN PP5V_ALL PP5V_RUN PP3V3_RUN PP24V_RUN
10 TEST POINTS 5 TEST POINTS 5 TEST POINTS 5 TEST POINTS 5 TEST POINTS 5 TEST POINTS 5 TEST POINTS 12 TEST POINTS
83 7
IN IN
83 7
PP5V_DISK PP12V_DISK GND
77 76 75 74 77 76 74 8 76 74 76 74 76 25
IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN
IN
I307 I311 I314 I315 I316 I317
52 49 58 58 58 49
77 76 75 74 51 49 77 76 74 77 76 74 77 76 74 77 76 74 77 76 74 77 76 74
I320 I319 I322 I323 I321 I336 I337 I338 I340 I339 I342 I343
58 58 58 58 57 58 48 29 87 87 87 87 90 29 29 29 29 92 92 92 14 29 77 77 77 77 77 77 77 77 77 77 27 27 27 27 27 27 25 25 48 91 91 91 91 91 91 91 91 91 91 91 91 91 91 91 91 91 91 91 91 91 91 91 91 91 91 91 91 91 91 27 87 92 92 24 24 37
76 76 75 74 76 75 74 76 75 74 76 75 76
92 92
IN IN
92 92 92 92 92 92 92 92 92
C
I341 I344 I345 I346 I347 I348 I350 I349 I352 I354 I355 I356 I357 I358 I360 I359 I362 I363 I361 I364 I365 I372 I373 I371 I374 I375
94 76 25 94 25 94 25
B
I376 I377 I378 I380 I379 I382 I383 I381 I384 I385 I386 I388 I387 I390 I389 I391 I393 I392 I395 I394 I396 I398 I397 I399 I401 I400
A
I403 I402 I404 I405 I406 I408 I407 I426 I429 I428 I431 I430 I432
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p la
-s p to
94 25 94 76 25 94 25 94 25 94 18 94 18 94 94 94 25 94 25 94 59 59 59 59 59 59 59 59 59 59 59 59 59 7 59 59 59 59 57 56 59 57 56 59 59 59 58 59 59 59 59 59 59 59 59 59 59 59 33 8 36 36 36 36 36 33 36 33
m e h c
IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN
a
.c s ic t
IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN
98 25 75 18 11 27 18 11 23 10 3 36 31 30 7 3 22 7 36 35 34 33 32 31 29 7 34 33 33 33 13 8 7 13 7 7 7 13 8 33 13 11 10 7 50 46 27 11 10 9 8 13 8 13 9 22 59 57 59 57 59 57
I2S1_DEV_TO_SB_DTI I2S1_SYNC I2S1_BITCLK I2S1_MCLK I2S1_SB_TO_DEV_DTO I2S1_RESET_L MODEM_RING2SYS_L I2C_UDASH_SDA I2C_UDASH_SCL USB_UDASH_N USB_UDASH_P UDASH_SDOWN UDASH_RESET_L UDASH_I2C_A1_PU
2 2 2 2 2 2 2
TEST TEST TEST TEST TEST TEST TEST
POINTS POINTS POINTS POINTS POINTS POINTS POINTS
IN IN
PP2V5_RUN PP1V5_RUN PP5V_PWRON PP3V3_PWRON PP1V2_PWRON PP1V2_PWRON_SB_VCORE PP3V3_ALL_SMU PP5V_RUN_CPU PPVCORE_NB PPVCORE_CPU PP12V_CPU VCORE_SENSE_GND VCORE_SENSE_VOUT SMU_MANUAL_RESET_L SYS_POWER_BUTTON_L POWER_BUTTON_L RESET_BUTTON_L SMU_RESET_L SYS_POWERUP_L SYS_SLEEP SYS_POWERFAIL_L EXT_POWER_BUTTON_L U900_FEEDBACK U2200_FEEDBACK ANALOG_RED ANALOG_GRN ANALOG_BLU AUDIO_LI_DETECT_L AUDIO_LO_DET_L ROM_WP_L UATA_DD<15..0> UATA_DA<2..0> UATA_CS0_L UATA_CS1_L UATA_RESET_L UATA_DSTROBE_R UATA_HSTROBE UATA_STOP UATA_DMARQ_R UATA_DMACK_L UATA_INTRQ_R UATA_IOCS16_PU UATA_CSEL_PD
m o
FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE
PP5V_ALL
PP3V3_RUN
D
PP2V5_RUN PP5V_PWRON PP1V5_RUN
PP1V2_PWRON
PP3V3_PWRON
2 TEST POINTS 2 TEST POINTS
FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE FUNC_TEST=TRUE
C
83 80 83 80 83 80 83 80 83 80 83 83 80 83 806 6 83 80 83 83 80 83 83 83
IN IN IN IN IN IN IN IN IN IN IN IN IN
IN IN IN IN IN IN IN IN IN IN IN IN IN
PPVCC_TMDS PP3V3_DDC TD0M TD0P TD1M TD1P TD2M TD2P TCKM TCKP TMDS_DDC_DAT TMDS_DDC_CLK GND_CHASSIS_TMDS FILT_ANALOG_RED FILT_ANALOG_GRN FILT_ANALOG_BLU ANALOG_HSYNC_L ANALOG_VSYNC_L VGA_IIC_CLK VGA_IIC_DAT MON_DETECT DDC_VCC_5 PP24V_INV GND_20_INV INV_20_LCD_PWM_ INV_20_CUR_HI_F PP12V_INV GND_17_INV PP5V_AGP_RL INV_17_LCD_PWM_F LAMP_STS_F INV_17_CUR_HI_F CPU_VID_R<5..0> KPVDD2_FMAX KPGND2_FMAX TDIODE_POS_FMAX TDIODE_NEG_FMAX CORE_ISNS_M CORE_ISNS_P
B
36 31 76 76
IN IN IN
TDIODE_NEG TP_AIRPORT_PME_L TP_AIRPORT_RF_DISABLE
IN IN IN IN IN IN IN IN IN
IN IN IN IN IN IN IN IN IN IN
A
IN IN IN IN IN IN IN
8
5
4
3
2
1
8
PP12V_RUN PP5V_RUN PP3V3_RUN PP5V_ALL
7
PP24V_RUN PP12V_RUN PP5V_RUN
6
PP24V_RUN
5
RUN RAILS
ONLY ON IN RUN VOLTAGE=24V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
PP3V3_RUN
ALIAS
4
3
PWRON RAILS
2
ALL RAILS
1
CRITICAL
J700
43215-0012
F-RT-TH 1 2 3 4 5 12 13 14 15 16 17 18 19 20 21 22
PP24V_FW PP24V_GRAPHICS
90
ON IN RUN AND SLEEP
PP1V5_PWRON
ALWAYS ON WHEN UNIT HAS AC POWER (TRICKLE)
ALIAS
59
VOLTAGE=1.5V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL MAKE_BASE=TRUE PP1V5_PWRON_NB_AVDD ALIAS VOLTAGE=3.3V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=8MIL
PP5V_RUN
28 37 48 60
D
8
6 7
PP3V3_PATA
83
ALIAS
PPVCORE_PWRON_PULSAR
26
POWER_GOOD
8 9 10 11
PP3V3_PWRON
VOLTAGE=3.3V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL MAKE_BASE=TRUE _PP3V3_PWRON_SB
PP2V5_PWRON
ALIAS ALIAS
VOLTAGE=0V MIN_LINE_WIDTH=10MIL MIN_NECK_WIDTH=10MIL
P/N 518-0137
PIN 13,19,11,22 ARE DIFFERENCE FROM ATX .
MAKE_BASE=TRUE VOLTAGE=5V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
PP5V_PATA PP5V_DISK
83
6 83
VOLTAGE=3.3V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL MAKE_BASE=TRUE
PP2V5_RUN
11 7
PP3V3_ALL
1
C700
0.1UF
MAKE_BASE=TRUE VOLTAGE=2.5V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
ALIAS
PP2V5_GPU PP2V5_RUN_RAM PP2V5_RUN_CPU PP2V5_RAM
52 54 55
PP1V2_PWRON
CRITICAL
U700
3 125 1 TSSOP
14
33 13 11 10 6
74LCX125
20% 10V 2 CERM 402
ALIAS
44 45 46
PP12V_RUN
ALIAS ALIAS
31
SYS_POWERUP_L
2 7
SYS_POWERUP_L_BUF VOLTAGE=12V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL MAKE_BASE=TRUE
26 37
ALIAS ALIAS ALIAS
PP12V_AGP PP12V_RUN_CPU PP12V_DISK
50 59
33
PP12V_RUN PP5V_ALL PP3V3_PWRON PP3V3_RUN
C
1
R710 330
5% 1/16W MF 603
2 ITS_PLUGGED_IN
1
1
R700 330
2 5% 1/16W MF 603
DEVELOPMENT ITS_ALIVE
1
1
R701 330
2 5% 1/16W MF 603
VOLTAGE=12V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL MAKE_BASE=TRUE ITS_RUNNING
XW700 SM
1 2
PP12V_AUDIO_CODEC
XW704 SM
1 2
LED702
GREEN 2.0X1.25 2
LED700
GREEN 2.0X1.25 2
DEVELOPMENT
1
LED701
GREEN 2.0X1.25 2
XW701 SM
1 2
PP12V_AUDIO_SPKRAMP
PP5V_RUN
SILKSCREEN:1
SILKSCREEN:2
SILKSCREEN:RUN
XW705 SM
1 2
ALIAS ALIAS ALIAS
FERR-EMI-100-OHM
13 7 6
L700
SM
VOLTAGE=5V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL MAKE_BASE=TRUE
SYS_POWER_BUTTON_L
1
2 SYS_PWR_BTN_FILT
SW703
PWR-BUTT
ST-SM 1 3 2
PP3V3_RUN
1
C703
0.1UF
SILKSCREEN:POWER
20% 10V 2 CERM 402
VOLTAGE=3.3V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=8MIL MAKE_BASE=TRUE
FERR-EMI-100-OHM
1 SM 2
L701
PP3V3_RUN
GND_SYS_PWR_BTN_FILT
B
PP3V3_ALL 1
R714
10K
R713
13 7 6
SYS_POWER_BUTTON_L
1
1K
5% 1/16W MF 2 402
2
R712
13
SYS_RESET_BUTTON_L
1
1K
2
5% 1/16W MF 402 DEVELOPMENT DEVELOPMENT
5% 1/16W MF 402
SW701
SPST
SM
1 2
SW702
SPST
SM
1 2
3
4
3
4
RESET
POWER
A
13 8 6
SMU_MANUAL_RESET_L
SW700
SPST
SM
1 2
3
4
. w w w
POWER_BUTTON_L RESET_BUTTON_L
6 6
1
C705
0.1UF
1
C704
0.1UF
20% 10V 2 CERM 402
20% 10V 2 CERM 402
p la
PP1V5_RUN
22 6
MAKE_BASE=TRUE
VOLTAGE=1.5V MAKE_BASE=TRUE MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
-s p to
PP5V_RUN_CPU PP5V_AUDIO
98
PP5V_AGP
49 50 59
3 6 30 31 36
ALIAS ALIAS ALIAS
PP3V3_AGP
48 49 50 51 52 56 57 58 59
PP3V3_AUDIO PP3V3_RUN_CPU
95 97 98 99
33
m e h c
6 83 99
PP5V_PWRON
VOLTAGE=5V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL MAKE_BASE=TRUE
a
MAKE_BASE=TRUE MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL VOLTAGE=1.2V
.c s ic t
23 25
_PP2V5_PWRON_SB
23 25 74 88
_PPPCI64_PWRON_SB _PPPCI32_PWRON_SB
23
m o
11 7 99 99 97 59 92 90
PP3V3_ALL MAKE_BASE=TRUE VOLTAGE=3.3V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
ALIAS
PP3V3_FW
90
ALIAS
_PP3V3_ALL_SMU
8 13
D
PP5V_ALL
11 6
PP5V_ALL
VOLTAGE=5V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
IN
GND RAILS
XW702 SM
1 2
23
GND_AUDIO
_PP2V5_PWRON_HT _PP1V2_PWRON_HT
XW706 SM
1 2
62 62
XW703 SM
GND_AUDIO_SPKRAMP
1 2
_PP1V2_PWRON_DISK_SB _PP1V2_PWRON_SB
80
XW707 SM
1 2
25
ALIAS
_PP3V3_PWRON_MODEM 94 _PP3V3_PWRON_USB 91 PP3V3_PWRON_ENET 87 _PP3V3_PWRON_BT 92 _PP3V3_PWRON_UDASH 94 _PP5V_PWRON_USB 92 _PP5V_PWRON_UDASH
94
C
CHASSIS GND
ZH700
315R138
98
97
GND_CHASSIS_AUDIO_EXTERNAL MIN_NECK_WIDTH=15MIL MAKE_BASE=TRUE VOLTAGE=0 MIN_LINE_WIDTH=25MIL
1
ALIAS ALIAS
PP5V_PWRON_CPU PP3V3_PWRON_CPU
36
36
GND_CHASSIS_VGA GND_CHASSIS_USB GND_CHASSIS_FIREWIRE
ALIAS
1
EMI700
EMI-SPRING
SC57
ZH701
315R138
59 6
PP2V5_PWRON
GND_CHASSIS_TMDS MIN_NECK_WIDTH=15MIL MIN_LINE_WIDTH=25MIL VOLTAGE=0
1
ZH702
160R138
87
VOLTAGE=2.5V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL MAKE_BASE=TRUE
ALIAS
PP2V5_PWRON_RAM PP2V5_HT
60 64
40
GND_CHASSIS_RJ45 MIN_NECK_WIDTH=15MIL MIN_LINE_WIDTH=25MIL VOLTAGE=0 GND_CHASSIS_AUDIO_INTERNAL MAKE_BASE=TRUE GND_CHASSIS_LED
ALIAS
1
SH700
1 2 4
SHLD-IO-CONN Q45-TH 3
98
ALIAS
_PP3V3_SB_PCI
74
21
_PP3V3_PCI
25 74 75 76 77
_PPVIO_PCI_USB2
77
6.00MM-PTH
59
ZH703
1
B
ALIAS
PP3V3_DISK
83
GND_CHASSIS_17_INCH_INVERTER MIN_NECK_WIDTH=20MIL MIN_LINE_WIDTH=20MIL VOLTAGE=0 GND_CHASSIS_20_INCH_INVERTER MIN_NECK_WIDTH=20MIL MIN_LINE_WIDTH=20MIL VOLTAGE=0
225R125
1
ZH704
59
ALIAS
PP1V5_AGP
48 49
ALIAS
PPVCORE_PULSAR
26
NOSTUFF
PP1V5_PWRON
R707
1
PPVCORE_NB
0
RTC BATTERY
2
5% 1W FF 2512
ALWAYS ON (TRICKLE)
PP1V2_RUN
CRITICAL
VOLTAGE=1.2V MAKE_BASE=TRUE MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
ALIAS
13
1K 2 PP3V3_ALL_BATT 2 1PP3V3_ALL_BATT_SAFETY 1 1 2 _PP3V3_ALL_RTC VOLTAGE=3.3V VOLTAGE=3.3V VOLTAGE=3.3V 5% MIN_LINE_WIDTH=25MIL MIN_LINE_WIDTH=25MIL MIN_LINE_WIDTH=25MIL 1/16W MIN_NECK_WIDTH=10MILMBR0530 MIN_NECK_WIDTH=10MIL MIN_NECK_WIDTH=10MIL TH
MF 402
DS700 SM
R702
J702
BB10209-A5
PP1V2_HT PP1V2_PULSAR
24 60
36 35 34 33 32 31 29 6
PPVCORE_CPU
ALIAS
26
NOSTUFF
NOSTUFF
1
R7051
0
5% 1/10W FF 805 2
1
R706
0
R7081
0
5% 1/10W FF 805 2
R709
0
5% 1/10W FF 2 805
5% 1/10W FF 2 805
A
18 28
R703
1
0
2
35 31 30 29 18
PP1V2_EI_CPU
VOLTAGE=1.2V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
5% 1/10W FF 805
PP1V2_EI_NB
VOLTAGE=1.2V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
R704
1
0
2
SMU RESET
5% 1/10W FF 805
8
7
6
5
4
3
2
1
8
TP_NB_THMI MAKE_BASE=TRUE TP_THMO MAKE_BASE=TRUE
ALIAS ALIAS
7
PCI CLOCKS
NB_THMI NB_THMO
24 24
6
PCI_CLK33M_USB2 MAKE_BASE=TRUE TP_PCI_CLK_GP1 MAKE_BASE=TRUE PCI_CLK33M_AIRPORT MAKE_BASE=TRUE TP_PCI_CLK_P4 MAKE_BASE=TRUE
ALIAS
5
27 77 27
4
3
PART#
TABLE_11_HEAD
2
MISC PARTS
QTY DESCRIPTION
1
TABLE_5_HEAD
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_ITEM
PCI_CLK_GP0 _PCI_CLK33M_USB2 PCI_CLK_GP1 PCI_CLK_P3 _PCI_CLK33M_AIRPORT
PART # 337S2784 337S2785 337S2786 337S2787
QTY 1 1 1 1
DEVICE
PACKAGE
DESCRIPTION
VALUE 1.8GHZ 2.0GHZ 1.8GHZ 2.0GHZ
VOLT. 1.15V 1.15V 1.15V 1.15V
WATT. 45W 65W 45W 65W
TOL. ? ? ? ?
REFERENCE DESIGNATOR(S) U2900 U2900 U2900 U2900
BOM OPTION
TABLE_11_HEAD
062-2082 820-1540
TABLE_11_HEAD
1 1 1 1 1 1 1 1 1 6 6 1
SPEC,VENDOR PACKAGING PROCEDURE PCB,FAB,MLB LBL,SER #,INP DEV PCB,SCHEM,MLB IC,FLASH,1MX8,3.3V,90NS
VPP1
TABLE_5_ITEM
PROCESSOR CBGA-576-1MM IC,MPU,NEO,10S,REV2,1.8GHZ,70C PROCESSOR CBGA-576-1MM IC,MPU,NEO,10S,REV2,2.0GHZ,70C PROCESSOR CBGA-576-1MM IC,MPU,NEO,10S,REV3,1.8GHZ,70C PROCESSOR CBGA-576-1MM IC,MPU,NEO,10S,REV3,2.0GHZ,70C
NEO_REV2_1_8GHZ NEO_REV2_2_0GHZ
TABLE_11_HEAD
MLB1
TABLE_5_ITEM
825-2029 051-6482 341T1366
LBL1
TABLE_5_ITEM
6
27 76
NEO_REV3_1_8GHZ
TABLE_11_HEAD
ALIAS
PCI_CLK_P4
27
NEO_REV3_2_0GHZ
PP2V5_PWRON
CRITICAL 742-0048 875-1614 341T1395
D
74 27
PCI_CLK33M_SB_EXT MAKE_BASE=TRUE
ALIAS
PCI_CLK_P1
27
1
SMU
TP_SMU_CHARGE_BATT MAKE_BASE=TRUE TP_ALS0_OUT MAKE_BASE=TRUE TP_ALS1_OUT MAKE_BASE=TRUE TP_ALS_GAIN_BOOST MAKE_BASE=TRUE TP_SMU_ADAPTER_ID MAKE_BASE=TRUE TP_ACCEL_LOWPWR_L MAKE_BASE=TRUE TP_SMU_PWRSEQ_P1_3 MAKE_BASE=TRUE TP_SMU_PWRSEQ_P1_4 MAKE_BASE=TRUE TP_SMU_SPARE_P10_0 MAKE_BASE=TRUE TP_ACCEL_INT_L MAKE_BASE=TRUE
ALIAS ALIAS
R870
4.7K
SMU_CHARGE_BATT 13 NO_TEST=TRUE ALS0_OUT 13
24 13
5% 1/16W MF 2 402
U700
14
74LCX125
8
SMU_WARM_RESET_L
9 7
SYS_WARM_RESET_L
24 25 74 77 87
ALIAS ALIAS ALIAS
ALS1_OUT ALS_GAIN_BOOST SMU_ADAPTER_ID ACCEL_LOWPWR_L SMU_PWRSEQ_P1_3 SMU_PWRSEQ_P1_4 SMU_SPARE_P10_0 ACCEL_INT_L
13
125 10 TSSOP
13
U700
14
13
13
74LCX125
6
SMU_SLEEP
5 7
SYS_SLEEP
6 9 10 11 27 46 50
ALIAS ALIAS ALIAS ALIAS ALIAS
13
125 4 TSSOP
13
U700
13
14 12
13
74LCX125
11 125 13 TSSOP
13
7
CPU VID<0:5>
VID SET TO 1.475V TO ACHIEVE 1.45V AT PROCESSOR
PP3V3_RUN
C
1
NOSTUFF
R814
10K
1
R816
10K
1
R817
10K
1
R808
10K
1
R809
10K
1
R804
10K
PP3V3_ALL DEVELOPMENT
NOSTUFF
13
R819
0
2
5% 1/16W MF 2 402
5% 1/16W MF 2 402
5% 1/16W MF 2 402
5% 1/16W MF 2 402
5% 1/16W MF 2 402
5% 1/16W MF 2 402
6 33 13 13
CPU_VID<0>
1
CPU_VID_R<0> NOSTUFF
1
1
13
CPU_VID<1>
5% 1/16W MF 402
R820
0
2
SMU_BOOT_SCLK SMU_BOOT_CE SMU_BOOT_CNVSS
CPU_VID_R<1>
6 33
13
CPU_VID<2>
1
0
2
CPU_VID_R<2>
13
CPU_VID<3>
5% 1/16W MF 402
NOSTUFF
1
6 33
R822
0
2
R8061
5% 1/16W MF 402 2
DEVELOPMENT 998-0269 1
CPU_VID_R<3>
6 33
R823
13
NOSTUFF
CPU_VID<4>
1
0
2
5% 1/16W MF 402
1/16W MF 2 402
5% 1/16W MF 402 2
1/16W MF 2 402
CPU_VID_R<4>
13
CPU_VID<5>
5% 1/16W MF 402
NOSTUFF
1
6 33
2 3
10K
R807
10K 5%
R805
0
NOSTUFF 1
SSOT-23
2.5V
R821
5% 1/16W MF 402
R824
0
2
CPU_VID_R<5> NOSTUFF
1
6 33
5% 1/16W MF 402
NOSTUFF
1
NOSTUFF
1
NOSTUFF
1
BM12B-SRSS-TB
R832
10K
R831
10K
R830
10K
R829
10K
1
R827
10K
1
R811
20K
NOSTUFF
F-ST-SM 14
J803
B
5% 1/16W MF 2 402
5% 1/16W MF 2 402
5% 1/16W MF 2 402
5% 1/16W MF 2 402
NOTE:PULL UP CPU_VID<5>TO 2.2V FOR CPU VRM10.
CHEAPER SMU RESET
_PP3V3_ALL_SMU
13 7
NOSTUFF
1
NOSTUFF
3
R815
1K
A
13 8 7 6
NOSTUFF SMU_MANUAL_RESET_L
1
R810
0
2 5% 1/16W MF 402
5% 1/16W MF 2 402
D800 1N914
1 SOT23
SMU_RESET_L NOSTUFF
1
C800
1UF
10% 2 6.3V CERM 402
. w w w
6 13 27
PULSAR ERROR_L LED
PP3V3_RUN
p la
DEVELOPMENT
1
5% 1/16W MF 2 402
5% 1/16W MF 2 402
-s p to
SHASTA JTAG PULL DOWN
25
13
13
VR801
NOSTUFF
m e h c
DOWNLOAD CONNECTOR
J802
TH
DEVELOPMENT
ST-HDR-HI-TEMP
1 2 3 4 6 8
R826
100
5% 1/16W MF 402
a
.c s ic t
13
CRITICAL 875-1752 CRITICAL 452-0678 CRITICAL 870-1177 CRITICAL 730-0291
m o
PART NUMBER
SCH1
TABLE_5_ITEM
U7500
TABLE_5_ITEM
BAT,COIN,3V,220MAH,CR2032 GAP FILLER PURCH ASSY, SMU BIG
BT700
TABLE_5_ITEM
GAP2900
TABLE_5_ITEM
D
U1300
TABLE_5_ITEM
GPU GAP PAD
PAD4900
TABLE_5_ITEM
CPU HEATSINK SCREW CPU HEATSINK SPRING CPU HEATSINK
SRW800,SRW801,SRW802,SRW803,SRW804,SRW805
TABLE_5_ITEM
SPR800,SPR801,SPR802,SPR803,SPR804,SPR805
TABLE_5_ITEM
HS2900
NEED TO ADD THERMAL GREASE TO MLB BOM
ALTERNATE FOR SERIAL NUMBER LABEL
TABLE_ALT_HEAD
ALTERNATE FOR PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_ITEM
825-2808
825-2029
COMMON
LBL1
BAR CODE LABEL
SMU ANALOG VREF
POWER_FAIL_L CONNECTION
PP3V3_ALL
1
PP3V3_ALL_SMU_AVCC
NOSTUFF
1
R818
200
R812
10K
C
SYS_POWERFAIL_L
6 13
1% 1/16W MF 2 402
5% 1/16W MF 2 402 _PPVREF_SMU
13
J802_2 2 J802_6
1
SMU_BOOT_BUSY SMU_BOOT_RXD
13 13
NOSTUFF
C801
2.2UF
1
5 7 9
R802
1
R813
7 36
10
(SMU_BOOT_EPM) SMU_MANUAL_RESET_L SMU_BOOT_TXD
6 7 8 13
20% 10V CERM 2 805
0
2 PPVREF_SMU_ADC_REF
POWER_GOOD
1
47
2
NOSTUFF
5% 1/16W MF 402
5% 1/16W MF 402
NOSTUFF
1
1
R803
10K 5%
C802
20% 10V 2 CERM 603
0.47UF
GND_SMU_AVSS
13 33 36
R828
1
0
2 GND_SMU_AVSS_DAGND
36
5% 1/16W MF 402
CPU HEATSINK SMT NUTS
SDF800
TH
10
11
12
1
2
3
4
5
6
7
8
9
13
SDF801
TH
1
SDF802
TH
1
HSK-NUT-6.5MM HSK-NUT-6.5MM HSK-NUT-6.5MM
HS_SDF800 1 HS_SDF801 HS_SDF802
B
1
C880
0.01UF
1
C881
0.01UF
1
C882
0.01UF
20% 16V 2 CERM 402
20% 16V 2 CERM 402
20% 16V 2 CERM 402
SDF803
TH
SDF804
TH
1
SDF805
TH
1
HSK-NUT-6.5MM HSK-NUT-6.5MM HSK-NUT-6.5MM
HS_SDF803 1 HS_SDF804 HS_SDF805
1
C883
0.01UF
1
C884
0.01UF
1
C885
0.01UF
20% 16V 2 CERM 402
20% 16V 2 CERM 402
20% 16V 2 CERM 402
JTAG_SB_TRST_L
DEVELOPMENT
1
R8011
4.7K
5% 1/16W MF 402 2
R800
330
R825
10K
5% 1/16W MF
5% 1/16W MF 2 402
DEVELOPMENT
2 402
J800
U.FL-R_SMT
F-ST-SM 3 1 2 518S0104
25 25 25 25 24
ERROR_LED
1
A
DEVELOPMENT
D810
RED
SM
2
CLOCK_ERROR_L
THESE PINS HAVE INTERNAL PULLUPS TP_JTAG_SB_TCK JTAG_SB_TCK ALIAS MAKE_BASE=TRUE TP_JTAG_SB_TDI JTAG_SB_TDI ALIAS MAKE_BASE=TRUE TP_JTAG_SB_TDO JTAG_SB_TDO MAKE_BASE=TRUE ALIAS TP_JTAG_SB_TMS JTAG_SB_TMS ALIAS MAKE_BASE=TRUE
NB_PMR_OBSV
8
7
6
5
4
3
2
1
8
7
6
5
4
3
2
1
D
2.5V VOLTAGE REGULATOR
PP5V_PWRON PP5V_PWRON
D900
2 1 1 1
R900
4.7
U900_VC_R
MBR0520L SM
D902
MBR0520L
SM
CRITICAL
1
C901
10UF
1
C902
390UF
5% 1/10W FF 2 805
D901
2 1 4
2
U900_VC_D
20% 2 6.3V CERM 1206
20% 2 6.3V ELEC 8X11.5-TH
1
C904
1UF
2 6
U900_VC
1
MBR0520L SM
C
C916
1UF
D
20% 25V 2 CERM 805
VCC
SOI
VC
IRU3037CS
HD
U900_SS U900_COMP
1 8 5
U900
20% 2 25V CERM 805
R902
1
0
Q901
Q901_GATE
1
2
G S
3
NTD70N03R
CASE369
U900_GATE_H U900_GATE_L
6
5% 1/10W FF 805
SS LD
3
MIN_NECK_WIDTH=10MIL MIN_LINE_WIDTH=25MIL
Q902_DRAIN
7
COMP FB
1
U900_FEEDBACK
4
R901
27.4K
1
GND
4
1
C915
0.1UF
1% 1/16W MF 2 402
C913
56PF
1
C906
220PF
20% 2 16V CERM 603
R901_P2
1
C914
3900PF
5% 2 50V CERM 402
5% 2 25V CERM 402
5% 50V 2 CERM 603
B
A
. w w w
8 7 6
p la
-s p to
Q902
CASE369
D
1
G
NTD70N03R
NOSTUFF
S
1
C905
0.022UF
3
10% 50V 2 CERM 603
m e h c
1
C917
1UF
20% 2 10V CERM 603
CRITICAL
L901
1.6UH
TH
a
1
C903
390UF
20% 2 6.3V ELEC 8X11.5-TH
.c s ic t
VOLTAGE=2.5V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL OMIT
1
m o
PP2V5_RUN
D
NOTE: SET OUTPUT=2.62V FOR FRAMEBUFFER. IRU3037CS VREF=1.25VDC VOUT=VREF*(R903+R905)/R905=2.62VDC PEAK CURRENT OF TOTAL RAILS 12.68A WITH DIMM TERMINATION 9.24A WITHOUT DIMM TERMINATION
C
IRF7410
SO-8 8 3 2 1 7 6 5
PP2V5_PWRON
Q903
1
2
NOSTUFF
S G
4
D
1
R904
1.1K
NOSTUFF
1
5% 1/8W FF 2 1206
C907
3300PF
1
R903
11K
10% 50V 2 CERM 603
1% 1/16W MF 2 402
LOW TO ENABLE
R904_P2
C908
1
NOSTUFF
1800UF
C909
1800UF
1
C912
1UF
1
20% 25V 2 CERM 1206
R905
10K
20% 2 6.3V ELEC TH-KZJ
20% 2 6.3V ELEC TH-KZJ
1% 1/16W MF 2 402
SYS_SLEEP
6 8 10 11 27 46 50
U900_FEEDBACK
TABLE_5_HEAD
PART# 124-0324 124-0322
QTY 1 1
DESCRIPTION CAP,AL ELEC,1500UF,6.3V CAP,AL ELEC,1800UF,6.3V
REFERENCE DESIGNATOR(S) C909 C909
BOM OPTION
TABLE_5_ITEM
B
17_INCH_LCD
TABLE_5_ITEM
20_INCH_LCD
A
5
4
3
2
1
8
7
6
5
4
3
2
1
SHASTA CORE VOLTAGE REGULATOR
D
PP5V_ALL PP5V_ALL
D1000
2 1 1 1
R1002
4.7
U1000_VC_R
MBR0520L SM
5% 1/10W FF 2 805
D1001
2 1
2
U1000_VC_D
1
C1004
1UF
2 6
U1000_VC
1
MBR0520L SM
20% 25V 2 CERM 805
VCC
SOI
VC
PP3V3_ALL
U1000_SS U1000_COMP
1 8
IRU3037ACS
HD SS LD
3 5
U1000
2 CERM 805
C1000 1UF 20% R1000 25V
1
D 4
0
Q1001
Q1001_GATE
1 G S 3
1
2
NTD60N02R
CASE369
C1017
1UF
U1000_GATE_H U1000_GATE_L U1000_FEEDBACK
5% 1/10W FF 805
20% 10V 2 CERM 603
MIN_NECK_WIDTH=10MIL MIN_LINE_WIDTH=25MIL Q1002_DRAIN
R10071
100K
5% 1/16W MF 402 2 3
7
COMP FB
1 4
R1001
27.4K
1
GND
4
C
3
R1010
TURN_ON_SHASTA_CORE_L
NOSTUFF
1
D
Q1000
2N7002
SM 2
1
C1015
0.1UF
1% 1/16W MF 2 402
R1001_P2
C1013
68PF
1
C1006
220PF
0
2
Q1000_G
1
G
S
5% 1/16W MF 402
20% 16V 2 CERM 603
1
C1014
3900PF
5% 50V 2 CERM 603
5% 25V 2 CERM 402
R1011
33 13 11 10 7 6
5% 2 50V CERM 603
SYS_POWERUP_L
1
0
2
5% 1/16W MF 402-1
PP1V2_PWRON FET SWITCH
PEAK CURRENT 0.6A
PP1V2_PWRON_SB_VCORE
23 10 6 3
7 8
1
2
5
6
B
PP3V3_ALL
33 13 11 10 7 6
A
. w w w
R10141
100K
5% 1/16W MF 402 2
3
TURN_ON_PP1V2_L
p la
PP5V_ALL
1
-s p to
Q1006
TSOP
m e h c
D
1
Q1002
CASE369
G
NTD70N03R
NOSTUFF
S
1
C1005
10% 50V 2 CERM 603
0.022UF
3
a
23 10 6 3
.c s ic t
D1002
SM
MBR0520L
1
C1001 1 C1002
10UF 390UF
20% 2 6.3V ELEC 8X11.5-TH
1
C1003
390UF
20% 2 6.3V CERM 1206
20% 2 6.3V ELEC 8X11.5-TH
m o
1% 1/16W MF 2 402 1 1
D
NOTE: SET OUTPUT=1.2V IRU3037ACS VREF=0.8VDC VOUT=VREF*(R1003+R1005)/R1005=1.206VDC PEAK CURRENT OF TOTAL RAILS 5.96A
L1001
1.6UH
TH
23 10 6 3
PP1V2_PWRON_SB_VCORE
1
2
VOLTAGE=1.2V MIN_LINE_WIDTH=100 MIN_NECK_WIDTH=15MIL
NOSTUFF
1
R1004
1.1K
1
5% 1/8W FF 2 1206
1 C1007 R1003 5.11K
NOSTUFF
3300PF
10% 2 50V CERM 603
R1004_P2
C1008
1800UF
1
C1009
1800UF
NOSTUFF
C
1
C1012
1UF
20% 25V 2 CERM 1206
R1005
10K
20% 2 6.3V ELEC TH-KZJ
20% 2 6.3V ELEC TH-KZJ
1% 1/16W MF 2 402
U1000_FEEDBACK
PP1V2_RUN FET SWITCH
PEAK CURRENT 4.43A
PP1V2_PWRON_SB_VCORE
PP1V2_PWRON
Q1003
SI9426DY
SOI 3
PP1V2_RUN
B
1 2
SI3446DV
RDSON=0.06 OHM @ VGS=2.5 V
PP5V_ALL
5
I70
6
RDSON=0.016 OHM @ VGS=2.5 V
R1008
2 5% 1/16W MF 402
R1009
100K 1 2
5% 1/16W MF 402
100K 1 Q1003_G
3
Q1006_G
3 D
4
Q1004 Q1005
2N7002
SM SOT-363
3 D
4
6 D
2N7002DW
5 G
Q1004
SOT-363 S G 2
2N7002DW
SYS_SLEEP
6 8 9 11 27 46 50
R1012
0
2
Q1005_G
1
G
S 4 1
S 2
NOSTUFF
5% 1/16W MF 402
R1013
1
SYS_POWERUP_L
0
2
5% 1/16W MF 402-1
A
8
7
6
5
4
3
2
1
8
7
6
5
4
3
2
1
11 7 6
PP5V_ALL
D
CRITICAL
SI4467DY
6
Q1100
SM-1
PP5V_RUN
8 3 7 6 5
PP5V_PWRON
D
S G
2 1 1
11 7
PP3V3_ALL
R1100
100K 2 1
5% 1/16W MF 402
R1107 1R1101
1K 1K
1% 1/16W MF 2 402
6
PP3V3_RUN
FET ON IN RUN 4 3 10
R1104
33 13 10 7 6
CRITICAL
SYS_POWERUP_L
1
100K 2
5% 1/16W MF 402
LM339A V+
SOI 13
1% 1/16W MF 2 402
SI4467DY
SM-1 8 3 7 6 5
Q1102
D
S G
2 1
R1103
1
50 46 27 10 9 8 6
SYS_SLEEP
100K 2
U1100
11
GND
12
MIN_NECK_WIDTH=10MIL
RUN -> LOW SLEEP -> FLOAT SHUTDOWN -> FLOAT
RAIL_RUN_FET MIN_LINE_WIDTH=20MIL
5% 1/16W MF 402 RAIL_CTL_POS 4
FET ON IN RUN
3
LM339A V+
SOI 2
4 FET ON IN SLEEP 1 2 3
Q1103
SM-1 5 6 7 8
SI4467DY
3
RAIL_CTL_NEG 5
U1100
GND
12
MIN_NECK_WIDTH=10MIL
RUN -> FLOAT SLEEP -> LOW SHUTDOWN -> FLOAT
RAIL_SLEEP_FET MIN_LINE_WIDTH=20MIL
G S
R11021
C
11 7 6
47.0K
1% 1/16W MF 603 2 4 FET ON IN SLEEP 1 2
CRITICAL
SI4467DY
SM-1 5 6 7 8
Q1101
D
G S
PP5V_ALL
3
P-CHANNEL Ron=11mOhm
CRITICAL
1
Vpwr >= Vout+0.35V
Vctrl >= Vout+1.25V
B
A
. w w w
8 7 6
p la
-s p to
5 4
SENSE
CS5253 SM VPWR VOUT VCTRL VOUT TAB ADJ
VR1100
3 6
R1
2 3_3V_ALL_ADJ MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL
1
C1102
100UF
1
C1101
0.1UF
m e h c
PROCESS SWING 3.30V - 3.45V Vout=Vref(1+R2/R1)+Iadj(R2) 1
P-CHANNEL Ron=11mOhm
a
D
4
.c s ic t
PP5V_PWRON
6 18
VOLTAGE=5V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
PP3V3_PWRON
VOLTAGE=3.3V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
6 18 27
m o
D
C
PP3V3_ALL
7 11
VOLTAGE=3.3V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
R1105
124
Vref=1.250V typ Iadj=50uA typ
1% 1/16W MF 2 603
1
C1100
150UF
20% 2 10V ELEC SM
1
R1106
210
20% 2 6.3V ELEC SM
N20P80% 16V 2 CERM 603
R2
1% 1/16W MF 2 603
B
A
5
4
3
2
1
8
ELECTRICAL_CONSTRAINT_SET SMU_CLK10M_XTAL NET_SPACING_TYPE 15 MIL SPACING 15 MIL SPACING 15 MIL SPACING 15 MIL SPACING 15 MIL SPACING
7
DIFFERENTIAL_PAIR SMU_CLK10M_XIN SMU_CLK10M_XOUT SMU_CLK10M_XOUT_R RTC_CLK32K_X1 RTC_CLK32K_X2
13 13 13
6
5
4
3
2
Real Time Clock
7 13 8 7
1
_PP3V3_ALL_RTC _PP3V3_ALL_SMU
RTC_CLK32K_XTAL
13 13
System Management Unit
13 8 7
Page Notes
D
Power aliases required by this page: - _PP3V3_ALL_SMU - _PP3V3_ALL_RTC - _PP3V3_PWRON_SMU - _PPVREF_SMU (SMU AVCC or 2.5V reference) Signal aliases required by this page: (NONE)
_PP3V3_ALL_SMU
R1315 4.7
1 2
C1300 1 C1301 1 C1302 1
10uF 20%
6.3V 2 CERM 805
0.1uF 20%
10V CERM 2 402
0.1uF 20%
5% 1/16W MF 402
PP3V3_ALL_SMU_AVCC 8 VOLTAGE=3.3V MIN_LINE_WIDTH=15 mil MIN_NECK_WIDTH=10 mil
1
C1303
1uF
GND_SMU_AVSS
10V CERM 2 402
10% 6.3V 2 CERM 402
8 13 33 36
BOM options provided by this page: (NONE) NOTE: CPU current/voltage monitoring (CPU_SENSE_I/CPU_SENSE_V) requires 100K/10uF RC filter at SMU pins. Caps should connect to GND_SMU_AVSS. SMU_VREF should be same signal or reference used by monitoring circuit, but be aware that this will affect other analog inputs such as AC adapter ID. NOTE: All analog inputs to SMU should have a 100pF capacitor to the SMU AVSS signal (GND_SMU_AVSS). None of those capacitors are provided on this page.
Y = Primary function N = Alternate function (see aliases below) S = Spare
33 13 33 36 13 30 29 13 8 8 8 8
13
78
ALIAS ALIAS ALIAS
VCC
67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 39 38 37 36 35 34 33 32
M30280F8
P0[0] P0[1] P0[2] P0[3] P0[4] P0[5] P0[6] P0[7] P1[0] P1[1] P1[2] P1[3] P1[4] P1[5] P1[6] P1[7] P2[0] P2[1] P2[2] P2[3] P2[4] P2[5] P2[6] P2[7]
AN00 AN01 AN02 AN03 AN04 AN05 AN06 AN07 AN20 AN21 AN22 AN23 INT3* INT4* INT5* SDAmm SCLmm IOC2 IOC3 IOC4 IOC5 IOC6 IOC7
U1300
QFP-80
OMIT
AVCC
SMU_BOOT_BUSY SMU_BOOT_SCLK SMU_BOOT_CE
CPU_SENSE_I CPU_SENSE_V CPU_TEMP CPU_BYPASS_L ALS0_OUT ALS1_OUT ALS_GAIN_BOOST SMU_ADAPTER_ID SMU_PWRSEQ_P1_0 SMU_PWRSEQ_P1_1 SMU_PWRSEQ_P1_2 SMU_PWRSEQ_P1_3 SMU_PWRSEQ_P1_4 SYS_POWERFAIL_L SYS_DRIVE_BAY_INT_L SYS_DOOR_AJAR I2C_SMU_E_SDA I2C_SMU_E_SCL FAN_TACH0 FAN_TACH1 FAN_TACH2 FAN_TACH3 FAN_TACH4 FAN_TACH5
Y Y Y Y S S S S Y Y Y Y Y Y S S Y Y Y Y Y N N N
Y Y Y Y Y Y Y Y Y Y Y Y Y N N N Y Y Y Y Y S S S
N S N N S S S S Y Y Y Y Y Y S Y Y Y Y Y Y Y Y Y
S S N N S S S S Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y
RTS0*/ CTS0* P6[0] 43 CLK0 P6[1] 42 RXD0 P6[2] 41 TXD0 P6[3] 40 RTS1* (BUSY) P6[4] 31 CLK1 P6[5] 30 RXD1 P6[6] 29 TXD1 P6[7] 28 SDA SCL TA1out TA1in TA2out TA2in TA3out TA3in TA4out TA4in INT0* INT1* INT2* NMI* CE*
Y Y Y Y Y Y Y Y Y Y Y Y Y Y S Y
Y Y Y Y Y Y Y Y Y Y Y Y Y Y N Y
N N N S S S Y Y Y Y N Y N Y Y Y Y Y Y S Y S Y Y
N N N S S S Y Y Y Y N Y N Y Y Y
CPU_VID<0> CPU_VID<1> CPU_VID<2> CPU_VID<3> CPU_VID<4> CPU_VID<5> SMU_BOOT_RXD SMU_BOOT_TXD
3 3 3 8
C
NOTE: Some primary and alternate functions reuire pull-ups that are not. provided on this page. Please. review the latest SMU specification to ensure missing pull-ups are provided on another page. NOTE: Pinout matches SMU pinout v1.4.
8 13 8 6 13 13
18 18 16 16 17 13
Undervoltage Reset Circuit
NO_SMU_I2C_D
13 13
18 18 14 18 18 14 18 18 8 36 27 25 16
R1399
13 8 7
_PP3V3_ALL_SMU
25
SMU_TO_SB_INT_L
1
0
2
R1322
1K
1
5% 1/16W MF 402
I2C_SMU_A_SDA_IN I2C_SMU_A_SDA_OUT I2C_SMU_A_SCL_IN I2C_SMU_A_SCL_OUT I2C_SMU_D_SDA I2C_SMU_D_SCL SMU_CHARGE_BATT SYS_OVERTEMP_L
5% 1/16W MF 402 2
PP3V3_ALL_SMU_RESET VOLTAGE=3.3V MIN_LINE_WIDTH=10 mil MIN_NECK_WIDTH=10 mil 4
8
_PPVREF_SMU
8
B
8 7 6
C1310 1
0.1uF 20%
10V CERM 2 402 3
MAX6804 SOT143
MR* RSET* GND
1 2
U1302
VCC
SMU_MANUAL_RESET_L
A
13 13 13
Consumer
FAN_TACH3 FAN_TACH4 FAN_TACH5 Port 2.5 ALIAS 2.6 ALIAS 2.7 ALIAS SYS_LED_RED SYS_LED_GREEN SYS_LED_BLUE
21 21 21
13 8 6 13 13 13
. w w w
0
13
R13171
5% 1/16W MF 402 2
SMU_CLK10M_XOUT
C1304 1 C1305 1
12pF 5%
50V CERM 2 402
p la
8 6 13 13
SMU_BOOT_CNVSS SMU_RESET_L SMU_CLK10M_XOUT_R SMU_CLK10M_XIN
NO STUFF
R1316 10M
1 2 5% 1/16W MF 402
-s p to
Y Y Y Y Y Y S S Y Y Y Y Y Y Y Y Y Y Y Y Y Y S S Y Y Y Y Y Y S S
P3[0] CLK3 P3[1] Sin3 P3[2] Sout3 P3[3] P3[4] P3[5] P3[6] P3[7]
m e h c
P8[0] 19 P8[1] 18 P8[2] 17 P8[3] 16 P8[4] 15 P8[5] 14 P8[6] 8 P8[7] 7
Y Y Y S Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y S Y S Y Y Y S Y Y Y Y S TB0in TB1in TB2in AN24 AN25 AN26 AN27
P7[0] 27 P7[1] 26 P7[2] 25 P7[3] 24 P7[4] 23 P7[5] 22 P7[6] 21 P7[7] 20
I2C_SMU_B_SDA I2C_SMU_B_SCL I2C_SMU_CPU_SDA_IN FAN_RPM0 I2C_SMU_CPU_SCL_IN FAN_RPM1 EXT_LED_L FAN_RPM2
SYS_LED SYS_COLD_RESET_L SYS_PME_L ACCEL_INT_L SYS_SLEWING_L I2C_SMU_CPU_SDA_OUT SYS_POWERUP_L MAKE_BASE=TRUE SMU_SLEEP CLOCK_RESET_L CPU_HRESET_L SB_TO_SMU_INT_L SB_STOPXTALS_L SMU_PWRSEQ_P9_5 SMU_PWRSEQ_P9_6 ACCEL_LOWPWR_L
a
.c s ic t
8 8 8 8 13 8 13 8 13 8 8 8 8 8 18 18 13 18 16 13 18 16 13 17 21 13 24 13 25 77 8 13 25 27 33 18 6 7 10 11 13 33 8 13 27 14 29 30 25 25 3 3 8 8 8 24 24 25 13 24 25 6 7 13 7 13 18
m o
18 18
C1308 1
0.1uF 20%
10V CERM 2 402 5 6 NC 7
8
VCC
U1301 DS1338
X1 X2 SCL SQW/ VBAT OUT GND
4 1
RTC_CLK32K_X1 1 1 2 4 3 RTC_CLK32K_X2
13
I2C_RTC_SDA I2C_RTC_SCL
SDA
MSOP
Y1301 SM-1
32.768K
13
D
C1309
0.1uF
Consumer Portable Tower Server
Consumer Portable Tower Server
20% 2 10V CERM 402
SMU Pull-ups / pull-down
_PP3V3_ALL_SMU
7 8 13
C
SYS_POWERUP_L
6 7 10 11 13 33
R1300 10K
1 2
R1302 10K
1 2 5% 1/16W MF 402
PP3V3_PWRON
5% 1/16W MF 402
SYS_POWER_BUTTON_L
6 7 13
R1304 10K
2 1 5% 1/16W MF 402
P9[0] 5 P9[1] 4 P9[2] 3 P9[3] 2 P9[5] 1 P9[6] 80 P9[7] 79
Y Y Y Y Y Y S
Y S Y Y Y Y S
SYS_PME_L
13 25 77
PP3V3_RUN
R1312 100K
1 2 5% 1/16W MF 402
SYS_SLEWING_L
13 25 27 33
6 9 10 12 77
PCNVSS RESET* XOUT XIN VREF
AN0 P10[0] 76 AN1 P10[1] 74 AN2 P10[2] 73 AN3 P10[3] 72 KI0* P10[4] 71 KI1* P10[5] 70 KI2* P10[6] 69 KI3* P10[7] 68
S Y Y Y Y Y Y Y
S Y Y Y Y Y Y Y
S Y Y Y Y Y Y N
S Y Y Y Y Y Y N 1
PP2V5_PWRON
TP_SMU_SPARE_P10_0 SMU_WARM_RESET_L NB_SUSPENDACK_L SB_SUSPENDACK_L SMU_SUSPENDREQ_L SYS_POWER_BUTTON_L SYS_RESET_BUTTON_L I2C_SMU_CPU_SCL_OUT
R1311 100K
1 2 2 5% 1/16W MF 402
SMU_SUSPENDREQ_L
13 24 25
R1313 100K
1 5% 1/16W MF 402
SYS_COLD_RESET_L
13 24
B
R13251
5% 1/16W MF 402 2
10K
VSS
AVSS
75
R1327
10K
R1310
1
11
100K2
5% 1/16W MF 402
SMU_SLEEP
XW1300 SM
1 2
5% 1/16W MF 2 402 GND_SMU_AVSS 8 13 33 36 VOLTAGE=0V MIN_LINE_WIDTH=15 mil MIN_NECK_WIDTH=10 mil
8 13
CRITICAL
10.0000M 1 2
8X4.5MM-SM
Y1300
Keep crystal subcircuit close to SMU.
Y1300's load capacitance is 12pF
12pF 5%
50V CERM 2 402
Alternate Functions
Portable
Port 1.5 ALIAS 1.6 ALIAS 1.7 ALIAS 7.6 ALIAS
Tower & Server
33 13 36 13 30 29 13 13 8 13 8 13 8 18 13 18 13 18 13
SYS_POWERFAIL_L SYS_DRIVE_BAY_INT_L SYS_DOOR_AJAR EXT_LED_L
SMU_ACIN SMU_BATT_DET_L SYS_LID_OPEN SYS_KBDLED
Port CPU_SENSE_I 0.0 ALIAS CPU_TEMP 0.2 ALIAS CPU_BYPASS_L 0.3 ALIAS CPU_VID<0> 6.0 ALIAS CPU_VID<1> 6.1 ALIAS CPU_VID<2> 6.2 ALIAS I2C_SMU_CPU_SDA_IN 7.2 ALIAS I2C_SMU_CPU_SCL_IN 7.4 ALIAS I2C_SMU_CPU_SCL_OUT 10.7 ALIAS
A
SYS_SLOT_PWR FAN_TACH6 FAN_TACH7 FAN_RPM3 FAN_RPM4 FAN_RPM5 FAN_PWM6 FAN_PWM7 EXT_POWER_BUTTON_L
6
8
7
6
5
4
3
2
1
8
7
6
5
4
3
2
1
R1400
27
EI_CPU1_CLK_P_R
1 5% MF
0
2 1/16W 402
EI_CPU1_CLK_P
14 27
R1401
27
EI_CPU1_CLK_N_R
1 5% MF
0
2 1/16W 402
EI_CPU1_CLK_N
14 27
D
27 27
CPU1_HTBEN_R
0 R1402
1 2
CPU1_HTBEN
14
EI_CPU1_SYNC_R
5% 402 0 R1403
1 2
EI_CPU1_SYNC
14 27
5% 402
NOSTUFF
J1400
YFS-30-03-H-08-SB F-ST-BGA
27 14 30 29
EI_CPU1_SYNC CHKSTOP_L
H1 H2 H3 H4 H5 H6 H7 H8 H9 H10 H11
C
29 28 29 28 29 28 29 28 29 28 29 28 29 28 29 28 29 28 29 28 29 28 29 28 30 29 30 29 28
H12 H13 H14 H15 H16
EI_NB_TO_CPU_AD<13> EI_NB_TO_CPU_AD<15> EI_NB_TO_CPU_AD<17> EI_NB_TO_CPU_AD<21> EI_NB_TO_CPU_AD<20> EI_NB_TO_CPU_AD<25> EI_NB_TO_CPU_AD<29> EI_NB_TO_CPU_AD<28> EI_NB_TO_CPU_AD<40> EI_NB_TO_CPU_AD<10> EI_NB_TO_CPU_AD<39> EI_NB_TO_CPU_AD<36> RI_L EI_QREQ_L
H17 H18 H19 H20 H21 H22 H23 H24 H25 H26 H27 H28 H29 H30
H1 H2 H3 H4 H5 H6 H7 H8 H9 H10 H11 H12 H13 H14 H15 H16 H17 H18 H19 H20 H21 H22 H23 H24 H25 H26 H27 H28 H29 H30
G1 G1 G2 G2 G3 G3 NC G4 G4 G5 G5 G6 G6 G7 G7 G8 G8 G9 G9 G10 G10 G11 G11 G12 G12 NC G13 G13 G14 G14 G15 G15 G16 G16 G17 G17 G18 G18 G19 G19 G20 G20 G21 G21 G22 G22 G23 G23 G24 G24 G25 G25 G26 G26 G27 G27 G28 G28 G29 G29 G30 G30
EI_CPU1_CLK_P
14 27
27 14
EI_CPU1_CLK_N
F1 F2 F3
EI_CPU_TO_NB_AD<3> 28 29 EI_CPU_TO_NB_AD<4> 28 29 EI_CPU_TO_NB_AD<7> 28 29 EI_CPU_TO_NB_AD<11> 28 29 EI_CPU_TO_NB_CLK_N 28 29 EI_CPU_TO_NB_CLK_P 28 29 EI_CPU_TO_NB_SR_N<1> 28 29 EI_CPU_TO_NB_SR_P<1> 28 29 EI_CPU_TO_NB_AD<17> EI_CPU_TO_NB_AD<14> EI_CPU_TO_NB_AD<24> EI_CPU_TO_NB_AD<28> EI_NB_TO_CPU_AD<14> EI_NB_TO_CPU_AD<12> EI_NB_TO_CPU_AD<18> EI_NB_TO_CPU_AD<19> EI_NB_TO_CPU_AD<27> EI_NB_TO_CPU_AD<26> EI_NB_TO_CPU_AD<30> EI_NB_TO_CPU_AD<42> EI_NB_TO_CPU_AD<41>
28 29 28 29 28 29 28 29 28 29 28 29 28 29 28 29 28 29 28 29 28 29 28 29 28 29 29 28
F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16
EI_NB_TO_CPU_AD<5>
F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30
EI_NB_TO_CPU_SR_N<0> 28 29 EI_NB_TO_CPU_SR_P<0> 28 29 I2C_SMU_A_SCL_OUT 13 18
29 28 29 28 29 28
EI_NB_TO_CPU_AD<37> EI_NB_TO_CPU_SR_N<1> EI_NB_TO_CPU_SR_P<1>
B
A
. w w w
8 7 6
p la
-s p to
F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30
E1 E1 E2 E2 NC E3 E3 NC E4 E4 NC E5 E5 NC E6 E6 E7 E7 E8 E8 NC E9 E9 E10 E10 E11 E11 E12 E12 E13 E13 E14 E14 E15 E15 E16 E16 E17 E17 E18 E18 E19 E19 E20 E20 E21 E21 E22 E22 NC E23 E23 E24 E24 E25 E25 E26 E26 E27 E27 E28 E28 E29 E29 E30 E30
30 29 25
CPU_INT_L
D1 D2 D3 D4 D5
EI_CPU_TO_NB_AD<8> 28 29 EI_CPU_TO_NB_AD<13> 28 29 EI_CPU_TO_NB_AD<12> 28 29 EI_CPU_TO_NB_AD<5> 28 29 EI_CPU_TO_NB_AD<36> 28 29 EI_CPU_TO_NB_AD<35> 28 29 EI_CPU_TO_NB_AD<18> 28 29 EI_CPU_TO_NB_AD<43> 28 29 EI_CPU_TO_NB_AD<42> 28 29 EI_CPU_TO_NB_AD<38> 28 29 EI_CPU_TO_NB_AD<40> 28 29 EI_NB_TO_CPU_AD<9> 28 29 EI_NB_TO_CPU_AD<11> 28 29 EI_NB_TO_CPU_AD<0> 28 29 EI_NB_TO_CPU_AD<1> 28 29 EI_NB_TO_CPU_AD<22> 28 29 EI_NB_TO_CPU_AD<33> 28 29 EI_NB_TO_CPU_AD<43> 28 29 EI_NB_TO_CPU_AD<2> 28 29 EI_NB_TO_CPU_AD<38> 28 29 SYNCENABLE 29 30 TP_PROC_TRIGGER_OUT 6 29
D6 D7 D8 D9
m e h c
D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24
29 28
EI_CPU_TO_NB_AD<15>
D25 NC D26 D27 D28 D29 D30
29 28 29 28 29 28
29 28 29 28
EI_NB_TO_CPU_AD<8> EI_NB_TO_CPU_AD<24> EI_NB_TO_CPU_AD<7> EI_NB_TO_CPU_AD<6> EI_QACK_L
D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30
C1 C1 C2 C2 NC C3 C3 NC C4 C4 NC C5 C5 NC C6 C6 C7 C7 C8 C8 C9 C9 C10 C10 C11 C11 C12 C12 C13 C13 C14 C14 C15 C15 C16 C16 C17 C17 C18 C18 C19 C19 C20 C20 C21 C21 C22 C22 C23 C23 C24 C24 C25 C25 C26 C26 C27 C27 C28 C28 C29 C29 C30 C30
a
EI_CPU_TO_NB_AD<6> 28 29 EI_CPU_TO_NB_AD<21> 28 29 EI_CPU_TO_NB_AD<20> 28 29 EI_CPU_TO_NB_AD<25> 28 29 EI_CPU_TO_NB_AD<26> 28 29 EI_CPU_TO_NB_SR_P<0> 28 29 EI_CPU_TO_NB_SR_N<0> 28 29 EI_CPU_TO_NB_AD<27> 28 29 EI_CPU_TO_NB_AD<23> 28 29 EI_CPU_TO_NB_AD<39> 28 29 EI_CPU_TO_NB_AD<16> 28 29 EI_CPU_TO_NB_AD<19> 28 29 29
.c s ic t
28 29 28 29 28 29 28 29 28 29 28 29 28 29 28 29 28 29 28
m o
B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19
D
EI_NB_TO_CPU_AD<4> EI_NB_TO_CPU_AD<3> EI_NB_TO_CPU_AD<16> EI_NB_TO_CPU_AD<35> EI_NB_TO_CPU_AD<34> EI_NB_TO_CPU_AD<31> EI_NB_TO_CPU_AD<32> EI_NB_TO_CPU_AD<23> EI_NB_TO_CPU_CLK_N EI_NB_TO_CPU_CLK_P MCP_L I2C_SMU_A_SDA_OUT
NC B20
B21
NC B22
B23 B24 B25 B26 B27 B28 B29 B30
EI_SE
28 29 30
29
18 13
B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30
A1 A1 A2 A2 A3 A3 A4 A4 A5 A5 A6 A6 A7 A7 A8 A8 A9 A9 A10 A10 A11 A11 A12 A12 A13 A13 A14 A14 A15 A15 A16 A16 A17 A17 A18 A18 A19 A19 A20 A20 A21 A21 A22 A22 A23 A23 A24 A24 A25 A25 A26 A26 A27 A27 A28 A28 A29 A29 A30 A30
CPU_HRESET_L CPU1_HTBEN EI_CPU_TO_NB_AD<0> EI_CPU_TO_NB_AD<2> EI_CPU_TO_NB_AD<1> EI_CPU_TO_NB_AD<9> EI_CPU_TO_NB_AD<10> EI_CPU_TO_NB_AD<22> EI_CPU_TO_NB_AD<31> EI_CPU_TO_NB_AD<37> EI_CPU_TO_NB_AD<30> EI_CPU_TO_NB_AD<34> EI_CPU_TO_NB_AD<33> EI_CPU_TO_NB_AD<32> EI_CPU_TO_NB_AD<41> EI_CPU_TO_NB_AD<29>
13 29 30 14 28 29 28 29
28 29 28 29 28 29 28 29 28 29 28 29 28 29 28 29 28 29 28 29 28 29 28 29
C
B
A
5
4
3
2
1
8
7
6
5
4
3
2
1
FAN 0 - Q37 STYLE CPU FAN CONTROL CIRCUIT
CPU FAN 2
PP12V_RUN
SYSTEM TEMP SENSOR
R1645
1
D
R1640
10K
PP12V_FAN_0_ANALOG VOLTAGE=12V MIN_LINE_WIDTH=20MIL MIN_NECK_WIDTH=10MIL
1
4.7 2
C1614 10UF R1642 100K
1 2
1% 1/16W MF 402
1
1
C1601
0.47UF
5% 1/16W MF 402
R1644
4.7K
1 NOSTUFF
1% 1/16W MF 2 402
FAN_0_DRV_F
20% 16V 2 ELEC SM
20% 16V 2 CERM 805
5% 1/16W MF 402 2
C1619 1 47UF
20% 16V 2 ELEC SM
1
C1600 10UF
FAN_0_DRV 3
R1641 100K
1 2
1% 1/16W MF 402
C1615
100PF
1 2
5% 50V CERM 402
10% 2 16V CERM 1210
FAN_0_OPM CRITICAL 2 8
FAN_0_GATE
R1605
13
D
FAN_RPM0
1
0
Q1600 2N7002
SM 2
1
R1639
10K 1%
1/16W MF
1
C1613
0.1UF
20% 603
U1600
1
3
LM358-SOI
FAN_0_GT
D1604
1N914
3
SOT23
2
FAN_0_CNTL
1
G
S
1
1
Q1601
G S D IRF5505
SM
5% 1/16W MF 402 NOSTUFF
2 402
2 16V CERM
3 4
R1600
1
0
R1643
FAN_0_OPP NOSTUFF
1
4
MAX FAN CURRENT=0.5A
FAN_0_PWR
2
1
10K 2
5% 1/16W MF 402
R1603
0
R16011
10K
1% 1/16W MF 402 2
1% 1/16W MF 402
C1616
4700PF
1 2
10% 50V CERM 603
C1617 1
10UF
10% 16V CERM 2 1210
1
C1618
10UF
10% 1210
2 CRITICAL
MIN_LINE_WIDTH=20MIL MIN_NECK_WIDTH=10MIL
PP3V3_PWRON
5% 1/16W MF 2 402
D1605 SM
MBR0530
1
2 16V CERM
C
13
1
R1604
10K
FAN_0_TACH
FAN_TACH0
R1606 0
1 2 5% 1/16W MF 402
1% 1/16W MF 2 402
FAN 1 - Q37 STYLE CPU FAN CONTROL CIRCUIT
SYSTEM FAN 1 R1611
1 PP12V_FAN_1_ANALOG VOLTAGE=12V MIN_LINE_WIDTH=20MIL MIN_NECK_WIDTH=10MIL 1
B
R1616
10K
1% 1/16W MF 2 402
FAN_1_DRV_F
R1615
FAN_1_DRV 3 1
100K 2
1% 1/16W MF 402
R1614
1
13
FAN_RPM1
R1635 0
1 2 5% 1/16W MF 402 NOSTUFF
FAN_1_CNTL
1
G
R1619 0
1 2
5% 1/16W MF 402
PP3V3_PWRON
A
R1636
13
1
R1623
10K
FAN_1_TACH
FAN_TACH1
1
0
1% 1/16W MF 2 402
2
5% 1/16W MF 402
. w w w
D
Q1602
2N7002
SM
1
R1620
10K 1%
1
C1611
0.1UF
20% 603
S
2
1/16W MF 2 402
2 16V CERM
NOSTUFF
p la
20% 16V 2 ELEC SM
C1610 10UF
1
100K 2
1% 1/16W MF 402
CRITICAL
2
8
U1601
1
LM358-SOI
-s p to
4.7
2 1
m e h c
C1604 1
47UF
20% 16V 2 ELEC SM 3
a
1
10% 2 16V CERM 1210
.c s ic t
J1600
1 2 3 4
m o
18
PP3V3_PWRON
D
8
VS+
IIC ADDR:90(1001000)
7 6 5 1 2
U1602 SOP
A0 A1 A2
LM75
CRITICAL
R1621
0
2 SYS_OVERTEMP_L
13 25 27 36
I2C_TEMP_B_SDA
SDA SCL GND
4
3 1 OS TEMP_SENSOR_OS
18
I2C_TEMP_B_SCL
5% 1/16W MF 402
CRITICAL
HF28040-B
M-ST-TH
C
PP12V_RUN
FERR-EMI-100-OHM
1 SM 1 2
L1602
FERR-EMI-100-OHM
PP12V_RUN_FAN_1_LC
1 SM 2
L1603
C1609
0.47UF
5% 1/16W MF 402
R1610
4.7K
1
NOSTUFF
C1602
0.01UF
20% 2 16V CERM 805
5% 1/16W MF 402 2
C1603
10UF
20% 16V 2 CERM 402
B
C1605
100PF
1 2 5% 50V CERM 402
FAN_1_OPM
FAN_1_GATE
D1602
1N914
3
SOT23
FAN_1_GT
1
1
Q1603
G S D
MAX FAN CURRENT=0.5A
IRF5505
SM
3
4
CRITICAL
FAN_1_OPP
R1613 10K
1 2 1% 1/16W MF 402
4
FERR-EMI-100-OHM
FAN_1_PWR
1 SM 2
L1600 L1601
SM
10-89-7062
M-ST-TH 1 4 6 5
J1601
PP12V_RUN_FAN_1_LCL
FAN_1_PWR_FILT
1
R1618
0
R16171
10K
1% 1/16W MF 402 2
C1608
4700PF
1 2
10% 50V CERM 603
C1607 1
10UF
10% 16V CERM 2 1210
1
C1606
10UF
2 CRITICAL
MIN_LINE_WIDTH=20MIL MIN_NECK_WIDTH=10MIL
5% 1/16W MF 2 402
D1601 SM
MBR0530
1
FERR-EMI-100-OHM
1 2
10% 2 16V CERM 1210
FAN_1_TACH_FILT
FERR-EMI-100-OHM
1 SM 2
L1604
FAN_1_GND_FILT
A
8
7
6
5
4
3
2
1
8
7
6
5
4
3
2
1
D
FAN 2 - Q37 STYLE SYSTEM FAN CONTROL CIRCUIT
PP12V_FAN_2_ANALOG VOLTAGE=12V MIN_LINE_WIDTH=20MIL MIN_NECK_WIDTH=10MIL
R1745 4.7
1 2
1
R1740
10K
C1714 1 10UF
20% 16V 2 ELEC SM
1
C1701
0.47UF
5% 1/16W MF 402
R17441
4.7K
5% 1/16W MF 402 2
1% 1/16W MF 2 402
FAN_2_DRV_F
C
FAN_2_DRV 3
R1741 100K
1 2
1% 1/16W MF 402
R1742 100K
1 2
1% 1/16W MF 402
FAN_2_OPM CRITICAL 2 8
13
FAN_RPM2
R1705 0
1 2 5% 1/16W MF 402 NOSTUFF
D
Q1700 2N7002
SM 2
1
R1739
10K 1%
1
C1713
0.1UF
20% 603
LM358-SOI
1
U1700
FAN_2_CNTL
1
G
S
1/16W MF 2 402
16V 2 CERM
3 4
R1700 0
1 2
5% 1/16W MF 402
NOSTUFF
1
R1703
0
PP3V3_PWRON
5% 1/16W MF 2 402
1
R1704
10K
1% 1/16W MF
B
13
FAN_TACH2
R1706 0
1 2 5% 1/16W MF 402
2 402 FAN_2_TACH
A
. w w w
8 7 6
p la
-s p to
FAN_2_OPP
R17011
10K
1% 1/16W MF 402 2
m e h c
C1715
100PF
1 2
5% 50V CERM 402
20% 16V 2 CERM 805
FAN_2_GATE
D1704
1N914
3 1
SOT23
a
3
.c s ic t
PP12V_RUN NOSTUFF
m o
CRITICAL
D
C1719 1 47UF
20% 16V 2 ELEC SM
1
C1700
10UF
10% 1210
2 16V CERM
C
FAN_2_GT
Q1701
G S D
MAX FAN CURRENT=0.5A
4
1
IRF5505
SM
10-89-7062
M-ST-TH 1 4 6 5
J1700
R1743 10K
1 2 1% 1/16W MF 402
FAN_2_PWR
C1716
4700PF
1 2
10% 50V CERM 603
C1717 1
10UF
10% 16V CERM 2 1210
1
C1718
10UF
10% 1210
MIN_NECK_WIDTH=10MIL 2 CRITICAL
MIN_LINE_WIDTH=20MIL
D1705 SM
MBR0530
1
2 16V CERM
B
A
5
4
3
2
1
8
7
27 18 11 6
6
11 6
5
PP5V_PWRON
4
PP1V2_EI_NB
7 28
3
2
PP3V3_PWRON
1
I2C A BUS
SMU
13
PP3V3_PWRON
C1800 1
0.1UF
1
1
R18001
2K
5% 1/16W MF 402 2
R1801
2K
20% 10V CERM 2 402 3
R1809
4.7K
R18081
200
5% 1/16W MF 402 2
1
R1810
200
D
14 13
13
14 13
MASTER U1300 I2C_SMU_A_SDA_IN MAKE_BASE=TRUE I2C_SMU_A_SDA_OUT MAKE_BASE=TRUE I2C_SMU_A_SCL_IN MAKE_BASE=TRUE I2C_SMU_A_SCL_OUT MAKE_BASE=TRUE PINS 36-39
5% 1/16W MF 2 402
5% 1/16W MF 2 402 8
5% 1/16W MF 2 402
LM339A
SOI 14
V+ GND
12 2 G S 1 3 6 9 D
NET_SPACING_TYPE=I2C NET_SPACING_TYPE=I2C NET_SPACING_TYPE=I2C NET_SPACING_TYPE=I2C
U1800
U3LITE
Q1800
SOT-363
U3 I2C_NB_A_SDA I2C_NB_A_SCL
24 24
2N7002DW
LM339A
SOI 1
6
PINS A20, B20
V+ GND
3 7 D
U1800
12 5 G S
Q1800
SOT-363 4
27 18 11 6
PP3V3_PWRON
2N7002DW
NOSTUFF
NOSTUFF
1 1
R1820
0
R1821
0
R18191
2K
5% 1/16W MF 402 2
1
R1818
2K
3
5% 1/16W MF 2 402
5% 1/16W MF 402 2
7 29 30 31 35
5% 1/16W MF 2 402
LM339A
SOI
10
PP1V2_EI_CPU
V+ GND
11
SMU
MASTER U1300 I2C_SMU_CPU_SCL_IN 13 MAKE_BASE=TRUE I2C_SMU_CPU_SCL_OUT 13 MAKE_BASE=TRUE I2C_SMU_CPU_SDA_IN 13 MAKE_BASE=TRUE I2C_SMU_CPU_SDA_OUT 13 MAKE_BASE=TRUE PINS 14,25,23,68
13
U1800
12
R18161
1.2K
5% 1/16W MF 402 2
1
R1817
1.2K
RP1800
I2C I2C I2C I2C
1 2 3 4 1/16W SM1
0K
5% 8 7 6 5
5% 1/16W MF 2 402
CPU
U2900
SMU_CPU_JTAG_OR_I2C I2C_CPU_A_SCL I2C_CPU_A_SDA_TO_SMU
3
NET_SPACING_TYPE=I2C NET_SPACING_TYPE=I2C
C
LM339A
SOI 2
4
V+ GND
12 5
U1800
NOSTUFF
RP1801
0K
5% 1 2 3 4 1/16W SM1 8 7 6 5
I2C_0V546_REF
CPU JTAG
JTAG_CPU_TDO JTAG_CPU_TDI JTAG_CPU_TMS JTAG_CPU_TCK
29 30 29 30 29 30 29 30
PP2V5_PWRON
B
R1805
2K
5% 1/16W MF 402 2 1 1
I2C C BUS
R1804
2K
5% 1/16W MF 2 402
U3LITE
MASTER U3 I2C_NB_C_SDA MAKE_BASE=TRUE I2C_NB_C_SCL MAKE_BASE=TRUE PINS C21, E21
NET_SPACING_TYPE=I2C NET_SPACING_TYPE=I2C
J4000 = A0 J4001 = A2
ALIAS ALIAS
I2C_DIMM_SDA I2C_DIMM_SCL
PINS 91, 92 OF EACH DIMM
A
. w w w
24 24
DIMMS
40 40
p la
U3LITE 'B'
U3
24 24
-s p to
20% 10V 2 CERM 402
1
C1801 1R1811 0.1UF
576
1% 1/16W MF 2 402
m e h c
1
I2C_CPU_A_SCL I2C_CPU_A_SDA
PINS AA20, Y21
a
29 29
.c s ic t
m o
SMU
MASTER U1300
13 13
I2C B BUS
R18031
2K
5% 1/16W MF 402 2 1
R1802
2K
5% 1/16W MF 2 402
D
I2C_SMU_B_SDA MAKE_BASE=TRUE I2C_SMU_B_SCL MAKE_BASE=TRUE PINS 26, 27
NET_SPACING_TYPE=I2C NET_SPACING_TYPE=I2C
PULSAR
U2600
27 27
I2C_CLOCK_SDA I2C_CLOCK_SCL PINS C1, B1
ALIAS ALIAS
SYSTEM TEMP SENSOR
U1602
16 16
I2C_TEMP_B_SDA I2C_TEMP_B_SCL PINS 1, 2
ALIAS ALIAS
C
I2C SB BUS
SHASTA
MASTER U2300
25
PP3V3_RUN
R18151
1K
5% 1/16W MF 402 2
1
R1814
1K
5% 1/16W MF 2 402
25
I2C_SB_SDA MAKE_BASE=TRUE I2C_SB_SCL MAKE_BASE=TRUE PINS Y9, AB7
NET_SPACING_TYPE=I2C NET_SPACING_TYPE=I2C
I2C D & E BUS
PP2V5_PWRON
MICRODASH
J9400
PP3V3_ALL
94 6 94 6
B
I2C_UDASH_SDA I2C_UDASH_SCL
ALIAS ALIAS
R18121
2K
5% 1/16W MF 402 2
1
R1813
2K
PINS 21, 24
5% 1/16W MF 2 402
R1807
2K
1
R1806
2K
5% 1/16W MF 402 2
5% 1/16W MF 2 402
RTC
U1301
AUDIO
U9500
13 13 95 95
I2C_NB_B_SDA I2C_NB_B_SCL
I2C I2C
I2C I2C
I2C_RTC_SDA I2C_RTC_SCL PINS 5, 6
I2C_AUDIO_SDA I2C_AUDIO_SCL
ALIAS ALIAS
PINS C20, B21
PINS 18, 19
NOSTUFF
NOSTUFF
1
R18221
0
5% 1/16W MF 402 2
R1823
0
NOSTUFF
5% 1/16W MF 2 402
R1824
SMU 'E'
MASTER U1300
13
2
0
R1826
2
1
0
1
5% 1/16W MF 402
5% 1/16W MF 402
SMU 'D'
MASTER U1300 I2C I2C I2C_SMU_D_SDA I2C_SMU_D_SCL PINS 34, 35
13
A
13
NOSTUFF I2C_SMU_E_SDA I2C_SMU_E_SCL I2C I2C
R1825
2
0
R1827
2
13
1
0
1
PINS 50, 51
5% 1/16W MF 402
5% 1/16W MF 402
8
7
6
5
4
3
2
1
8
TOTAL CURRENT EXCLUDING LEDS CURRENT < 170 MICRO AMPS
7
6
RGB_LED
5
4
3
2
1
C2105
220PF
1 2
RGB_LED GND_CHASSIS_LED
7 21
LED2100 LATBG66B
AMB-GRN-BLUE PLCC
PP5V_PWRON PP5V_PWRON
PLACE THESE PARTS CLOSE TO SMU IC
PP5V_PWRON
5% 25V CERM 402
RGB_LED
RGB_LED
RGB_LED
400-OHM-EMI
1 AMB 3 2 GRN 4 BLUE 5 6
L2104
SM-1
RGB_LED
G_DRV_K MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
1
RGB_LED_A MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
1
2
D
13
R21091 R2101
SYS_LED_GREEN MAKE_BASE=TRUE PWM INPUT FROM SMU
2
RGB_LED
953K
G_PWM_IN_H
1% 1/16W MF 402 2
RGB_LED RGB_LED
0
L2100
SM-1 2
1
G_PWM_DC
5% 1/16W MF 402
U2100
4 12 13
400-OHM-EMI
RGB_LED
1
R2104
953K
RGB_LED 1
1% 1/16W MF 402 2
+ -
LP324
14
C2107
220PF
G_BASE_DRV
11TSSOP
RGB_LED
G_DRV MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
3
5% 25V 2 CERM 402
0.022UF
2 1
C2104
20% 16V CERM 402
RGB_LED
1
C2108
220PF
2 1 5% 25V CERM 402
RGB_LED
GND_CHASSIS_LED
7 21
Q2102
2N3904
SM 2
RGB_LED
C2106 1
0.47UF
20% 10V CERM 2 603
R2105
200K
RGB_LED 1
1% 1/16W MF 402 2
R2112
2
RGB_LED
G_IN_OFFSET 5MV INPUT OFFSET
1K
G_DRV_FB MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
1
1
1% 1/16W MF 402
R2100
25.5
RGB_LED
C2109
220PF
2 1 5% 25V CERM 402
RGB_LED
1% 1/16W MF 2 402
100% DUTY CYCLE OF 3V-PP PWM = 0.5V
CHANGE R2100 VALUE TO SET LED CURRENT MAX LED CURRENT = 0.5 / R
C
PLACE THESE PARTS CLOSE TO SMU IC
PP5V_PWRON
1
R_DRV_K MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL RGB_LED
RGB_LED
R21021
953K
RGB_LED
L2101
400-OHM-EMI
SM-1 2
R2115
SYS_LED_RED MAKE_BASE=TRUE PWM INPUT FROM SMU
13
1% 1/16W MF 402 2
2
0
RGB_LED R_PWM_IN_H R_PWM_DC
1
U2100
4 5 6
5% 1/16W MF 402
R21101
953K
1% 1/16W MF 402 2
RGB_LED
+ -
LP324
7
R_BASE_DRV RGB_LED
1
R_DRV MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
3
11TSSOP
RGB_LED
Q2108
2N3904
SM 2
0.022UF
2 1
C2101
20% 16V CERM 402
RGB_LED
C2112
0.47UF
1
R2111
200K
RGB_LED 1
1% 1/16W MF 402 2
20% 10V CERM 2 603
R2114
2
RGB_LED
R_DRV_FB MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL RGB_LED
1
R_IN_OFFSET
1K
1
1% 1/16W MF 402
R2113
25.5
B
PLACE THESE PARTS CLOSE TO SMU IC
PP5V_PWRON
R21181
953K
RGB_LED
R2130
SYS_LED_BLUE 13 MAKE_BASE=TRUE PWM INPUT FROM SMU
2
RGB_LED
0
1% 1/16W MF 402 2
RGB_LED
4 3
1
B_PWM_IN_H B_PWM_DC
U2100
2
5% 1/16W MF 402
R2116
953K
RGB_LED 1
1% 1/16W MF 402 2
+ -
LP324
1
11TSSOP
RGB_LED
C2118
1
R2117
200K
RGB_LED 1
1% 1/16W MF 402 2
A
0.47UF
20% 10V CERM 2 603
B_IN_OFFSET
. w w w
B_BASE_DRV
p la
B_DRV_K MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
1
1% 1/16W MF 2 402
-s p to
m e h c
PP3V3_PWRON
2
a
Q2100
FDV302P
SOT-23
.c s ic t
WHITE_LED
m o
2
C2103 1
0.1UF
20% 10V CERM 2 402 10 9
U2100
4
+ -
LP324
8
11TSSOP
D
6
U2100_UNUSED
C
LED2101
1
SYS_DRV_A MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
PP5V_PWRON
SYS_DRV_K MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
WHITE
SM6 1
WHITE_LED
400-OHM-EMI
2 SM-1
L2105
WHITE_LED
1
C2111
220PF
WHITE_LED
C2110
220PF
2 1 5% 25V CERM 402
5% 25V 2 CERM 402
GND_CHASSIS_LED
7 21
PLACE THESE PARTS CLOSE TO SMU IC
1
NOSTUFF
WHITE_LED
L2103
SM-1 2
400-OHM-EMI
R2106
2
S
D
3
SYS_LED_H WHITE_LED
1K
1
SYS_GATE
2
953K 1
1% 1/16W MF 402
G
R2119
NOSTUFF
R2129
4.7K
1
1
5% 1/16W MF 402
SYS_LED_DRV_K MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL WHITE_LED 1
B
5% 1/16W MF 402 2
R2103
100
R2132
13
NOSTUFF
2
1% 1/16W MF 2 402
SYS_LED
1K
1
SYS_LED_IN WHITE_LED
2 3
PWM INPUT FROM SMU
RGB_LED
L2102
SM-1
5% 1/16W MF 402
SYS_LED_DRV_C MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL WHITE_LED
SM 2
R2107
0
1 1 5% 1/16W MF 402
Q2101
400-OHM-EMI
FDV301N
2
B_DRV MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL RGB_LED
(STUFF WHEN SYS_LED_L = ACTIVE HIGH) (AND NO STUFF R2132, R2119 & Q2100)
3
C2102
1 2 20% 16V CERM 402
RGB_LED
1
Q2114
2N3904
SM 2
0.022UF
R2127
2
RGB_LED
B_DRV_FB MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL RGB_LED
1
1K
R2126
25.5
A
1
1% 1/16W MF 402
1% 1/16W MF 2 402
8
7
6
5
4
3
2
1
8
7
6
5
4
3
PART# 343S0284 QTY 1
2
DESCRIPTION IC,U3LITE,V1.1,300MM,PBGA REFERENCE DESIGNATOR(S) U3
1
TABLE_5_HEAD
BOM OPTION
TABLE_5_ITEM
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR PART NUMBER 343S0284
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_ITEM
343S0282
U3
U3L,V1.1,200MM,PBGA
NOTE: SET OUTPUT=1.5VDC FOR U3LITE CORE IRU3037CS VREF=1.25VDC VOUT=VREF*(R2203+R2205)/R2205=1.5VDC
D
PP5V_PWRON PP5V_PWRON PP5V_PWRON
7.73A OF PEAK CURRENT DRAW ON PCORE_NB
D2200
2 1 1 1
W14 W17
V12
V15 U10
U13
U18 T11
T16
R14 R17
P12 P15
N13
N18 M11
M16
L14 L17
K12
4.7
5% 1/10W FF 2 805
D2202
MBR0520L
SM 1
D2201
U2200_VC_R
2 1 1
2
C2201
10UF
1
C2202
390UF
1
C2203
390UF
AG7 AG13 AG16 AG22 AE4 AE10 AE19 AE25 AC7 AC13 AC16 AC22 AB2 AB6 AB23 AB27 AA10 AA19 Y12 Y15 Y20 W4 GND W8 W13 W18 W21 W25 V11 V16 V19 U9 U14 U17 T2 T6 T12 T15 T20 T23 T27 R10 R13
VDD
K15
R2200
MBR0520L SM
U2200_VC_D
U2200_VC
1
C2204
1UF
2 6
C2216
1UF
MBR0520L SM
20% 6.3V 2 CERM 1206
20% 2 6.3V ELEC 8X11.5-TH
20% 2 6.3V ELEC 8X11.5-TH
20% 2 25V CERM 805
VCC
SOI
VC
IRU3037CS
HD
U2200_SS U2200_COMP
8 5
U2200
20% 2 25V CERM 805
R2202
1
D
0
Q2201
Q2201_GATE
G S
1
C2217
1UF
2
NTD60N02R
CASE369
U2200_GATE_H U2200_GATE_L
6
5% 1/10W FF 805
20% 25V 2 CERM 805
L2201
1.6UH
TH 1 2
SS LD
3
MIN_LINE_WIDTH=25MIL Q2202_DRAIN MIN_NECK_WIDTH=10MIL
7
COMP FB
1
U2200_FEEDBACK
D 4
C
1
1
R2201
27.4K
1
GND
4 1 G 1
C2214
0.1UF
1% 1/16W MF 2 402
R2201_P2
Q2202
NTD60N02R
CASE369 S3
C2213
68PF
C2206
220PF
1
NOSTUFF
20% 16V 2 CERM 603
1
C2215
3900PF
5% 50V 2 CERM 603
5% 25V 2 CERM 402
C2205
0.022UF
5% 50V 2 CERM 603
10% 50V 2 CERM 603
B
22 7 6
PPVCORE_NB
1
C2222
0.1UF
1
C2223
0.1UF
1
20% 10V 2 CERM 402
20% 10V 2 CERM 402
20% 10V 2 CERM 402
A
. w w w
C2225
0.1UF
1
C2227
0.1UF
1
C2228
0.1UF
20% 10V 2 CERM 402
20% 10V 2 CERM 402
p la
1
-s p to
U2200_FEEDBACK CHECK FETS
1
m e h c
NOSTUFF
1
R2204
1.1K
NOSTUFF
1
C2207
1UF
1
1% 1/16W MF 2 402
20% 10V 2 CERM 603
1% 1/16W MF 2 402
R2204_P2
NOSTUFF
a
R2203
2K
.c s ic t
1
PPVCORE_NB
VOLTAGE=1.2V MIN_NECK_WIDTH=10MIL MIN_LINE_WIDTH=25MIL
m o
6 7 22
D
R18 P11 P16 P19 N4 N8 N9 N14 N17 N23 N27 M12 M15 M20 L10 L13 L18 K2 K6 K11 GND K16 K21 K25 J9 J14 H10 H19 G4 G23 G27 F13 F16 F22 D2 D7 D10 D19 D25 B4 B13 B16 B22
OMIT