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BLOCK DIAGRAM
Dothan
478 uFCPGA 1,2
CLOCK GEN. ICS950815
6,7
HOST BUS
AGTL 1.3V,100MHZ LCD_CN
17
Montara855GME
CRT
16
DDR SDRAM 333MHz
732 uFCBGA 8,9,10,11
USB 1
34
Hublink
66MHZ USB2.0 IDE_BUS
USB 2
34
CDROM
SWAP BAY
32
HDD_CN
32
FDD
LPC, 33MHz
SUPER I/O PC87393 37
w
w w
IR
38
LPT
38
p la .
KEYBOARD CONTROLLER M3885XHP 39 INTERNAL KEYBOARD&TP
40
s p to
ICH4-M
421 BGA 16,17,18,19
AC LINK
AC97 STAC9700T
m e h c
DDR333 SODIMM X 1
+2.5V +1.25V 14 256/ 512 Mb DDR X 8 12,13
a
ic t
.c s
15 29
m o
CAP/RES .... DDR
PCI_BUS
3.3V, 33MHz
CARDBUS
RICOH R5C590
26
LAN
REALTEK 8101
MINI PCI TYPEII 31
23
Mic pre. AMP
MDC
25 25
AUDIO AMP
24
CARDBUS 1 SLOT
VCCA, VCCB VPPA, VPPB 27,28
LAN IO 30
FWH
41
EAR OUT
24
MIC. IN
24
RJ11 1394 SLOT
27
A
B
C
D
E
+VCCP 9
1
2,3,5,9,10,11,18,19,20,50
H_A#[31:3]
U34A H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 P4 U4 V3 R3 V2 W1 T4 W2 Y4 Y1 U1 AA3 Y3 AA2 U3 R2 P3 T2 P1 T1 AF4 AC4 AC7 AC3 AD3 AE4 AD2 AB4 AC6 AD5 AE2 AD6 AF3 AE1 AF1 AE5 C2 D3 A3 C6 D1 D4 B4 A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# ADSTB#0 REQ0# REQ1# REQ2# REQ3# REQ4# A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# ADSTB#1 A20M# FERR# IGNNE# ADS# BNR# BPRI# DEFER# DRDY# DBSY# N2 L1 J3 L4 H2 M2 N4 A4 B5 J2 B11 H1 K1 L2 M3 K3 K4 C8 B8 A9 C9 A10 B10 A13 C12 A12 C11 B13 A7 B17 B18 A18 C17 H_BPM0_ITP# H_BPM1_ITP# H_BPM2_ITP# H_BPM3_ITP# H_BPM4_PRDY# H_BPM5_PREQ# H_TCK H_TDI H_TDO ITP_DBRESET# H_RS#0 H_RS#1 H_RS#2 H_IERR# H_INIT# 18,41 9 H_ADS# H_BNR# H_BPRI# H_DEFER# H_DRDY# H_DBSY# H_BR0# 9 9 9 9 9 9 9
+VCCP
H _ T D I pullup (R8001) must b e p laced within 300ps of C P U TDI pin (within 2")
R379 56 +VCCP
CONTROL
BR0# IERR# INIT# LOCK# RESET# RS0# RS1# RS2# TRDY# HIT# HITM# BPM#0 BPM#1 BPM#2 BPM#3 PRDY# PREQ# TCK TDI TD0 TMS TRST# DBR#
R382 54.9
P lace testpoint o n H_IERR# with a GND 0.1" away
H_LOCK# H_RS#[2:0] H_TRDY# H_HIT# 9 H_HITM# 9 9
9 9
H_ADSTB#0 H_REQ#[4:0]
H_CPURST# 9
9
+VCCP
ITP SIGNALS
2
TP2 TP7 TP5 TP3 TP61 TP58 H_TCK
R383 +VCCP 150
5 R390 56
THERM
9 18 18 18 18 18 5 18
3
H_ADSTB#1 H_A20M# H_FERR# H_IGNNE# H_STPCLK# H_INTR H_NMI H_SMI#
THERMTRIP#
PM_THRMTRIP# CLK_ITP_CPU# CLK_ITP_CPU CLK_CPUHCLK# CLK_CPUHCLK 6
19 6 6 6
A15 STPCLK# ITP_CLK1 A16 LINT0 ITP_CLK0 B14 LINT1 BCLK1 B15 SMI# BCLK0 Banias-Processor-Skt_cooperspur
H CLK
R388 10K
R387 10K
Layout note: C O M P 0 a n d C OMP2 need to be Zo=27.4ohm traces. B e s t e s t i m a t e i s 18mil wide trace for outer layers and 1 4 m i l i f o n internal layer. See RDDP of Banias. T r a c e s s h o u l d b e shorter than 0.5". Refer to latest CS layout C O M P 1 , C O M P3 should be routed as Zo=55ohm t r a c es shorter than 0.5"
4
Comp0 Comp1 Comp2 Comp3
5
w
w w
R243 54.9_1%
R244 27.4_1%
p la .
R300 54.9_1% R299 27.4_1%
s p to
+VCCP R266 1K_1% R265 2K_1% 44 PM_PSI#
DATA GRP 0
PROCHOT# THERMDA THERMDC
H_TDO 5 H_TMS 5 H_TRST# 5 TP57 H_PROCHOT# H_THERMDA H_THERMDC 4 4
9 9 9
DATA GRP 1
m e h c
9 H_D#[63:0] U34B H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_DSTBN#0 H_DSTBP#0 H_DINV#0 A19 A25 A22 B21 A24 B26 A21 B20 C20 B24 D24 E24 C26 B23 E23 C25 C23 C22 D25 D0# D1# D2# D3# D4# D5# D6# D7# D8# D9# D10# D11# D12# D13# D14# D15# DSTBN0# DSTBP0# DINV0# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# DSTBN1# DSTBP1# DINV1#
a
D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# DSTBN2# DSTBP2# DINV2# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63# DSTBN3# DSTBP3# DINV3# COMP0 COMP1 COMP2 COMP3 DPSLP# DPWR# PWRGOOD SLP#
Y26 AA24 T25 U23 V23 R24 R26 R23 AA23 U26 V24 U25 V26 Y23 AA26 Y25 W25 W24 T24
ic t
H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
.c s
H_DSTBN#2 9 H_DSTBP#2 9 H_DINV#2 9
m o
1 2 3
ADDR GROUP0 ADDR GROUP1
DATA GRP 2
EVMC connections
9 9 9 H_DSTBN#1 H_DSTBP#1 H_DINV#1 TP34 TP6 TP54
H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31
H23 G25 L23 M26 H24 F25 G24 J23 M23 J25 L26 N24 M25 H26 N25 K25 K24 L24 J26
AB25 AC23 AB24 AC20 AC22 AC25 AD23 AE22 AF23 AD24 AF20 AE21 AD21 AF25 AF22 AF26 AE24 AE25 AD20 P25 P26 AB2 AB1 B7 C19 E4 A6
DATA GRP 3
CHK Banias w/ GL, DPWR? need pull up?
TP_GTLREF3 TP_GTLREF2 TP_GTLREF1
AC1 G1 E26 AD26 A1 B2
GTLREF3 GTLREF2 GTLREF1 GTLREF0 NC0 NC1
Comp0 Comp1 Comp2 Comp3 H_DPSLP#
H_DSTBN#3 9 H_DSTBP#3 9 H_DINV#3 9 +VCCP R63 R66 330 330_* H_DPSLP# 8,18 H_DPWR# 8 H_PWRGD 18 H_CPUSLP# 18
4
0 .5" max length
TP4 TP59 TP1 R376 0
C14 C3 AF7 C16 E1
RSVD1 RSVD2 MISC C5 TEST1 RSVD3 TEST1 F23 TEST2 RSVD4 TEST2 PSI# Banias-Processor-Skt_cooperspur R67 1K_* R380 1K_*
PM_PSI#
R389 1K_*
5
A
B
C
D
E
U34D A2 A5 A8 A11 A14 A17 A20 A23 A26 AA1 AA4 AA6 AA8 AA10 AA12 AA14 AA16 AA18 AA20 AA22 AA25 AB3 AB5 AB7 AB9 AB11 AB13 AB15 AB17 AB19 AB21 AB23 AB26 AC2 AC5 AC8 AC10 AC12 AC14 AC16 AC18 AC21 AC24 AD1 AD4 AD7 AD9 AD11 AD13 AD15 AD17 AD19 AD22 AD25 AE3 AE6 AE8 AE10 AE12 AE14 AE16 AE18 AE20 AE23 AE26 AF2 AF5 AF9 AF11 AF13 AF15 AF17 AF19 AF21 AF24 B3 B6 B9 B12 B16 B19 B22 B25 C1 C4 C7 C10 C13 C15 C18 C21 C24 D2 D5 D7 D9 D11 D13 VSS0 VSS97 D15 VSS1 VSS98 D17 VSS2 VSS99 D19 VSS3 VSS100 D21 VSS4 VSS101 D23 VSS5 VSS102 D26 VSS6 VSS103 E3 VSS7 VSS104 E6 VSS8 VSS105 E8 VSS9 VSS106 E10 VSS10 VSS107 E12 VSS11 VSS108 E14 VSS12 VSS109 E16 VSS13 VSS110 E18 VSS14 VSS111 E20 VSS15 VSS112 E22 VSS16 VSS113 E25 VSS17 VSS114 F1 VSS18 VSS115 F4 VSS19 VSS116 F5 VSS20 VSS117 F7 VSS21 VSS118 F9 VSS22 VSS119 F11 VSS23 VSS120 F13 VSS24 VSS121 F15 VSS25 VSS122 F17 VSS26 VSS123 F19 VSS27 VSS124 F21 VSS28 VSS125 F24 VSS29 VSS126 G2 VSS30 VSS127 G6 VSS31 VSS128 G22 VSS32 VSS129 G23 VSS33 VSS130 G26 VSS34 VSS131 H3 VSS35 VSS132 H5 VSS36 VSS133 H21 VSS37 VSS134 H25 VSS38 VSS135 J1 VSS39 VSS136 J4 VSS40 VSS137 J6 VSS41 VSS138 J22 VSS42 VSS139 J24 VSS43 VSS140 K2 VSS44 VSS141 K5 VSS45 VSS142 K21 VSS46 VSS143 K23 VSS47 VSS144 K26 VSS48 VSS145 L3 VSS49 VSS146 L6 VSS50 VSS147 L22 VSS51 VSS148 L25 VSS52 VSS149 M1 VSS53 VSS150 M4 VSS54 VSS151 M5 VSS55 VSS152 M21 VSS56 VSS153 M24 VSS57 VSS154 N3 VSS58 VSS155 N6 VSS59 VSS156 N22 VSS60 VSS157 N23 VSS61 VSS158 N26 VSS62 VSS159 P2 VSS63 VSS160 P5 VSS64 VSS161 P21 VSS65 VSS162 P24 VSS66 VSS163 R1 VSS67 VSS164 R4 VSS68 VSS165 R6 VSS69 VSS166 R22 VSS70 VSS167 R25 VSS71 VSS168 T3 VSS72 VSS169 T5 VSS73 VSS170 T21 VSS74 VSS171 T23 VSS75 VSS172 T26 VSS76 VSS173 U2 VSS77 VSS174 U6 VSS78 VSS175 U22 VSS79 VSS176 U24 VSS80 VSS177 V1 VSS81 VSS178 V4 VSS82 VSS179 V5 VSS83 VSS180 V21 VSS84 VSS181 V25 VSS85 VSS182 W3 VSS86 VSS183 W6 VSS87 VSS184 W22 VSS88 VSS185 W23 VSS89 VSS186 W26 VSS90 VSS187 Y2 VSS91 VSS188 Y5 VSS92 VSS189 Y21 VSS93 VSS190 Y24 VSS94 VSS191 VSS95 VSS96 Banias-Processor-Skt_cooperspur +VCORE +VCORE
U34C AA11 AA13 AA15 AA17 AA19 AA21 AA5 AA7 AA9 AB10 AB12 AB14 AB16 AB18 AB20 AB22 AB6 AB8 AC11 AC13 AC15 AC17 AC19 AC9 AD10 AD12 AD14 AD16 AD18 AD8 AE11 AE13 AE15 AE17 AE19 AE9 AF10 AF12 AF14 AF16 AF18 AF8 D18 D20 D22 D6 D8 E17 E19 E21 E5 E7 E9 F18 F20 F22 F6 F8 G21 G5 VCC0 VCC59 H22 VCC1 VCC60 H6 VCC2 VCC61 J21 VCC3 VCC62 J5 VCC4 VCC63 K22 VCC5 VCC64 U5 VCC6 VCC65 V22 VCC7 VCC66 V6 VCC8 VCC67 W21 VCC9 VCC68 W5 VCC10 VCC69 Y22 VCC11 VCC70 Y6 VCC12 VCC71 VCC13 F26 VCC14 VCCA0 B1 VCC15 VCCA1 N1 VCC16 VCCA2 AC26 VCC17 VCCA3 VCC18 D10 VCC19 VCCP0 D12 VCC20 VCCP1 D14 VCC21 VCCP2 D16 VCC22 VCCP3 E11 VCC23 VCCP4 E13 VCC24 VCCP5 E15 VCC25 VCCP6 F10 VCC26 VCCP7 F12 VCC27 VCCP8 F14 VCC28 VCCP9 F16 VCC29 VCCP10 K6 VCC30 VCCP11 L21 VCC31 VCCP12 L5 VCC32 VCCP13 M22 VCC33 VCCP14 M6 VCC34 VCCP15 N21 VCC35 VCCP16 N5 VCC36 VCCP17 P22 VCC37 VCCP18 P6 VCC38 VCCP19 R21 VCC39 VCCP20 R5 VCC40 VCCP21 T22 VCC41 VCCP22 T6 VCC42 VCCP23 U21 VCC43 VCCP24 VCC44 P23 VCC45 VCCQ0 W4 VCC46 VCCQ1 VCC47 E2 VCC48 VID0 F2 VCC49 VID1 F3 VCC50 VID2 G3 VCC51 VID3 G4 VCC52 VID4 H4 VCC53 VID5 VCC54 VCC55 AE7 VCC56 VCCSENSE VCC57 AF6 VCC58 VSSSENSE Banias-Processor-Skt_cooperspur +VCORE 3,39,44
1
+V1.8S_PROC +V1.8S_PROC_VCCA1 +V1.8S_PROC_VCCA2 +V1.8S_PROC_VCCA3
2
3
4
5
A
w
w w
p la .
+V1.8S 51 +V1.8S R370 0 +V1.5S R371 0_* +V1.5S
B
s p to
R401 0 +V1.8S_PROC R31 C391 C392 0.1UF
0805
TP_VCCSENSE TP_VSSSENSE
m e h c
+VCCP +VCCP H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 RN18 RN19 RN20 1 3 1 3 1 3 2 0_2R4P 4 2 0_2R4P 4 2 0_2R4P 4 R246 R245 54.9_1%_* 54.9_1%_* +V1.8S_PROC_VCCA1 C401 C395 0.01UF +V1.8S_PROC_VCCA2
0805
1,3,5,9,10,11,18,19,20,50
a
ic t
VR_VID0 VR_VID1 VR_VID2 VR_VID3 VR_VID4 VR_VID5
.c s
44 44 44 44 44 44
m o
1 2 3
F O R B A N I A S BO , NO STUFF VCCA1, VCCA2, VCCA3
4
10U_0805
0 C62 C75
0805
1.356V 1.100V 1.004V 0.908V 0.844V 0.748V
Banias VID values VID0 VID1 VID2 VID3 VID4 VID5 0 1 1 0 1 0 0 1 1 0 0 1 0 0 1 1 0 1 0 1 0 0 1 1 0 1 1 0 1 1 0 0 1 1 1 1
10U_0805 0.01UF
10U_0805
+V1.8S_PROC_VCCA3 R283 0 C314 C313 0.01UF
0805
8,10,11,16,18,19,20,21,51
10U_0805
LAYOUT NOTE: Provide a test point with no stub to connect differential probe between VCCSENSE and VSSSENSE at the location where the two 54.9ohm resistors terminate the 55ohm tramission lines.
5
C
D
E
A
B
C
D
E
+VCORE +VCCP +VCCP 1,2,5,9,10,11,18,19,20,50
7343
1
+
7343
+
7343
+ + C94 1uF/10V C107 1uF/10V C95 1uF/10V C108 1uF/10V C96 1uF/10V C109 1uF/10V C53 1uF/10V C86 1uF/10V C87 330U/4V_7343
C11 470U/4V_7343_*
C293 330U/4V_7343_*
C49 470U/4V_7343
+VCCP
+V2.5
+V1.35S
+V2.5
C ONNECT GND AND GND_SIGNAL +VCORE C497 0.1U C451 0.1U
C531 0.1U
2
C291
0805 0805
C290 10U_0805
10U_0805
C646
0805 0805
C647
0805
C648
0805
C649
0805
C650
0805
C357
0805
C367
0805
C341 10U_0805
10U_0805
10U_0805
10U_0805
10U_0805
10U_0805
10U_0805
10U_0805
C358
3
C368
0805 0805
C359
0805
C369
0805
C337
0805
C292
0805
C338
0805
C342 10U_0805
0805
10U_0805
10U_0805
10U_0805
10U_0805
10U_0805
10U_0805
10U_0805
C286
0805 0805
C56
0805
C47
0805
C325
0805
C285
0805
C283
0805
C42
0805
C90 10U_0805
10U_0805
10U_0805
10U_0805
10U_0805
10U_0805
10U_0805
10U_0805
4
C324
0805 0805
C330
0805
C331
0805
C82
0805
C41
0805
10U_0805
10U_0805
10U_0805
10U_0805
10U_0805
10U_0805
5
w
w w
p la .
C339 C343 C323
0805 0805 0805
10U_0805
10U_0805
10U_0805
s p to
G6 PTH 1 C329
G5
PTH
m e h c
G10 1 HOLE-D G3 HOLE-A G4 G2 HOLE-B G11 1 G16 HOLE-B G1 HOLE-B G7
CROSS_POWER_PLANE_BOTH_SIDE
a
HOLE-A HOLE-B HOLE-B
C529 0.1U
ic t
G8 HOLE-A G12 HOLE-B G13 HOLE-B
.c s
G9 HOLE-A G17 HOLE-B
m o
1 2 3
G15
G14
HOLE-B
4
HOLE-B
G18 PTH
1
5
A
B
C
D
E
+3VS Route H_THERMDA, H_THERMDC on same l ayer, 10 mil width, 5 mil between on a 12 mil spacing
1
C651 R654 10K_* R655 10K_* 6 U10 R656 10K 0.1U
FAN_PWM FAN_SPD R657 R64 0_402 0_402_* OS#_OC_C
1 2 7 8
PWMOUT TACH/AIN THERM# FANFAULT#
SCL SDA INT# D+ D-
16 15 14 10 9 C130
SMBCK_3S SMBDA_3S PM_THRM# H_THERMDA H_THERMDC
6,7,14,33 6,7,14,33 19 1 1
22 OS#_OC
2
ADM1030_*
2200P +3VS SM Bus Address fix at: 1001 100x (98, 99), Resolution : +/- 1 degree
SMBCK_3S SMBDA_3S PM_THRM#
VCC
1
U8
+5VS
8 7 6
SMBCLK SMBDATA ALERT# GND
OVERT DXP DXN
4 2 3
OS#_OC_C 1 H_THERMDA H_THERMDC 2
10UF/6.3V_1206 C734
MAX6657
3
+5VS
(0402)
(0402)
(0402)
FAN
R136
R133 47K_402
0603
C420 0.1U
47K_402
4
39 FAN_DA1
R434
(0402)
22 OS#_OC
5
w
w w
19 PM_THRM# 48 OTP#_P
R142 0_*
RB717F
(0402)
R759
0
3
(0402)
(0402)
39 WATCHDOG
p la .
Q62 2N7002 1K_402 3 2 +5VS 1 D22 1 2 3 1 3 2 Q32 1 2N7002 2
s p to
R425 100K (0603) R135 47K_402 U42 3 2 5 6 4 +A -A +B -B VLMV393 D35 RB717F FAN_PWM R660 0_402_* +3VS (0402) R132 10K_402 OUTA 1 OUTB 7 R658 0_402 +5VS V+ 8 0402 C426 0.1U_402 R659 0_402_* R764 10K_402
m e h c
1 10UF/6.3V_1206 C735 1 10UF/6.3V_1206 C736 2 2 L68 +5VS_FAN 4 5
0805
a
0
ic t
FAN_SPD 37,39
3 4 11 12 13 5
.c s
m o
1 2 3
5
NC NC NC NC ADD GND
A DM1030
VCC
CN26 4
R442
80/2A
10K_402
1 2 5 3 CN-3_FAN
R663
(0603)
GND_FAN
(0402)
3 Q63 R443 (0603) C427 1U 2 0603 1K 1 NDS351NS
4
5
A
B
C
D
E
1
+VCCP
PCMCIA DEBUG PORT
6 CLK_DEBUG 19,41 LFRAME# 19,37,39,41 LAD0 19,37,39,41 LAD1 19,37,39,41 LAD2 19,37,39,41 LAD3 41 D IS_SYSBIOS#_FWH 3 4 7 8 11 14 17 18 21 22 1 13
+5V U22 VCC 24 2 5 6 9 10 15 16 19 20 23 12 +5V 23,27,29,34,35,39,43,47,51
1,2,3,9,10,11,18,19,20,50
+VCCP
NMI#/SMI#
1 1 1 1
H_TDO H_TMS H_TRST# H_TCK
R384 R381 R385 R386
54.9/1% 39.2/1% 680 27.4/1% 27,43 CBDEBUGEN# CBDEBUGEN#
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 BEA# BEB# 3384
B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 GND
CLKRUN#/IOIS16# 26,28 C A U D I O/SPKR_IN#/BVD2 CPERR#/A14 26,28 RFU/D2 26,28 RFU/D14 26,28 RFU/A18 26,28 CSERR#/WAIT# 26,28 CBLOCK#/A19 26,28
2
NMI
R181 0_402_* (0402)
3
F W H test connector f o r first version
+3VS
CN15
4
LAD0 LAD1 LAD2 LAD3 LFRAME# 41 CLK_DEBUGPCI
2 1 4 3 6 5 8 7 10 9 12 11 CN-12(LPC_DEBUG_*)
1
3
2 4 6 8 10 12
1 3 5 7 9 11
5
w
w w
p la .
C104 0.1uF R84 NMI DIS_SYSBIOS# 10K_*
+3VS
s p to
+3VS R107 10K_* D IS_SYSBIOS#_FWH Q26 2N7002_* 2
m e h c
+5VS R85 10K_* 3 NMI 1 C105 0.1uF_* 2
a
+5VS Q27 2N7002_*
ic t
26,28 H_NMI R108 0
.c s
m o
1 2 3
4 , 1 1 , 1 6 , 2 0,22,23,24,25,29,31,32,33,35,37,38,39,42,43,48,51
1
4 , 6 , 7 , 8 , 1 0 , 1 4 , 1 7,20,21,22,23,25,26,31,32,33,35,36,37,38,39,40,41,43,51
4
NMI_ICH
18
5
A
B
C
D
E
+3VS
+3VS L26 CT2 0402 C158 0.01U_402
0805
80/2A_0805
+3VS_CLK CT1 0402 C142 0402 C146 0.01U_402
1
10U_0805 0.01U_402
0805
0402 10U_0805
C153
0402
C388 0402 0.01U_402
C143 0402 0.01U_402
C154 0402 0.01U_402
C148 0.01U_402
0.01U_402
X2 1 C127 14.318MHZ_PAD177A 15p C138 15p X2_CKGEN X1_CKGEN 1 2 3 4 C131
2
2
U39 ICS950815 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 R412 FS1 FS0
R347 REF0 FS1 FS0 CPU_STOP# CPUCLK0/FS6 CPUCLK0#/FS5 VDDCPU CPUCLK1 CPUCLK1# GND VDDCPU CPUCLK2 CPUCLK2# IREF GND FS2 VID5 VID4 VID3 VID2 VID1 VID0 R357 R199 R201 (0402) (0402) CLK_R_ITP_CPU CLK_R_ITP_CPU#
33 33 0_402 0_402 R553 (0402) CG_FS1 CG_FS0 0_402 R358 R366 19
CLK_SIO14 CLK_ICH14
VDDREF X1 X2 GND
5P_*
18 5
CLK_ICHPCI CLK_DEBUG
R360 R367 TP56
33/1% 33/1%
FS3 FS4
5 6 7 8
FS3/PCICLK_F0 FS4/PCICLK_F1 ASEL/PCICLK_F2 VDDPCI GND MULTSEL0/PCICLK0 MODE/PCICLK1 PCICLK2 PCICLK3 VDDPCI GND PCICLK4 PCICLK5
+3VS_CLK C141 5P_* C144 C145 C150 5P_* 5P_* 5P_* 41 29 26 39 CLK_FWHPCI CLK_LANPCI CLK_CBPCI CLK_KBCPCI
R368
10K R372 R377 R378 R395 33/1% 33/1% 33/1% 33/1%
9 10 11 12 13 14 15
C149 C152
3
5P_*
31 37
CLK_MINIPCI CLK_SIOPCI
R394 R398 VTT_PWRGD#
33/1% 33/1%
16 17 18 19 20 21 22 23 24 25 26 27 28
5P_*
7,19,43
SUSA#_3 +3VS L64 L_0603 +3VS_CLKA
R112 (0402)
0_402
19
PCI_STP#_3
R114 (0402)
0_402
C403 C408
5P_* 5P_*
18 CLK_ICHHUB 8 CLK_MCH66
R405 R408
33/1% CLK_R_ICHHUB 33/1%
CLK_R_MCH66
4,7,14,33
4
SMBCK_3S
C394 0.01U
FS0 FS1 FS2 FS3 FS4
R74 R69
1K_* 1K_* 1K +3VS
R100
5
R649 1K
R344 1K
R75 1K
R70 1K
R115 1K_*
w
w w
R113 10K_*
p la .
R111 0_402 CT9 (0402)
0805
10U_0805
s p to
VTT_PWRGD# PD# VDDA GND PCI_STOP# VDD3V66 GND VDD48 GND 3V66_0 3V66_1 3V66_2 SCLK 48MHZ_0 48MHZ_1 SDATA 3V66_3/48MHZ_2
m e h c
CLK_R_CPUHCLK R374 R392 CLK_R_CPUHCLK# CLK_R_GMCHHCLK R397 R400 CLK_R_GMCHHCLK# 475/1% R109 FS2 R117 0_402 (0402) CG_FS2 R402 R406 33 33 R110 22 (0402) 0_402
a
CPU_STP#_3 33/1% 33/1% 33/1% 19
19
33/1% R356 R361
33/1% R369 R391
ic t
37 19 19 49.9/1% 49.9/1% 49.9/1% 49.9/1% 49.9/1% 49.9/1% 19 8
R83
.c s
C386 10P_* C387 10P_* 0_402_* (0402) CLK_ITP_CPU 1 CLK_ITP_CPU# 0_402_* (0402) CLK_CPUHCLK CLK_CPUHCLK# 1 1 1 CLK_GMCHHCLK CLK_GMCHHCLK# 9 9
m o
1
CG_FS6
19
2
R89
CG_FS5
19
33/1% R396 R399
near CLK Gen.
3
CLK_ICH48 CLK_DREF
C399
5P_* C402 5P_*
SMBDA_3S 4,7,14,33 SSC_CLK_IN 7
C406
5P_*
4
56PIN TSSOP
FS3 Internal Pull-up FS4,5,6, ASEL Internal Pull- Down
+3VS
+3VS
FS4 0 1
FS3 0 0 1
FS2 1 1 0
FS1 0 0 0
FS0 0 0 0
CPU(MHZ) 100 200 133
66Buf[2:0] 66 66 66
PCI_F 33 33 33
8,19,22,44 VRM_PWRGD R71 0 R77 20K 3 1 R72 1K VTT_PWRGD# Q58 2N3904 2 R345 10K
0
5
44 CLK_EN#
R78
0_*
A
B
C
D
E
1
+3VS
2
C384 0.1U_*
C374 1U_*
U11
T R A CE_LENGH->1"~4"
6 SSC_CLK_IN R61 (0402) 8
3
SSC_CLK_IN 0_402
1 2 3
CLKIN VDD GND CLKOUT
DREFSSCLK
R60
33_*
DREFSSCLK_D
T R ACE_LENGH->1"~7"
4
5
w
w w
p la .
s p to
4 ICS91718_* R59 10K_*
The distance between CS91718 and Clock Gen: 1000 mil
m e h c
PD# 8 7 6 5 R106 R105 R104 0_402_* 0_402_* 0_402_* (0402) (0402) (0402) SCLK R510 R511 SDATA 48MHZ R101 10K_*
a
0_402_*
ic t
SUSA#_3 SMBCK_3S LCLKCTLA SMBDA_3S LCLKCTLB 6,19,43
.c s
m o
1 2 3
(0402)
0_402_* (0402) +3VS
4,6,14,33 8 4,6,14,33 8
4
5
A
B
C
D
E
U43B SM_DQ0 SM_DQ1 SM_DQ2 SM_DQ3 SM_DQ4 SM_DQ5 SM_DQ6 SM_DQ7 SM_DQ8 SM_DQ9 SM_DQ10 SM_DQ11 SM_DQ12 SM_DQ13 SM_DQ14 SM_DQ15 SM_DQ16 SM_DQ17 SM_DQ18 SM_DQ19 SM_DQ20 SM_DQ21 SM_DQ22 SM_DQ23 SM_DQ24 SM_DQ25 SM_DQ26 SM_DQ27 SM_DQ28 SM_DQ29 SM_DQ30 SM_DQ31 SM_DQ32 SM_DQ33 SM_DQ34 SM_DQ35 SM_DQ36 SM_DQ37 SM_DQ38 SM_DQ39 SM_DQ40 SM_DQ41 SM_DQ42 SM_DQ43 SM_DQ44 SM_DQ45 SM_DQ46 SM_DQ47 SM_DQ48 SM_DQ49 SM_DQ50 SM_DQ51 SM_DQ52 SM_DQ53 SM_DQ54 SM_DQ55 SM_DQ56 SM_DQ57 SM_DQ58 SM_DQ59 SM_DQ60 SM_DQ61 SM_DQ62 SM_DQ63 AF2 AE3 AF4 AH2 AD3 AE2 AG4 AH3 AD6 AG5 AG7 AE8 AF5 AH4 AF7 AH6 AF8 AG8 AH9 AG10 AH7 AD9 AF10 AE11 AH10 AH11 AG13 AF14 AG11 AD12 AF13 AH13 AH16 AG17 AF19 AE20 AD18 AE18 AH18 AG19 AH20 AG20 AF22 AH22 AF20 AH19 AH21 AG22 AE23 AH23 AE24 AH25 AG23 AF23 AF25 AG25 AH26 AE26 AG28 AF28 AG26 AF26 AE27 AD27 AG14 AE14 AE17 AG16 AH14 AE15 AF16 AF17 AJ24 SM_SDQ0 SM_SDQ1 SM_SDQ2 SM_SDQ3 SM_SDQ4 SM_SDQ5 SM_SDQ6 SM_SDQ7 SM_SDQ8 SM_SDQ9 SM_SDQ10 SM_SDQ11 SM_SDQ12 SM_SDQ13 SM_SDQ14 SM_SDQ15 SM_SDQ16 SM_SDQ17 SM_SDQ18 SM_SDQ19 SM_SDQ20 SM_SDQ21 SM_SDQ22 SM_SDQ23 SM_SDQ24 SM_SDQ25 SM_SDQ26 SM_SDQ27 SM_SDQ28 SM_SDQ29 SM_SDQ30 SM_SDQ31 SM_SDQ32 SM_SDQ33 SM_SDQ34 SM_SDQ35 SM_SDQ36 SM_SDQ37 SM_SDQ38 SM_SDQ39 SM_SDQ40 SM_SDQ41 SM_SDQ42 SM_SDQ43 SM_SDQ44 SM_SDQ45 SM_SDQ46 SM_SDQ47 SM_SDQ48 SM_SDQ49 SM_SDQ50 SM_SDQ51 SM_SDQ52 SM_SDQ53 SM_SDQ54 SM_SDQ55 SM_SDQ56 SM_SDQ57 SM_SDQ58 SM_SDQ59 SM_SDQ60 SM_SDQ61 SM_SDQ62 SM_SDQ63 SM_SDQ64 SM_SDQ65 SM_SDQ66 SM_SDQ67 SM_SDQ68 SM_SDQ69 SM_SDQ70 SM_SDQ71 SM_VREF SM_SDQS0 SM_SDQS1 SM_SDQS2 SM_SDQS3 SM_SDQS4 SM_SDQS5 SM_SDQS6 SM_SDQS7 SM_SDQS8 SMA_A0 SMA_A1 SMA_A2 SMA_A3 SMA_A4 SMA_A5 SMA_A6 SMA_A7 SMA_A8 SMA_A9 SMA_A10 SMA_A11 SMA_A12 SMA_B1 SMA_B2 SMA_B4 SMA_B5 SM_CKE0 SM_CKE1 SM_CKE2 SM_CKE3 SM_CS#0 SM_CS#1 SM_CS#2 SM_CS#3 SM_BA0 SM_BA1 SM_RAS# SM_CAS# SM_WE# SM_CMDCLK0 SM_CMDCLK#0 SM_CMDCLK1 SM_CMDCLK#1 SM_CMDCLK2 SM_CMDCLK#2 SM_CMDCLK3 SM_CMDCLK#3 SM_CMDCLK4 SM_CMDCLK#4 SM_CMDCLK5 SM_CMDCLK#5 SM_DM0 SM_DM1 SM_DM2 SM_DM3 SM_DM4 SM_DM5 SM_DM6 SM_DM7 SM_DM8 SM_RCVENOUT# SM_RCVENIN# SMRCOMP 11,12,13,14
4
1
AG2 AH5 AH8 AE12 AH17 AE21 AH24 AH27 AD15 AC18 AD14 AD13 AD17 AD11 AC13 AD8 AD7 AC6 AC5 AC19 AD5 AB5 AD16 AC12 AF11 AD10 AC7 AB7 AC9 AC10 AD23 AD26 AC22 AC25 AD22 AD20 AC21 AC24 AD25 AB2 AA2 AC26 AB25 AC3 AD4 AC2 AD2 AB23 AB24 AA3 AB4 AE5 AE6 AE9 AH12 AD19 AD21 AD24 AH28 AH15 AC15 AC16 AB1 R478 R477 R429 R426 R476 R475 R474 R473 R432 R431
SM_DQS0 SM_DQS1 SM_DQS2 SM_DQS3 SM_DQS4 SM_DQS5 SM_DQS6 SM_DQS7 SM_MAA0 SM_MAA1 SM_MAA2 SM_MAA3 SM_MAA4 SM_MAA5 SM_MAA6 SM_MAA7 SM_MAA8 SM_MAA9 SM_MAA10 SM_MAA11 SM_MAA12 SM_MAB1 SM_MAB2 SM_MAB4 SM_MAB5 SM_CKE0 SM_CKE1 SM_CKE2 SM_CKE3 SM_CS#0 SM_CS#1 SM_CS#2 SM_CS#3 SM_BS0 SM_BS1 SM_RAS# SM_CAS# SM_WE# SM_MAB1 SM_MAB2 SM_MAB4 SM_MAB5 SM_CKE0 SM_CKE1 SM_CKE2 SM_CKE3 SM_CS#0 SM_CS#1 SM_CS#2 SM_CS#3 SM_BS0 SM_BS1 12,13,15 12,13,15 12,13,15 12,13,15 14,15 14,15 12,15 13,15 14,15 14,15 12,15 13,15 12,13,15 12,13,15
+V2.5 +V1.5S SM_DQS[0:8] SM_MAA[0:12] SM_DM[0:8] SM_DQ[0:63]
+V2.5 +V1.5S SM_DQS[0:8]
3,10,11,12,13,14,49,50 2,10,11,16,18,19,20,21,51 15 12,13,14,15 15 U43C 15 R3 R5 R6 R4 P6 P5 N5 P2 N2 N3 M1 M5 P3 P4 T6 T5 L2 M2 G2 M3 K5 K1 K3 K2 J6 J5 H2 H1 H3 H4 H6 G3 J3 J2 K6 L5 L3 H5 DVOBD0 DVOBD1 DVOBD2 DVOBD3 DVOBD4 DVOBD5 DVOBD6 DVOBD7 DVOBD8 DVOBD9 DVOBD10 DVOBD11 DVOBCLK DVOBCLK# DVOBHSYNC DVOBVSYNC DVOBBLANK# DVOBFLDSTL DVOBCINTRB DVOBCCLKINT DVOCD0 DVOCD1 DVOCD2 DVOCD3 DVOCD4 DVOCD5 DVOCD6 DVOCD7 DVOCD8 DVOCD9 DVOCD10 DVOCD11 BLUE BLUE# GREEN GREEN# RED RED# HSYNC VSYNC REFSET C9 D9 C8 D8 A7 A8 H10 J9 E8
SM_MAA[0:12] SM_DM[0:8] SM_DQ[0:63]
DDR SYSTEM MEMORY
+V1.5S R454 R450 R453 100K 100K 100K
2
3
SM_RAS# 12,13,15 SM_CAS# 12,13,15 SM_WE# 12,13,15 0 SM_CLK_DDR0 CLK_DCLK0 0 SM_CLK_DDR#0 CLK_DCLK0# 0 SM_CLK_DDR1 CLK_DCLK1 0 SM_CLK_DDR#1 CLK_DCLK1# SM_CLK_DDR2 0 CLK_DCLK2 0 SM_CLK_DDR2# CLK_DCLK2# 0 SM_CLK_DDR3 CLK_DCLK3 0 SM_CLK_DDR#3 CLK_DCLK3# 0 SM_CLK_DDR4 CLK_DCLK4 0 SM_CLK_DDR#4 CLK_DCLK4# SM_CLK_DDR5 TP74 SM_CLK_DDR#5 TP77 SM_DM0 SM_DM1 SM_DM2 SM_DM3 SM_DM4 SM_DM5 SM_DM6 SM_DM7
+V1.5S
TP10 TP9 MCH_SMRCOMP
SM_VREF_DDR
SMVSWINGL SMVSWINGH
C463 0.1U
MONTARA_GMCH_B
MCH_SMRCOMP
5
w
w w
C484 0.1U R470 60.4_1%
R471 60.4_1%
R458 604_1%
R462 150_1% MCH_SMVSWINGH +3VS R433 C465 0.1U R461 604_1%
TP65
MCH_SMVSWINGL
MONTARA_GMCH_C 1K_* LCLKCTLB F or M-GM + Banias mount RA, For M-GML + P4 no RA
C464 0.1U
R457 150_1%
RSVD5,6,7, LCLKCTLB RESERVE FOR STRAPPING
NC
+V2.5
NEAR_NB
p la .
AJ22 AJ19 MCH_SMVSWINGL MCH_SMVSWINGH +V2.5
s p to
10 +V1.5S R447 1K_1% 19
14 14 14 14 14 14 12,13 12,13 12,13 12,13
RP2 5
2.2K-10P8R
m e h c
DVO
1 2 3 4 6 7 8 9 R151 100K DVOCCLK DVOCCLK# DVOCHSYNC DVOCVSYNC DVOCBLANK# DVOCFLDSTL MI2CCLK MI2CDATA MDVICLK MDVIDATA MDDCCLK MDDCDATA K7 N6 N7 M6 P7 T7 E5 F5 E3 E2 G5 F4 G6 F6 L7 D5 F1 R146 0 F7 D1 Y3 AA5 F2 F3 B2 B3 C2 C3 C4 D2 D3 D7 L4 +V1.5S R148 1K ADDDETECT DPMS_CLK ADDID0 ADDID1 ADDID2 ADDID3 ADDID4 ADDID5 ADDID6 ADDID7 ADDDETECT DPMS GVREF AGPBUSY# GRCOMP 66IN RVSD0 RVSD1 RVSD2 RVSD3 RVSD4 RVSD5 RVSD6 RVSD7 RVSD8 RVSD9 RVSD10 RVSD11 R451 40.2_1% CLK_MCH66 TP73 R444 R440 R441 1K_* 1K_* 1K_*
a
LVDS CLKS MISC
ic t
DDCACLK DDCADATA IYAM0 IYAM1 IYAM2 IYAM3 IYAP0 IYAP1 IYAP2 IYAP3 IYBM0 IYBM1 IYBM2 IYBM3 IYBP0 IYBP1 IYBP2 IYBP3 ICLKAM ICLKAP ICLKBM ICLKBP B6 G9 G14 E15 C15 C13 F14 E14 C14 B13 H12 E12 C12 G11 G12 E11 C11 G10 D14 E13 E10 F10 B4 C5 G8 F8 A5 D12 F12 B12 A10 DDCPCLK DDCPDATA PANELBKLTCTL PANELBKLTEN PANELVDDEN LVREFH LVREFL LVBG LIBG DREFCLK DREFSSCLK LCLKCTLA LCLKCTLB B7 B17 H9 C6 DPWR# DPSLP# RSTIN# PWROK AA22 Y23 AD28 J11 D6 AJ1
DAC_REFSET
R420
.c s
B G R HSYNC VSYNC R147 L1_TX0L1_TX1L1_TX20_* L1_TX0+ L1_TX1+ L1_TX2+ 0_* 0_* 0_* L1_TXACL1_TXAC+ TP67 TP66 TP72 LCD_ENBACK LCD_ENVDD R428 1.5K_1% LCLKCTLB TP64
16 16 16 16 16
DAC
m o
1
137/1% DDC2BC 16 DDC2BD 16 17 17 17 17 17 17
2
R418
R144
R141
17 17
36 17
3
CLK_DREF 6 DREFSSCLK 7 LCLKCTLA 7 LCLKCTLB 7 +3VS
H_DPWR# 1 H_DPSLP# 1,18 PCIRST#_ICH 18 VRM_PWRGD
NEAR_NB
19,21 AGP_BUSY# 6
R149 6,19,22,44 10K_1%
R452 1K_1%
C455 0.1U
EXTTS0 MCHDETECTVSS
R479 B1 AH1 A2 AJ2 A28 AJ28 A29 B29 AH29 AJ29 AA9 AJ4
0
4
C202 5P_*
+V1.5S
+V2.5
NC0 NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11
TP69 TP79 TP8 TP78 TP62 TP70 TP60 TP63 TP68 TP71 TP75 TP76
5
NEAR_NB
NEAR_NB
A
B
C
D
E
+VCCP
1
1
H_A#[3:31]
H_A#[3:31] H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 P23 T25 T28 R27 U23 U24 R24 U28 V28 U27 T27 V27 U25 V26 Y24 V25 V23 W25 Y25 AA27 W24 W23 W27 Y27 AA28 W28 AB27 Y26 AB28 R28 P25 R23 R25 T23 T26 AA26 AD29 AE29 H28 K28 B20 B18 J28 C27 E22 D18 K27 D26 E21 E18 J25 E25 B25 G19 F15
U43A HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31 HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63 K22 H27 K25 L24 J27 G28 L27 L23 L25 J24 H25 K23 G27 K26 J23 H26 F25 F26 B27 H23 E27 G25 F28 D27 G24 C28 B26 G22 C26 E26 G23 B28 B21 G21 C24 C23 D22 C25 E24 D24 G20 E23 B22 B23 F23 F21 C20 C21 G18 E19 E20 G17 D20 F19 C19 C17 F17 B19 G16 E16 C16 E17 D16 C18 H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
H_D#[0:63]
H_D#[0:63]
1
R414 301/1%
R416 301/1%
R413 R415
150/1% 150/1% C409 0.1U
MCH_HYSWING MCH_HXSWING C413 0.1U
NEAR_NB
M C H _HYSWING, MCH_HXSWING, MCH_HYRCOMP, MCH_HXRCOMP TRACE: SPACE=10:20
2
+VCCP
1 1 1 1 1 1 1 49.9/1% 49.9/1% 49.9/1% MCH_HDVREF MCH_HCCVREF MCH_HAVREF 1 1 1 1 1 1 1 1 1 1 1 1 1 MCH_HDVREF C162 1U C163 0.1U
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_ADSTB#0 H_ADSTB#1
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_ADSTB0# H_ADSTB1# HCLK# HCLK HYRCOMP HYSWING HXRCOMP HXSWING
R138 R421 R150
6 CLK_GMCHHCLK# 6 CLK_GMCHHCLK R410 27.4/1% R409 27.4/1%
MCH_HYRCOMP MCH_HYSWING MCH_HXRCOMP MCH_HXSWING
3
NEAR_NB
R139 100/1%
R143 100/1%
R424 100/1%
NEAR_NB
C417 1U
C168 1U
C179 0.1U
18
HUB[0:10]
NEAR_NB
+V1.35S
HUB I/F
4
C419 0.1U
+V1.35S
MCH_PSWING
5
C467 0.1uF
NEAR_NB
w
w w
R455 68.1/1% MCH_LVREF R460 100/1% C473 0.1uF
p la .
MCH_HCCVREF MCH_HAVREF +V1.35S R465 R466 287/1% R464 100/1%
18 HUB_PSTRB 18 HUB_PSTRB#
s p to
H_CPURST# K21 J21 J17 Y28 Y22 U7 U4 U3 V3 W2 W6 V6 W7 T3 V5 V4 W3 V2 T2 U2 W1 HDVREF0 HDVREF1 HDVREF2 HCCVREF HAVREF HUB0 HUB1 HUB2 HUB3 HUB4 HUB5 HUB6 HUB7 HUB8 HUB9 HUB10 HUB_PSTRB HUB_PSTRB# HUB_HLZCOMP MCH_PSWING MCH_LVREF C472 0.01U C468 0.1U
H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3 H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3
HDSTBN#0 HDSTBN#1 HDSTBN#2 HDSTBN#3 HDSTBP#0 HDSTBP#1 HDSTBP#2 HDSTBP#3 DINV#0 DINV#1 DINV#2 DINV#3
H_CPURST#
m e h c
HOST
H_ADS# H_TRDY# H_DRDY# H_DEFER# H_HITM# H_HIT# H_LOCK# H_BREQ0# H_BNR# H_BPRI# H_DBSY# H_RS#0 H_RS#1 H_RS#2 L28 M25 N24 M28 N28 N27 P27 M23 N25 P28 M26 N23 P26 M27 H_RS#0 H_RS#1 H_RS#2 +VCCP +V1.35S 1,2,3,5,10,11,18,19,20,50 3,10,11,50
a
ic t
1 1 1 1 1 1 1 1 1 1 1 1 1 1
.c s
m o
1 2 3
37.4/1%
HUB_PD0 HUB_PD1 HUB_PD2 HUB_PD3 HUB_PD4 HUB_PD5 HUB_PD6 HUB_PD7 HUB_PD8 HUB_PD9 HUB_PD10 HUB_PSTRB HUB_PSTRB# HLZCOMP PSWING HUB_LVREF MONTARA_GMCH_A
H_ADS# H_TRDY# H_DRDY# H_DEFER# H_HITM# H_HIT# H_LOCK# H_BR0# H_BNR# H_BPRI# H_DBSY# H_RS#0 H_RS#1 H_RS#2
4
NEAR_NB
+VCCP +V1.35S
MCH_LVREF VOLTAGE=0.35V+-8% MCH_PSWING VOLTAGE=0.8V+-8%
5
NEAR_NB
A
B
C
D
E
U43D
1
MONTARA_GMCH_D VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 T16 AA16 AE16 A17 D17 H17 N17 R17 U17 AB17 AC17 F18 J18 AA18 AG18 A19 D19 H19 AB19 AE19 F20 J20 AA20 AC20 A21 D21 H21 M21 P21 T21 V21 Y21 AA21 AB21 AG21 B24 F22 J22 L22 N22 R22 U22 W22 AE22 A23 D23 AA23 AC23 AJ23 F24 H24 K24 M24 P24 T24 V24 AA24 AG24 A25 D25 AA25 AE25 G26 J26 L26 N26 R26 U26 W26 AB26 A27 F27 AC27 AG27 AJ27 AC28 AE28 C29 E29 G29 J29 L29 N29 U29 +V1.35S U43E J15 P13 T13 N14 R14 U14 P15 T15 AA15 N16 R16 U16 P17 T17 AA17 AA19 W21 H14 L65 0.82UH CT10 3528 + 22uF/10V +V1.2S_HPLL V1 Y1 W5 U6 U8 W8 V7 V9 VCC0 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCCHL0 VCCHL1 VCCHL2 VCCHL3 VCCHL4 VCCHL5 VCCHL6 VCCHL7 VTTLF0 VTTLF1 VTTLF2 VTTLF3 VTTLF4 VTTLF5 VTTLF6 VTTLF7 VTTLF8 VTTLF9 VTTLF10 VTTLF11 VTTLF12 VTTLF13 VTTLF14 VTTLF15 VTTLF16 VTTLF17 VTTLF18 VTTLF19 VTTLF20 G15 H16 H18 J19 H20 L21 N21 R21 U21 H22 M22 P22 T22 V22 Y29 K29 F29 AB29 A26 A20 A18 A22 A24 H29 M29 V29 +VCCP
2
3
4
5
AJ26 T9 L6 E28 D28 C22 AJ20 AJ18 AJ12 AJ10 AA29 W29
VSS181 VSS180 VSS179 VSS178 VSS177 VSS176 VSS174 VSS173 VSS172 VSS171 VSS170 VSS169
C1 G1 L1 U1 AA1 AE1 R2 AG3 AJ3 D4 G4 K4 N4 T4 W4 AA4 AC4 AE4 B5 U5 Y5 Y6 AG6 C7 E7 G7 J7 M7 R7 AA7 AE7 AJ7 H8 K8 P8 T8 V8 Y8 AC8 E9 L9 N9 R9 U9 W9 AB9 AG9 C10 J10 AA10 AE10 D11 F11 H11 AB11 AC11 AJ11 J12 AA12 AG12 A13 D13 F13 H13 N13 R13 U13 AB13 AE13 J14 P14 T14 AA14 AC14 D15 H15 N15 R15 U15 AB15 AG15 F16 J16 P16
VSS0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83
+V1.35S
POWER
C397 0.1U +V1.35S
VSS
C204 0.1U +V1.35S L67 10UH_0805
7343
+V1.2S_DPLLA +V1.2S_DPLLB
+V1.2S_DPLLA
+
CT14 220uF/2.5V-7343
+V1.35S L66 10UH_0805
7343
+
CT12 220uF/2.5V-7343
w
w w
p la .
s p to
C423 0.1U +V1.5S +V1.2S_DPLLB C411 0.1U +V2.5
0805
m e h c
D29 Y2 A6 B16 E1 J1 N1 E4 J4 M4 E6 H7 J8 L8 M8 N8 R8 K9 M9 P9 A9 B9 B8 VCCAHPLL VCCAGPLL VCCADPLLA VCCADPLLB VCCDVO_0 VCCDVO_1 VCCDVO_2 VCCDVO_3 VCCDVO_4 VCCDVO_5 VCCDVO_6 VCCDVO_7 VCCDVO_8 VCCDVO_9 VCCDVO_10 VCCDVO_11 VCCDVO_12 VCCDVO_13 VCCDVO_14 VCCDVO_15 VCCADAC0 VCCADAC1 VSSADAC A11 B11 VCCALVDS VSSALVDS G13 B14 J13 B15 F9 B10 D10 A12 A3 A4 VCCDLVDS0 VCCDLVDS1 VCCDLVDS2 VCCDLVDS3 VCCTXLVDS0 VCCTXLVDS1 VCCTXLVDS2 VCCTXLVDS3 VCCGPIO_0 VCCGPIO_1 MONTARA_GMCH_E
VTTHF0 VTTHF1 VTTHF2 VTTHF3 VTTHF4
VCCSM0 VCCSM1 VCCSM2 VCCSM3 VCCSM4 VCCSM5 VCCSM6 VCCSM7 VCCSM8 VCCSM9 VCCSM10 VCCSM11 VCCSM12 VCCSM13 VCCSM14 VCCSM15 VCCSM16 VCCSM17 VCCSM18 VCCSM19 VCCSM20 VCCSM21 VCCSM22 VCCSM23 VCCSM24 VCCSM25 VCCSM26 VCCSM27 VCCSM28 VCCSM29 VCCSM30 VCCSM31 VCCSM32 VCCSM33 VCCSM34 VCCSM35 VCCSM36
a
AC1 AG1 AB3 AF3 Y4 AJ5 AA6 AB6 AF6 Y7 AA8 AB8 Y9 AF9 AJ9 AB10 AA11 AB12 AF12 AA13 AJ13 AB14 AF15 AB16 AJ17 AB18 AF18 AB20 AF21 AJ21 AB22 AF24 AJ25 AF27 AC29 AF29 AG29 AJ6 AJ8 AD1 AF1
ic t
C396 C412 0.1U 0.1U
0805
.c s
C398 C405 C416 0.1U 0.1U 0.1U
m o
1 2 3
+V2.5
C482 10U_0805 C483 0.1U +V2.5 +V2.5_QSM R472 +V1.2S_ASM R486
0805 0805
R422
0-0805
+3VS
VCCQSM0 VCCQSM1 VCCASM0 VCCASM1
+V1.35S 0-0805 0-0805
4
C424 0.1U
CT19 100UF/2V_7343
6032
+
C493 0.1U
5
A
B
C
D
E
1
+V1.35S C194
0805 0805
C188
0805
C171
10U_0805
10U_0805
10U_0805
+5VS
+5V +VCCP
2
R767 0_*
R768 0
C220 0.1U +V2.5 U20 R169 10K_1%
3
1 2 +V2.5_DIV 3
TLV2471
1OUT GND 1IN+ U-tlv2471 1IN+1.25VREF_OP VDD
5
+V1.5S
4 R174 0
R170 10K_1%
4
5
w
w w
p la .
s p to
SM_VREF_DDR 8,12,13,14
m e h c
+V2.5
7343
+ CT17
C200 0.1U
C454 0.1U
a
7343
+ CT11
220uF/2.5V-7343
ic t
C176 0.1U C165 0.1U C477 0.1U C487 0.1U C418 0.1U C193 0.1U
C201 0.1U
C166 0.1U
.c s
C192 0.1U C180 0.1U C167 0.1U C169 0.1U C400 0.1U C164 0.1U C471 0.1U C178 0.1U C195 0.1U C422 0.1U C415 0.1U C414 0.1U
m o
1 2 3
C190 0.1U
C469 0.1U
C474 0.1U
330uF/4v-7343
3528
+
CT16 3528 + 33uF/10V
3528 + CT15 33uF/10V
CT13 47uF/6.3V
C462 0.1U
C450 0.1U
C187 0.1U
4
5
A
B
C
D
E
8,11,13,14
1
SM_VREF_DDR
SM_VREF_DDR SM_WE# SM_CAS# SM_RAS#
49 21 22 23 24 51 16 26 27 44 45 46
VREF WE# CAS# RAS# CS# UDQS LDQS BA0 BA1 CKE CLK CLK# UDM LDM VDD VDD VDD VDDQ VDDQ VDDQ VDDQ VDDQ VSS VSS VSS VSSQ VSSQ VSSQ VSSQ VSSQ DDR 4MX4X16
8,15
SM_CS#2
R456 (0402)
0_402
SM_CS#2_OB SM_DQS_R0 SM_DQS_R1 SM_BS0 SM_BS1 SM_CKE2 SM_BS0 SM_BS1
8,13,15 8,13,15 8,15 8,13 CLK_DCLK3 8,13 CLK_DCLK3# R157
U47
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 NC NC NC NC NC NC NC
65 63 62 60 59 57 56 54 13 11 10 8 7 5 4 2 42 41 28 40 39 38 37 36 35 32 31 30 29 14 17 19 25 43 50 53
SM_DQ_R0 SM_DQ_R1 SM_DQ_R2 SM_DQ_R3 SM_DQ_R4 SM_DQ_R5 SM_DQ_R6 SM_DQ_R7 SM_DQ_R8 SM_DQ_R9 SM_DQ_R10 SM_DQ_R11 SM_DQ_R12 SM_DQ_R13 SM_DQ_R14 SM_DQ_R15 SM_MAA12 SM_MAA11 SM_MAA10 SM_MAA9 SM_MAA8 SM_MAA7 SM_MAA6 SM_MAB5 SM_MAB4 SM_MAA3 SM_MAB2 SM_MAB1 SM_MAA0
SM_VREF_DDR C478 0.1U SM_WE# SM_CAS# SM_RAS# SM_CS#2_OB SM_DQS_R6 SM_DQS_R7 SM_BS0 SM_BS1 SM_CKE2 8,13 CLK_DCLK4 8,13 CLK_DCLK4# R463 +V2.5 120 SM_DM_R6 SM_DM_R7
49 21 22 23 24 51 16 26 27 44 45 46 47 20 1 18 33 3 9 15 55 61 34 48 66 6 12 52 58 64
VREF WE# CAS# RAS# CS# UDQS LDQS BA0 BA1 CKE CLK CLK# UDM LDM VDD VDD VDD VDDQ VDDQ VDDQ VDDQ VDDQ
U44
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
65 63 62 60 59 57 56 54 13 11 10 8 7 5 4 2 42 41 28 40 39 38 37 36 35 32 31 30 29 14 17 19 25 43 50 53
SM_DQ_R53 SM_DQ_R54 SM_DQ_R55 SM_DQ_R52 SM_DQ_R49 SM_DQ_R51 SM_DQ_R50 SM_DQ_R48 SM_DQ_R56 SM_DQ_R57 SM_DQ_R60 SM_DQ_R61 SM_DQ_R59 SM_DQ_R58 SM_DQ_R62 SM_DQ_R63 SM_MAA12 SM_MAA11 SM_MAA10 SM_MAA9 SM_MAA8 SM_MAA7 SM_MAA6 SM_MAB5 SM_MAB4 SM_MAA3 SM_MAB2 SM_MAB1 SM_MAA0
SM_DM_R0 SM_DM_R1 +V2.5
47 20 1 18 33 3 9 15 55 61 34 48 66 6 12 52 58 64
120
2
BOT SIDE
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 65 63 62 60 59 57 56 54 13 11 10 8 7 5 4 2 42 41 28 40 39 38 37 36 35 32 31 30 29 14 17 19 25 43 50 53 SM_DQ_R16 SM_DQ_R17 SM_DQ_R18 SM_DQ_R19 SM_DQ_R20 SM_DQ_R21 SM_DQ_R22 SM_DQ_R23 SM_DQ_R24 SM_DQ_R25 SM_DQ_R26 SM_DQ_R27 SM_DQ_R28 SM_DQ_R29 SM_DQ_R30 SM_DQ_R31 SM_MAA12 SM_MAA11 SM_MAA10 SM_MAA9 SM_MAA8 SM_MAA7 SM_MAA6 SM_MAB5 SM_MAB4 SM_MAA3 SM_MAB2 SM_MAB1 SM_MAA0
SM_VREF_DDR 8,13,15 8,13,15 8,13,15 SM_WE# SM_CAS# SM_RAS# SM_WE# SM_CAS# SM_RAS# SM_CS#2_OB SM_DQS_R2 SM_DQS_R3 SM_BS0 SM_BS1 SM_CKE2 CLK_DCLK3 CLK_DCLK3# +V2.5 SM_DM_R2 SM_DM_R3
49 21 22 23 24 51 16 26 27 44 45 46 47 20 1 18 33 3 9 15 55 61 34 48 66 6 12 52 58 64
VREF WE# CAS# RAS# CS# UDQS LDQS BA0 BA1 CKE CLK CLK# UDM LDM VDD VDD VDD VDDQ VDDQ VDDQ VDDQ VDDQ
3
U46
4
VSS VSS VSS VSSQ VSSQ VSSQ VSSQ VSSQ
+V2.5
5
7343 + CT4 330UF/4V_7343
w
w w
C215
0805
10U_0805
C517 C524 C511 C510 C513 C516 C514 C518 C522 C520 C526 C199 C481 C479 C486 C217 C218 C216 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402
p la .
NC NC NC NC NC NC NC DDR 4MX4X16
s p to
CLK_DCLK4 CLK_DCLK4#
m e h c
VSS VSS VSS VSSQ VSSQ VSSQ VSSQ VSSQ NC NC NC NC NC NC NC DDR 4MX4X16 SM_VREF_DDR SM_WE# SM_CAS# SM_RAS# SM_CS#2_OB SM_DQS_R4 SM_DQS_R5 SM_BS0 SM_BS1 49 21 22 23 24 51 16 26 27 44 45 46 47 20 1 18 33 3 9 15 55 61 34 48 66 6 12 52 58 64 VREF WE# CAS# RAS# CS# UDQS LDQS BA0 BA1 SM_CKE2 CKE CLK CLK# UDM LDM VDD VDD VDD VDDQ VDDQ VDDQ VDDQ VDDQ VSS VSS VSS VSSQ VSSQ VSSQ VSSQ VSSQ DDR 4MX4X16 U45 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 NC NC NC NC NC NC NC 65 63 62 60 59 57 56 54 13 11 10 8 7 5 4 2 42 41 28 40 39 38 37 36 35 32 31 30 29 14 17 19 25 43 50 53 SM_DM_R4 SM_DM_R5
a
SM_MAA12 SM_MAA11 SM_MAA10 SM_MAA9 SM_MAA8 SM_MAA7 SM_MAA6 SM_MAB5 SM_MAB4 SM_MAA3 SM_MAB2 SM_MAB1 SM_MAA0
ic t
SM_MAB5 SM_MAB4 SM_MAB2 SM_MAB1
SM_DQS_R[0:7]
.c s
SM_DQ_R[63:0] SM_MAA[12:0] SM_DM_R[7:0] SM_DQS_R[0:7] 34 33
m o
1
13,14,15
8,13,14,15 13,14,15
13,14,15
8,13,15 8,13,15 8,13,15 8,13,15
2
SM_DQ_R33 SM_DQ_R32 SM_DQ_R34 SM_DQ_R35 SM_DQ_R36 SM_DQ_R37 SM_DQ_R38 SM_DQ_R39 SM_DQ_R42 SM_DQ_R43 SM_DQ_R47 SM_DQ_R46 SM_DQ_R45 SM_DQ_R44 SM_DQ_R40 SM_DQ_R41
3
TOP VIEW
66
1
+V2.5
33
34
BOT VIEW
1 66
4
C198 0.1U_402
C515 0.1U_402
5
A
B
C
D
E
8,11,12,14
1
SM_VREF_DDR
SM_VREF_DDR SM_WE# SM_CAS# SM_RAS#
49 21 22 23 24 51 16 26 27 44 45 46
VREF WE# CAS# RAS# CS# UDQS LDQS BA0 BA1 CKE CLK CLK# UDM LDM VDD VDD VDD VDDQ VDDQ VDDQ VDDQ VDDQ VSS VSS VSS VSSQ VSSQ VSSQ VSSQ VSSQ DDR 4MX4X16
8,15
SM_CS#3
R152 (0402)
0_402
SM_CS#3_OB SM_DQS_R1 SM_DQS_R0 SM_BS0 SM_BS1 SM_CKE3 SM_BS0 SM_BS1
8,12,15 8,12,15 8,15 8,12 CLK_DCLK3 8,12 CLK_DCLK3#
U18
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 NC NC NC NC NC NC NC
65 63 62 60 59 57 56 54 13 11 10 8 7 5 4 2 42 41 28 40 39 38 37 36 35 32 31 30 29 14 17 19 25 43 50 53
SM_DQ_R15 SM_DQ_R14 SM_DQ_R13 SM_DQ_R12 SM_DQ_R11 SM_DQ_R10 SM_DQ_R9 SM_DQ_R8 SM_DQ_R7 SM_DQ_R6 SM_DQ_R5 SM_DQ_R4 SM_DQ_R3 SM_DQ_R2 SM_DQ_R1 SM_DQ_R0 SM_MAA12 SM_MAA11 SM_MAA10 SM_MAA9 SM_MAA8 SM_MAA7 SM_MAA6 SM_MAB5 SM_MAB4 SM_MAA3 SM_MAB2 SM_MAB1 SM_MAA0
SM_VREF_DDR C470 0.1U SM_WE# SM_CAS# SM_RAS# SM_CS#3_OB SM_DQS_R7 SM_DQS_R6 SM_BS0 SM_BS1 SM_CKE3 8,12 CLK_DCLK4 8,12 CLK_DCLK4# SM_DM_R7 SM_DM_R6 +V2.5
49 21 22 23 24 51 16 26 27 44 45 46 47 20 1 18 33 3 9 15 55 61 34 48 66 6 12 52 58 64
VREF WE# CAS# RAS# CS# UDQS LDQS BA0 BA1 CKE CLK CLK# UDM LDM VDD VDD VDD VDDQ VDDQ VDDQ VDDQ VDDQ
U15
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
65 63 62 60 59 57 56 54 13 11 10 8 7 5 4 2 42 41 28 40 39 38 37 36 35 32 31 30 29 14 17 19 25 43 50 53
SM_DQ_R63 SM_DQ_R62 SM_DQ_R58 SM_DQ_R59 SM_DQ_R61 SM_DQ_R60 SM_DQ_R57 SM_DQ_R56 SM_DQ_R48 SM_DQ_R50 SM_DQ_R51 SM_DQ_R49 SM_DQ_R52 SM_DQ_R55 SM_DQ_R54 SM_DQ_R53 SM_MAA12 SM_MAA11 SM_MAA10 SM_MAA9 SM_MAA8 SM_MAA7 SM_MAA6 SM_MAB5 SM_MAB4 SM_MAA3 SM_MAB2 SM_MAB1 SM_MAA0
SM_DM_R1 SM_DM_R0 +V2.5
47 20 1 18 33 3 9 15 55 61 34 48 66 6 12 52 58 64
2
TOP SIDE
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 65 63 62 60 59 57 56 54 13 11 10 8 7 5 4 2 42 41 28 40 39 38 37 36 35 32 31 30 29 14 17 19 25 43 50 53 SM_DQ_R31 SM_DQ_R30 SM_DQ_R29 SM_DQ_R28 SM_DQ_R27 SM_DQ_R26 SM_DQ_R25 SM_DQ_R24 SM_DQ_R23 SM_DQ_R22 SM_DQ_R21 SM_DQ_R20 SM_DQ_R19 SM_DQ_R18 SM_DQ_R17 SM_DQ_R16 SM_MAA12 SM_MAA11 SM_MAA10 SM_MAA9 SM_MAA8 SM_MAA7 SM_MAA6 SM_MAB5 SM_MAB4 SM_MAA3 SM_MAB2 SM_MAB1 SM_MAA0
SM_VREF_DDR 8,12,15 8,12,15 8,12,15 SM_WE# SM_CAS# SM_RAS# SM_WE# SM_CAS# SM_RAS# SM_CS#3_OB SM_DQS_R3 SM_DQS_R2 SM_BS0 SM_BS1 SM_CKE3 CLK_DCLK3 CLK_DCLK3# +V2.5 SM_DM_R3 SM_DM_R2
49 21 22 23 24 51 16 26 27 44 45 46 47 20 1 18 33 3 9 15 55 61 34 48 66 6 12 52 58 64
VREF WE# CAS# RAS# CS# UDQS LDQS BA0 BA1 CKE CLK CLK# UDM LDM VDD VDD VDD VDDQ VDDQ VDDQ VDDQ VDDQ
3
U17
4
VSS VSS VSS VSSQ VSSQ VSSQ VSSQ VSSQ
5
w
w w
+V2.5 C527
0805
10U_0805
C489 C504 C498 C495 C506 C501 C492 C488 C475 C476 C461 C503 C525 C505 C500 C499 C460 C490 C459 C480 C458 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402
p la .
NC NC NC NC NC NC NC DDR 4MX4X16
s p to
CLK_DCLK4 CLK_DCLK4#
m e h c
VSS VSS VSS VSSQ VSSQ VSSQ VSSQ VSSQ NC NC NC NC NC NC NC DDR 4MX4X16 SM_VREF_DDR SM_WE# SM_CAS# SM_RAS# SM_CS#3_OB SM_DQS_R5 SM_DQS_R4 SM_BS0 SM_BS1 49 21 22 23 24 51 16 26 27 44 45 46 47 20 1 18 33 3 9 15 55 61 34 48 66 6 12 52 58 64 VREF WE# CAS# RAS# CS# UDQS LDQS BA0 BA1 SM_CKE3 CKE CLK CLK# UDM LDM VDD VDD VDD VDDQ VDDQ VDDQ VDDQ VDDQ VSS VSS VSS VSSQ VSSQ VSSQ VSSQ VSSQ DDR 4MX4X16 U16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 NC NC NC NC NC NC NC 65 63 62 60 59 57 56 54 13 11 10 8 7 5 4 2 42 41 28 40 39 38 37 36 35 32 31 30 29 14 17 19 25 43 50 53 SM_DM_R5 SM_DM_R4
a
SM_MAA12 SM_MAA11 SM_MAA10 SM_MAA9 SM_MAA8 SM_MAA7 SM_MAA6 SM_MAB5 SM_MAB4 SM_MAA3 SM_MAB2 SM_MAB1 SM_MAA0
ic t
SM_MAB5 SM_MAB4 SM_MAB2 SM_MAB1
SM_DQS_R[0:7]
.c s
SM_DQ_R[63:0] SM_MAA[12:0] SM_DM_R[7:0] SM_DQS_R[0:7] 34 33
m o
1
12,14,15
8,12,14,15 12,14,15
12,14,15
8,12,15 8,12,15 8,12,15 8,12,15
2
SM_DQ_R41 SM_DQ_R40 SM_DQ_R44 SM_DQ_R45 SM_DQ_R46 SM_DQ_R47 SM_DQ_R43 SM_DQ_R42 SM_DQ_R39 SM_DQ_R38 SM_DQ_R37 SM_DQ_R36 SM_DQ_R35 SM_DQ_R34 SM_DQ_R32 SM_DQ_R33
3
TOP VIEW
66
1
+V2.5
33
34
4
BOT VIEW
1 66
5
A
B
C
D
E
CN27 8,15 SM_MAA1 8,15 SM_MAA2 12,13,15 12,13,15
1
SM_DQ_R[0:63] SM_DQS_R[0:8]
SM_DQ_R[0:63] SM_DQS_R[0:8] SM_MAA_R[0:12] SM_DM_R[0:8]
8,15 SM_MAA4 8,15 SM_MAA5
15 SM_MAA_R[0:12] 12,13,15 SM_DM_R[0:8]
SM_MAA_R0 SM_MAA1 SM_MAA2 SM_MAA_R3 SM_MAA4 SM_MAA5 SM_MAA_R6 SM_MAA_R7 SM_MAA_R8 SM_MAA_R9 SM_MAA_R10 SM_MAA_R11 SM_MAA_R12 SM_BS_R0 SM_BS_R1
112 111 110 109 108 107 106 105 102 101 115 100 99 97 117 116 98 71 73 79 83 72 74 80 84 35 37 160 158 89 91 96 95 120 118 119 121 122 194 196 198 195 193 86 12 26 48 62 134 148 170 184 78 11 25 47 61 133 147 169 183 77 9 21 33 45 57 69 81 93 113 131 143 155 157 167 179 191 10 22 34 36 46 58 70 82 92 94 114 132 144 156 168 180 192 199 197 1 2
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 DU/A13 BA0 BA1 BA2(DU) CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 CK0 CK0# CK1 CK1# CK2 CK2# CKE0 CKE1 CAS# RAS# WE# S0# S1# SA0 SA1 SA2 SCL SDA DU/RESET# DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8
15 15
SM_BS_R0 SM_BS_R1
2
8 CLK_DCLK0 8 CLK_DCLK0# 8 CLK_DCLK1 8 CLK_DCLK1# 8 CLK_DCLK2 8 CLK_DCLK2# 8,15 SM_CKE0 8,15 SM_CKE1 15 SM_CAS_R# 15 SM_RAS_R# 15 SM_WE_R# 8,15 SM_CS#0 8,15 SM_CS#1
4,6,7,33 4,6,7,33
SMBCK_3S SMBDA_3S
3
+V2.5
C523 CT3 330UF/4V_7343
7343
+
0805
C502 10U_0805
C208
C205
C196
C212
C213
C214
C207
C197
C512
0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402 0.1U_402
4
5
w
w w
p la .
s p to
C496 C494 C521 +V2.5 8,11,12,13 SM_VREF_DDR
m e h c
SM_DM_R0 SM_DM_R1 SM_DM_R2 SM_DM_R3 SM_DM_R4 SM_DM_R5 SM_DM_R6 SM_DM_R7
SM_CLK_DDR0 SM_CLK_DDR#0 SM_CLK_DDR1 SM_CLK_DDR#1 SM_CLK_DDR2 SM_CLK_DDR#2 SM_CKE0 SM_CKE1 SM_CAS_R# SM_RAS_R# SM_WE_R# SM_CS#0 SM_CS#1
a
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS DU DU DU DU 201 202
SM_DQS_R0 SM_DQS_R1 SM_DQS_R2 SM_DQS_R3 SM_DQS_R4 SM_DQS_R5 SM_DQS_R6 SM_DQS_R7
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8 VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
ic t
3 15 27 39 51 63 75 87 103 125 137 149 159 161 173 185 4 16 28 38 40 52 64 76 88 90 104 126 138 150 162 174 186 85 123 124 200 201 202
5 7 13 17 6 8 14 18 19 23 29 31 20 24 30 32 41 43 49 53 42 44 50 54 55 59 65 67 56 60 66 68 127 129 135 139 128 130 136 140 141 145 151 153 142 146 152 154 163 165 171 175 164 166 172 176 177 181 187 189 178 182 188 190
SM_DQ_R0 SM_DQ_R1 SM_DQ_R2 SM_DQ_R3 SM_DQ_R4 SM_DQ_R5 SM_DQ_R6 SM_DQ_R7 SM_DQ_R8 SM_DQ_R9 SM_DQ_R10 SM_DQ_R11 SM_DQ_R12 SM_DQ_R13 SM_DQ_R14 SM_DQ_R15 SM_DQ_R16 SM_DQ_R17 SM_DQ_R18 SM_DQ_R19 SM_DQ_R20 SM_DQ_R21 SM_DQ_R22 SM_DQ_R23 SM_DQ_R24 SM_DQ_R25 SM_DQ_R26 SM_DQ_R27 SM_DQ_R28 SM_DQ_R29 SM_DQ_R30 SM_DQ_R31 SM_DQ_R32 SM_DQ_R33 SM_DQ_R34 SM_DQ_R35 SM_DQ_R36 SM_DQ_R37 SM_DQ_R38 SM_DQ_R39 SM_DQ_R40 SM_DQ_R41 SM_DQ_R42 SM_DQ_R43 SM_DQ_R44 SM_DQ_R45 SM_DQ_R46 SM_DQ_R47 SM_DQ_R48 SM_DQ_R49 SM_DQ_R50 SM_DQ_R51 SM_DQ_R52 SM_DQ_R53 SM_DQ_R54 SM_DQ_R55 SM_DQ_R56 SM_DQ_R57 SM_DQ_R58 SM_DQ_R59 SM_DQ_R60 SM_DQ_R61 SM_DQ_R62 SM_DQ_R63
.c s
m o
1 2 3
DDR SODIMM
4
+3VS
VDDID VDDSPD VREF VREF
5
C203
0.1U
A
B
C
D
E
SM_DQ[0:63] SM_DQ_R[0:63] SM_MAA[0:12] SM_MAA_R[0:12]
1
SM_DQ[0:63] SM_DQ_R[0:63] SM_MAA[0:12] SM_MAA_R[0:12]
8 12,13,14 8,12,13,14 14
SM_DM[0:7] SM_DM_R[0:7] SM_CKE[0:3] SM_CS#[0:3] SM_DQS[0:8] SM_DQS_R[0:8]
SM_DM[0:7] SM_DM_R[0:7] SM_CKE[0:3] SM_CS#[0:3] SM_DQS[0:8] SM_DQS_R[0:8]
8 12,13,14 8,12,13,14 8,12,13,14 8 12,13,14 SM_DQ30 SM_DQ31 SM_DQ33 SM_DQ32 SM_DQ36 SM_DQ37 SM_DQ34 SM_DQS4 SM_DQ43 SM_DQ42 SM_DQ40 SM_DQ35 C184 0.1U_402 SM_DQ39 SM_DQ44 SM_DQ46 SM_DQ47 SM_DQ49 SM_DQ48 SM_DQ50 SM_DQS6 SM_DQ52 SM_DQ53 SM_DM6 SM_DQ54 SM_DQ56 SM_DQ51 SM_DQ59 SM_DQ58 RN50 10_2R4P RN48 10_2R4P RN74 10_2R4P RN73 10_2R4P RN47 10_2R4P RN46 10_2R4P RN72 10_2R4P RN70 10_2R4P RN45 10_2R4P RN43 10_2R4P 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 SM_DQ_R39 SM_DQ_R44 SM_DQ_R46 SM_DQ_R47 SM_DQ_R49 SM_DQ_R48 SM_DQ_R50 SM_DQS_R6 SM_DQ_R52 SM_DQ_R53 SM_DM_R6 SM_DQ_R54 SM_DQ_R56 SM_DQ_R51 SM_DQ_R59 SM_DQ_R58 SM_DQ_R55 SM_DQ_R60 SM_DQ_R62 SM_DQ_R63 SM_DM_R2 SM_DQ_R22 SM_DM_R4 SM_DQ_R38 SM_DQ_R45 SM_DM_R5 SM_DM_R0 SM_DQ_R6 SM_DQ_R61 SM_DM_R7 SM_DQS_R6 SM_DM_R6 SM_DQ_R54 SM_DQ_R53 SM_DQ_R49 SM_DQ_R51 SM_DQ_R50 SM_DQ_R48 56_8P4R_402 2 4 6 8 56_8P4R_402 2 4 6 8 56_8P4R_402 2 4 6 8 1 3 5 7 1 3 5 7 RN28 RN56 10_2R4P RN79 10_2R4P RN52 10_2R4P RN78 10_2R4P RN75 10_2R4P RN77 10_2R4P 3 1 3 1 3 1 3 1 3 1 3 1 4 2 4 2 4 2 4 2 4 2 4 2 SM_DQ_R30 SM_DQ_R31 SM_DQ_R33 SM_DQ_R32 SM_DQ_R36 SM_DQ_R37 SM_DQ_R34 SM_DQS_R4 SM_DQ_R43 SM_DQ_R42 SM_DQ_R40 SM_DQ_R35
+V1.25S
SM_DQ_R43 SM_DQ_R47 SM_DM_R4 SM_DQ_R33 SM_DQ_R46 SM_DQ_R45 SM_DQ_R42 SM_DQS_R5 SM_DM_R5 SM_DQ_R41 SM_DQ_R40 SM_DQ_R44
2 4 6 8 56_8P4R_402 2 4 6 8 56_8P4R_402 2 4 6 8
1 3 5 7 1 3 5 7 1 3 5 7
RN32
8 RN21 6 4 2 56_8P4R_402 8 RN42 6 4 2 56_8P4R_402 8 RN41 6 4 2 56_8P4R_402 8 RN40 6 4 2
7 5 3 1 7 5 3 1 7 5 3 1 7 5 3 1 7 5 3 1
SM_DQ_R15 SM_DQ_R14 SM_DQ_R13 SM_DQ_R12 SM_DQ_R21 SM_DQ_R17 SM_DQ_R16 SM_DM_R2 SM_DQ_R19 SM_DQS_R2 SM_DQ_R23 SM_DQ_R22 SM_DQ_R25 SM_DM_R3 SM_DQ_R18 SM_DQ_R20 SM_DQ_R27 SM_DQS_R3 SM_DQ_R24 SM_DQ_R26
RN31
+V1.25S SM_DQ1 SM_DQ0 SM_DQ2 SM_DQS0 SM_DQ4 SM_DQ5 SM_DQ7 SM_DQ12 SM_DQ8 SM_DQ3 SM_DQ11 SM_DQ10 SM_DQ13 SM_DM1 SM_DQ14 SM_DQ15 SM_DQ17 SM_DQ16 SM_DQ18 SM_DQS2 SM_DQ20 SM_DQ21 SM_DQ23 SM_DQ28 SM_DQ24 SM_DQ19 SM_DQ27 SM_DQ26 SM_DQ29 SM_DM3 RN90 3 10_2R4P 1 RN89 10_2R4P RN64 10_2R4P RN62 10_2R4P RN88 10_2R4P RN86 10_2R4P RN61 10_2R4P RN60 10_2R4P RN85 10_2R4P RN84 10_2R4P RN65 10_2R4P RN58 10_2R4P RN83 10_2R4P RN81 10_2R4P RN57 10_2R4P 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 SM_DQ_R1 SM_DQ_R0 C183 SM_DQ_R2 SM_DQS_R0 SM_DQ_R4 SM_DQ_R5 SM_DQ_R7 SM_DQ_R12 SM_DQ_R8 SM_DQ_R3 SM_DQ_R11 SM_DQ_R10 SM_DQ_R13 SM_DM_R1 SM_DQ_R14 SM_DQ_R15 SM_DQ_R17 SM_DQ_R16 C428 SM_DQ_R18 SM_DQS_R2 SM_DQ_R20 SM_DQ_R21 SM_DQ_R23 SM_DQ_R28 SM_DQ_R24 SM_DQ_R19 SM_DQ_R27 SM_DQ_R26 SM_DQ_R29 SM_DM_R3 0.1U_402 C449 0.1U_402 0.1U_402
RN30
C430 0.1U_402
C448 0.1U_402
RN27
2
C181 0.1U_402
C186 0.1U_402
SM_DQ55 SM_DQ60 SM_DQ62 SM_DQ63 SM_DM2 SM_DQ22 SM_DM4 SM_DQ38 SM_DQ45 SM_DM5 SM_DM0 SM_DQ6 SM_DQ61 SM_DM7 SM_BS1 SM_RAS# SM_CAS# SM_WE#
C185 0.1U_402
C429 0.1U_402
RN59 3 10_2R4P 1 RN51 10_2R4P RN49 10_2R4P RN63 10_2R4P RN44 10_2R4P 3 1 3 1 3 1 3 1
3
SM_MAA9 RN80 SM_MAA12 10_2R4P SM_MAA11 RN55 SM_MAA8 10_2R4P
3 1 3 1
4 2 4 2
SM_MAA_R9 SM_MAA_R12 SM_MAA_R11 SM_MAA_R8
8,12,13
SM_BS1
8,12,13 SM_RAS# 8,12,13 SM_CAS# 8,12,13 SM_WE#
SM_MAA6 SM_MAA0
4
RN54 3 10_2R4P 1
4 2
SM_MAA_R6 SM_MAA_R0
8,12,13
SM_BS0 SM_BS0 SM_MAA10 SM_DQS1 SM_DQ9 SM_DQ25 SM_DQS3 RN68 3 10_2R4P 1 RN87 10_2R4P RN82 10_2R4P 3 1 1 3 4 2 4 2 2 4 SM_BS_R0 SM_MAA_R10 SM_DQS_R1 SM_DQ_R9 SM_DQ_R25 SM_DQS_R3 SM_BS_R0 +V1.25S
14
C432
SM_DQS7 SM_DQ57 SM_MAA3 SM_MAA7
5
RN71 3 10_2R4P 1 RN69 3 10_2R4P 1 RN76 3 10_2R4P 1
4 2 4 2 4 2
SM_DQS5 SM_DQ41
w
w w
SM_DQS_R7 SM_DQ_R57 C452 SM_MAA_R3 SM_MAA_R7 SM_DQS_R5 SM_DQ_R41
0.1U_402 0.01U_4020.1U_402 0.01U_402 0.1U_402 0.01U_402 0.1U_402 0.01U_402 0.1U_402 0.01U_402
0.1U_402 0.01U_4020.1U_402 0.01U_402 0.1U_402 0.01U_402 0.1U_402 0.01U_402 0.1U_402 0.01U_402
p la .
C438 C437 C436 C433 C182 C446 C435 C442
C434
s p to
R485 10_402 SM_BS_R1 (0402) RN53 3 10_2R4P 1 R512 (0402) 4 2 SM_RAS_R# SM_CAS_R# SM_WE_R# 10_402 C189 C439 C453 C444 C440 0805 10U_0805 C191 C447 C445 C443 C431 0805 10U_0805
SM_BS_R1
m e h c
SM_DQS_R7 SM_DM_R7 SM_DQ_R55 SM_DQ_R52 SM_DQ_R59 SM_DQ_R57 SM_DQ_R60 SM_DQ_R56 SM_DQ_R63 SM_DQ_R62 SM_DQ_R58 SM_DQ_R61 SM_MAA1 SM_MAA4 SM_MAA2 SM_MAA5 1 3 5 7 1 3 5 7 1 3 5 7 7 5 3 1 RN26 56_8P4R_402 2 4 6 8 56_8P4R_402 2 4 6 8 56_8P4R_402 8 6 4 2 RN25 RN5 RN33 56_8P4R_402 SM_MAA12 R448 56_402 (0402) 14 14 14 14 RN3 SM_DQ_R10 SM_DQS_R1 SM_DQ_R8 SM_DQ_R9 2 4 6 8 56_8P4R_402 RN23 SM_DQ_R5 SM_DQS_R0 SM_DQ_R7 SM_DQ_R3 C456 10U_0805 RN6 SM_CS#1 SM_CS#0 C457 1 3 56_2R4P RN24 1 3 56_2R4P 2 4 2 4 2 4 6 8 56_8P4R_402 1 3 5 7 1 3 5 7 + SM_CS#3 SM_CS#2 RN36 SM_MAA8 SM_BS0 1 3 56_2R4P 2 4
a
8 RN37 6 4 2 RN8 RN7 RN29 7 5 3 1 8 6 4 2 7 5 3 1
56_8P4R_402 8 RN38 6 4 2 56_8P4R_402
56_8P4R_402 8 RN34 6 4 2 56_8P4R_402 8 6 4 2
ic t
7 5 3 1 7 5 3 1 7 5 3 1 1 3 5 7 1 3 5 7 SM_DQ_R31 SM_DQ_R30 SM_DQ_R29 SM_DQ_R28 SM_DQ_R39 SM_DQ_R37 SM_DQ_R36 SM_DQ_R34 SM_DQ_R32 SM_DQ_R35 SM_DQ_R38 SM_DQS_R4 SM_BS1 SM_MAA0 SM_MAA6 SM_MAA11 SM_MAA10 SM_MAA3 SM_MAA7 SM_MAA9 8 6 4 2 SM_MAB1 SM_MAB2 SM_MAB4 SM_MAB5 7 5 3 1 SM_DQ_R4 SM_DQ_R6 SM_DM_R1 SM_DQ_R11
.c s
SM_MAB1 SM_MAB2 SM_MAB4 SM_MAB5 8,12,13 8,12,13 8,12,13 8,12,13
m o
1 2 3
56_8P4R_402 2 RN39 4 6 8 56_8P4R_402 2 4 6 8 56_8P4R_402
SM_RAS_R# SM_CAS_R# SM_WE_R#
56_8P4R_402 RN2
4
56_8P4R_402 RN22 8 6 4 2
SM_DQ_R1 SM_DQ_R2 SM_DQ_R0 SM_DM_R0
56_8P4R_402
0805
RN4 1 3 56_2R4P RN35 1 3 56_2R4P R449 2 4 SM_CKE2 SM_CKE3 R446 (0402) 56_402 (0402) R445 (0402) 56_402 SM_CAS# SM_RAS#
5
2 4
SM_CKE1 SM_CKE0
C441
7343
56_402
SM_WE#
100U/2V_7343
A
B
C
D
E
1
R251 R253 R248 (0402) (0402) (0402)
0_402_* 0_402_* 0_402_* 75 R650 75 R651 75 R652
PD_R PD_G PD_B
35 35 35
+5VS (0402) R241 10K_402 16 U29
2
0402
C294 0.1U_402 +V1.5S
8 8 8 35
R G B PD_SWVGA
12 9 7 4 1 15
4A 3A 2A 1A
S OE 74CBT3257
4B2 4B1 3B2 3B1 2B2 2B1 1B2 1B1
GND
13 14 10 11 6 5 3 2
VCC
D3 BAV99_SOT23
D2 BAV99_SOT23 3 3 3
D4 BAV99_SOT23
R262 R252 R247 (0402) (0402) (0402)
3
0_402_* 0_402_* 0_402_*
R_Q
G_Q B_Q
+12VS R228 1M 6 5 4
HSYNC_Q VSYNC_Q
D1
G2
S2
Q41
DUAL_N_SC70-6P 1 2 3 8 8 HSYNC VSYNC
4
C720
0805
220K_0805 S1
+5VS
5
8 8
DDC2BD DDC2BC
w
w w
R227 R225 2.2K 2.2K
Q40 DUAL_N_SC70-6P
p la .
DDC2BC_Q 5 4 G2 S2 G1 D2 2 3
DDC2BD_Q
HSYNC_Q VSYNC_Q
DDC2BC_Q DDC2BD_Q
1
s p to
2 4 6 8 RN14 1 3 5 7 HSYNC_Q VSYNC_Q 35 35 DDC2BC_Q DDC2BD_Q 35 35
G1
6
D2
S1
75_8P4R
m e h c
L43 L44 L45 L_0603 L_0603 L_0603 33 33 33 33 R229 R230 R231 R232 R754 100K 3 18,22,23,32,37,41 PCIRST#_3 1 2
a
C275
ic t
R_CN G_CN B_CN C276 C278
.c s
1 9 2 10 3 11 4 12 5 13 6 14 7 15 8 C280
m o
1 2
2
2
8
1
1
1
2
CN1 17
3
16
C277
C274
C279
CON15(VGA)
3.3P_* 3.3P_* 3.3P_*
100P_* 100P_* 100P_* 100P_*
4
D1
+3VALWAYS
1 Q113 2N7002
Q114 2N7002
2
3
5
A
B
C
D
E
1
+12VS +3VS LCD_+3VS L21 L_1206
2
R47 1M
C88 0.1U
R38 1M
Q7 1 2 5 6 D 3 G S 4 LCD_+3VS SI3456DV C78 0.1U C58 1000P
Q9 2N7002 1 Q13 2N7002 1 R54 100K
3
C66 47P
8 LCD_ENVDD
4
5
w
w w
p la .
37 37 PID1 PID0
s p to
8 L1_TX08 8 L1_TX1+ L1_TX28 L1_TXAC+ R12 R13
m e h c
C50 0.1U C39
0805
C38 0.1U
C37 0.1U
10U_0805
a
LCD_VCC
ic t
LCD_VCC
.c s
m o
1 2 3
3
2
2
3
CN11 LCD_VCC 1 3 5 7 9 11 13 15 17 19 21 23 1 3 5 7 9 11 13 15 17 19 21 23 CONN20(LCD) 2 4 6 8 10 12 14 16 18 20 22 24 2 4 6 8 10 12 14 16 18 20 22 24
L1_TX0+ L1_TX1L1_TX2+ L1_TXAC-
8 8 8 8
4
0 0
5
A
B
C
D
E
26,29,31 9
AD[0:31] HUB[0:11]
AD[0:31] HUB[0:10] +3VALWAYS
1
R186 10K
U50A AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 26,29,31 26,29,31 26,29,31 26,29,31 29 26 31 21 21,29 21,26 21 21,31 C/BE0#_3 C/BE1#_3 C/BE2#_3 C/BE3#_3 TP85 GNT1#_3 GNT2#_3 TP90 GNT4#_3 REQ0#_3 REQ1#_3 REQ2#_3 REQ3#_3 REQ4#_3 H5 J3 H3 K1 G5 J4 H4 J5 K2 G2 L1 G4 L2 H2 L3 F5 F4 N1 E5 N2 E3 N3 E4 M5 E2 P1 E1 P2 D3 R1 D2 P4 J2 K4 M4 N4 C1 E6 A7 B7 D6 B1 A2 B3 C7 B6 P5 M3 F1 B5 A6 E8 C5 L5 G1 L4 M2 W2 U5 K5 F3 F2 PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31 PCI_C/BE#0 PCI_C/BE#1 PCI_C/BE#2 PCI_C/BE#3 PCI_GNT#0 PCI_GNT#1 PCI_GNT#2 PCI_GNT#3 PCI_GNT#4 PCI_REQ#0 PCI_REQ#1 PCI_REQ#2 PCI_REQ#3 PCI_REQ#4 SM_INTRUDER# SMLINK0 SMLINK1 S.M. SMB_CLK SMB_DATA SMB_ALERT#/GPIO11 CPU_A20GATE CPU_A20M# CPU_DPSLP# CPU_FERR# CPU_IGNNE# CPU_INIT# CPU_INTR CPU_NMI CPU_PWRGOOD CPU_RCIN# CPU_SLP# CPU_SMI# CPU_STPCLK# HUB_PD0 HUB_PD1 HUB_PD2 HUB_PD3 HUB_PD4 HUB_PD5 HUB_PD6 HUB_PD7 HUB_PD8 HUB_PD9 HUB_PD10 HUB_PD11 HUB_CLK HUB_PSTRB# HUB_PSTRB HUB_RCOMP HUB_VREF HUB_VSWING W6 AC3 AB1 AC4 AB4 AA5 Y22 AB23 U23 AA21 W21 V22 AB22 V21 Y23 U22 U21 W23 V23 L19 L20 M19 M21 P19 R19 T20 R20 P23 L22 N22 K21 T21 N20 P21 R23 M23 R22 HUB0 HUB1 HUB2 HUB3 HUB4 HUB5 HUB6 HUB7 HUB8 HUB9 HUB10 R607 HUB_PSTRB# HUB_PSTRB SM_INTRUDER# SMBCK_ICH 33 SMBDA_ICH 33 LID_RSM# 22,36 A20GATE_3 39 H_A20M# 1 R588 H_IGNNE# 1 H_INIT# 1,41 H_INTR 1 NMI_ICH 5 H_PWRGD 1 KBDCPURST_3 H_SMI# 1 H_STPCLK# 1 21
+VCCP
+VCCP
R589 56
R614 10K_*
R613 56
0
2
CPU I/F
Hublink I/F
56
3
Not use for PC/PCI, can program as GPIO
4
6 CLK_ICHPCI 21,26,29,31 DEVSEL#_3 21,26,29,31 FRAME#_3 21 PCPCI_REQA#_3 21 PCPCI_REQB#_3 21 PCPCI_GNTA#_3
TP88
21,26,29,31 IRDY#_3 21,26,29,31 PAR_3 21,26,29,31 PERR#_3 21 PLOCK#_3 26,29,31 PME# 8 PCIRST#_ICH 21,26,29,31 SERR#_3 21,26,29,31 STOP#_3 21,26,29,31 TRDY#_3
R499 R498
R566 +3V
0_*
5
16,22,23,26,29,31,32,37,39,41
PCIRST#_3
w
w w
C579 0.1uF U54A 14 3 2 7
74LVC08 1
p la .
0 0
PCI_CLK PCI_DEVSEL# PCI_FRAME# PCI_GPIO0/REQA# PCI_GPIO1/REQB#/REQ5# PCI_GPIO16/GNTA# PCI_GPIO17/GNTB#/GNT5# PCI_IRDY# PCI_PAR PCI_PERR# PCI_LOCK# PCI_PME# PCI_RST# PCI_SERR# PCI_STOP# PCI_TRDY#
s p to
R610 INT_APICCLK INT_APICD0 INT_APICD1 Interrupt INT_PIRQA# INT_PIRQB# I/F INT_PIRQC# INT_PIRQD# INT_PIRQE#/GPIO2 INT_PIRQF#/GPIO3 INT_PIRQG#/GPIO4 INT_PIRQH#/GPIO5 INT_IRQ14 INT_IRQ15 INT_SERIRQ J19 H19 K20 D5 C2 B4 A3 C8 D7 C3 C4 AC13 AA19 J22 D10 D11 A8 C12 A10 A9 A11 B10 C10 A12 C11 B11 Y5 R194 R196 R202
48.7/1%
m e h c
39 R200 0 +V1.5S CLK_ICHHUB 6 HUB_PSTRB# HUB_PSTRB 9 9 C615 ICH_VREF ICH_VSWING 0 10K 1 0 K INT_PIRQA# 21,26,29 INT_PIRQB# 21,26 INT_PIRQC# 21,26,31 INT_PIRQD# 21,31 INT_PIRQE# 21 INT_PIRQF# 21 INT_PIRQG# 21 INT_PIRQH# 21 IRQ14_3 21,32 IRQ15_3 21,32 SERIRQ_3 21,26,37,39 C616 0.01uF EEP_DOUT 21 ICH_VREF C614 0.1uF
a
H_CPUSLP#
ic t
H_DPSLP# H_FERR# 1,8 1 1
.c s
m o
1 2 3
ICH4-M Part A
PCI I/F
0.01uF
EEPROM I/F
EEP_CS EEP_DIN EEP_DOUT EEP_SHCLK
TP17 TP20 TP91
EEP_DOUT
ICH_VREF VOLTAGE=0.35V+-8%
4
LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN I/F LAN_TXD0 LAN_TXD1 LAN_TXD2 LAN_JCLK LAN_RSTSYNC LAN_RST#
ICH_VSWING VOLTAGE=0.8V+-8%
+V1.5S +V1.5S R612 130/1% ICH_VSWING
R183
10K R609 487/1%
I f ICH4 LAN not used, pull down through 10K
R608 150/1%
C617 0.1uF
R611 150/1%
NEAR_SB NEAR_SB
5
A
B
C
D
E
U54B 14 32 32 PDD[0:15] SDD[0:15] PDD[0:15] SDD[0:15] 6,7,43 SUSA#_3 6 5 74LVC08 4 14 SUSA#_3_D VRM_PWRGD_ICH SUSB#_3 0402 7
1
U54C R198 100K_402 8 (0402) C253 7 0.1U_402 R581 0_402_* (0402) 10 9 74LVC08
39,40,47
BAT_LLOW#_OC
R506
0_*
BAT_LLOW#_OC_ICH
21
U50B C3 STATE IS NOT REQUIRED, USE AS GPO 8,21 AGP_BUSY# 22 AUXPWROK 21,26,29,31,37,39 CLKRUN#_3 44 PM_DPRSLPVR 22 PWRBTN#_RSM 22 SUSPWRGD_3 27 RIA#_3 22 RSMRST#_RSM 22,27,51
2
BAT_LLOW#_OC_ICH TP11
29,51
SUSC#_3
SUSB#_3 R507 6 CPU_STP#_3 R508 6 PCI_STP#_3 37 SUS_STAT#_3 4 PM_THRM#
SUSA#_3_D SUSB#_3 0 0_* CPU_STP#_3 SUSCLK_3 R505 TP27 R615 0 0
R2 Y3 AB2 T3 AC2 V20 AA1 AB6 Y1 AA6 W18 Y4 Y2 AA2 W19 Y21 AA4 AB3 V1 J21 Y20 V19 B8 C13 D13 A13 B13 D9 C9 T2 R4 T4 U2 U3 U4 T5 C20 A21 C18 A19 C16 A17 D20 B21 D18 B19 D16 B17 B15 C14 A15 B14 A14 D14 A23 B23
PM_AGPBUSY#/GPIO6 GPIO_7 PM_SYSRST# GPIO_8 Unmuxed GPIO_12 PM_BATLOW# GPIO PM_C3_STAT#/GPIO21 GPIO_13 PM_CLKRUN#/GPIO24 GPIO_25 PM_DPRSLPVR GPIO_27 PM_PWRBTN# GPIO_28 PM_PWROK Power PM_RI# IDE_PDCS1# Management PM_RSMRST# IDE_PDCS3# PM_SLP_S1#/GPIO19 IDE_SDCS1# PM_SLP_S3# IDE_SDCS3# PM_SLP_S4# PM_SLP_S5# IDE_PDA0 PM_STPCPU#/GPIO20 IDE_PDA1 PM_STPPCI#/GPIO18 IDE_PDA2 PM_SUS_CLK IDE_SDA0 PM_SUS_STAT# IDE_SDA1 PM_THRM# IDE_SDA2
Geyserville
R3 V4 V5 W3 V2 W1 W4 Y13 AB14 AB21 AC22 AA13 AB13 W13 AA20 AC20 AC21 AB11 AC11 Y10 AA10 AA7 AB8 Y8 AA8 AB9 Y9 AC9 W9 AB10 W10 W11 Y11 W17 AB17 W16 AC16 W15 AB15 W14 AA14 Y14 AC15 AA15 Y15 AB16 Y16 AA17 Y17 Y12 AB19 AA11 AB18 AC12 Y18 W12 AA18 AB12 AC19 J23 F19 W7 AC7 AC6 Y6
SCROLLOCK#_3 39 EXTSMI#_3 37,39 KBDSCI_3 39 P ORTDOCK_FDD_IN# CB_SUSP#_ICH 27 OPMUTE# 24 XIDE_EN#_3 32 PDCS1#_3 PDCS3#_3 SDCS1#_3 SDCS3#_3 PDA0_3 PDA1_3 PDA2_3 SDA0_3 SDA1_3 SDA2_3 32 32 32 32 32 32 32 32 32 32
GPIO0 - 15 Input Only 35
GPIO16--21 Output Only
TP93
CPU_PERF# VRM_PWRGD_ICH
PM_GMUXSEL/GPIO23 PM_CPUPERF#/GPIO22 PM_VGATE/VRMPWRPGD AC_BITCLK AC_RST# AC_SDIN0 AC_SDIN1 AC_SDIN2 AC_SDOUT AC_SYNC LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_DRQ#0 LPC_DRQ#1 LPC_FRAME# USB_PP0 USB_PP1 USB_PP2 USB_PP3 USB_PP4 USB_PP5 USB_PN#0 USB_PN#1 USB_PN#2 USB_PN#3 USB_PN#4 USB_PN#5
21,23,25,31 AC_SDATA_OUT 23,25,31 AC_SYNC 5,37,39,41 LAD0 5,37,39,41 LAD1 5,37,39,41 LAD2 5,37,39,41 LAD3 21,37 LDRQ0# 21 LDRQ1# 5,37,39,41 LFRAME# 34 34 R546 0 RP6 9 8 7 6 10 4 3 2 1 5
4
IDE
21,23 AC_BIT_CLK 23,24,25,31 AC_RST# 21,23 AC_DATA_IN0 21,25,31 AC_DATA_IN1
AC'97 I/F
3
+3VALWAYS
35 35 34 34 35 35
USBP0+_5 USBP1+_5 TP23 TP24 USBP4+_5 USBP5+_5 USBP0-_5 USBP1-_5 TP26 TP92 USBP4-_5 USBP5-_5
USBP2+_5 USBP3+_5
USBP2-_5 USBP3-_5
R616 10K-10P8R 36 BACK_OFF# 32,35 BAY_IN0 32 BAY_IN1 6 CG_FS0 6 CG_FS1 6 CG_FS2 6 CG_FS5 6 CG_FS6
5
w
w w
41 FWH_WP#
TP28 TP25 TP29
CPU_STP#_3
p la .
18_1% J20 G22 F20 G20 F21 H20 F23 H22 G23 H21 F22 E23 R565 0
USB_OC#0 USB_OC#1 USB_OC#2 USB_OC#3 USB_OC#4 USB_OC#5
USB_RBIAS USB_RBIAS#
GPIO32 GPIO33 GPIO34 GPIO35 GPIO36 GPIO37 GPIO38 GPIO39 GPIO40 GPIO41 USB_GPIO42 GPIO43
s p to
USB I/F
IDE_SDD0 IDE_SDD1 IDE_SDD2 IDE_SDD3 IDE_SDD4 IDE_SDD5 IDE_SDD6 IDE_SDD7 IDE_SDD8 IDE_SDD9 IDE_SDD10 IDE_SDD11 IDE_SDD12 IDE_SDD13 IDE_SDD14 IDE_SDD15 IDE_PDDACK# IDE_SDDACK# IDE_PDDREQ IDE_SDDREQ IDE_PDIOR# IDE_SDIOR# IDE_PDIOW# IDE_SDIOW# IDE_PIORDY IDE_SIORDY CLK_14 CLK_48 RTCRST# CLK_RTCX1 CLK_RTCX2 CLK_VBIAS Clocks Misc SPKR THRMTRIP# H23 W20 PM_STPCPU# 44
LPC I/F
IDE_PDD0 IDE_PDD1 IDE_PDD2 IDE_PDD3 IDE_PDD4 IDE_PDD5 IDE_PDD6 IDE_PDD7 IDE_PDD8 IDE_PDD9 IDE_PDD10 IDE_PDD11 IDE_PDD12 IDE_PDD13 IDE_PDD14 IDE_PDD15
m e h c
PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15 SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7 SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15 PDDACK#_3 32 SDDACK#_3 32 PDDRQ_35 32 SDDRQ_35 32 PDIOR#_3 32 SDIOR#_3 32 PDIOW#_3 32 SDIOW#_3 32 PIORDY_35 32 SIORDY_35 32 CLK_ICH14 CLK_ICH48 RTC_RST# 6 6 36 SPKRICH_3 R542 56 21,23 +VCCP R544 56
a
ic t
+V1.5S R180 1K 3 Q37 1 BSS138 2 R529 1 4 10M
.c s
VRM_PWRGD 6,8,22,44 DPMS_CLK 8
m o
1 2 3
SUSCLK_3
NEAR_SB
R532 X5
10M
2 3 32.768K
4
C547 15P
C542 15P
RTC_VBIAS
36
ICH4-M Part B
R543 (0402)
0_402
PM_THRMTRIP#
1
5
A
B
C
D
E
1
+3VS U50C +V1.5ALWAYS 1 CT5 4.7uF/10V 1
3216
+
C242 0.1U 2 2
C229 0.1U
2
E12 E13 E20 F14 G18 R6 T6 U6 0 0 F6 F7 E9 F9 E7 V6
VCCSUS1.5_0 VCCSUS1.5_1 VCCSUS1.5_2 VCCSUS1.5_3 VCCSUS1.5_4 VCCSUS1.5_5 VCCSUS1.5_6 VCCSUS1.5_7 VCCLAN1.5_0 VCCLAN1.5_1 VCCLAN3.3_0 VCCLAN3.3_1 VCC5REF1 VCC5REF2 VCC5REFSUS1 VCCHI_0 VCCHI_1 VCCHI_2 VCCHI_3 VCCPLL
V CCLAN1.5 /3.3 may or may not be powered in S3-S5
+V1.5S +3VS
R185 R189
POWER
+5VS +3VS
R187 1 D24
1K 2 1SS355 +3VALWAYS +5VALWAYS C230 1U C231 0.1U 0402 C255 +V1.5S R203
C HK is it necessary (for LAN?) +VCC5REF 1 D25 R195 +V1.5S 2 1SS355 1K
VCC3.3_0 VCC3.3_1 VCC3.3_2 VCC3.3_3 VCC3.3_4 VCC3.3_5 VCC3.3_6 VCC3.3_7 VCC3.3_8 VCC3.3_9 VCC3.3_10 VCC3.3_11 VCC3.3_12 VCC3.3_13 VCC3.3_14 VCC3.3_15 VCC1.5_0 VCC1.5_1 VCC1.5_2 VCC1.5_3 VCC1.5_4 VCC1.5_5 VCC1.5_6 VCC1.5_7 VCCRTC
A5 B2 H6 H18 J1 J18 K6 M10 P6 P12 U1 V10 V16 V18 AC8 AC17 K10 K12 K18 K22 P10 T18 U19 V14 AB5 E11 F10 F15 F16 F18 K14 V7 V8 V9 F17
CT20
0805
C236 0.1U 10U_0805
C239 0.1U
C240 0.1U
C257 0.1U
E15 C250 0.1U L23 M14 P18 T22
3528
+
CT6 22uF/10V
0
+V1.5S_PLL
C22 P14 U18 AA23
3
0.1U_402 R205 0
+VCCP
VCC_CPU_IO_0 VCC_CPU_IO_1 VCC_CPU_IO_2
C247 1U
C262 0.1U
ICH4-M Part C
4
+V1.5S_PLL
C260 0.01U
C261 0.1U
5
w
w w
p la .
+V1.5S C237 0.1U
s p to
VCCSUS3.3_0 VCCSUS3.3_1 VCCSUS3.3_2 VCCSUS3.3_3 VCCSUS3.3_4 VCCSUS3.3_5 VCCSUS3.3_6 VCCSUS3.3_7 VCCSUS3.3_8 VCCSUS3.3_9 CT18
0805
10U_0805
C241 0.1U
m e h c
+V1.5S C246 0.1U C258 0.1U +RTCVCC C226 0.1U +3VALWAYS C235 0.1U
a
ic t
U50D A1 A4 A16 A18 A20 A22 AA3 AA9 AA12 AA16 AA22 AB7 AB20 AC1 AC5 AC10 AC14 AC18 AC23 B9 B12 B16 B18 B20 B22 C6 C15 C17 C19 C21 C23 D1 D4 D8 D12 D15 D17 D19 D21 D22 D23 E10 E14 E16 E17 E18 E19 E21 E22 F8 G3 G6 VSS0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51
.c s
VSS
VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 G19 G21 H1 J6 K3 K11 K13 K19 K23 L10 L11 L12 L13 L14 L21 M1 M11 M12 M13 M20 M22 N5 N10 N11 N12 N13 N14 N19 N21 N23 P3 P11 P13 P20 P22 R5 R18 R21 T1 T19 T23 U20 V3 V15 V17 W5 W8 W22 Y7 Y19
m o
1 2 3
ICH4-M Part D
4
C245 0.1U
5
A
B
C
D
E
19,32 PDD[0:15] 19,32 SDD[0:15]
PDD[0:15] SDD[0:15] 19,23 AC_DATA_IN0 19,25,31 AC_DATA_IN1 19,23 AC_BIT_CLK 1 3 5 7 RN66 2 4 6 8 10K-8P4R_* +3VS +3VS
7343
1
C259 + 100U/6.3V_7343 C228 0.1U
RN91 18,26,37,39 SERIRQ_3 18,26 REQ2#_3 18,31 INT_PIRQD# 18,26,29 INT_PIRQA# 2 4 6 8 8.2K-8P4R RN9 18,26 INT_PIRQB# 18 REQ0#_3 18,26,31 INT_PIRQC# 18,26,29,31 TRDY#_3
2
1 3 5 7 +RTCVCC 1 3 5 7 8.2K-8P4R RN92
+V1.5S C221
7343
+
2 4 6 8
100U/2V_7343 18 SM_INTRUDER# R184 100k +3VALWAYS
18 PCPCI_REQA#_3 18,26,29,31 DEVSEL#_3 18 PCPCI_REQB#_3 18,31 REQ4#_3
2 4 6 8 8.2K-8P4R RN12
1 3 5 7
19 BAT_LLOW#_OC_ICH
R496
18,26,29,31 SERR#_3 18,26,29,31 PERR#_3 18 PLOCK#_3 18,26,29,31 IRDY#_3
2 4 6 8 8.2K-8P4R
1 3 5 7 R513
19,26,29,31,37,39 RN67 18 19,37 19 18,26,29,31 REQ3#_3 LDRQ0# LDRQ1# FRAME#_3 2 4 6 8 8.2K-8P4R RN93 18 18 18 18 INT_PIRQE# INT_PIRQF# INT_PIRQG# INT_PIRQH# 2 4 6 8 8.2K-8P4R 1 3 5 7 1 3 5 7
CLKRUN#_3
3
8,19 AGP_BUSY# 18,26,29,31 18,29
4
R504 R182 R501 R552 R575 R500
10K 8.2K 8.2K 8.2K 8.2K 100
STOP#_3 REQ1#_3 IRQ14_3 IRQ15_3 PAR_3
18,32 18,32 18,26,29,31
5
w
w w
p la .
s p to
19,23 SPKRICH_3 AC_SDATA_OUT 19,23,25,31 18 PCPCI_GNTA#_3 18 EEP_DOUT
m e h c
10K +3VS 10K +3VS R606 R538 R188 R534 1K_* 10K_* 1K_* 1K_* RA RB RC RD Stuff for No Reboot Stuff for safe mode Stuff for A16 swap override Stuff
a
+3V
C564 0.1U
ic t
C256 0.1U C553 0.1U
C238 0.1U
+3VALWAYS
.c s
C551 0.1U C224 0.1U C225 47P C251 47P C244 0.1U
1206
m o
1 2 3
C254 10U/10V
+RTCVCC
C227 0.1U
4
ICH3M STRAPPING OPTIONS Function Default Optional Override
No Reboot No Stuff No Stuff No Stuff No Stuff Safe Mode Boot A16 swap override Reserved
RA RB RC RD
5
A
B
C
D
E
+3VALWAYS_P
+3VALWAYS R80
+5VS
+3VS R42
C101 1U C100 0.1U_* 47K
Change from 100k to 47k
1
R88
R96 3 100K Q24 2N7002 1 2 74HC14 7 3 4.7U/16V_C1206 1 2 S1 G1 D2 D1 G2 S2 6 5 4 C103 DUAL_N_SC70-6P Q20 RESET# 2 R97 0 AUXPWROK SUSPWRGD_3 19 +3VS 19 R17 3
Q19 1 TP0610T SW1 1 2 3 4 C60 +
14
220K
220K
U5A
1
Q23
C135 3 R103
2
0.01U 220K 6,8,19 VRM_PWRGD
0.1U
ADM809 D13 19,27,51 SUSB#_3 2 1
1SS355_UMD2
+3V
U7 4 PCIRSTNS#_3 26,29,39,43
16,18,23,26,29,31,32,37,39,41
3
PCIRST#_3
2 1 7SZ32_SC70-5P
39 PCIRST#_GATE
R48 1M
4
5
w
w w
p la .
4 OS#_OC +3V 39 ANYKEY_RSM
19 PWRBTN#_RSM
s p to
U5E U5F 10 11 12 74HC14 74HC14 R668 0_402 R760 100K JP60 (0402) 1 2 OPEN2MM 1 C737 0.1U_*
m e h c
U5C 100K 1 5 6 9 C64 0.1U 74HC14 R102 1M 1 Q29 3 1 2N7002 2 R79 +3VALWAYS R62 100K 100K 1 2 +3VALWAYS_P 3 C139 0.1U Q21 2N7002 C156 0.1U R116 1M 2 3
a
U5D 8 74HC14 2 3 3
ic t
2 U5B 4 74HC14 +3VALWAYS
GND VCC
.c s
C121 1U RST_BTN# SUSB_DIS_3 24,49 CPU_VRON 44,50
RSMRST#_RSM
ADD FOR RC-RESET
m o
1
19
3
2
48
2
+3VALWAYS_P
5
C140 1000P
Q28 IRLML5103
3
3
13
D17
1 2
D18 3 RB715F_SOT323 +5VS PWRON#_3A 43
4
RB715F_SOT323
1
Q120 2N7002 3
LID_BOT#
42
2
D19 2 1 1 1SS355_UMD2_* 2 Q30 2N7002 TP95
5
LID_RSM#
18,36
PWRON#
42
A
B
C
D
E
+5VS +5V 1 2 3 U36 MAX8863 L54 L_0805 SHDN# GND IN MAX8863 C351
0805
+5VA
OUT SET
4 5 C372 R342 1000P 100K/1%
1
C345 10U_0805 C344 0.1U R350 33.3K/1%
0805
C99 19,24,25,31 AC_RST# R58 R50 R315 R46 R49 C83 0 22 22 56 0
A G N D_A
L58 0.01U
0
19,21 AC_DATA_IN0 19,21,25,31 AC_SDATA_OUT 16,18,22,26,29,31,32,37,39,41 PCIRST#_3 Q22 2N7002 0402 3 19,21 AC_BIT_CLK 25,31 AC_BIT_CLK_MO 1
2
26
SPKRCB C137
2
10P_*
+5VA
C377
0805
C129 0.1U_402 0402
0.01U_402
19,25,31
AC_SYNC
R326
22