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1. . ...................................................................................................................................................... 2 2. . ................................... 2 2.1 2.2 3. 3.1 3.2 4. 4.1 4.2 PROTEL 99................................................................................................................. 2 .................................................. 5 ................................................................................................................................. 6 . ............................................................................................................ 10
PROTEL 99, . ................................ 6
"SCH". ................................................................................................................................. 13 "SCH" . .......................................................................................... 13 "SCH" . ......................................................................... 16 4.2.1 "Sch" . ............................................................................................... 16 4.2.2 "Sch" . ............................................................................................ 18 4.3 " SCHEMATIC DOCUMENT" ............................................................................. 21 4.3.1 ( ) . 21 4.3.2 LM723 (3 ÷ 28V)................................................................. 24 4.3.3 ................................ 28 4.3.4 TTL . ...................................................................................................................................... 30
5.
"SCH" "PCB" (NET LIST) . 30 5.1 5.2 "SCH" "PCB". ......................................................................................................... 30 "SCH" "SIM". .......................................................................................................... 33 . ................................................................................................................................ 35 ( ) Operating Point Analysis. ...................... 36 ( ) Transient Analysis. 36 ( ) AC Small Signal Analysis. .. 37 "DC Sweep Analysis". ........................ 38 Noise analysis. .................................................................................................... 39 Transfer Function. .................................................................................... 40 - Temperature Sweep. ................................................................................ 41 Parameter Sweep. .................................................................................. 42 Monte Carlo Analysis.................. 43 ............................................................................................ 44 , . ................................................................................................. 44 50 ................................................................... 47 ....................................................... 48 ......................................................................... 51 .................................................................................................................................. 52 . .......................................................................................... 54 "PCB" . ........................................................................ 57 ..................................................................................................... 58 (PlacementTools)............................................................................ 58 . ................................................................................. 60 ............................................................................... 65 . ................................................................................................... 69 "PCB" .............................. 71
6.
.................................................................................................... 35 6.1 6.1.1 6.1.2 6.1.3 6.1.4 6.1.5 6.1.6 6.1.7 6.1.8 6.1.9 6.2 6.2.1 6.2.2 6.2.3 6.2.4 6.2.5 6.3
7.
"PCB" ............................................................................... 57 7.1 7.2 7.2.1 7.2.2 7.2.3 7.2.4 7.3
8. . ........................................................................................................................................... 75 8.1 8.2 .......................................................................................................... 76 "PROTEL" . ...................................................................................... 77
1
1. .
, Protel 99SE, MicroCAP 6.0, OrCAD 8.0, . Protel 99SE . , ("Sch", "PCB" "Sim") Protel www.protel.com. "Service Pack" . , , . Protel 99 , .
2. .
2.1 Protel 99. "Protel 99" CD . "Explorer", CD-ROM Setup.exe . CD . .1.
.1 , .2.
2
.2 "Next", "Next" .3.
.3 .3 . "Typical" , "Custom" . "Next" .3 .4.
3
.4 .4 , , . "Next" .5.
.5 .5 , , , "Next".
4
.6 .6 (Client99.exe) . "Next" "Next". "Close". Protel 99.
2.2 . : 200Mhz 128kB , 16Mb RAM 33Mhz. : 300Mhz 128kB , 64Mb RAM 66Mhz. : 700Mhz 512kB , 128Mb RAM 150Mhz.
5
3. Protel 99, .
3.1 . , .7 .
.7 - .8, . "Servers..." "Customize..." "Preferences..." "Design Utilities..." "ddb" .
.8 "Servers..." , Protel 99, 33 , .9.
6
.9 "Customize..." , , , , .10.
7
.10
"Preferences..." , , .11.
.11 Create Backup Files , . Save Preferences . Auto-Save Settings , . Change System Font ( Protel 99). "Design Utilities" "*.ddb" , , .12. 8
.12 , , , .13.
.13 .14. "New" - , .17. "Open" .
9
.14 .15 :
Design Manager "Explorer" , . Status Bar , , . Command Status "Status Bar" , , . .15 "Help", . 3.2 . Protel 99. "File" "New".
.15 "New" "New Design Database" .16, , "Ok" , "MyDesign.ddb" C:\My Documents\MyDesign.ddb. : , "My Documents" . 10
.16 , "Documents".
.17 , "New..." .
11
.18 "New Document" :
.19 Document Folder PCB Document , "PCB" PCB Library Document "PCB" Schematic Document , "Sch" Schematic Library Document Spread Sheet Document Text Document Waveform Document "Wave" (wave )
12
.20 Printed Circuit Board Wizard PLD CUPL Wizard "Sch" , , . : , : 1. "Schematic Document" , ... 2. PCB Document , .
4. "Sch".
4.1 "Sch" . "Schematic Document" . "Sheet1" "Sheet1".
.21 13
, . , :
.22 Drawing Tools , , , .
Wring Tools ( ), "Schematic Document".
Wire - "" Bus - , , , .23 . Bus entry - . Net - , 1 2, .23. 14
.23 Power port- , . Part - . Sheet symbol - , , .25. Sheet entry - .
.24 .. Port - .
.25 15
Junction - . No ERC [PIN] , . PCB Layout - (). 4.2 "Sch" . 4.2.1 "Sch" . : D:\Electronics\Design Explorer 99\Library. "Protel 99". : Pcb Library Sch Library SignalIntegrity Library Sim Library - , "PCB" - , "Sch" - ... - .
"Add/Remove".
.26 , , "Sim.ddb", "Add" "Ok", .27. 16
.27 .
.28 17
4.2.2 "Sch" . "Schematic Library" .19, "Sch" , "MyDesign.ddb". "Schlib1" , .29.
.29 : LP211, .30.
.30 "PlaceLine" , 18
.31
, "Line", .31, , . "PlacePolygon" , , "View" .29 "Snap Grid" , . "PlacePin" . Pin Length - ; Name , , X Y Location ; Orientation ...
.32 19
"Pins" , , "Hidden Pins" . : "Add" .30 . .33 .30. .35 "Description..." .34
.34
.35 .35 "Library Fields" "Part Field Names" .
20
4.3 " Schematic Document" . 4.3.1 ( ) .
.36 Sim.ddb. "Browse" . "Simulation Symbols.Lib" (R1 R2) ( C1 ), : , , , ... , , ( "Properties...") "Part" . .37 21
Graphical Attrs Orientation ( ); Mode - , , ... "Normal" "DeMorgan", ; Mirrored , ; , . "Left Shift" + "Space", 90° . .38 : ,
, , "Toolbars" 3.1. , . , .
22
.39, . , "WringTools".
.39 "PlaceWire" . "PlaceNetLabel" . : , . , . , "Power Port", .40. "Net" "GND", . "Style" "Power Ground", . .
.40 23
, "Part", "Attributes". Lib Ref - , . Footprint - . Designator - , "VT1" . Part Type - , , ... ; Sheet Path Part Selection Hidden Pins ; .41 Hidden Fields - ; "Graphical Attrs" , . . - ; - ; - ; - ,
4.3.2 LM723 (3 ÷ 28V). 24
.42
.43 .42 , LM723. "Izpravitel s LM723", "Schematic Document", "Sheet1", . 1. "PlaceSheetSymbol" "WringTools" ( ).
25
2. "PlacePort" LM723. : "PlacePort" "PlaceSheetSymbol" .
.44 3. "Port" , .45. Name , 5, (7 8 4 3 6 10 1 2 9 , ). Style "Left", "Right". I/O Type ( "Input" "Output", , ). Alignment , e "5". Width , 30, 20, . .45
26
.42 , 4.3.1. . "Schematic Document" "Izpravites s LM723" "LM723", .43. , . "PlaceTextFrame", .46. "Change..." , "Change..." . ( ) "PlaceAnnotation" , "Annotation" .47, "Text", .
.46
.47
27
.48 .48 , .
4.3.3 . .49.
28
.49 "PlacePowerPort" . , .50. 4.3.1. "Net" "VCC" "" , , .
.50
29
4.3.4 TTL . SN74F153, 4- , .51.
.51 "PlaceBus" "PlaceBusEntry" ( ), "PlaceNetLabel" ( ).
5. "Sch" "PCB" (net list) .
5.1 "SCH" "PCB".
30
"NET LIST", ( ). "NET LIST" "NET LIST". , "Sch" , . "NET LIST", . : "", .52.
.52 , 4.3., "rc generator.sch". : "Miscellaneous Devices.ddb", , "DB9". .52 "PCB" ( .53), :
31
.53 "Advpcb.ddb", "PCB Footprints.lib", . : AXIAL0.4 - R1 ÷ R10 DB9/M - RAD0.2 - C1 ÷ C3 TO-18 - Q3, Q4 2N2222 TO-92B - Q1, Q2 2N2270
"rc generator.sch", "Footprint", , "R3", .54. "NET LIST".
.54 32
.55
"Design", .55 "Create Netlist...", "rc generator.NET" , "rc generator.sch" "PCB1". "NET LIST", .56.
.56 5.2 "SCH" "Sim". "SCH" "Sim" "SPICE Netlist". "NET LIST" , "SPICE Netlist" , 33
"Run" "Simulate", .57. "SPICE Netlist" :
*SPICE Netlist generated by Advanced Sim server on 19.1.2001 . 17:10:56 *for: Sheet1.nsx *Schematic Netlist: C1 OUT 0 1u IC=0 Q1 OUT NetQ1_2 0 2N2222 R1 IN NetQ1_2 1K R2 NetR2_1 OUT 1k V1 IN 0 DC 0 PULSE(0 12 0 1n 1n 100u 5000u) AC 1 0 V2 NetR2_1 0 +12V AC 0 0 .SAVE 0 IN NetQ1_2 NetR2_1 OUT V1#branch V2#branch @V1[z] @V2[z] @C1[i] @Q1[ib] .SAVE @Q1[ic] @Q1[ie] @R1[i] @R2[i] @C1[p] @Q1[p] @R1[p] @R2[p] @V1[p] @V2[p] *PLOT TRAN -1 1 A=@C1[i] *PLOT OP -1 1 A=@C1[i] *Selected Circuit Analyses: .TRAN 0.0001 0.025 0 0.0001 .OP................................................................
4.3.1. "" "Create SPICE Netlist" "Simulate". : : "SPICE netlist". ? "Yes", . : ( "") C1 Error: PART TYPE attribute value (1,5u) may not contain a comma. R2 Error: PART TYPE attribute value (1,9k) may not contain a comma. V1 Error: AC MAGNITUDE must be greater than or less than 0. : , "1.5u" "1.9k" "1u5" "1k9", "," . : "V1" , "AC MAGNITUDE1" "1" , "DC = 0". 34
6. .
6.1 . , .57 .
.57 "Analyses Setup" "Simulate" "Setup...".
.58 35
.58. 6.1.1 ( ) Operating Point Analysis.
.59 , , , , .59. , . 6.1.2 ( ) Transient Analysis.
.60 36
, . , , () . .60. :
.61 6.1.3 ( ) AC Small Signal Analysis. "AC Analysis" ( ) , . "DC" ( ) . .62.
.62 37
:
.63 6.1.4 "DC Sweep Analysis". , . , . .64.
.64 , .65. 38
.65 6.1.5 Noise analysis. , "NO(out)" , (V^2/Hz). , (). "Output noise" "Input noise" ( ), , . ...
.66 39
:
.67 .67 1kHz 100kHz, Hi-Fi . 6.1.6 Transfer Function. "DC" "DC" .
.68 , .69.
40
.69 6.1.7 - Temperature Sweep. , . .70 : -10°C out-t01 60°C out-t08 110°C out-t13 180°C out-t20 200°C out-t22
.70 , .71. 41
.71 6.1.8 Parameter Sweep. . "R11", , , , .72. R11 Out, V 500 out-p01 7.5 1000 out-p06 15 1400 out-p10 20
.72 , "R11" , . 42
:
.73 6.1.9 Monte Carlo Analysis. 40%, .
.74 , .75. 43
.75 6.2 . 6.2.1 , . 4.3. , , . , , .76.
.76 , . "V3" : 44
"VSIN" ; "Designator" "V?" , "V", , , . .77 "Part Type" "1kHz" (1MHz 10Hz, ), . "DC" "0V" "0" ; "C" "1V" "1" . : "AC" "DC" "0" "1", "0V" "1V", . "AC Phase" . .78 "Offset" ( , ); "Delay" "Damping" ; "Phase" . , (0 , 90 270), . .79 45
!!! "*"
, ( ), . "Read-Only Fields" , !. "C1" "C2 "C3" "R1" R2" "R3": "Part Fields 1-8" "Part Fields 9-16" "*", ( ), . "V1" "V2" : "Lib Ref" "VSRC" , ; "Part Type" "5V" (1 10 , , ). "Sheet Path" ; "Part" : .80 "Part Fields 1-8" "Part Fields 9-16" . "Q1" "2N3904" ( "2N1893): "Lib Ref" - "2N1893" "2N1893". "Part Fields 1-8" "Part Fields 9-16" .
.81 46
.82 , , "1" "2". 6.2.2 50 . , . , , . , .83.
.83 "LLTR1" 47
"ZO" "50" "Characteristic impedance" , 50, 75.
"TD" "20NS" "Transmission delay", . "Attributes" . "Part Fields 1-8" "Part Fields 9-16" .
.84 , . , ("I" "U" , ). . , . 6.2.3 . , (+5V 8V), .85.
48
.85 .
.86 : "TF1" ; "RATIO" , . , K. = 0,1. "RP" "DC" , . "RS" "DC" , . .87 49
"LEAK" ( ), . "MAG" , ( ). "Part Fields 1-8" "Part Fields 9-16" . "78L05" . "Designator". "Part Fields 1-8" "Part Fields 9-16" "*". , (8V ÷20V). "D5 1N4736" ( ). "Part Fields 1-8" "Part Fields 9-16" "*", D1 D4. .88.
.88 , "LM7805" , .
50
6.2.4 . , . , . "Q1" , "Q2". "C1" "C2".
.89 . , ( "IC1" "IC2"). ".IC" ( ) "Initial Condition" 51
"Part Type" . "Part Fields 1-8" "Part Fields 9-16" "*". , , "0V", ( ).
.90 :
.91 "1" "2" "R3" "R4". "1" "2" "R3" "R4", 0,5 ("1" = "2" "R3" = "R4") . 6.2.5 . , . , . 52
() . , ± 30V 4, 5 ± 30V, , , .
.92 93 .94.
.93
.94 53
: : 256Mb RAM 500MHz 2Mb . Pentium Celeron 375 MHz 128kb 64Mb RAM. .93 .94 , "Q12" 610mV. ( ) (h21 ). 6.3 . . V1 I1 : Part Type [V], [I] . : Part Type .
DC = 0 AC = 1 Amplitude = 1,2,3,50... [V] [I] Frequency = 1, 200... [Hz]
. : Part Type .
54
DC = 0; AC = 1; Pulsed ( ) = 1,2,3... [] [V]; Time Delay = 0,20u, 200u (uV uI, 20msec, 200msec), : , . Rise Time . Fall Time .
Pulse Width ; Period ;
.95 .95 . 55
UIN [V] = k . (U±OUT).
IIN [V] = k . (U±OUT).
.
56
7. "PCB"
"PCB" () , "New Document" "PCB Document". , , "New Document" "Wizards" ( 3) "Printed Circuit Board Wizard". , , .96, .
.96 7.1 "PCB" . .19 "PCB Library Document" , .97.
.97 57
. TO-39 .98. . - "PlacePad", . "1", "2" "3" , . "PlaceArc" . "" "PlaceTrack" ,, .98 .98. , "Pad" , .99. Designator .
.99 "Rename", .97 . 7.2 . , , . 7.2.1 (PlacementTools). 58
"PCB" , "PlacementTools". PlacementTools ; Track (PCB design object) - "". - , ().
Pad (PCB design object) () , , . Via (PCB design object) - () , , "Pad", "Via" . : . String (PCB design object) , , , , .... Coordinate (PCB design object) - , . Dimension (PCB design object) . Track (PCB design object) "PCB" . , . 59
Paste (PCB design object) . 7.2.2 . 7.2.2.1 ( ).
.100 : .96 .100 . , . "Top" ). "Bot" ). "TOver" ( ( .
"KeepOut" () . , "Top" , , . , . ( ). "Track" "Place", .96. . 1000x1000 mil, 39,38mil = 1mm. , "Imperial". "Metric" (). .101. 60
"Options" "Board Options..." "Board Options..." "Other" .102, .
.101
.102
.103.
.103 7.2.2.2 , , . . .101 "Rules...". .104. . :
61
.104
"Clearance Constraint" , , "Properties..." "Minimum Width" "Maximum Width" , . "Routing Corners" , 45°, 90° .
"Routing Topology" , , , .... , . 62
"Routing Via Style" , .
"Width Constraint" , , .
.105 "Routing Layers Rule" , . "Routing Layers Rule" 16 , . ( 63
) , . "Routing Layers Rule" "T" "B". 7.2.2.3 , . , . .101 "Board Options...", .106. "Other" Keep Out Multi Layer Connect DRC Errors Pad Holes "Silk screen" , "Signal Layers" .
.106 64
, . 7.2.3 . : "Netlist" 5.1. "Netlist" "Sch" . .96 "Design" "Netlist...", .107.
.107
65
"Browse..." .108. "Add" "MyDesign.ddb", "Netlist" "SHEMA ZA TRASIRANE.NET". *.net "Netlist" . "OK".
.108 : "Netlist" "Netlist", "PCB" . "Error" .109 "Netlist" .
.109 66
"Errr" , . "Sch" "PCB". : , "Sch" "1" "2" "3" "PCB" "b" "e" "c" ( ) "1" "2" "a" "c" ( ). "Sch" "PCB", "Netlist" "Sch" "PCB" . "Execute" , .110. ( "Netlist" ). . · (), . .110 · , . "Tools" .96 "Auto Place...", .111. .111, . "OK" "Help". 67
.111
.112 .
.112 · 200x300mm , , , , . "Auto Place...". · "Properties..." , "Properties..." LF353 U1, . . Layer () , " ". Rotation () , , . .113 68
Locked () "Auto Place...". 7.2.4 . , .
.114
.115 .115 .116 . .116 "NetC1_1" "IN1-IN2" "NetC1_1": "Bot" , "Track", .116. "NetC1_1" 69
, , . , . "IN1-IN2": , . "Bot" , "Track", .116. "IN1" , . "Multi" , "Pad" .116, "" (). "Top" .115 "Track" , "Multi", "Bot" "Track" "IN2", . .106 "Top" , , .
.117
.118
.117 , .118 . , , "Un-Route" 70
"Tools" .96. , "Net" "All". 7.3 "PCB" . "Printed Circuit Board Wizard" .20 3.2., .120.
.119 .119
.120 "Next" .121. 71
.121 "Next" , "Custom Made Board", .
.122 .122 () : 72
"Width" "Height" "Rectangular" "Circular" "Custom" "Boundary Layer" ... "Title Block" "Inner CutOff" , , , .... "Next". , "Next" .123.
.123 , , "Next" . 73
, , , "Next" .124.
.124 "The board has mostly" , . "Do you put components on both sides of the board?" , .
.125 74
"Next" .125. , . "Next" "Finish", "Finish" . 7.2.3. ( ) , , ..., . , "Auto Place..." 7.2.3.. .127 .
.126
.127
"Auto Route" .96, , "All" , "Component" "Net". .126.
8. .
75
8.1 . .119. Part Type 1.2k 1.2k 100u 100u 10k 10k 10k 1k 1k 20u 22k 4.7u 6.8k 6.8k BC182 BC182 BC212 BC212 BC212 CON2 CON2 CON2 CON3 14025 303 1 Designator R10 R8 C4 C3 R2 R4 R6 R1 R3 C2 R9 C1 R5 R7 Q3 Q4 Q1 Q6 Q2 J1 J3 J2 J4 U1 Q5 Footprint AXIAL0.4 AXIAL0.4 RB.2/.4 RB.2/.4 AXIAL0.4 AXIAL0.4 AXIAL0.4 AXIAL0.4 AXIAL0.4 RB.2/.4 AXIAL0.4 RAD0.2 AXIAL0.4 AXIAL0.4 TO-92B TO-92B TO-92B TO-92B TO-92B SIP2 SIP2 SIP2 SIP3 DIP8 TO-92B Description Resistor Resistor Bi-Polar Capacitor Bi-Polar Capacitor Resistor Resistor Resistor Resistor Resistor Bi-Polar Capacitor Resistor Capacitor Resistor Resistor NPN BJT NPN BJT PNP BJT PNP BJT PNP BJT Connector Connector Connector Connector JFET-Input OperationalAmplifiers N-Channel JFET
.119 1, . *.Sch , "Reports", "Bill of Material" *.XLS. , ("Part" ) "Part Type" 1.
76
8.2 "Protel" . "Protel" *.DRR. . *.PCB, "Reports" "NC Drill", :
--------------------------------------------------------------------------NC Drill File Report For : PCB\Avtomati4no trasirane\PCB2.PCB 29-May-2001 16:04:43 --------------------------------------------------------------------------Layer Pair : Top Layer to Bottom Layer ASCII File : C:\My Documents\Diploma rabota ILIA\MyDesign.ddb - PCB\Avtomati4no trasirane\PCB2.TXT EIA File : C:\My Documents\Diploma rabota ILIA\MyDesign.ddb - PCB\Avtomati4no trasirane\PCB2.DRL Tool Hole Size Hole Count Plated Tool Travel --------------------------------------------------------------------------T1 28mil (0.7112mm) 9 7.44 Inch (188.93 mm) T2 30mil (0.762mm) 18 7.04 Inch (178.71 mm) T3 32mil (0.8128mm) 37 16.69 Inch (424.03 mm) --------------------------------------------------------------------------Totals 64 31.17 Inch (791.67 mm) Total Processing Time : 00:00:02
.
M72 T3F00S00C0.032 X02422 X02419 T02 X03659Y03841 X04071 X04029 X03414Y04177 X03314 X02784Y03796 X03084 X0312Y04463 X03918Y04465 X03891 X033Y03516 X0325Y04767 X03745 X02717 M48 % X02421Y03869 X02944Y04615 X03317Y03848 X03709 X04121 X03773Y04174 X03364 T03 Y03896 Y03996 X0272 X04318 X03718Y03222 X03171Y03513 X0315 X03928Y04688 X02395Y04763 T1F00S00C0.028 T01 X02221 X03144 X03367 X03759 X04129Y04184 X03723 X02781Y03225 Y03996 Y03896 X0331Y04466 X04276Y03509 X037Y03516 X03181Y03225 X03545Y04764 X04328 X02295 T2F00S00C0.030 X02222Y03306 X02219Y04395 X04129Y04767 X03417 X04021Y03848 X04079 X03673 X02771Y03513 Y04096 Y03796 X0371 X04291Y03217 X03876Y03509 X03318Y03222 X03645 X02817Y04766 M30
*.TXT. *.DRL .
77
"Protel" . , . . *.PCB, "File" "Setup Printer...", "Print Setup" "Layers..." 128.
.128 "Signal Layers" . , 2000$, , ( , ), , . . () "Mirroring" "Layers". , , "Plots", .129.
78
.129 "Ok", . . 8.3, .128, .130 .
.130
79