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M2500
LSI PIN DESCRIPTION
HD6435208A00P (XK278A00) CPU
PIN NO.
NAME EXT EXTAL /WAIT /IRQ0 A18 A17 A16 /AS /RD /WR VCC MD0 MD1 MD2 /RES NMI VSS D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 A3 A4 A5 A6
I/O I I I O O O O O O O I I I I I I/O I/O I/O I/O I/O I/O I/O I/O O O O O O O O Clock
FUNCTION
PIN NO.
NAME A7 A8 A9 A10 A11 A12 A13 A14 A15 AVCC P50 P51 P52 P53 P54 P55 P56 P57 VSS AVSS AN0 AN1 AN2 AN3 AVCC TXD2 RXD2 A19 TXD1 RXD1 SCLK VSS
I/O O O O O O O O O O O O O O O O O O
FUNCTION
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Bus cycle wait Interrupt request Address bus Address strobe Read strobe Write strobe Power supply Mode select Reset Non-maskable interrupt request Ground
Data bus
Address bus
33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
Address bus
Analog power supply
Port 5
Ground Analog ground I I I I O I O O I I Analog data input
Analog power supply Transmit data Receive data Address bus Transmit data Receive data Clock for serial operation Ground
AK4320-VM-E1 (XR361A00) DAC
PIN NO.
NAME CKS DVDD DVSS XTO XTI /PD BICK SDATA LRCK SMUTE HOLD DEM0
I/O I O I I I I I I I I
FUNCTION Clock select Digital VDD Digital GND Xtal out Xtal in Power down Serial bit clock Serial data input L/R clock Soft mute Soft mute hold De-emphasis mode
PIN NO.
NAME DEM1 DIF0 DIF1 VCNT AOUTR AOUTL VCOM AVDD AVSS VREF DZF ZMUTE
I/O I I I I O O O I O I
FUNCTION De-emphasis mode Input format Mute Control Analog output R Analog output L Common Analog VDD Analog VSS V reference Zero input Zero mute
1 2 3 4 5 6 7 8 9 10 11 12
13 14 15 16 17 18 19 20 21 22 23 24
26
M2500
LZ95300 (XP451A00) Gate Array
PIN NO.
NAME INC CPR CPST COFF CPU C0 C1 C2 C3 /RES DATA IRQ /CS GND
I/O O O O O I I I I I I I/O O I
FUNCTION INPUT CUE ON/OFF VCA CUE PRE PAN ON/OFF VCA CUE POST PAN ON/OFF All CUE OFF H: CPU mode, L: Local mode CPU address bus
PIN NO.
NAME /CSW VCA8 VCA7 VCA6 VCA5 VCA4 VCA3 VCA2 VCA1 /SLSF /CHK /ONSW /ONRY VDD
I/O I I I I I I I I I I I I O
FUNCTION CUE switch input
1 2 3 4 5 6 7 8 9 10 11 12 13 14
Reset Data input/output
When /ONSW and /CSW change; H. When CPU reads data; L.
15 16 17 18 19 20 21 22 23 24 25 26 27 28
VCA GROUP switch input
SOLO SAFE switch input CHECK LED ON/OFF ON switch input ON relay & LED ON/OFF Digital power supply
Chip select Digital ground
Function of DATA
C3 C2 C1 C0
0 0 0 0 0 0 0
0 0 0 0 1 1 1
0 0 1 1 0 0 1
0 1 0 1 0 1 0
R/W W R W R W W W
MODE ON RELAY SET ON SW READ CUE RELAY SET CUE SW READ CHECK LED SET VCA PRE/POST SET SOLO SET
0 1 1 : : 1
1 0 0 : : 1
1 0 0 : : 1
1 0 1 : : 1
W W W : : W
VCA1 CUE SET VCA1 CUE SET VCA2 CUE SET : : VCA8 CUE SET
FUNCTION Sets /ONRY Reads /ONSW Sets INC ON Reads /CSW Sets /CHK Sets CVCA CUE PRE/POST PAN Sets SOLO When SOLO is set, CUE or SOLO SAFE is not ON, /ONRY is set to OFF. Sets VCA1 CUE Sets VCA1 CUE Sets VCA2 CUE : : Sets VCA8 CUE
DATA 0 1 OFF ON OFF ON OFF ON OFF ON OFF ON POST PRE OFF SOLO
OFF OFF OFF : : OFF
ON ON ON : : ON
27
M2500
YSP99 LZ95XD59 (XM047A00) Gate Array
PIN NO.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
NAME NC MCLK DESYN CD04 CD03 CD02 CD01 CDI4 CDI3 CDI2 CDI1 +Vdd GND L4 L3 L2 L1 LCD KEYN LED CDA14 CDA13 CARDN GND RAWN RAON RMA16 RMA15 RMA14 RMA13 +Vdd GND ROMN A15 A14 A13 A12 A11 A10 NC
I/O O O I I I I O O O O O O O O O O O O O O O O O O O O O I I I I I I
FUNCTION Master clock Sync for DEQIC Control data input Control data output (DSP2) Control data output (MOD) Control data output (DEQ IC17) Control data output (DEQ IC19)
PIN NO.
LED scan pulse LCD enable KEY enable LED enable CARD address CARD enable RAM write enable RAM read enable ROM address back select
ROM read enable
CPU address bus
41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80
NAME A9 A8 CD2 CD1 CDROM ROM4 ROM3 ROM2 ROM1 YY2 YY1 GND +Vdd SEL2 SEL1 XX2 XX1 MDCK TRG0 E RWN ICN ACIA GND TXD RXD XCLK WCLK SCLK FSYNC ADLR GND +Vdd SCLKN DCLK XI XO GND TRIG SYNCN
I/O I I I I I I I I I I I I I I I O O I I I O I O O O O O O O O I O I O
FUNCTION CPU address bus CARD page select CARD/ROM select ROM page control Dividing select
Control data select LED scan data MIDI clock Trigger out Read write pulse Initial clear ACIA enable DSP control data input DSP control data output Transfer clock Word clock Serial data transfer clock 64fs NC NC Serial data sift clock 256fs clock Clock input/(Xtal) output/(Xtal) Trigger input Sync clock
28
M2500
YSS228E-F (XQ962D00) DSP3 (Digital Signal Processor)
PIN NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 NAME VSS XI XO VDD /SYNCI /SYNCO CKI CKO CKSL VSS MCKS /SSYNC /IC /TEST BTYP /IRQ TRIG VDD VSS /CS /DS R/W CA7 CA6 CA5 CA4 CA3 CA2 CA1 CA0/CD15 CD14 CD13 CD12 CD11 CD10 CD09 CD08 CD07 CD06 VSS VDD CD05 CD04 CD03 CD02 CD01 CD00 /DTACK SI0 SI1 SI2 SI3 SI4 SI5 SI6 SI7 VSS VDD SO0 SO1 SO2 SO3 SO4 SO5 SO6 SO7 DB00 DB01 DB02 DB03 DB04 DB05 DB06 DB07 DB08 DB09 DB10 DB11 DB12 VDD I/O Ground I I O I O I I I I I I O I/O I I I I I I I I I I I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O O I I I I I I I I O O O O O O O O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O FUNCTION
System master clock input (60 M or30 MHz) System master clock input (60 M or30 MHz)
DM : IC2, 3 FUNCTION Ground
PIN NO.
NAME VSS DB13 DB14 DB15 DB16 DB17 DB18 DB19 DB20 DB21 DB22 DB23 DB24 DB25 DB26 DB27 DB28 DB29 DB30 DB31
I/O
81 82 83 84 Power supply 85 System synch. input 86 System synch. output 87 System clock input (30 MHz) 88 System clock output (30 MHz) 89 System master clock select (0:60 M,1:30 MHz) 90 Ground 91 Master clock for serial I/O(128 xFs) 92 Synch. signal for serial I/O 93 Initial clear 94 Test mode setting 95 CPU data bus 8/16 bit select(0:8,1:16) 96 Interrupt request 97 Trigger signal 98 Power supply 99 Ground 100 Chip select 101 Data strobe 102 Read/Write select 103 104 105 106 CPU address bus 107 108 109 110 CPU address/data bus 111 112 113 114 115 CPU data bus 116 117 118 119 120 Ground 121 Power supply 122 123 124 CPU data bus 125 126 127 128 DTACK signal output 129 130 131 132 Serial data input 133 134 135 136 137 Ground 138 Power supply 139 140 141 142 Serial data output 143 144 145 146 147 148 149 150 151 152 153 Parallel data bus 154 155 156 157 158 159 160 Power supply
I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O TIMO/DBOE I/O VSS VDD I/O DA00 I/O DA01 I/O DA02 I/O DA03 I/O DA04 I/O DA05 I/O DA06 I/O DA07 I/O DA08 I/O DA09 I/O DA10 I/O DA11 I/O DA12 I/O DA13 I/O DA14 I/O DA15 VSS VDD I/O DA16 I/O DA17 I/O DA18 I/O DA19 I/O DA20 I/O DA21 I/O DA22 I/O DA23 I/O DA24 I/O DA25 I/O DA26 I/O DA27 I/O DA28 I/O DA29 I/O DA30 I/O DA31 VDD VSS O A00 O A01 O A02 O A03 O A04 O A05 O A06 O A07 O A08 O A09 O A10 O A11 O A12 O A13 O A14 A15/RAS O A16/CAS O A17/CE O O /WE O /OE VDD
Parallel data bus
Timing signal/Parallel data bus control Ground Power supply
External memory data bus
Ground Power supply
External memory data bus
Power supply Ground
External memory address bus
External memory address bus/Row address strobe External memory address bus/Column address strobe
External memory address bus/Chip enable
External memory write enable External memory output enable Power supply
29
M2500
IC BLOCK DIAGRAM
BA6144 (XA552A00)
ST4: IC121,IC221,IC321,IC421 IN3: IC103,IC203,IC303,IC403, IC503,IC603,IC703,IC803
NJM2068-D(XM356A00)
IC101~106,IC201~204, IC301~305,IC401~404 MAS3: IC952,IC953 MAS2: IC101,IC151,IC301,IC351,IC501, IC551,IC751,IC901~903 MAS1: IC101~103,IC301~303,IC501~503, IC701~703 ISRT: IC101~104,IC111~115,IC121~124, IC201~217 IN1: IC103~107,IC303~307,IC503~507, IC703~707 ST1:
NJM4556AL(XP844A00)
MAS: IC951
NJM4580L(XF195A00)
ST2: IC101~103,IC301~303 ST3: IC101,IC201,IC301,IC401 MASOUT3: IC101,IC201,IC301 MSOUT1,2: IC301,IC201,IC301,IC401 MAS3: IC101,IC301,IC501,IC701, IC901,IC902 MAS1: IC901 IN3: IC101,IC102,IC301,IC501,IC502, IC701,IC702 IN1: IC101,IC102,IC301,IC501,IC502, IC701,IC702
METER DRIVER
+
+
+
+
+ +
CONSTANT CURRENT
NJM2082M(T1)(XN797A00)
CTRL: IC108
9
1
2
3
4
5
6
7
8
NJM4558L-D(XQ212A00)
METER1: IC102 METER2: IC102
M5238AP(XM085A00)
DC: IC101,IC201,IC202
OP AMP
OP AMP
+
+
A
B
Output A Inverting Input A
1 2 3 4 V
+V
8 7 6 5
+DC Voltage Supply Output B Inverting Input B Non-Inverting Input B
+ +
1 OUT A
2 IN A
3
4 V
5
6
7
8
+IN
A
+IN
B
IN OUT B B
+V
Non-Inverting Input A DC Voltage Supply
SN74HC00NSR (XE165A00)
CTRL: IC113
SN74HC04NSR (XD830A00)
CTRL: IC109
SN74HC138NSR (XD835A00)
CTRL: IC124
NAND
INVERTER
DECODER
A 1 2 3 4 5 6 7 8 B C G2A G2B G1 A 16 Y0 Y1 Y2 Y3 Y4 15 14 13 12 11 10 9 Vcc Y0 Y1 Y2 Y3 Y4 Y5 Y6
1A 1B 1Y 2A 2B 2Y VSS
1 2 3 4 5 6 7
14 13 12 11 10 9 8
VDD 4B 4A 4Y 3B 3A 3Y
1A 1Y 2A 2Y 3A 3Y Vss
1 2 3 4 5 6 7
14 13 12 11 10 9 8
VDD 6A 6Y 5A 5Y 4A 4Y
Select
B C G2A G2B G1
Enable
Output
Output
Y7 GND
Y7 Y6 Y5
30
M2500
SN74HC14NSR (XC725A00)
CTRL: IC110,IC302
SN74HC174NSR (XD836A00)
CTRL: IC123
SN74HC245NSR (XD838A00)
CTRL: IC121,IC125,IC131
INVERTER
D-FF
BUFFER
D1R 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC G B1 B2 B3 B4 B5 B6 B7 B8
1A 1Y 2A 2Y 3A 3Y GND
1 2 3 4 5 6 7
14 13 12 11 10 9 8
VDD 6A 6Y 5A 5Y 4A 4Y
CLEAR 1Q 1D 2D 2Q 3D 3Q GND
1 2 3 4 5 6 7 8 D G Q CK
16 D 15 G CK Q 14 CK D 13 G Q 12 CK D 11 G Q 10 9
Vcc 6Q 6D 5D 5Q 4D 4Q CK
A1 A2 A3 A4 A5 A6 A7 A8 GND
D CK G Q
D CK G Q
SN74HC273NSR (XH223A00)
CTRL: IC132
SN74HC32NSR (XD833A00)
CTRL: IC112
SN74HC374ANSR (XQ042A00)
CTRL: IC122
D-FF
CLEAR 1Q 1D 2D 2Q 3Q 3D 4D 4Q GND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC 8Q 8D 7D 7Q 6Q 6D 5D 5Q
OR
D-FF
OUTPUT CONTROL 1A 1B 1Y 2A 2B 2Y 1 2 3 4 5 6 7 GND 14 13 12 11 10 9 8 VCC 4B 4A 2D 4Y 2Q 3B 3Q 3A 3D 7 8 9 10 3Y 4D 4Q D CK OE Q CK D OE Q 13 12 11 5D 5Q CLOCK 6 Q OE D CK Q OE CK D 15 14 6Q 6D 5 4 D CK OE Q CK D OE Q 17 16 7D 7Q 1Q 1 2 20 19 Vcc 8Q
Q
CL D CK
CL CK D
Q
Q OE D CK
Q OE CK D
1D
3
18
8D
D CK CL Q
CK D CL Q
Q
CL D CK
CL CK D
Q
D CK CL Q
CK D CL Q
CLOCK GND
TC4052BP (XA053A00)
METER1: IC101 METER2: IC101
SN74HC02AP (IR000200)
ST4: IC102 MAS4: IC102,502,902 IN4: IC102,IC302
SN74HC139AP (IR013900)
MAS2: IC910
MULTIPLEXER
0Y 2Y Y-COM 3Y 1Y INH VEE VSS 1 0Y 2 3 4 5 6 7 8 2Y 2X 1X 16 15 14 13 12 11 10 9 VDD 2X 1X X-COM 0X 3X A B
NOR
1 2 3 4 5 6 7
DECODER
1G 1 2 3 4 5 6 7 8 G A B Y0 Y1 Y2 Y3 G A B Y0 Y1 Y2 Y3 16 15 14 13 12 11 10 9 Vcc 2G 2A 2B 2Y0 2Y1 2Y2 2Y3
1Y 1A 1B 2Y 2A 2B Vss
14 13 12 11 10 9 8
Vcc 4Y 4A 4B 3Y 3A 3B
1A 1B 1Y0 1Y1 1Y2 1Y3 GND
Y-COM
3Y X-COM 1Y INH 0X 3X A
B
31