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PAMS Technical Documentation NSE­6 Series Transceivers

Chapter 3 System Module

Original 08/98

NSE­6 System Module

PAMS Technical Documentation

CONTENTS
Transceiver NSE­6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operation Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Interconnection Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . System Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . External and Internal Connectors . . . . . . . . . . . . . . . . . . . . . Contacts Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Baseband Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Technical Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Charging Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Headset Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Service connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Battery Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SIM Card Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internal Microphone in Slide . . . . . . . . . . . . . . . . . . . . . . . RTC Backup Battery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Buzzer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Battery charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Startup Charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Battery Overvoltage Protection . . . . . . . . . . . . . . . . . . . . Battery Removal During Charging . . . . . . . . . . . . . . . . . . Different PWM Frequencies ( 1Hz and 32 Hz) . . . . . . . Battery Identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Battery Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supply Voltage Regulators . . . . . . . . . . . . . . . . . . . . . . . . Switched Mode Supply VSIM . . . . . . . . . . . . . . . . . . . . . . Power Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power up with a charger . . . . . . . . . . . . . . . . . . . . . . . . . . Power Up With The Power Switch (PWRONX) . . . . . . . Power Up by RTC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Up by IBI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Acting Dead . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Active Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sleep Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Audio control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . External Audio Connections . . . . . . . . . . . . . . . . . . . . . . . Analog Audio Accessory Detection . . . . . . . . . . . . . . . . . 3­5 3­5 3­5 3­6 3­7 3­7 3­8 3­9 3­9 3­9 3 ­ 11 3 ­ 11 3 ­ 12 3 ­ 13 3 ­ 14 3 ­ 14 3 ­ 14 3 ­ 15 3 ­ 16 3 ­ 16 3 ­ 17 3 ­ 17 3 ­ 18 3 ­ 19 3 ­ 20 3 ­ 21 3 ­ 22 3 ­ 22 3 ­ 24 3 ­ 24 3 ­ 25 3 ­ 25 3 ­ 25 3 ­ 26 3 ­ 26 3 ­ 26 3 ­ 26 3 ­ 26 3 ­ 27 3 ­ 27 3 ­ 28 3 ­ 29 3 ­ 30 Original 08/98

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Headset Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internal Audio Connections . . . . . . . . . . . . . . . . . . . . . . . . 4­wire PCM Serial Interface . . . . . . . . . . . . . . . . . . . . . . . Alert Signal Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . Digital Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . MAD2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Program Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SRAM Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EEPROM Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . MCU Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Flash Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . COBBA­GJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Real Time Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RTC backup battery charging . . . . . . . . . . . . . . . . . . . . . . Vibra Alerting Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IBI Accessories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Phone Power­on by IBI . . . . . . . . . . . . . . . . . . . . . . . . . . . IBI power­on by phone . . . . . . . . . . . . . . . . . . . . . . . . . . . RF Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF Frequency Plan . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Distribution Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Control Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Frequency synthesizers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AGC strategy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AFC function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Receiver blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RX interstage filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1st mixer in CRFU_1a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1st IF­filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Transmitter Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TX interstage filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power amplifier module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Synthesizer blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VHF VCO and low pass filter . . . . . . . . . . . . . . . . . . . . . . . . UHF PLL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UHF PLL block in SUMMA . . . . . . . . . . . . . . . . . . . . . . . . . . UHF VCO module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UHF local signal input in CRFU_1a . . . . . . . . . . . . . . . . . . .

3 ­ 30 3 ­ 31 3 ­ 31 3 ­ 32 3 ­ 32 3 ­ 32 3 ­ 42 3 ­ 42 3 ­ 42 3 ­ 42 3 ­ 42 3 ­ 43 3 ­ 43 3 ­ 44 3 ­ 44 3 ­ 44 3 ­ 45 3 ­ 45 3 ­ 45 3 ­ 46 3 ­ 46 3 ­ 46 3 ­ 47 3 ­ 49 3 ­ 49 3 ­ 49 3 ­ 49 3 ­ 49 3 ­ 51 3 ­ 52 3 ­ 54 3 ­ 55 3 ­ 55 3 ­ 55 3 ­ 55 3 ­ 55 3 ­ 56 3 ­ 56 3 ­ 56 3 ­ 56 3 ­ 56 3 ­ 56 3 ­ 56 3 ­ 57 3 ­ 57

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Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF baseband signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Synthesizer control timing . . . . . . . . . . . . . . . . . . . . . . . . . . . Transmitter power switching timing diagram . . . . . . . . . . . Synthesizer clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parts list of US8 (EDMS Issue 7.13) Code: 0201187 . . . . . . . . .

3 ­ 57 3 ­ 57 3 ­ 60 3 ­ 60 3 ­ 62 3 ­ 62 3 ­ 63

Schematic Diagrams: US8 Block Diagram of UIF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Circuit Diagram of UIF (Version 7.0 Edit 218) for layout version 07 Block Diagram of Baseband . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Circuit Diagram of Baseband (Version 7.0 Edit 105) for layout 07 Circuit Diagram of Power Supply (Version 7.0 Edit 257) for layout 07 Circuit Diagram of SIM Connectors (Version 7.0 Edit 71) for layout 07 Circuit Diagram of CPU Block (Version 7.0 Edit 208) for layout 07 Circuit Diagram of Audio (Version 7.0 Edit 126) for layout 07 Circuit Diagram of IR Module (Version 7.0 Edit 96) for layout 07 RF Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Circuit Diagram of RF Block (Version 1.0 Edit 244) for layout 07 Layout Diagram of US8 ­ Top (Version 07) . . . . . . . . . . . . . . . . . Layout Diagram of US8 ­ Bottom (Version 07) . . . . . . . . . . . . . . Testpoints of US8 ­ Top (Version 07) . . . . . . . . . . . . . . . . . . . . . . Testpoints of US8 ­ Bottom (Version 07) . . . . . . . . . . . . . . . . . . . Testpoint references (Version 07) . . . . . . . . . . . . . . . . . . . . . . . . . 3/A3­1 3/A3­2 3/A3­3 3/A3­4 3/A3­5 3/A3­6 3/A3­7 3/A3­8 3/A3­9 3/A3­10 3/A3­11 3/A3­12 3/A3­12 3/A3­13 3/A3­13 3/A3­14

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Transceiver NSE­6
Introduction
The NSE­6 is a radio transceiver unit designed for the GSM network. It is a GSM phase 2 power class 4 transceiver providing 15 power levels with a maximum output power of 2 W. The transceiver is a true 3 V transceiver. The transceiver consists of System/RF module (US8), Keyboard module (UK8) and assembly parts. The transceiver has full graphic display and two soft key based user interface. The antenna is internal. External antenna connection is not available. The transceiver has leakage tolerant earpiece and noise cancelling microphone. Integrated IR link provide connection for two NSE­6 transceivers or NSE­6 transceiver and PC. The plug­in SIM ( Subscriber Identity Module ) card is located inside the phone, slot for inserting is in the left side of the phone, accessable when battery is removed and slide is open.

Operation Modes
There are six different operation modes: ­ power off mode ­ idle mode ­ NSPS mode ­ active mode ­ charge mode ­ local mode In the power off mode only the circuits needed for power up are supplied. In the idle mode circuits are powered down and only sleep clock is running. In the No Serve Power Save mode circuits are powered down, and only sleep clock is running if no carrier is found during the scanning period. The purpose of this mode is to reduce power consumption in the non­ network area. In the active mode all the circuits are supplied with power although some parts might be in the idle state part of the time. The charge mode is effective in parallel with all previous modes. The charge mode itself consists of two different states, i.e. the charge and the maintenance mode. The local mode is used for alignment and testing.

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Interconnection Diagram
Keyboard module UK8 14 6 SIM 2 Antenna 2 Vibra 2
6

Display

9 4 Battery

System/RF Module US8 2 Earpiece

3+3

Mic

IR Module

Charger

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System Module
External and Internal Connectors
Suppply Voltages and Power Consumption
Connector Charging Charging Charging Charging Line Symbol VIN VIN I / VIN I / VIN Minimum 7.1 7.25 720 320 Typical / Nominal 8.4 7.6 800 370 Maximum/ Peak 9.3 7.95 850 420 Unit / Notes V/ Travel charger, ACT­1 V/ Travel charger. ACP­7 mA/ Travel charger, ACT­1 mA/ Travel charger, ACP­7

Battery contact signals
Pin Line Symbol BVOLT Parameter Minimum 3.0 Typical / Nominal 3.6 Maximum 5.3 Unit / Notes

1

Battery voltage

V/ Maximum voltage in idle mode with a charger connected V/ Battery size indication Phone has 100k pull up resistor SIM Card removal detection kohm/ Ni battery

2

BSI

Input voltage

0

2.85

Battery indication resistor i t

18"1% 20 27 68 22 24 51 91 1.4 3 2.8 0

kohm/ service battery kohm/ 4.1V Li battery kohm/ 4.2V Li battery V/ Battery temperature indication V/ Phone power up (pulse) V/ Battery power up (pulse) V

3

BTEMP

Input voltage Input voltage Output voltage

0 2.1 1.9 0

4

BGND

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Contacts Description
The transceiver electronics consist of the Radio Module ie. RF + System blocks, the keyboard PCB, the display module and audio components. The keypad and the display module are connected to the Radio Module with connectors. System blocks and RF blocks are interconnected with PCB wiring. The Transceiver is connected to accessories via charger connector (includes jack and plates), headset connector and IR­link. The System blocks provide the MCU, DSP and Logic control functions in MAD ASIC, external memories, audio processing and RF control hardware in COBBA ASIC. Power supply circuitry CCONT ASIC delivers operating voltages both for the System and the RF blocks. The RF block is designed for a handportable phone which operates in the GSM system. The purpose of the RF block is to receive and demodulate the radio frequency signal from the base station and to transmit a modulated RF signal to the base station. The SUMMA ASIC is used for VHF and PLL functions. The CRFU ASIC is used at the front end.

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NSE­6 System Module

Baseband Module
Block Diagram
TX/RX SIGNALS RF SUPPLIES PA SUPPLY 13MHz SYSTEM CLOCK CLK

COBBA SUPPLY

COBBA

CCONT

SIM

BB SUPPLY UI

32kHz CLK SLEEP CLOCK

MAD + MEMORIES

VBAT

BATTERY CHAPS

BASEBAND DC­jack

Technical Summary
The baseband module consists of four asics, CHAPS, CCONT, COBBA­ GJ and MAD2, which take care of the baseband functions of NSE­6. The baseband is running from a 2.8V power rail, which is supplied by a power controlling asic. In the CCONT asic there are 6 individually controlled regulator outputs for RF­section and two outputs for the baseband. In addition there is one +5V power supply output VCP for RF­part. The CCONT contains also a SIM interface, which supports both 3V and 5V SIM­cards. A real time clock function is integrated into the CCONT, which utilizes the same 32kHz clock supply as the sleep clock. A backup power supply is provided for the RTC, which keeps the real time clock running when the main battery is removed. The backup power supply is a rechargable polyacene battery. The backup time with this battery is minimum of ten minutes.

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The interface between the baseband and the RF section is handled by a specific asic. The COBBA asic provides A/D and D/A conversion of the in­phase and quadrature receive and transmit signal paths and also A/D and D/A conversions of received and transmitted audio signals to and from the UI section. The COBBA supplies the analog TXC and AFC signals to rf section according to the MAD DSP digital control and converts analog AGC into digital signal for the DSP. Data transmission between the COBBA and the MAD is implemented using a parallel connection for high speed signalling and a serial connection for PCM coded audio signals. Digital speech processing is handled by the MAD asic. The COBBA asic is a dual voltage circuit, the digital parts are running from the baseband supply VBB and the analog parts are running from the analog supply VCOBBA. The baseband supports two external microphone inputs and two external earphone outputs. The inputs can be taken from an internal microphone, a headset microphone or from an signal source. The microphone signals from different sources are connected to separate inputs at the COBBA asic. The output for the internal earphone is a dual ended type output capable of driving a dynamic type speaker. Input and output signal source selection and gain control is performed inside the COBBA asic according to control messages from the MAD. Keypad tones, DTMF, and other audio tones are generated and encoded by the MAD and transmitted to the COBBA for decoding. A buzzer alert and vibra control signals are generated by the MAD via UI­Switch.

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Charging Connector
Contact DC­jack side contact (DC­plug ring) DC­jack center pin DC­jack side contact (DC­plug jacket) Line Symbol L_GND Charger ground Function

VIN CHRG_CTRL

Charger input voltage Charger control output (from phone)

Pin 2, b

Name VIN

Min 7.25 3.25 320 7.1 3.25 720

Typ 7.6 3.6 370 8.4 3.6 800

Max 7.95 16.9 3.95 420 9.3 3.95 850 0 0.5 2.85

Unit V V V mA V V mA V V V Hz

Notes Unloaded ACP­7 Charger (5kohms load) Peak output voltage (5kohms load) Loaded output voltage (10ohms load) Supply current Unloaded ACP­9 Charger Loaded output voltage (10ohms load) Supply current Supply ground Charger control PWM low Charger control PWM high PWM frequency for a fast charger PWM duty cycle

3, a 4, c

L_GND CHRG_ CTRL

0 0 2.0 32 1

99

%

Headset Connector
Contact 2 1 3 Line Symbol XMIC SGND XEAR Accessory signal ground Accessory earphone signal output (from phone) Function Accessory microphone signal input (to phone)

Pin 2

Name XMIC

Min 2.0

Typ

Max 2.2 1

Unit k Vpp µA mV µF

Notes Input AC impedance Maximum signal level Bias current Maximum signal level Series output capacitance Resistance to phone ground

100 58 1 SGND 10 0

600 490

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Pin 3

Name XEAR

Min

Typ 47 10

Max

Unit µF

Notes Output AC impedance (ref. SGND) Series output capacitance Load AC impedance to SGND (Headset) Maximum output level (no load) Output signal level Load DC resistance to SGND (Headset) DC voltage (47k pull­up to VBB)

16

150 1.0 22

300

Vpp

626 1500

mV V

16 2.8

Service connections
Pin J124 Name MBUS Min 0 2.0 0 2.0 0 2.0 0 Typ logic low logic high l i hi h logic low logic high l i hi h logic low logic high l i hi h Max 0.8 2.85 0.8 2.85 0.5 2.85 0.3 Unit V Notes Serial bidirectional control bus. Baud rate 9600 Bit/s Phone has a 4k7 pullup resistor Fbus receive. Serial Data Baud rate 9 6k 230 4kBit/s 9.6k­230.4kBit/s Phone has a 220k pulldown resistor Fbus transmit. Serial Data 9.6k­230.4kBit/s Baud rate 9 6k 230 4kBit/s Phone has a 47k pullup resistor Supply ground

J255

FBUS_RX

V

J256

FBUS_TX

V

J123

GND

V

TOP Phone from back sid

Battery pack lay Battery connector

FBUS RX

FBUS TX

MBUS

GND

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Battery Connector The electrical specifications for the battery connector is shown in NO TAG. The BSI contact on the battery connector is used to detect when the battery is to be removed to be able to shut down the operations of the SIM card before the power is lost if the battery is removed with power on. The BSI contact in the battery pack is 0.7mm shorter than the supply power contacts to give enough time for the SIM shut down.
Pin 4 Name BVOLT Min 3.0 Typ 3.6 Max 4.5 5.0 50 5.3 3 BSI 0 2.85 V Unit V Notes Battery voltage Maximum voltage in call state with charger Maximum voltage in idle state with charger Battery size indication Phone has 100kohm pull up resistor. SIM Card removal detection (Threshold is [email protected]=2.8V) 18"1% 20 27 68 2 BTEMP 0 22 24 51 91 1.4 kohm kohm kohm kohm V Battery indication resistor (Ni battery) Battery indication resistor (service battery) Battery indication resistor (4.1V Lithium battery) Battery indication resistor (4.2V Lithium battery) Battery temperature indication Phone has a 100k (+­5%) pullup resistor, Battery package has a NTC pulldown resistor: 47k+­5%@+25C , B=4050+­3% 2.1 1 1.9 90 0 1 BGND 0 100 10 3 20 2.85 200 1 0 V ms V ms kohm V Phone power up by battery (input) Power up pulse width Battery power up by phone (output) Power up pulse width Local mode initialization (in production) Battery ground

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SIM Card Connector
Pin 4 3, 5 6 Name GND VSIM DATA Parameter GND 5V SIM Card 3V SIM Card 5V Vin/Vout 3V Vin/Vout 2 SIMRST 5V SIM Card 3V SIM Card 1 SIMCLK Frequency Trise/Tfall Min 0 4.8 2.8 4.0 0 2.8 0 4.0 2.8 5.0 3.0 "1" "0" "1" "0" "1" "1" 3.25 25 Typ Max 0 5.2 3.2 VSIM 0.5 VSIM 0.5 VSIM VSIM MHz ns SIM clock V SIM reset V SIM data Trise/Tfall max 1us Unit V V Notes Ground Supply voltage

Internal Microphone in Slide
Pin 6 Name MICP Min Typ 0.55 Max 4.1 Unit mV Notes Connected to COBBA MIC2N input. The maximum value corresponds to1 kHz, 0 dBmO network level with input amplifier gain set to 32 dB. typical value is maximum value ­ 16 dB. Connected to COBBA MIC2P input. The maximum value corresponds to1 kHz, 0 dBmO network level with input amplifier gain set to 32 dB. typical value is maximum value ­ 16 dB.

7

MICN

0.55

4.1

mV

RTC Backup Battery The RTC block in CCONT needs a power backup to keep the clock running when the phone battery is disconnected. The backup power is supplied from a rechargable polyacene battery that can keep the clock running minimum of 10 minutes. The backup battery is charged from the main battery through CHAPS.
Signal VBACK Parameter Backup battery charging from CHAPS Backup battery charging from CHAPS VBACK Backup battery supply to CCONT Backup battery supply to CCONT Min 3.02 100 2 80 Typ 3.15 200 Max 3.28 500 3.28 V uA V uA [email protected]­0.2V Battery capacity 65uAh Unit Notes

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Buzzer
Signal Maximum output current 2mA Input high level 2.5V Input low level 0.2V Level (PWM) range, % 0...50 (128 linear steps) Frequency range, Hz 440...4700

BuzzPWM / BUZZER

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Functional Description
Power Distribution
In normal operation the baseband is powered from the phone`s battery. The battery consists of three Nickel Metal Hydride cells. There is also a possibility to use batteries consisting of one Lithium­Ion cell. An external charger can be used for recharging the battery and supplying power to the phone. The charger can be either a standard charger that can deliver around 400 mA or so called performance charger, which can deliver supply current up to 850 mA. The baseband contains components that control power distribution to whole phone excluding those parts that use continuous battery supply. The battery feeds power directly to following parts of the system: CCONT, power amplifier, and UI (buzzer, display, keyboard lights, IR and vibra). Figure below shows a block diagram of the power distribution. The power management circuit CHAPS provides protection agains overvoltages, charger failures and pirate chargers etc. that would otherwise cause damage to the phone.

PA SUPPLY

RF SUPPLIES

VCOBBA COBBA UI VBAT VBB VBB PURX VBB CCONT PWRONX PWM CNTVR

VSIM SIM

RTC BACKUP

MAD + MEMORIES LIM CHAPS

VBAT

BATTERY

BASEBAND

VIN DC­jack

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NSE­6 System Module

Battery charging The electrical specifications give the idle voltages produced by the acceptable chargers at the DC connector input. The absolute maximum input voltage is 30V due to the transient suppressor that is protecting the charger input. At phone end there is no difference between a plug­in charger or a desktop charger. The DC­jack pins and bottom connector charging pads are connected together inside the phone.

MAD

LIM VOUT 0R22

TRANSCEIVER
1.5A VCH GND 47k 1u VIN

CHARGER

CHAPS
RSENSE PWM

30V

VBAT MAD CCONTINT

ICHAR PWM_OUT VCHAR

22k

CHRG_CTRL

NOT IN ACP­7

CCONT
GND

1n 4k7 L_GND

Startup Charging When a charger is connected, the CHAPS is supplying a startup current minimum of 130mA to the phone. The startup current provides initial charging to a phone with an empty battery. Startup circuit charges the battery until the battery voltage level is reaches 3.0V (+/­ 0.1V) and the CCONT releases the PURX reset signal and program execution starts. Charging mode is changed from startup charging to PWM charging that is controlled by the MCU software. If the battery voltage reaches 3.55V (3.75V maximum) before the program has taken control over the charging, the startup current is switched off. The startup current is switched on again when the battery voltage is sunken 100mV (nominal).
Parameter VOUT Start­ up mode cutoff limit VOUT Start­ up mode hysteresis NOTE: Cout = 4.7 uF Start­up regulator output current VOUT = 0V ... Vstart Symbol Vstart Vstarthys Istart Min 3.45 80 130 Typ 3.55 100 165 Max 3.75 200 200 Unit V mV mA

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Battery Overvoltage Protection Output overvoltage protection is used to protect phone from damage. This function is also used to define the protection cutoff voltage for different battery types (Li or Ni). The power switch is immediately turned OFF if the voltage in VOUT rises above the selected limit VLIM1 or VLIM2.
Parameter Output voltage cutoff limit (during transmission or Li­ battery) Output voltage cutoff limit (no transmission or Ni­battery) Symbol VLIM1 LIM input LOW Min 4.4 Typ 4.6 Max 4.8 Unit V

VLIM2

HIGH

4.8

5.0

5.2

V

The voltage limit (VLIM1 or VLIM2) is selected by logic LOW or logic HIGH on the CHAPS (N101) LIM­ input pin. Default value is lower limit VLIM1. When the switch in output overvoltage situation has once turned OFF, it stays OFF until the the battery voltage falls below VLIM1 (or VLIM2) and PWM = LOW is detected. The switch can be turned on again by setting PWM = HIGH.

VCH

VCH
t VOUT
VLIM1 or VLIM2

t SWITCH

ON

OFF

ON

PWM (32Hz)

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Battery Removal During Charging Output overvoltage protection is also needed in case the main battery is removed when charger connected or charger is connected before the battery is connected to the phone. With a charger connected, if VOUT exceeds VLIM1 (or VLIM2), CHAPS turns switch OFF until the charger input has sunken below Vpor (nominal 3.0V, maximum 3.4V). MCU software will stop the charging (turn off PWM) when it detects that battery has been removed. The CHAPS remains in protection state as long as PWM stays HIGH after the output overvoltage situation has occured.

VCH Vpor (Standard Charger)
VLIM Drop depends on load & C in phone Istart off due to VCH
VOUT

t PWM "1" "0" t SWITCH ON OFF 1 2 3 4 5 6 7 t

1. Battery removed, (standard) charger connected, VOUT rises (follows charger voltage) 2. VOUT exceeds limit VLIM(X), switch is turned immediately OFF 3. VOUT falls (because no battery) , also VCH Vpor and VOUT < VLIM(X) ­> switch turned on again (also PWM is still HIGH) and VOUT again exceeds VLIM(X). 4. Software sets PWM = LOW ­> CHAPS does not enter PWM mode 5. PWM low ­> Startup mode, startup current flows until Vstart limit reached 6. VOUT exceeds limit Vstart, Istart is turned off 7. VCH falls below Vpor

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Different PWM Frequencies ( 1Hz and 32 Hz) When a travel charger (2­ wire charger) is used, the power switch is turned ON and OFF by the PWM input when the PWM rate is 1Hz. When PWM is HIGH, the switch is ON and the output current Iout = charger current ­ CHAPS supply current. When PWM is LOW, the switch is OFF and the output current Iout = 0. To prevent the switching transients inducing noise in audio circuitry of the phone soft switching is used. The performance travel charger (3­ wire charger) is controlled with PWM at a frequency of 32Hz. When the PWM rate is 32Hz CHAPS keeps the power switch continuously in the ON state.

SWITCH

ON

OFF

ON

OFF

ON

PWM (1Hz)

SWITCH

ON

PWM (32Hz)

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Battery Identification Different battery types are identified by a pulldown resistor inside the battery pack. The BSI line inside transceiver has a 100k pullup to VBB. The MCU can identify the battery by reading the BSI line DC­voltage level with a CCONT (N100) A/D­converter.

BVOLT

BATTERY
BTEMP

VBB 2.8V

TRANSCEIVER
100k

BSI
Rs

10k

BSI
10n

CCONT

BGND

SIMCardDetX

MAD

The battery identification line is used also for battery removal detection. The BSI line is connected to a SIMCardDetX line of MAD2 (D200). SIMCardDetX is a threshold detector with a nominal input switching level 0.85xVcc for a rising edge and 0.55xVcc for a falling edge. The battery removal detection is used as a trigger to power down the SIM card before the power is lost. The BSI contact in the battery pack is made 0.7mm shorter than the supply voltage contacts so that there is a delay between battery removal detection and supply power off.

Vcc 0.850.05 Vcc 0.550.05 Vcc

SIMCARDDETX GND SIGOUT

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Battery Temperature The battery temperature is measured with a NTC inside the battery pack. The BTEMP line inside transceiver has a 100k pullup to VREF. The MCU can calculate the battery temperature by reading the BTEMP line DC­ voltage level with a CCONT (N100) A/D­converter.

BVOLT

BATTERY
BSI
VREF 1.5V

TRANSCEIVER

100k

BTEMP
RT NTC 1k 1k

10k

BTEMP

CCONT

BGND

10n

VibraPWM

MAD

MCUGenIO4

Supply Voltage Regulators The heart of the power distrubution is the CCONT. It includes all the voltage regulators and feeds the power to the whole system. The baseband digital parts are powered from the VBB regulator which provides 2.8V baseband supply. The baseband regulator is active always when the phone is powered on. The VBB baseband regulator feeds MAD and memories, COBBA digital parts and the LCD driver in the UI section. There is a separate regulator for a SIM card. The regulator is selectable between 3V and 5V and controlled by the SIMPwr line from MAD to CCONT. The COBBA analog parts are powered from a dedicated 2.8V supply VCOBBA. The CCONT supplies also 5V for RF. The CCONT contains a real time clock function, which is powered from a RTC backup when the main battery is disconnected.

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The RTC backup is rechargable polyacene battery, which has a capacity of 50uAh (@3V/2V) The battery is charged from the main battery voltage by the CHAPS when the main battery voltage is over 3.2V. The charging current is 200uA (nominal). Operating mode Power off Power on Reset Sleep Vref Off On On On RF REG Off On/Off Off VR1 On Off VCOBBA Off On On Off VBB Off On On On VSIM Off On Off On SIMIF Pull down On/Off Pull down On/Off

NOTE: CCONT includes also five additional 2.8V regulators providing power to the RF section. These regulators can be controlled either by the direct control signals from MAD or by the RF regulator control register in CCONT which MAD can update. Below are the listed the MAD control lines and the regulators they are controlling. ­ TxPwr controls VTX regulator (VR5) ­ RxPwr controls VRX regulator (VR2) ­ SynthPwr controls VSYN_1 and VSYN_2 regulators (VR4 and VR3) ­ VCXOPwr controls VXO regulator (VR1) CCONT generates also a 1.5 V reference voltage VREF to COBBA, SUMMA and CRFU. The VREF voltage is also used as a reference to some of the CCONT A/D converters. In additon to the above mentioned signals MAD includes also TXP control signal which goes to SUMMA power control block and to the power amplifier. The transmitter power control TXC is led from COBBA to SUMMA.

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Switched Mode Supply VSIM There is a switched mode supply for SIM­interface and 5V regulator, which supplies to RF section. SIM voltage is selected via serial IO. The 5V SMR can be switched on independently of the SIM voltage selection, but can't be switched off when VSIM voltage value is set to 5V. NOTE: VSIM and V5V can give together a total of 30mA. In the next figure the principle of the SMR / VSIM­functions is shown. CCONT V5V_4 VBAT V5V_3 External

V5V_2 VSIM 5V reg V5V 5V 5/3V

Power Up The baseband is powered up by: 1. Pressing the power key, that generates a PWRONX interrupt signal from the power key to the CCONT, which starts the power up procedure. Connecting a charger to the phone. The CCONT recognizes the charger from the VCHAR voltage and starts the power up procedure. A RTC interrupt. If the real time clock is set to alarm and the phone is switched off, the RTC generates an interrupt signal, when the alarm is gone off. The RTC interrupt signal is connected to the PWRONX line to give a power on signal to the CCONT just like the power key. A battery interrupt. Intelligent battery packs have a possibility to power up the phone. When the battery gives a short (10ms) voltage pulse through the BTEMP pin, the CCONT wakes up and starts the power on procedure. Original 08/98

2.

3.

4.

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NSE­6 System Module

Power up with a charger When the charger is connected CCONT will switch on the CCONT digital voltage as soon as the battery voltage exeeds 3.0V. The reset for CCONT's digital parts is released when the operating voltage is stabilized ( 50 us from switching on the voltages). Operating voltage for VCXO is also switched on. The counter in CCONT digital section will keep MAD in reset for 62 ms (PURX) to make sure that the clock provided by VCXO is stable. After this delay MAD reset is relased, and VCXO ­control (SLEEPX) is given to MAD. The diagram assumes empty battery, but the situation would be the same with full battery: When the phone is powered up with an empty battery pack using the standard charger, the charger may not supply enough current for standard powerup procedure and the powerup must be delayed. Power Up With The Power Switch (PWRONX) When the power on switch is pressed the PWRONX signal will go low. CCONT will switch on the CCONT digital section and VCXO as was the case with the charger driven power up. If PWRONX is low when the 64 ms delay expires, PURX is released and SLEEPX control goes to MAD. If PWRONX is not low when 64 ms expires, PURX will not be released, and CCONT will go to power off ( digital section will send power off signal to analog parts)

SLEEPX

PURX

CCPURX PWRONX VR1,VR6 VBB (2.8V) Vchar

1 2

3

1:Power switch pressed ==> Digital voltages on in CCONT (VBB) 2: CCONT digital reset released. VCXO turned on 3: 62 ms delay to see if power switch is still pressed.

Power Up by RTC RTC ( internal in CCONT) can power the phone up by changing RTCPwr to logical "1". RTCPwr is an internal signal from the CCONT digital section.

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Power Up by IBI IBI can power CCONT up by sending a short pulse to logical "1". RTCPwr is an internal signal from the CCONT digital section. Acting Dead If the phone is off when the charger is connected, the phone is powered on but enters a state called "acting dead". To the user the phone acts as if it was switched off. A battery charging alert is given and/or a battery charging indication on the display is shown to acknowledge the user that the battery is being charged. Active Mode In the active mode the phone is in normal operation, scanning for channels, listening to a base station, transmitting and processing information. All the CCONT regulators are operating. There are several substates in the active mode depending on if the phone is in burst reception, burst transmission, if DSP is working etc.. Sleep Mode In the sleep mode, all the regulators except the baseband VBB and the SIM card VSIM regulators are off. Sleep mode is activated by the MAD after MCU and DSP clocks have been switched off. The voltage regulators for the RF section are switched off and the VCXO power control, VCXOPwr is set low. In this state only the 32 kHz sleep clock oscillator in CCONT is running. The flash memory power down input is connected to the ExtSysResetX signal, and the flash is deep powered down during the sleep mode. The sleep mode is exited either by the expiration of a sleep clock counter in the MAD or by some external interrupt, generated by a charger connection, key press, headset connection etc. The MAD starts the wake up sequence and sets the VCXOPwr and ExtSysResetX control high. After VCXO settling time other regulators and clocks are enabled for active mode. If the battery pack is disconnect during the sleep mode, the CCONT pulls the SIM interface lines low as there is no time to wake up the MCU. Charging Charging can be performed in any operating mode. The charging algorithm is dependent on the used battery technology. The battery type is indicated by a resistor inside the battery pack. The resistor value corresponds to a specific battery capacity. This capacity value is related to the battery technology as different capacity values are achieved by using different battery technology. Original 08/98

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The battery voltage, temperature, size and current are measured by the CCONT controlled by the charging software running in the MAD. The power management circuitry controls the charging current delivered from the charger to the battery. Charging is controlled with a PWM input signal, generated by the CCONT. The PWM pulse width is controlled by the MAD and sent to the CCONT through a serial data bus. The battery voltage rise is limited by turning the CHAPS switch off when the battery voltage has reached 4.2V (LiIon) or 5.2V (NiMH, 5V in call mode). Charging current is monitored by measuring the voltage drop across a 220mohm resistor. Power Off The baseband is powered down by: 1. 2. 3. 4. Pressing the power key, that is monitored by the MAD via keyboard line (row 4), which starts the power down procedure. If the battery voltage is dropped below the operation limit, either by not charging it or by removing the battery. Letting the CCONT watchdog expire, which switches off all CCONT regulators and the phone is powered down. Setting the real time clock to power off the phone by a timer. The RTC generates an interrupt signal, when the alarm is gone off. The RTC interrupt signal is connected to the PWRONX line to give a power off signal to the CCONT just like the power key.

The power down is controlled by the MAD. When the power key has been pressed long enough or the battery voltage is dropped below the limit the MCU initiates a power down procedure and disconnects the SIM power. Then the MCU outputs a system reset signal and resets the DSP. If there is no charger connected the MCU writes a short delay to CCONT watchdog and resets itself. After the set delay the CCONT watchdog expires, which activates the PURX and all regulators are switched off and the phone is powered down by the CCONT. If a charger is connected when the power key is pressed the phone enters into the acting dead mode. Watchdog The Watchdog block inside CCONT contains a watchdog counter and some additional logic which are used for controlling the power on and power off procedures of CCONT. Watchdog output is disabled when WDDisX pin is tied low. The WD-counter runs during that time, though. Watchdog counter is reset internally to 32s at power up. Normally it is reset by MAD writing a control word to the WDReg. Watchdog counter can be disabled b grounding J111.

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Audio control
The audio control and processing is taken care by the COBBA­GJ, which contains the audio and RF codecs, and the MAD2, which contains the MCU, ASIC and DSP blocks handling and processing the audio signals. A detailed audio specification can be found from document
COBBA
Bias + EMC MICP/N Preamp Premult.

MAD DSP MCU

Multipl.

MIC2 MIC3 EMC + Acc. Interf. MIC3

Headset connector Slide

Pre & LP

A D

XMIC SGND XEAR

Amp AuxOut EMC HF EAR

Multipl.

UI Switch

LP

A

D
Buzzer

The baseband supports three microphone inputs and two earphone outputs. The inputs can be taken from an internal microphone, a headset microphone or from an external microphone signal source. The microphone signals from different sources are connected to separate inputs at the COBBA­GJ asic. Inputs for the microphone signals are differential type. The MIC3 inputs are used for a headset microphone that can be connected directly to the headset connector. The internal microphone is connected to MIC2 inputs. In COBBA there are also three audio signal outputs of which dual ended EAR lines are used for internal earpiece and HF line for accessory audio output. The third audio output AUXOUT is used only for bias supply to the headset microphone. As a difference to DCT2 generation the SGND does not supply audio signal (only common mode). Therefore there are no electrical loopback echo from downlink to uplink. The output for the internal earphone is a dual ended type output capable of driving a dynamic type speaker. The output for the headset is single ended with a dedicated signal ground SGND. Input and output signal source selection and gain control is performed inside the COBBA­GJ asic according to control messages from the MAD2. Keypad tones, DTMF, and other audio tones are generated and encoded by the MAD2 and transmitted to the COBBA­GJ for decoding.

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External Audio Connections The external audio connections are presented in figure below. A headset can be connected directly to the system connector. The headset microphone bias is supplied from COBBA AUXOUT output and fed to microphone through XMIC line. The 330ohm resistor from SGND line to AGND provides a return path for the bias current.

Baseband
47k 22k HookDet

2.8 V

MAD
22k HeadDet 1M 1u 100n

CCONT

EAD 1M

2.8 V

47k 47R AUXOUT 1m 10m H F 47R XEAR 2k2

HFC M

SGN D

COBBA
4k7 MIC1 N MIC1 P 33n MIC3 N MIC3 P XMI C

4k7 33n

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Analog Audio Accessory Detection In XEAR signal there is a 47 kW pullup in the transceiver and 6.8 kW pull­down to SGND in accessory. The XEAR is pulled down when an accessory is connected, and pulled up when disconnected. The XEAR is connected to the HookDet line (in MAD), an interrupt is given due to both connection and disconnection. There is filtering between XEAR and HookDet to prevent audio signal giving unwanted interrupts. External accessory notices powered­up phone by detecting voltage in XMIC line. In Table 23 there is a truth table for detection signals.
Accessory connected No accessory connected Headset HDC­9 with a button switch pressed Headset HDC­9 with a button switch released HookDet High Low High HeadDet High Low Low *) Notes Pullups in the transceiver XEAR and XMIC loaded (dc) XEAR unloaded (dc)

Headset Detection The external headset device is connected to the system connector, from which the signals are routed to COBBA headset microphone inputs and earphone outputs. In the XMIC line there is a (47 + 2.2) kW pullup in the transceiver. The microphone is a low resistance pulldown compared to the transceiver pullup. In the XEAR line there is a 47 kW pullup in the transceiver. The earphone is a low resistance pulldown compared to the transceiver pullup. When a remote control switch is open, there is a capacitor in series with the earphone, so the XEAR (and HookDet) is pulled up by the phone. When the switch is closed, the XEAR (and HookDet) is pulled down via the earphone. So both press and release of the button gives an interrupt. During a call there is a bias voltage (1.5 V) in the AUXOUT, and the HeadDet cannot be used. The headset interrupts should to be disabled during a call and the EAD line (AD converter in CCONT) should be polled to see if the headset is disconnected.

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Internal Audio Connections The speech coding functions are performed by the DSP in the MAD2 and the coded speech blocks are transferred to the COBBA­GJ for digital to analog conversion, down link direction. In the up link direction the PCM coded speech blocks are read from the COBBA­GJ by the DSP. There are two separate interfaces between MAD2 and COBBA­GJ: a parallel bus and a serial bus. The parallel bus has 12 data bits, 4 address bits, read and write strobes and a data available strobe. The parallel interface is used to transfer all the COBBA­GJ control information (both the RFI part and the audio part) and the transmit and receive samples. The serial interface between MAD2 and COBBA­GJ includes transmit and receive data, clock and frame synchronisation signals. It is used to transfer the PCM samples. The frame synchronisation frequency is 8 kHz which indicates the rate of the PCM samples and the clock frequency is 1 MHz. COBBA is generating both clocks. 4­wire PCM Serial Interface The interface consists of following signals: a PCM codec master clock (PCMDClk), a frame synchronization signal to DSP (PCMSClk), a codec transmit data line (PCMTX) and a codec receive data line (PCMRX). The COBBA­GJ generates the PCMDClk clock, which is supplied to DSP SIO. The COBBA­GJ also generates the PCMSClk signal to DSP by dividing the PCMDClk. The PCMDClk frequency is 1.000 MHz and is generated by dividing the RFIClk 13 MHz by 13. The COBBA­GJ further divides the PCMDClk by 125 to get a PCMSClk signal, 8.0 kHz. PCMDClk PCMSClk PCMTxData PCMRxData sign extended 15 14 13 sign extended MSB 12 MSB LSB 0 LSB

11

10

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Alert Signal Generation A buzzer is used for giving alerting tones and/or melodies as a signal of an incoming call. Also keypress and user function response beeps are generated with the buzzer. The buzzer is controlled with a BuzzerPWM output signal from the MAD. A dynamic type of buzzer must be used since the supply voltage available can not produce the required sound pressure for a piezo type buzzer. The low impedance buzzer is connected to an output transistor that gets drive current from the PWM output. The alert volume can be adjusted either by changing the pulse width causing the level to change or by changing the frequency to utilize the resonance frequency range of the buzzer. A vibra alerting device is used for giving silent signal to the user of an incoming call. The device is controlled with a VibraPWM output signal from the MAD2. The vibra alert can be adjusted either by changing the pulse width or by changing the pulse frequency.

Digital Control
The baseband functions are controlled by the MAD asic, which consists of a MCU, a system ASIC and a DSP. MAD2 MAD2 contains following building blocks: ­ ARM RISC processor with both 16­bit instruction set (THUMB mode) and 32­bit instruction set (ARM mode) ­ TI Lead DSP core with peripherials: ­ API (Arm Port Interface memory) for MCU­DSP communication, DSP code download, MCU interrupt handling vectors (in DSP RAM) and DSP booting ­ Serial port (connection to PCM) ­ Timer ­ DSP memory ­ BUSC (BusController for controlling accesses from ARM to API, System Logic and MCU external memories, both 8­ and 16­bit memories) ­ System Logic ­ CTSI (Clock, Timing, Sleep and Interrupt control) ­ MCUIF (Interface to ARM via BUSC). Contains MCU BootROM ­ DSPIF (Interface to DSP) ­ MFI (Interface to COBBA AD/DA Converters) ­ CODER (Block encoding/decoding and A51&A52 ciphering) Original 08/98

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­ AccIF(Accessory Interface) ­ SCU (Synthesizer Control Unit for controlling 2 separate synthesizer) ­ UIF (Keyboard interface, serial control interface for COBBA PCM Codec, LCD Driver and CCONT) ­ SIMI (SimCard interface with enhanched features) ­ PUP (Parallel IO, USART and PWM control unit for vibra and buzzer) The MAD2 operates from a 13 MHz system clock, which is generated from the 13Mhz VCXO frequency. The MAD2 supplies a 6,5MHz or a 13MHz internal clock for the MCU and system logic blocks and a 13MHz clock for the DSP, where it is multiplied to 52 MHz DSP clock. The system clock can be stopped for a system sleep mode by disabling the VCXO supply power from the CCONT regulator output. The CCONT provides a 32kHz sleep clock for internal use and to the MAD2, which is used for the sleep mode timing. The sleep clock is active when there is a battery voltage available i.e. always when the battery is connected.

Pin N:o B1

Pin Name

Pin Type O

Connected to/from Audio

Drive req. mA 2

Reset State 0

Note

Explanation

MCUGenOut5

MCU General purpose output port MCU General purpose output port Lead Ground MCU General purpose output port IO VCC in 3325c10 Power MCU General purpose output port MCU General purpose output port LoByteSelX in 16­bit mode programmable pullup PR0201 MCU General purpose output port I/O line for keyboard column 4

C2

MCUGenOut4

O

N101

2

0

C1 D3

LEADGND
MCUGenOut3 O 2 0

D2 D1

VCC MCUGenOut2 O 2 0

E3

MCUGenOut1

O

MCU memory

2

0

E2

MCUGenOut0

O

2

1

E1

Col4

I/O

UIF

2

Input

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Pin N:o F3

Pin Name

Pin Type I/O

Connected to/from UIF

Drive req. mA 2

Reset State Input

Note

Explanation

Col3

programmable pullup PR0201

I/O line for keyboard column 3 Ground

F2 F1

GND Col2 I/O UIF 2 Input programmable pullup PR0201 programmable pullup PR0201 programmable pullup PR0201 external pullup/down

I/O line for keyboard column 2 I/O line for keyboard column 1 I/O line for keyboard column 0 serial LCD driver chip select, parallel LCD driver enable Lead Power

G4

Col1

I/O

UIF

2

Input

G3

Col0

I/O

UIF

2

Input

G2

LCDCSX

I/O

UIF

2

Input

G1 H1

LEADVCC
Row5LCDCD I/O UIF 2 Input, pullup pullup PR0201

Keyboard row5 data I/O , serial LCD driver command/data indicator, parallel LCD driver read/ write select Power I/O line for keyboard row 4, parallel LCD driver register selection control I/O line for keyboard row 3, parallel LCD driver data I/O line for keyboard row 2, parallel LCD driver data I/O line for keyboard row 1, parallel LCD driver data I/O line for keyboard row 0, parallel LCD driver data

H4 H3

VCC Row4 I/O UIF 2 Input, pullup

Core VCC in 3325c10 pullup PR0201

H2

Row3

I/O

UIF

2

Input, pullup

pullup PR0201

J1

Row2

I/O

UIF

2

Input, pullup

pullup PR0201

J4

Row1

I/O

UIF

2

Input, pullup

pullup PR0201

J3

Row0

I/O

UIF

2

Input, pullup

pullup PR0201

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Pin N:o J2 K1 K2

Pin Name

Pin Type O

Connected to/from

Drive req. mA 2

Reset State Tri­ state

Note

Explanation

JTDO GND JTRst

JTAG data out Ground

I

Input, pulldown Input Input, pullup Input, pullup

pulldown PD0201 pulldown PD0201 pullup PR0201 pullup PR0201 IO VCC in 3325c10

JTAG reset

K4 K3 L1 L2 L3 L4 M1

JTClk JTDI JTMS VCC CoEmu0 CoEmu1 MCUGenIO7

I I I

JTAG Clock JTAG data in JTAG mode select Power DSP/MCU emulation port 0 DSP/MCU emulation port 1 General purpose I/O port Lights

I/O I/O I/O

2 2 2

Input, pullup Input, pullup Input, pulldown Input, pulldown

pullup PR0201 pullup PR0201 pulldown PD1001 pulldown PD1001

M2

MCUGenIO6

I/O

UI

2

M3 N1

LEADGND
MCUGenIO5 I/O UI 2 Input, pulldown pulldown PD1001

Lead Ground LCD reset

N2 N3 P1 P2 P3 R1 R2 T1 U2

ARMGND
MCUAd0 O MCU MEMORY 2 0

ARM Ground MCU address bus ARM Power O O MCU MEMORY MCU MEMORY 2 2 0 0 MCU address bus MCU address bus Ground O O O MCU MEMORY MCU MEMORY MCU MEMORY 2 2 2 0 0 0 MCU address bus MCU address bus MCU address bus

ARMVCC
MCUAd1 MCUAd2 GND MCUAd3 MCUAd4 MCUAd5

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Pin N:o T3 U3 R4 T4 U4 R5 T5 U5 R6 T6 U6 P7 R7 T7 U7 U8 P8 R8 T8 U9 P9 R9 T9

Pin Name

Pin Type O

Connected to/from MCU MEMORY

Drive req. mA 2

Reset State 0

Note

Explanation

MCUAd6 VCC MCUAd7 MCUAd8 MCUAd9 MCUAd10 GND MCUAd11 MCUAd12 MCUAd13 MCUAd14 MCUAd15 MCUAd16 VCC MCUAd17 MCUAd18 MCUAd19 MCUAd20 MCUAd21 ExtMCUDa0 GND ExtMCUDa1 ExtMCUDa2

MCU address bus IO VCC in 3325c10 Power MCU address bus MCU address bus MCU address bus MCU address bus Ground

O O O O

MCU MEMORY MCU MEMORY MCU MEMORY MCU MEMORY

2 2 2 2

0 0 0 0

O O O O O O

MCU MEMORY MCU MEMORY MCU MEMORY MCU MEMORY MCU MEMORY MCU MEMORY

2 2 2 2 2 2

0 0 0 0 0 0 Core VCC in 3325c10

MCU address bus MCU address bus MCU address bus MCU address bus MCU address bus MCU address bus Power MCU address bus MCU address bus MCU address bus MCU address bus MCU address bus MCU data bus Ground

O O O O O I/O

MCU MEMORY MCU MEMORY MCU MEMORY MCU MEMORY MCU MEMORY MCU MEMORY

2 2 2 2 2 2

0 0 0 0 0 Input

I/O I/O

MCU MEMORY MCU MEMORY

2 2

Output Output

MCU data bus MCU data bus

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NSE­6 System Module

Pin N:o U10 T10 P10 R10 U11 T11 R11 P11 U12 T12 R12 U13 T13 R13 U14 T14 R14 U15 T15 U16 T17

Pin Name

Pin Type I/O I/O I/O I/O

Connected to/from MCU MEMORY MCU MEMORY MCU MEMORY MCU MEMORY

Drive req. mA 2 2 2 2

Reset State Output Output Output Output

Note

Explanation

ExtMCUDa3 ExtMCUDa4 ExtMCUDa5 ExtMCUDa6 VCC ExtMCUDa7 MCUGenIO8 MCUGenIO9 MCUGenIO10 MCUGenIO11 GND MCUGenIO12 MCUGenIO13 MCUGenIO14 MCUGenIO15 MCURdX VCC MCUWrX ROM1SelX RAMSelX ROM2SelX

MCU data bus MCU data bus MCU data bus MCU data bus IO VCC in 3325c10 Power MCU data bus MCU Data in 16­bit mode MCU Data in 16­bit mode MCU Data in 16­bit mode MCU Data in 16­bit mode MCU Data in 16­bit mode MCU Data in 16­bit mode MCU Data in 16­bit mode MCU Data in 16­bit mode General purpose I/O port General purpose I/O port General purpose I/O port General purpose I/O port Ground General purpose I/O port General purpose I/O port General purpose I/O port General purpose I/O port MCU Read strobe Core VCC in 3325c10 Power MCU write strobe ROM chip select RAM chip select Extra chip select, can be used as MCU general output pullup PR0201 General purpose I/O port External flag

I/O I/O I/O I/O I/O

MCU MEMORY

2 2 2 2 2

Output Input Input Input Input

I/O I/O I/O I/O O MCU MEMORY

2 2 2 2 2

Input Input Input Input 1

O O O O

MCU MEMORY MCU ROM MCU RAM MCU ROM2

2 2 2 2

1 1 1 1

R16 R17

MCUGenIO1 DSPXF

I/O O

2 2

Input, pullup 1

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Pin N:o P15 P16 P17

Pin Name

Pin Type

Connected to/from

Drive req. mA

Reset State

Note

Explanation

SCVCC
RFClk RFClkGnd I VCXO Input Input

Special cell Power System clock from VCTCXO System clock reference ground input SIM card detection Special cell Ground O BUZZER 2 0 Buzzer PWM control LEAD Power O VIBRA 2 0 Vibra PWM control Ground I/O I/O O EEPROM EEPROM MCU EEPROM 2 2 2 Input, pullup Input, pullup 1 pullup PR1001 pullup PR1001 WP SCL Not used, can be used as MCU general output external pullup IO VCC in 3325c10 I I Input Input Accessory TX data, Flash_TX Power General purpose interrupt Non­MBUS accessory connection detector Headset detection interrupt Accessory RX data, Flash_RX Ground I/O 2 Input, pulldown Input, external pullup pulldown PD1001 external pullup General purpose I/O port, BATTI/ O MBUS, Flash clock

N15 N16 N17 M15 M16 M17 L14 L15 L16

SIMCardDetX

I

Input

SCGND
BuzzPWM

LEADVCC
VibraPWM GND MCUGenIO3 MCUGenIO2 EEPROMSelX

L17 K17 K14 K15

AccTxData VCC GenDet HookDet

I/O

4

Tri­ State

K16 J17 J14 J15

HeadDet AccRxData GND MCUGenIO4

I I

Input Input

J16

MBUS

I/O

2

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NSE­6 System Module

Pin N:o H17 H16 H14 H15 G17 G16

Pin Name

Pin Type O O

Connected to/from CCONT CCONT

Drive req. mA 2 2

Reset State 1 0

Note

Explanation

VCXOPwr SynthPwr VCC GenCCONTCSX

VCXO regulator control Synthesizer regulator control Core VCC in 3325c10 Power Chip select to CCONT LEAD Ground

O

CCONT

2

1

LEADGND
GenSDIO I/O CCONT, UIF 2 Input, external pullup/ down 0 0 external pullup/down depending on how to boot

Serial data in/out

G15 G14 F17 F16 F15 E17 E16 E15 D17 D16 D15 C17 C16 B17 A16

GenSClk SIMCardData GND PURX CCONTInt Clk32k VCC SIMCardClk SIMCardRstX SIMCardIOC SIMCardPwr

O I/O

CCONT, UIF CCONT

2 2

Serial clock SIM data Ground

I I I

CCONT CCONT CCONT

Input Input Input IO VCC in 3325c10

Power Up Reset CCONT interrupt Sleep clock oscillator input Power SIM clock SIM reset SIM data in/out control SIM power control LEAD Power

O O O O

CCONT CCONT CCONT CCONT

2 2 2 2

0 0 0 0

LEADVCC
RxPwr TxPwr TestMode O O I CCONT CCONT 2 2 0 0 Input, pulldown 2 COBBA 2 0 0 IO VCC in 3325c10 pulldown PD0201

RX regulator control TX regulator control Test mode select

B15 A15 C14

ExtSysResetX PCMTxData VCC

O O

System Reset Transmit data, DX Power

Original 08/98

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Pin N:o B14 A14 C13 B13 A13 C12 B12 A12 D11 C11 B11 A11 A10 D10 C10 B10 A9 D9 C9 B9 A8 B8 D8 C8 A7 B7 C7

Pin Name

Pin Type I I I I

Connected to/from COBBA COBBA COBBA COBBA

Drive req. mA

Reset State Input Input Input Input

Note

Explanation

PCMRxData PCMDClk PCMSClk COBBADAX GND COBBAWrX COBBARdX COBBAClk COBBAAd3 COBBAAd2 COBBAAd1 COBBAAd0 COBBADa11 VCC COBBADa10 COBBADa9 COBBADa8 COBBADa7 COBBADa6 GND COBBADa5 COBBADa4 COBBADa3 COBBADa2 COBBADa1 COBBADa0 DSPGenOut5

Receive data, RX Transmit clock, CLKX Transmitframe sync, FSX Data available acknowledge Ground

O O O O O O O I/O

COBBA COBBA COBBA COBBA COBBA COBBA COBBA COBBA

2 2 4 2 2 2 2 2

1 1 1 0 0 0 0 0 Core VCC in 3325c10

COBBA write strobe COBBA read strobe COBBA clock, 13 MHz COBBA address bit COBBA address bit COBBA address bit COBBA address bit COBBA data bit Power COBBA data bit COBBA data bit COBBA data bit COBBA data bit COBBA data bit Ground

I/O I/O I/O I/O I/O

COBBA COBBA COBBA COBBA COBBA

2 2 2 2 2

0 0 0 0 0

I/O I/O I/O I/O I/O I/O O

COBBA COBBA COBBA COBBA COBBA COBBA RF

2 2 2 2 2 2 2

0 0 0 0 0 0 0

COBBA data bit COBBA data bit COBBA data bit COBBA data bit COBBA data bit COBBA data bit DSP general purpose output, COBBA reset

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NSE­6 System Module

Pin N:o D7 A6 B6 C6 A5 B5 C5 A4 B4 C4 A3 B3 A2

Pin Name

Pin Type

Connected to/from

Drive req. mA

Reset State

Note

Explanation

VCC DSPGenOut4 DSPGenOut3 DSPGenOut2 DSPGenOut1 DSPGenOut0 MCUGenIO0 FrACtrl GND SynthEna SynthClk SynthData TxPA O O O O SUMMA SUMMA SUMMA SUMMA, power amplifier 2 2 2 2 0 0 0 0 O O O O O I/O O EEPROM RF IR 2 2 2 2 2 2 2 0 0 0 0 0 Input, pullup 0

IO VCC in 3325c10

Power DSP general purpose output IR ON DSP general purpose output DSP general purpose output DSP general purpose output

pullup PR0201

EEPROM serial data SDA SDATX0 Ground Synthesizer data enable Synthesizer clock Synthesizer data Power amplifier control

Original 08/98

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Memories The MCU program code resides in an external flash program memory, which size is 16 Mbits (1024kx16bit). The MCU work (data) memory size is 2Mbits (128kx16bit). A serial EEPROM is used for storing the system and tuning parameters, user settings and selections, a scratch pad and a short code memory. The EEPROM size is 256kbits (32kx8bit). The BusController (BUSC) section in the MAD decodes the chip select signals for the external memory devices and the system logic. BUSC controls internal and external bus drivers and multiplexers connected to the MCU data bus. The MCU address space is divided into access areas with separate chip select signals. BUSC supports a programmable number of wait states for each memory range. Program Memory The program memory size is 16 Mbits (1024kx16bit). The flash memory has a power down pin that should be kept low, during the power up phase of the flash to ensure that the device is powered up in the correct state, read only. The power down pin is utilized in the system sleep mode by connecting the ExtSysResetX to the flash power down pin to minimize the flash power consumption during the sleep. SRAM Memory The work memory is a static ram of size 2Mbits (128kx16bit) in a shrink MBGA48 package. The work memory is supplied from the common baseband VBB voltage and the memory contents are lost when the baseband voltage is switched off. All retainable data should be stored into the EEPROM (or flash) when the phone is powered down. EEPROM Memory An EEPROM is used for a nonvolatile data memory to store the tuning parameters and phone setup information. The short code memory for storing user defined information is also implemented in the EEPROM. The EEPROM size is 256kbits (32kx8bit). The memory is accessed through a serial bus and the default package is SO8. MCU Memory Map MAD2 supports maximum of 4GB internal and 4MB external address space. External memories use address lines MCUAd0 to MCUAd21 and 16­bit databus. The BUSC bus controller supports 8­ and 16­bit access for byte, double byte, word and double word data. Access wait state 2 and used databus width can be selected separately for each memory block. Original 08/98

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Flash Programming The preprogrammable phone has to be connected to the flash loading adapter (FLA­5) via modular cable (XCM­5). When FLA­5 switches supply voltage to the service box (JBU­5), a short pulse (IBI pulse) is generated to the power supply circuit via BTEMP line. The power supply circuit (N100) switches power on and releases MCU (MAD2) from reset state (power up reset, PURX rises up to 1 (2.8 V). The program execution starts from the internal boot ROM of MAD2 and MCU investigates the status of the MBUS line. Normally this line is high (2.8 V) because of pull up resistor R115, but when the flash program adapter is connected, the MBUS line is forced low. When MCU has recognized the flash loading adapter (MBUS line is low), it gives program start (MCU boot) information to the flash loading adapter by forcing flash_tx (FBUS_TX) line low. The flash prommer sends all needed data for flash programming to phone via flash_rx (FBUS_RX) line. The phone (MCU) sends all programming acknowlegment signals for flash prommer via flash_tx (FBUS_TX) line. The acknowlegment information (rising and falling edge of flash_tx line) signal is sent to flash prommer when each step of flash programming is passed. Flash_tx line is also used to send hardware configuration information (flash type etc.) to the flash prommer. Flash_tx and flash_rx data is synchronized to flash clock signal, which is sent from the flash prommer to phone via flash clock line (MBUS). The flash programming voltage (VPP) is generated internally. Switchable voltage regulator N201 (or N202) is used to generate flash programming voltage for the program memory (D220). The regulator is controlled by MCU (MAD2) via MCUGenOutput pin 1. The input voltage for the flash programming voltage regulator is taken from output of charger pump (J224) of power supply circuit CCONT (N100). The programming voltage (3 V +/­ 10 %) is supplied via UI connector X303 (pins 1,3) to the program memory D220. Thus the flash programming voltage (VPP) is switched on only during the flash erasing and programming states. COBBA­GJ The COBBA­GJ provides an interface between the baseband and the RF­circuitry. COBBA­GJ performs analogue to digital conversion of the receive signal. For transmit path COBBA_GJ performs digital to analogue conversion of the transmit amplifier power control ramp and the in­phase and quadrature signals. A slow speed digital to analogue converter will provide automatic frequency control (AFC). The COBBA asic is at any time connected to MAD asic with two interfaces, one for transferring tx and rx data between MAD and COBBA and one for transferring codec rx/tx samples.

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Real Time Clock Requirements for a real time clock implementation are a basic clock (hours and minutes), a calender and a timer with alarm and power on/off ­function and miscellaneous calls. The RTC will contain only the time base and the alarm timer but all other functions will be implemented with the MCU software. The RTC needs a power backup to keep the clock running when the phone battery is disconnected. The backup power is supplied from a rechargable polyacene battery that can keep the clock running some ten minutes. If the backup has expire