SchAL_DCSST85_A2_C_L3_V1.2.pdf part of Motorola StarTac StarTac.rar, Star Tac mobile phone Service Manual text manual preview

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DCS StarTAC AUDIO LOGIC BLOCK DIAGRAM
to U501, 42 RX_EN 217 Hz WAVEFORM NEEDED HERE ! 38 83 DUAL_CS 85 12 6 121 14 DP_EN RAM2CS U702 Eprom J101, 21 U704 SRam U704 SRam U702 20 37 17 48 35

LOGIC BOARD SIGNALS
Measured in standby mode
2.8mVpp 10ms / cm

13_DCLK_B
from U201, 59

+ 2.75V

RESET EEPROM U705 FLASH 26 U702 16

SRAM U704

42 43

RAM2_CS RAM1_CS TX_EN
7Vpp 10ms / cm

From the CPU (U701). When high, Rx path enabled and low muted. 1. Enables the Rf switch (U400) for receive mode. 2. Biases the mixer Q420, and low noise amp (Q421). From CPU (U701), but inverted by Q501. High when 1. Enable the Rf switch for transmit mode & also the GIFSYN for transmit mode. 2. Supply Voltage for the PAC IC. 3. Isolates RF, by switching the PA Bias Circuitry ( Not shown). Controlled at power up by GCAP (U900) & CPU (U701). 1. Connected to CPU (U701), BIC (U703), Modem (U501) & Speech coder (U801). After power up sequence, any chip can hold RESET low to power phone off if there is a problem.

SPI DATA BUS
RX_ACQ to U501 DM_CS TX_KEY MDM_RD MDM_WR

RESET

power on

2,8Vrms 200ms / cm

Y701
to U201, 97 RF_START RESET RX_EN 1, 3, 97 41 120

U701 CALL PROCESSOR

RAM1CS ROM1CS

From CPU (U701) to Eprom.

DATA BUS ADDRESSS BUS
32 31 34 33 38 from J601, 11 40 39

U703 BIC
A/D
46

DATA BUS

ROM1_CS DUAL_CS

DUAL_CS

2.8Vpp 100ns / cm

1. Chip Enable controlling read/write access to and from Eprom (U702).

RAM1_CS

2.8Vpp 100ns / cm

From CPU (U701) to SRAM. 1. Chip Enable controlling read/write access to and from 1st half of SRAM (U704).

ADDRESSS BUS D/A
64 58 1 U701, 16 BATT_SENSE DAC_OUT ROM1_CS
2.8Vpp 100ns / cm From CPU (U701) to Eprom. 1. Chip Enable controlling read/write access to and from Eprom (U702).

RAM2_CS

2.8Vpp 100ns / cm

From CPU (U701) to SRAM. 1. Chip Enable controlling read/write access to and from 2nd half of SRAM (U704).

32.768 kHz

UPLINK (non-voiced data)

DOWNLINK (non-voiced data)

94 95 92 SC_INT 5 48

16

SCI_RX

46

49

37, 108-114

+ 2,75V BATT_FDBK

6
A D_THERM BATT_GN D BATT+

11
DA TA

DP_EN

start up or press key

2.8Vpp 100ns / cm

From CPU (U701) to display, via connector J101. 1. Processor selects to enable display. When high, the display is enabled and low disabled.

ADDRESSS BUS

DATA BUS

MF_INT BIC_INT

SC_INT

start up or press key 2.8Vpp 2ns / cm

Speech Coder Interface. This is a signal from uP (U701) to Speech Coder (U801). 1) This is a 20ms timing signal from U701 which times the decoding and encoding function of the Speech Coder U801.

CR605 EARPIECE (Onl y avail abl e with a compl ete fl ip assembl y)

R2.75V TX_EN
C E

D OWN LIN K_AUD

Q501

B

+ 2,75V

J600
U PLIN K_AUD

14
EXT_B+

12

11

4 Q601 Q602

J601
1-5 12-16

Doubler_EN

power on

2.8vpp 100ms / cm

From CPU (U701) to Clock Doubler U805. 1) This signal enables the Clock Doubler U805 which doubles the 13MHz clock to 26MHz to time the Speech Coder. When high U805 is enabled and low disabled.

MF_INT

2.8Vpp 1ms / cm

From BIC to uP. This signal periodically interrupts the uP at 217Hz. During Power Saving mode this signal is set to DC. From BIC to uP. This signal interrupts the uP for a number of reasons. 1. Keypad detection 2. Power Sense 3. SIM Functions 4. DSC Bus Status Indicators From butt plug (J600) to BIC chip (U703). This is a comms link from an external peripherale and the phone, . and could be either data information or speech information. It is also used to sense the presence of a DHFA and the ignition status of the DHFA with DC levels

7, 19, 26, 50, 56 66, 75, 85, 100

Encoded Voice Data

U801 SPEECH CODER
78 84

R602
15

BIC_INT

press a key

2.8Vpp 50us / cm

CODEC
13 8 3

CHARGER

17 47 MIC 1 2

16 18 19 1 10

U803
A/D D/A VAG

ISENSE
-

UPLINK

2.8Vpp 10us / cm

9

J802

J601
8 7
ALERT

DOWNLINK

4

21

+ -1

RX / TX SIGNAL PROCESSING
DOUBLER_EN

+

5Vpp 10us / cm

20 19 5

From BIC chip (U703) to butt plug (J600). This is a comms link from an external peripherale and the phone, . and could be either data information or speech information. It is also used to sense the presence of a DHFA and the ignition status of the DHFA with DC levels From GIF Syn to BIC IC - 13MHz clock.. This is the master clock reference required for the radio

CLK_13_IN

1.6Vpp 50ns / cm

6 5 MUX 3

+

B+

VSWITCH V3
28 22

Measured in test mode
AUDIO IN
test mode 08#, 10#, 36# 434#, 477# 2.7Vpp 5us / cm

U804 3 5

R+2.75V
External audio from butt plug, directly to Speech Coder IC

SC_INT

45

512 KHz 81 8 KHz 43 CLK_AUD VERIFY THESE WAVEFORMS FS_AUD

MULTIPLEXER U802

25, 40

DC - DC V2 L+2.75V T902 VSWITCH 3.85V L500 R475 RESET

37 3

AUDIO OUT

test mode 08#, 10#, 36# 434#, 477#

2.8Vpp 5us / cm

External audio from Speech Coder via GCAP to butt plug

4

DOUBLER U805 X2 Multiplexer 6 26 MHz 37

U900

32, 41 30

2 13_DCLK_B

GCAP

CLK_AUD

2.8Vpp 5us / cm

This signal is from the BIC to the Speech Coder It is a timing signal and runs at 512KHz, and times the transfer of speech information on the DSC Bus between BIC and Speech Coder.

AL LAYER - ORDERABLE SPARES
Part Designator A2 / A3 AL800 CR605 J101 J600 J601 J802 J900 MIC Q501 Q601 Q602 R602 Part Description Ground clips Ant. tube Alert Diode / Charger 32 Pin Display Connector 15 Pin Extern Connector Flip Flexprint Connector Microphone Connector SIM Connector Microphone Transitor TX_EN Power Transistor Charger Transistor Batt Feedback Resisor / Charger Sensing Part Number 4209480E01 5009473S01 4809653F03 2809454C02 0909449B04 0909059E01 0909195E01 4009169E01 5009536H15 4809607E05 4809579E17 4809939C04 0680195M64 Part Designator T902 U703 U704 U801 U802 U803 U804 U805 U900 Y701 U702 S1 - S3 SH25 - 27 Part Description Choke / Vswitch IC BIC IC SRAM IC Speech Coder IC Multiplexer Codec IC IC Buffer IC Frquency Doubler IC GCAP XTAL 32.768KHZ Flashed Eprom (boot sector) Volume / Mute Switch Ground Clips Part Number 2509306J01 5109743E13 5109688L09 5199285C01 5109632D44 5109920D15 5109522E10 5109781E47 5109632D69 4809995L05 5102486T01 4009060E01 4204774Z01

TEST COMMANDS
# press 2 sec. 01 # 07 # 08 # 09 # 10 # 11 # 12 # 19 # 20 # 22 # 25 # 26xxxx # 31x # 33xxx # 36 # 37 # 45xxx # 46 # 47x # 58 / xxxxxx # 59 / xxx # 60 # Enter Manual Test Mode Exit Manual Test Mode Mute Rx Audio Path Unmute Rx Audio Path Mute Tx Audio Path Unmute Tx Audio Path Program Main Local Osc. to Channelbb Set Tx Power level to fixed valure Display SW Version Number of Call Processor Display SW Version Number of Modem Display SW Version Number of Speech Coder Set Continuous AGC Set Continuous AFC Initiate Pseudo-Random Sequence with Midamble Synchronize to BCH Carrier Initiate Acoustic Loopback Stop Test Serving Cell Power Level Display Current Valure od AFC DAC Set Audio Volume Display / Modify Security Code Display / Modify Lock Code Display IMEI

RX SIGNAL PATH TX SIGNAL PATH MAIN VCO SIGNAL PATH TUNING VOLTAGES REFERENCE CLOCK Orderable Part Non - Orderable Part

FS_AUD

2.8Vpp 5us / cm

This signal is from the BIC to the Speech Coder IC. It is a timing signal at 8KHz and provides for frame synchronisation during speech transfer on the DSC bus.

REVISIONS
Europe Middle East & Africa Customer Services LEVEL 3 COLOUR DIAGRAMS DCS StarTAC Colin Jack, Michael Hansen, Billy Jenkins, Ralf Lorenzen Page 1 of 2 03.07.98 Rev. 1.2

Motorola Confidential Proprietary

DCS StarTAC RF BLOCK DIAGRAM
R275V DM_CS B+ 1747,8 MHz 14 (- 4 dB) RF ATTN 1747,8 MHz R393 TX VCO C Q300 (+15dB) 11-15 EXITER RX 2.75 Supplies 13 MHz oscillator PLL dividers & U501 DAC references PLL_VCC Q203 4 MAIN _VCO (1627,8 CH 700) RF ATTN (-8dB) R221 S G Q202 B+ S G V 2_OUT 19 M AIN _VCC 25 REG_SPLY 17 V I_DRIVE 13 V 2_D RIV E 18 OFST_CP 10 LIM _OUT 4 CR 203 TX OFFSET LOCAL OSCILLATOR 240 MHz to U310, 8 AOC D 120 MHz from U310, 12 to U310, 11 TX_EN 1 TX_KEY B CR300 Low CH.= 1.50 Vdc Mid. CH.= 1.74 Vdc High CH.= 1.87 Vdc

RF BOARD SIGNALS
Tx SIGNALS - 11062#, 1215#, 310#
Frequency 217Hz - 1ms/cm
SAT_DET
3Vpp

ANT

U301 IPA

(+15dB) 7 C Q303 B

U300 / TIC
8 CHARGE PUMP PHASE DET.

7 9,10 2 ,12

CR390

DM_CS R475 R275

Signal from PAC to Speech Coder. When PA is at or near saturation signal is low, telling Speech Coder to reduce AOC drive When the PA is not near saturation this is high, telling Speech Coder to increase AOC drive. Signal from the Speech Coder to the PAC When this signal is low, the internal gain in the PAC is unity. When this signal is high, the internal gain in the PAC is 1. From uP to PAC. This is a timing signal to the PAC to provide the current path for the initial loop precharge Signal from SMOC to PAC. This is a linear control voltage for ramp up and ramp down of the PA output level. This controls the voltage on the exciter control output (EXC) from the PAC. Signal from uP but inverted via Q502 and used to time:1. GIF SYN 2. TIC Enables Tx Path when high 3. RF Switch Signal from uP inverted via Q504. Enables TX VCO. When high, this enables Tx path. From Speech Coder IC to GIF SYN This signal is the in-phase input to the I-Q Modulator of the GIF SYN.

DET_SW

Power Step: 04-11 - 50mVpp 12-15 - 900mVpp

2,75Vpp

D 4 7 6 3 5 RF_IN 2

U400

Power Step: 04 - 520mVpp 15 - 280mVpp

2 7

U310
DET
14 12 SAT_DET 11 10 8 TX_EN from U701 pin 5 inverted by Q501

3Vpp

Supplies limitor amps 2nd LO, IF circuts& references

DM_CS D ET_SW 66 13_DCLK_B 42 from U703, 37 TXI

Q443

Q442

60

A OC_OU T 33

SAT_DET 67

SW_RF from J400 pin 16

2,8Vpp

2.1Vpp

DET_SW

TX_KEY

TX_EN RX_EN from U701 from U701 pin 21 pin 5, & inverted by Q501

SUPER FILTER

OFST_E 6 OFST_B 7

Osc. discrete circuty
73

TXQ RESET

2.1Vpp

From Speech Coder IC to GIF SYN This signal is the quadrature input to the I-Q Modulator of the GIF SYN.

Vref from U900, 11 AOC_DRIVE SUPER FILTER VOLTAGE

16 U310, 10 21 SF_OUT 26 PRSC_IN Low CH.= 2,02 Vdc Mid. CH.= 2,55 Vdc High CH.= 1.81 Vdc TXQ 61 TXI 63 TXQ_P TXI_P 21 69 24 TX_KEY from U701, 6 MDM_RD DM_CS

Modem Callprocessor Interface
2,8Vpp 500us/cm

MAIN VCO

1590 - 1665 MHz -24dBm CR 250

From uP to SSpeech Coder. This signal indicates when the uP is reading data from the Speech Coder. High when enabled.

Q250

23 MAIN_CP

RF_SCK SPI_CLK 53 RF_SPI SPI_DATA 52 RF_START 51 78 77

9

FL 451

(- 3.5dBm)

1627,8 MHz (CH 700) Q251 Q252 LOOP FILTER

MODEM U501

MDM_WR RX_ACQ 17

2,8Vpp 500us/cm

From uP to Speech Coder. This signal indicates when the uP is writing data to the Speech Coder. High when enabled.

Rx SIGNALS - In Standby Mode
R275V RX_ACQ MDM_RD MDM_WR RF_START
2,8Vpp 20us/cm 2,8Vpp 500us/cm

CR 431 43 LO2_CP RX LOCAL OSCILLATOR 41 LO2_BASE 430MHz 42 LO2_EMITTER

GIF_SYN U201

2, 5,10,18 25, 41, 44, 45, 53, 64, 70 B+ 75 R475V 15 14 16 CR 201 76

17 11, 22, 44 RXI 46 RXQ 48 IQ_REF 47 59 CLK_OU T

From uP to Speech Coder This is an interrupt from the uP to the Speech Coder. When high this indicates to the Speech Coder the beginning of the receive burst. From uP to GIF SYN Signal to drive the GIFSYN IC. This is a pulsed signal which controls the sending of SPI data to the GIFSYN for all RF functions.-

FL453

(- 3,5dB)

Osc. discrete circuty
(+10dB)

Rx SIGNALS - 11062#, 262000#, 25013#, 241#
Frequency 217Hz - 1ms/cm
RXI
1.8Vpp 500us/cm

(+13 dB) (- 3.5dB) B Q418 1842,8 MHz (CH 700) E C FL452

(- 6dB) 33 SW_V CC 31 PRE_IN B C Q420 FL420 215 MHz

XTAL_BASE 57

Y201

29 AFC

From GIF Syn to Speech Coder IC. This is a baseband analogue signal to A/D convertors of Speech Coder

RXQ

1.8Vpp 500us/cm

From GIF Syn to Speech Coder IC. This is a baseband analogue signal to A/D convertors of Speech Coder From Speech Coder to GIF Syn.

RX_EN

RX 2.75V

RX_EN

RX275 (+7dB)

SPI DATA BUS
13 MHz CLOCK
215 MHz

IQ_REF to U701

1.38Vrms 500us/cm

This is a DC level from Speech coder for the RXI and Q signals to ride on.

Q421

U703,17

Part Designator CR201 CR203 CR250 CR300 CR390 CR431 CR908 FL420 FL451 FL452 FL453 Q202 Q203 Q300 Q418 Q420

RF LAYER - ORDERABLE SPARES
Part Description Part Number Part Designator Q303 Q442 Q443 Shield 30 Shield 31 Shield 32 Shield 33 Shield 34 Shield 35 SH60 - 63 U201 U300 U301 U310 U401 U501 Part Description Master Xtal Varactor Tx Local VCO Varactor Main VCO Varactor Tx VCO Varactor Transmit Diode Rx Local VCO Varactor Signal Indicator LED IF Saw Filter 1st Rx Filter 2nd Rx Filter VCO Filter Receive Power Transistor GIF SYN Power Transistor Tx VCO Transistor Rx Amplifier Transistor Rx Mixer 4809641F04 4809641F03 4809641F02 4809612F03 4809948D10 4809641F03 4809118D01 9109179E01 9109068E02 9109155K01 9109068E01 4809579E18 4809579E18 4809940E01 4809527E20 4809940E01 Tx Exciter Transistor Rf Switch Control Transistor Rf Switch Control Transistor Top of Frontend / Antenna Switch Top of Main VCO / FL420 Top of TIC / TX VCO Top of GIFSYN Top of PA Top of Modem Clips Ext. Battery Flexprint GIF SYN TIC PA PAC Rf Switch Modem

Part Number

TEST COMMANDS
# press 2 sec. 01 # Enter Manual Test Mode Exit Manual Test Mode Mute Rx Audio Path Unmute Rx Audio Path Mute Tx Audio Path Unmute Tx Audio Path Program Main Local Osc. to Channelbb Set Tx Power level to fixed valure Display SW Version Number of Call Processor Display SW Version Number of Modem Display SW Version Number of Speech Coder Set Continuous AGC Set Continuous AFC Initiate Pseudo-Random Sequence with Midamble Synchronize to BCH Carrier Initiate Acoustic Loopback Stop Test Serving Cell Power Level Display Current Valure od AFC DAC Set Audio Volume Display / Modify Security Code Display / Modify Lock Code Display IMEI Display Error Code 07 # 08 # 09 # 10 # 11 # 12 #

RX SIGNAL PATH TX SIGNAL PATH MAIN VCO SIGNAL PATH TUNING VOLTAGES REFERENCE CLOCK Orderable Part Non - Orderable Part

4809527E19 4809939C08 4809939C08 2609225D01 2609226D01 2609227D01 2609228D01 2609229D01 2609230D01 4209388S01 5109632D92 5109632D94 5109908K31 5109632D08 5109572E03 5199281C03

19 # 20 # 22 # 25 # 26xxxx # 31x # 33xxx # 36 # 37 # 45xxx # 46 # 47x # 58 / xxxxxx # 59 / xxx # 60 # 7100 #

FREQUENCIES
CHANNEL 512-Low 700-Middle 885-High Tx 1710 1747,8 1785 Rx 1805 1842,8 1880 MAIN VCO 1590 1627,8 1665 Rx I.F 215 215 215 Rx I.F L.O 430 430 430 Tx I.F 120 120 120 Tx I.F L.O 240 240 240

REVISIONS
Europe Middle East & Africa Customer Services LEVEL 3 COLOUR DIAGRAMS DCS StarTAC Colin Jack, Michael Hansen, Billy Jenkins, Ralf Lorenzen Page 2 of 2 03.07.98 Rev. 1.2

Motorola Confidential Proprietary