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SERVICE MANUAL
CD RECEIVER
6 49843 2003
KD-LH3101
Area Suffix E ---------- Continental Europe EX -------------- Central Europe
K D-LH3101
TABLE OF CONTENTS
1 2 3 4 Precautions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 Disassembly method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5 Adjustment. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-25 Description of major ICs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-29
COPYRIGHT © 2003 VICTOR COMPANY OF JAPAN, LIMITED
No.49843 2003/5
SPECIFICATION
AUDIO Maximum Power Output AMPLIFIER SECTION Continuous Power Output (RMS) Front Rear Front Rear Load Impedance Equalizer Control Range Frequency Response Signal-to-Noise Ratio Line-Out Level/Impedance Output Impedance TUNER SECTION Frequency Range 4 (4 to 8 allowance) Frequencies Level 40 Hz to 20 000 Hz 70 dB 2.0 V/20 k load (full scale) 1 k FM AM [FM Tuner] Usable Sensitivity 50 dB Quieting Sensitivity Frequency Response Stereo Separation Capture Ratio [MW Tuner] [LW Tuner] CD PLAYER SECTION Type Signal Detection System Number of channels Frequency Response Dynamic Range Signal-to-Noise Ratio Wow and Flutter MP3 decoding format Max. Bit Rate GENERAL Power Requirement Grounding System Dimensions (W x H x D) Panel Size (approx.) Mass (approx.) Sensitivity Selectivity Sensitivity Compact disc player Non-contact optical pickup (semiconductor laser) 2 channels (stereo) 5 Hz to 20 000 Hz 96 dB 98 dB Less than measurable limit MPEG1/2 Audio Layer 3 320 Kbps Operating Voltage Negative ground Installation Size (approx.) 188 mm x 58 mm x 12 mm 1.4 kg (excluding accessories) 182 mm x 52 mm x 150 mm DC 14.4 V (11 V to 16 V allowance) 87.5 MHz to 108.0 MHz (MW) 522 kHz to 1 620 kHz (LW) 144 kHz to 279 kHz 11.3 dBf (1.0 µV/75 ) 16.3 dBf (1.8 µV/75 ) 65 40 Hz to 15 000 Hz 30 dB 1.5 dB 20 µV 35 dB 50 µV 60 Hz, 150 Hz, 400 Hz, 1 kHz, 2.4 kHz, 6 kHz, 12 kHz ±10 dB 50 W per channel 50 W per channel 19 W per channel into 4 , 40 Hz to 20 000 Hz at no more than 0.8% total harmonic distortion. 19 W per channel into 4 , 40 Hz to 20 000 Hz at no more than 0.8% total harmonic distortion.
Alternate Channel Selectivity (400 kHz)
Allowable Operating Temperature 0°C to +40°C
1-2 (No.49843)
SECTION 1 Precautions
1.1 Safety Precautions
!
Burrs formed during molding may be left over on some parts of the chassis. Therefore, pay attention to such burrs in the case of preforming repair of this system.
!
Please use enough caution not to see the beam directly or touch it in case of an adjustment or operation check.
(No.49843)1-3
1.2
Preventing static electricity
Electrostatic discharge (ESD), which occurs when static electricity stored in the body, fabric, etc. is discharged, can destroy the laser diode in the traverse unit (optical pickup). Take care to prevent this when performing repairs. 1.2.1 Grounding to prevent damage by static electricity Static electricity in the work area can destroy the optical pickup (laser diode) in devices such as CD players. Be careful to use proper grounding in the area where repairs are being performed. (1) Ground the workbench Ground the workbench by laying conductive material (such as a conductive sheet) or an iron plate over it before placing the traverse unit (optical pickup) on it. (2) Ground yourself Use an anti-static wrist strap to release any static electricity built up in your body.
(caption) Anti-static wrist strap
1M
Conductive material (conductive sheet) or iron plate
(3) Handling the optical pickup · In order to maintain quality during transport and before installation, both sides of the laser diode on the replacement optical pickup are shorted. After replacement, return the shorted parts to their original condition. (Refer to the text.) · Do not use a tester to check the condition of the laser diode in the optical pickup. The tester's internal power source can easily destroy the laser diode. 1.3 Handling the traverse unit (optical pickup) (1) Do not subject the traverse unit (optical pickup) to strong shocks, as it is a sensitive, complex unit. (2) Cut off the shorted part of the flexible cable using nippers, etc. after replacing the optical pickup. For specific details, refer to the replacement procedure in the text. Remove the anti-static pin when replacing the traverse unit. Be careful not to take too long a time when attaching it to the connector. (3) Handle the flexible cable carefully as it may break when subjected to strong force. (4) It is not possible to adjust the semi-fixed resistor that adjusts the laser power. Do not turn it. 1.4 Attention when traverse unit is decomposed *Please refer to "Disassembly method" in the text for the CD pickup unit. · Apply solder to the short land before the flexible wire is disconnected from the connector on the CD pickup unit. (If the flexible wire is disconnected without applying solder, the CDpickup may be destroyed by static electricity.) · In the assembly, be sure to remove solder from the short land after connecting the flexible wire.
Short-circuit point (Soldering) Flexible wire
Pickup Short-circuit point Pickup
1-4 (No.49843)
SECTION 2 Disassembly method
2.1 Main body 2.1.1 Removing the front panel assembly (See Fig.1) (1) Push the detach button in the lower left part of the front panel assembly and remove the front panel assembly.
Front panel assembly
Detach button
Fig.1 2.1.2 Removing the bottom cover (See Fig.2) · Prior to performing the following procedure, remove the front panel assembly as required. (1) Turn over the main body and release the two joints a, two joints b and joint c. CAUTION: Do not damage the main board when releasing the joints using a screwdriver.
Bottom cover Joint b Joint a
Joint b Joint a Joint c Fig.2
(No.49843)1-5
2.1.3 Removing the front chassis assembly (See Figs.3 and 4) · Prior to performing the following procedures, remove the front panel assembly and bottom cover. (1) Remove the two screws A on the both sides of the main body. (See Fig.3.) (2) Remove the two screws B on the front side of the main body. (See Fig.4.) (3) Release the two joints d and two joints e on the both sides of the main body. (See Fig.3.)
Joint d
Joint e
A
A
Joint d Front chassis assembly Fig.3
Joint e
Front chassis assembly
B
Fig.4 2.1.4 Removing the heat sink (See Fig.5) · Prior to performing the following procedure, remove the front panel assembly as required. (1) Remove the two screws C and two screws D on the left side of the main body.
C
D
Heat sink
Fig.5
1-6 (No.49843)
2.1.5 Removing the rear bracket (See Fig.6) · Prior to performing the following procedures, remove the bottom cover. (1) Remove the three screws E, screw F and three screws G on the back side of the main body. (2) Remove the rear bracket. REFERENCE: During reassembly, before fixing the rear bracket onto the main body, insert the SUB WOOFER cable and STEERING REMOTE cable into the slots.
Rear bracket
G
F
G
E
E
Insert Subwoofer and steering cables into the slots. Fig.6
2.1.6 Removing the main board (See Fig.7) · Prior to performing the following procedures, remove the front panel assembly, bottom cover, front chassis assembly, heat sink and rear bracket. (1) Remove the two screws H attaching the main board. (2) Disconnect the connector CN601 and remove the main board in an upward direction.
CN601
Main board
H
H
Fig.7
(No.49843)1-7
2.1.7 Removing the mecha control board (See Fig.8) · Prior to performing the following procedures, remove the front panel assembly, bottom cover, front chassis assembly, heat sink, rear bracket and main board. (1) Remove the five screws J attaching the mecha control board. (2) Disconnect the card wire from the mecha connector. (3) Move the mecha control board in the direction of the arrow to release it from the joint f.
J
Joint f Mecha connector
Card wire
Mecha control board
J
Fig.8 2.1.8 Removing the CD mechanism assembly (See Fig.9) · Prior to performing the following procedure, remove the front panel assembly, bottom cover, front chassis assembly, heat sink, rear bracket, main board and mecha control board. (1) Remove the three screws K attaching the CD mechanism assembly to the top chassis.
Top chassis
K
CD mechanism assembly
K
Fig.9
Top chassis
1-8 (No.49843)
2.1.9 Removing the front board (See Figs.10 to 12) · Prior to performing the following procedures, remove the front panel assembly. (1) Remove the five screws L attaching the rear cover on the back side of the front panel assembly. (See Fig.10.) (2) Release the eight joints g, remove the rear cover from the front panel assembly. (See Fig.11.) (3) Take out the front board. (See Fig.12.)
L
Front panel assembly
L
L
Rear cover
Fig.10
L
Joint g
Front panel assembly
Rear cover
Joint g
Fig.11
Front board
Fig.12
(No.49843)1-9
2.2
CD Mechanism section
2.2.1 Removing the top cover (See Figs.1 and 2) (1) Remove the four screws A on the both side of the body. (2) Lift the front side of the top cover and move the top cover backward to release the two joints a.
A
Top cover Joints a
A
A
Fig.1
Joints a
Top cover
Fig.2
1-10 (No.49843)
2.2.2 Removing the connector board (See Figs.3 to 5) CAUTION: Before disconnecting the flexible wire from the pickup, solder the short-circuit point on the pickup. No observance of this instruction may cause damage of the pickup. (1) Remove the screw B fixing the connector board. (2) Solder the short-circuit point on the pickup. (3) Disconnect the flexible wire from the pickup. (4) Move the connector board in the direction of the arrow to release the two joints b. (5) Unsolder the wires on the connector board if necessary. CAUTION: Unsolder the short-circuit point after reassembling.
Wires
B
Connector board
Joints b
Short-circuit point Fig.3
Pickup
Short-circuit point (Soldering) Flexible wire
Pickup Fig.4
Connector board
B
Flexible wire
Frame
Fig.5
(No.49843)1-11
2.2.3 Removing the DET switch (See Figs.6 and 7) (1) Extend the two tabs c of the feed sw. holder and pull out the switch. (2) Unsolder the DET switch wire if necessary.
DET switch
Connector board
Pickup
Fig.6
DET switch
Tab c
DET switch wire
Tab c
Fig.7
Feed sw. holder
1-12 (No.49843)
2.2.4 Removing the chassis unit (See Figs.8 and 9) · Prior to performing the following procedure, remove the top cover and connector board. (1) Remove the two suspension springs (L) and (R) attaching the chassis unit to the frame. CAUTION: · The shape of the suspension spring (L) and (R) are different. Handle them with care. · When reassembling, make sure that the three shafts on the underside of the chassis unit are inserted to the dampers certainly.
Chassis unit Suspension spring (R) Suspension spring (L) Frame
Suspension spring (R)
Fig.8
Suspension spring (L)
Chassis unit
Shaft
Shafts
Damper
Damper
Damper
Fig.9
Frame
(No.49843)1-13
2.2.5 Removing the clamper assembly (See Figs.10 and 11) · Prior to performing the following procedure, remove the top cover. (1) Remove the clamper arm spring. (2) Move the clamper assembly in the direction of the arrow to release the two joints d.
Clamper arm spring
Joint d
Clamper assembly Fig.10 Clamper arm spring
Chassis rivet assembly Joint d
Clamper assembly Joint d Joint d
Chassis rivet assembly Fig.11
1-14 (No.49843)
2.2.6 Removing the loading / feed motor assembly (See Figs.12 and 13) · Prior to performing the following procedure, remove the top cover, connector board and chassis unit. (1) Remove the screw C and move the loading / feed motor assembly in the direction of the arrow to remove it from the chassis rivet assembly. (2) Disconnect the wire from the loading / feed motor assembly if necessary. CAUTION: When reassembling, connect the wire from the loading / feed motor assembly to the flame as shown in Fig.12.
Loading / feed motor assembly Fig.12
Loading / feed motor assembly
C
Fig.13
(No.49843)1-15
2.2.7 Removing the pickup unit (See Figs.14 to 18) · Prior to performing the following procedure, remove the top cover, connector board and chassis unit. (1) Remove the screw D and pull out the pu. shaft holder from the pu. shaft. (2) Remove the screw E attaching the feed sw. holder. (3) Move the part e of the pickup unit upward with the pu. shaft and the feed sw. holder, then release the joint f of the feed sw. holder in the direction of the arrow. The joint g of the pickup unit and the feed rack is released, and the feed sw. holder comes off. (4) Remove the pu. shaft from the pickup unit. (5) Remove the screw F attaching the feed rack to the pickup unit. 2.2.8 Reattaching the pickup unit (See Figs.14 to 17) (1) Reattach the feed rack to the pickup unit using the screw F. (2) Reattach the feed sw. holder to the feed rack while setting the joint g to the slot of the feed rack and setting the joint f of the feed rack to the switch of the feed sw. holder correctly. (3) As the feed sw. holder is temporarily attached to the pickup unit, set to the gear of the joint g and to the bending part of the chassis (joint h) at a time. CAUTION: Make sure that the part i on the underside of the feed rack is certainly inserted to the slot j of the change lock lever. (4) Reattach the feed sw. holder using the screw E. (5) Reattach the pu. shaft to the pickup unit. Reattach the pu. shaft holder to the pu. shaft using the screw D.
Pickup unit
Part e
Feed rack
Fig.15
Feed sw. holder Pu. shaft
Part i Pickup unit
E
Slot j Joint g Joint f Joint h
D
Pu. shaft holder
Feed sw. holder
Fig.16
F
Pickup unit
Feed rack
Feed sw. holder
Joint f
E
Pu. shaft Joint g
Fig.17
Pickup unit Joint g
D
Pu. shaft holder Pickup unit Fig.14 Part e
Joint f Feed rack Feed sw. holder Fig.18
1-16 (No.49843)
2.2.9 Removing the trigger arm (See Figs.19 and 20) · Prior to performing the following procedure, remove the top cover, connector board and clamper unit. (1) Turn the trigger arm in the direction of the arrow to release the joint k and pull out upward. CAUTION: When reassembling, insert the part m and n of the trigger arm into the part p and q at the slot of the chassis rivet assembly respectively and join the joint k at a time.
Joint k
Trigger arm
Chassis rivet assembly Fig.19
Part p Trigger arm Part m Part n Chassis rivet assembly Part q
Fig.20 2.2.10 Removing the top plate assembly (See Fig.21) · Prior to performing the following procedure, remove the top cover, connector board, chassis unit, and clamper assembly. (1) Remove the screw H. (2) Move the top plate assembly in the direction of the arrow to release the two joints r. (3) Unsolder the wire marked s if necessary.
Top plate assembly
H
Joints r
s
(No.49843)1-17
Fig.21 2.2.11 Removing the mode sw. / select lock arm (See Figs.22 and 23) · Prior to performing the following procedure, remove the top plate assembly. (1) Bring up the mode sw. to release from the link plate (joint t) and turn in the direction of the arrow to release the joint u. (2) Unsolder the wire of the mode sw. marked s if necessary. (3) Turn the select lock arm in the direction of the arrow to release the two joints v. (4) The select lock arm spring comes off the select lock arm at the same time.
Link plate
Joint t Mode sw. Select lock arm
Joint u
s Fig.22 Select lock arm Top plate
Hook w Select lock arm Top plate Select lock arm spring
Joints v Link plate
Fig.23
1-18 (No.49843)
2.2.12 Reassembling the mode sw. / select lock arm (See Figs.24 to 26) REFERENCE: Reverse the above removing procedure. (1) Reattach the select lock arm spring to the top plate and set the shorter end of the select lock arm spring to the hook w on the top plate. (2) Set the other longer end of the select lock arm spring to the boss x on the underside of the select lock arm, and join the select lock arm to the slots (joint v). Turn the select lock arm as shown in the figure. (3) Reattach the mode sw. while setting the part t to the first peak of the link plate gear, and join the joint u. CAUTION: When reattaching the mode sw., check if the points y and z are correctly fitted and if each part operates properly.
Select lock arm spring Hook w Joint v Joint v
Select lock arm Boss x
Fig.24
Joint t Point y Link plate Point z
Fig.25
Mode sw.
Select lock arm
Joint t Link plate Joint u Fig.26
(No.49843)1-19
2.2.13 Removing the select arm R / link plate (See Figs.27 and 28) · Prior to performing the following procedure, remove the top plate assembly. (1) Bring up the select arm R to release from the link plate (joint a') and turn as shown in the figure to release the two joints b' and joint c'. (2) Move the link plate in the direction of the arrow to release the joint d'. Remove the link plate spring at the same time. REFERENCE: Before removing the link plate, remove the mode sw..
Select arm R
Link plate Joint c' Joint b'
Joint r
Joint b'
Joint a' Fig.27 Link plate spring Top plate Joint d'
Link plate Fig.28
2.2.14 Reattaching the Select arm R / link plate (See Figs.29 and 30) REFERENCE: Reverse the above removing procedure. (1) Reattach the link plate spring. (2) Reattach the link plate to the link plate spring while joining them at joint d'. (3) Reattach the joint a' of the select arm R to the first peak of the link plate while joining the two joints b' with the slots. Then turn the select arm R as shown in the figure. The top plate is joined to the joint c'. CAUTION: When reattaching the select arm R, check if the points e' and f' are correctly fitted and if each part operates properly.
Link plate spring Select arm R Joint c' Joint d'
Joint b' Joint b' Joint a' Fig.29
Joint a'
Link plate Point e' Point f'
Fig.30
1-20 (No.49843)
2.2.15 Removing the loading roller assembly (See Figs.31 to 33) · Prior to performing the following procedure, remove the clamper assembly and top plate assembly. (1) Push inward the loading roller assembly on the gear side and detach it upward from the slot of the joint g' of the lock arm rivet assembly. (2) Detach the loading roller assembly from the slot of the joint h' of the lock arm rivet assembly. The roller guide comes off the gear section of the loading roller assembly. Remove the roller guide and the HL washer from the shaft of the loading roller assembly. (3) Remove the screw J attaching the lock arm rivet assembly. (4) Push the shaft at the joint i' of the lock arm rivet assembly inward to release the lock arm rivet assembly from the slot of the L side plate. (5) Extend the lock arm rivet assembly outward and release the joint j' from the boss of the chassis rivet assembly. The roller guide springs on both sides come off at the same time. CAUTION: When reassembling, reattach the left and right roller guide springs to the lock arm rivet assembly before reattaching the lock arm rivet assembly to the chassis rivet assembly. Make sure to fit the part k' of the roller guide spring inside of the roller guide. (Refer to Fig.34.)
Loading roller assembly Roller guide spring
Part k'
Loading roller assembly
Roller guide spring
Fig.32
Chassis rivet assembly
Boss
Roller guide HL washer Loading roller assembly
J
Roller guide
L side plate Roller guide spring
Joint h'
Lock arm rivet assembly Joint j' Roller guide spring Joint g'
Fig.33
Joint i'
Roller guide spring
Roller guide HL washer Roller shaft assembly
Loading roller assembly Roller guide spring Lock arm rivet assembly Fig.31
Loading roller Lock arm rivet assembly Roller guide spring Fig.34
(No.49843)1-21
2.2.16 Removing the loading gear 5, 6 and 7 (See Figs.35 and 36) · Prior to performing the following procedure, remove the top cover, chassis unit, pickup unit and top plate assembly. (1) Remove the screw K attaching the loading gear bracket. The loading gear 6 and 7 come off the loading gear bracket. (2) Pull out the loading gear 5.
K
Loading gear bracket Loading gear 6
Loading gear 5
Loading gear 3
Fig.35
K
Loading gear bracket Loading gear 6 Loading gear 5 Loading gear 7
Fig.36
1-22 (No.49843)
2.2.17 Removing the gears (See Figs.37 to 40) · Prior to performing the following procedure, remove the top cover, chassis unit, top plate assembly and pickup unit. · Pull out the loading gear 3. (See Fig.35.) (1) Pull out the feed gear. (2) Move the loading plate assembly in the direction of the arrow to release the L side plate from the two slots m' of the chassis rivet assembly. (See Fig.37.) (3) Detach the loading plate assembly upward from the chassis rivet assembly while releasing the joint n'. Remove the slide hook and loading plate spring from the loading plate assembly. (4) Pull out the loading gear 2 and remove the change lock lever. (5) Remove the E ring and washer attaching the change gear 2. (6) The change gear 2, change gear spring and adjusting washer come off. (7) Remove the loading gear 1. (8) Move the change plate rivet assembly in the direction of the arrow to release from the three shafts of the chassis rivet assembly upward. (See Fig.38.) (9) Detach the loading gear plate rivet assembly from the shaft of the chassis rivet assembly upward while releasing the joint p'. (See Figs.38 and 40.) (10) Pull out the loading gear 4.
Joint p' Change plate rivet assembly Shafts Loading gear 4 Loading gear plate rivet assembly Shaft Loading gear 2 Loading gear 1 Chassis rivet assembly Change gear 2 Fig.38 Joint n' Slide hook Loading plate spring
E ring
Loading plate assembly
L side plate Slot m' L side plate Loading plate assembly Joint n' Feed gear Slot m' E ring Chassis rivet assembly
Fig.37
Slot m'
Slot m' Chassis rivet assembly
Fig.39
Washer Change gear 2 Change gear spring Adjusting washer Change plate rivet assembly
Loading gear 1 Loading gear 2 Change lock lever Loading gear 4
Chassis rivet assembly Loading gear plate rivet assembly
Fig.40
(No.49843)1-23
2.2.18 Removing the turn table / spindle motor (See Figs.41 and 42) · Prior to performing the following procedure, remove the top cover, connector board, chassis unit and clamper assembly. (1) Remove the two screws L attaching the spindle motor assembly through the slot of the turn table on top of the body. (2) Unsolder the wire on the connector board if necessary.
Turn table
L
Fig.41
L
Turn table
Spindle motor Fig.42
1-24 (No.49843)
SECTION 3 Adjustment
3.1 Adjustment method Standard measuring conditions Power supply voltage Load impedance Output Level DC14.4V(11 to 16V) 20K (2 Speakers connection) Line out 2.0V (Vol. MAX) Test instruments required for adjustment (1) Digital oscilloscope (100MHz) (2) Electric voltmeter (3) Digital tester (4) Tracking offset meter (5) Test Disc JVC :CTS-1000 (6) Extension cable for check EXTSH002-22P × 1 Standard volume position Balance and Bass &Treble volume : lndication"0" Loudness : OFF How to connect the extension cable for adjusting Caution: Be sure to attach the heat sink and rear bracket onto the power amplifier IC and regulator IC respectively, before supply the power. If voltage is applied without attaching these parts, the power amplifier IC and regulator IC will be destroyed by heat.
Dummy load Exclusive dummy load should be used for AM,and FM. For FM dummy load,there is a loss of 6dB between SSG output and antenna input.The loss of 6dB need not be considered since direct reading of figures are applied in this working standard.
The cardboard is cut in a suitable size. uses for the insulation stand of mechanism.
Extension cable EXTSH002-22P
Heat sink (Attach the heat sink using the two screws.) Rear bracket (Attach the rear bracket using the screw.)
Front chassis assembly (Attach the front chassis assembly using the two screws.)
(No.49843)1-25
3.2
Troubleshooting
Feed section
Is the voltage output at IC621 pin "40" 5V or 0V? YES Is 4V present at both sides of the feed motor? YES Check the feed motor. NO Is 6V or 2V present at IC681 "16" and "17"? NO Check IC681. NO Is the wiring for IC621 pin "40"? NO YES Is 3.3V present at IC681 pin "6"? YES Check the vicinity of IC621. YES Check the feed motor connection wiring. NO
Check CD 8V and 5V.
Focus section
When the lens is moving: 4V
Does the S-search waveform appear at IC681 pins "13" and "14"?
NO
Check the circuits in the vicinity of IC681 pins "13","14"and"1". YES
YES
Check the pickup and its connections
Spindle section
NO Is the disk rotated? YES Does the RF signal appear at IC601 pin "19"? YES Is the RF waveform at IC601 pin "19" distorted? YES Proceed to the Tracking section Is 4V present at IC681 pins "15" and "16"? YES Check the spindle motor and its wiring NO NO Check the circuits in the vicinity of IC601 pin "19" or the pickup NO Is 4V present at IC621 pins "41" ? YES Check the vicinity of IC681. Check the circuits in the vicinity of IC621 or IC621 NO
Tracking section
When the disc is rotated at first:
YES
Approx. 1.2V Is the tracking error signal output at IC601 "11"?
Check the circuit in the vicinity of IC601 pins "2" to "7".
YES
Check the pickup and its connections
YES Check IC621.
1-26 (No.49843)
3.3
Flow of functional operation unit TOC read
When the pickup correctly moves v to the inner area of the disc
Microprocessor $83 commands FMO TC94A14FA "40" FEED MOTOR +TERMINAL IC681 "17" REST SW ON $82 $81 3.3V Hi-Z 0V 6V 4V 2V OFF
Power ON Set Function CD
When the laser diode correctly emits
Microprocessor commands SEL TC94A14FA "38"
$84 3.3V 0V 4V 0V
Disc inserted
Pickup feed to the inner area YES Laser emitted
LD CN601 "10"
When correctly focused
Focus search
FEO TA2157 "15"
"No disc" display YES
2.2V When the disc correctly rotates
Microprocessor $84 commands
DMO TC94A14FA "41"
$86 $ A200
Focus Servo Loop ON o
Disc rotates RF signal eye-pattern n remains closed Tracking loop closed RF signal eye-pattern opens TOC read out
3.3V 2.2V 0V 6V 3.2 2V
Spindle motor(-) IC681 "16"
Acceleration 0.5 Sec Rough Servo 0.5 Sec
Servo CLV
Jump to the first track
Tracking Servo Loop ON
Play RF signal
Rough Servo Mode v
CLV Servo Mode (Program Area)
CLV Servo Mode (Lead-In Area; Digital :0)
(No.49843)1-27
3.4
Maintenance of laser pickup
3.5
Replacement of laser pickup
(1) Cleaning the pick up lens Before you replace the pick up, please try to clean the lens with a alcohol soaked cotton swab. (2) Life of the laser diode When the life of the laser diode has expired, the following symptoms will appear. · The level of RF output (EFM output: amplitude of eye pattern) will be low.
Turn off the power switch and,disconnect the power cord from the ac outlet.
Replace the pickup with a normal one.(Refer to "Pickup Removal" on the previous page)
Is RF output 1.3 0.4Vp-p?
NO Replace it. Plug the power cord in,and turn the power on. At this time,check that the laser emits for about 3seconds and the objective lens moves up and down. Note: Do not observe the laser beam directly.
YES O.K
(3) Semi-fixed resistor on the APC PC board The semi-fixed resistor on the APC printed circuit board which is attached to the pickup is used to adjust the laser power.Since this adjustment should be performed to match the characteristics of the whole optical block, do not touch the semi-fixed resistor. If the laser power is lower than the specified value, the laser diode is almost worn out, and the laser pickup should be replaced. If the semi-fixed resistor is adjusted while the pickup is functioning normally, the laser pickup may be damaged due to excessive current.
Play a disc.
Check the eye-pattern at RF test point.
Finish.
1-28 (No.49843)
SECTION 4 Description of major ICs
4.1 BA5830FP-X (IC681) : Power driver · Pin Layout & Block diagram
28
27
26
25
24
23
22
21
20
19
18
CH4
17
16
CH3
15
10k BIAS Pre Vcc L
-
LD/SLED 20k CONTROL H
+ -
10k +
-
10k +
-
10k +
-
10k
H 1.65V
Pow Pow GND Vcc2 10k Level shifter 10k 10k 10k
20k 10k
+
+
L 10k
-
20k
+
+
Level shifter T.S.D Level shifter 10k Level shifter
+ +
2.4V
PreGND
Pow MUTE CONTROL GND
Pow Vcc1
-
10k CH1
10k
10k CH2
1
2
3
4
5
+
6
7
8
9
10
11
12
13
14
T.S.D : thermal shutdown Unit of resistance : [ ]
· Pin function Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Symbol Function Pin No. 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Symbol VO3(+) VO3(-) VO4(+) VO4(-) Function Driver CH3 positive output Driver CH3 negative output Driver CH4 positive output Driver CH4 negative output
OPIN2(-) CH2 Pre OP amplifier invert input OPOUT2 CH2 Pre OP amplifier output OPIN1(-) CH1 Pre OP amplifier invert input OPOUT1 CH1 Pre OP amplifier output REG-B REG(+) PreGND MUTE Connect to external Tr Base Regulator terminal of output feedback Pre Block and Regulator GND Mute terminal
PowVcc2 CH3, 4 Power Block VCC PowGND Power Block GND CNT LDIN Control terminal Loading input
PowGND Power Block GND PowVcc1 CH1, 2 Power Block Vcc VO1(-) VO1(+) VO2(-) VO2(+) Driver CH1 negative output Driver CH1 positive output Driver CH2 negative output Driver CH2 positive output
OPOUTSL SLED Pre OP amplifier output OPINSL(-) SLED Pre OP amplifier invert input OPOUT3 CH3 Pre OP amplifier output OPIN3(-) CH3 Pre OP amplifier invert input BIAS PreVcc BIAS input Pre-Block VCC
NOTE: When PIN2,4,22,25 is high ("H"), the positive output pin of the driver is high ("H") and the negative output pin is low ("L"). When PIN23 is high ("H"), the positive output pin of CH4 is low ("L") and negative output pin is high ("H").
- +
- +
- +
- +
+ +
10k
10k 10k
+ -
-
10k
10k
10k
10k 10k
(No.49843)1-29
4.2
BD4824FVE-W (IC803) : Voltage detector · Block diagram
VDD
· Pin Layout
VOUT 1 SUB 2 N.C. 3
5
VDD
4
GND
Vref
VOUT
GND
· Pin function Pin No. 1 2 3 4 5 Symbol VOUT SUB N.C. GND VDD Output Substrate (Connect with GND) Non connection GND Power supply input Function
1-30 (No.49843)
4.3
BR24C01AFV-W-X (IC201) : EEPROM
· Pin layout
Vcc
WP
SCL
SDA
A0
· Block diagram
A1
A2
GND
A0
1
7bit
1kbit EEPROM ARRAY 8bit SLAVE/WORD 7bit ADDRESS REGISTER DATA REGISTER
8
Vcc
A1
2
ADDRESS DECODER
7
WP
START
STOP
A2
3
CONTROL LOGIC
ACK
6
SCL
GND
4
HIGH VOLTAGE GEN.
Vcc LEVEL DETECT
5
SDA
· Pin function Pin name I/O Vcc GND A0,A1,A2 SCL SDA WP IN IN IN Power supply Ground (0v) Slave address set Serial clock input Write protect input
Description
IN / OUT Slave and word address,serial data input, serial data output *1
*1 An open drain output requires a pull-up resister.
(No.49843)1-31
4.4
BR24L32F-W-X (IC703) : EEPROM · Block diagram
Vcc WP SCL SDA
· Pin layout
Symbol A0,A1,A2 GND SDA SCL
I/O I I/O I I Ground (0V)
Function Slave address set Slave and word address Serial data input, serial data output Serial clock input Write protect input Power supply
A0
A1
A2
GND
WP VCC
· Block diagram
A0
1 12bits
32kbit EEPROM array 8bits Slave word 12bits address register Data register
8
Vcc
A1
2
Address decoder
7
WP
START A2 3 Control logic
STOP 6 ACK SCL
GND
4
High voltage generator
Vcc level detect
5
SDA
4.5
BU4066BCFV-X (IC131) : Quad analog switch
· Pin layout & Block diagram
VDD 14
C1 13
C4 12
I/O4 11
O/I4 10
O/I3 9
I/O3 8
1 I/O1
2 O/I1
3 O/I2
4 I/O2
5 C2
6 C3
7 Vss
1-32 (No.49843)
4.6
HA13164A (IC901) : Regulator
· Pin layout
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
· Block diagram
+B C1 100u VCC C2 0.1u ACC
8
3
ACC BATT.DET OUT
9
ANT OUT C3 0.1u EXT OUT C4 0.1u ANT CTRL
2
Surge Protector
1
BIAS
TSD
6
COMPOUT
4 7 11 5 12
VDD OUT C7 0.1u
CTRL
CD OUT C5 0.1u AUDIO OUT C6 10u
SW5VOUT
ILMOUT
10
14
C8 0.1u
15
GND
TAB
GND
13
ILM AJ UNIT R: C:F note1) TAB (header of IC) connected to GND
R1
· Pin function Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Symbol EXTOUT ANTOUT ACCIN VDDOUT SW5VOUT COMPOUT ANT CTRL VCC BATT DET AUDIO OUT CTRL CD OUT ILM AJ ILM OUT GND Function Output voltage is VCC-1 V when M or H level applied to CTRL pin. Output voltage is VCC-1 V when M or H level to CTRL pin and H level to ANT-CTRL. Connected to ACC. Regular 5.7V. Output voltage is 5V when M or H level applied to CTRL pin. Output for ACC detector. L:ANT output OFF, H:ANT output ON Connected to VCC. Low battery detect. Output voltage is 9V when M or H level applied to CTRL pin. L:BIAS OFF, M:BIAS ON, H:CD ON Output voltage is 8V when H level applied to CTRL pin. Adjustment pin for ILM output voltage. Output voltage is 10V when M or H level applied to CTRL pin. Connected to GND.
(No.49843)1-33
4.7
HD74HC126FP-X (IC781) : Buffer · Pin function
· Pin layout
1C 1A 1Y 2C 2A 2Y GND
1 2 3 4 5 6 7
14 13 12 11 10 9 8
VCC 4C 4A 4Y 3C 3A 3Y
C L H H
Input A X L H
Output Y Z H L
Note: H:High level L:Low level X:Irrelevant Z:Off(High-impedance) State a 3-state input
· Block diagram
Vcc
Vcc
1k 1A 2A 3A 4A 1C 2C 3C 4C
Output
1Y CL
S1
Input
See Function Table
1k
2Y 3Y
Output
Sample as Load Circuit 1
Output
Sample as Load Circuit 1
Output
4Y
Note: CL includes probe and jig capacitance
Sample as Load Circuit 1
1-34 (No.49843)
4.8
HD74HCT126T-X (IC503) : Buffer · Pin function Input Output A X L H Y Z L H
· Pin layout
1C 1A 1Y 2C 2A 2Y
1 2 3 4 5 6
14 Vcc 13 4C 12 4A 11 4Y 10 3C 9 3A 8 3Y
C L H H
H : High level L : Low level X : Irrelevant Z : Off (Hhigh-impedance)state of a 3-stage output
GND 7
· Block diagram
1A 1Y 1C
2A 2Y 2C
3A 3Y 3C
4A 4Y 4C
(No.49843)1-35
4.9
IC-PST3424U-X (IC803) : Reset
· Pin layout
VOUT
1
4
VSS
VDD
· Block diagram
2
3
NC
VDD 2 + Vref
1
VOUT
VSS 3
· Pin function No. 1 2 3 4 Pin Name Vout VDD NC VSS Function Reset Signal Output PIN VDD PIN / Voltage Detect PIN Non connect VSS PIN
4.10 IC-PST9333U-X (IC702) : Regulator · Pin layout · Block diagram
NC
1
4
Vcc
Vcc 4
3 VOUT
GND
2
3
VOUT
NC 1
2 GND
· Pin function Pin No. 1 2 3 4 Symbol NC GND VOUT Vcc Non connect GND terminal Reset signal output terminal Vcc terminal/Voltage detect terminal Function
1-36 (No.49843)
4.11 M62449FP-X (IC912) : Equalizer · Pin layout & Block diagram
DATA LATCH DGND OUT2 F5R2 F5O2 F5I2 F4R2 F4O2 F4I2 F3R2 F3O2 F3I2 F2R2 F2O2 F2I2 F1R2 F1O2 F1I2 IN2 REFIN
MICON INTERFACE
41 39 40
12K
42
CLK AVSS DVDD OUT1 F5R1 F5O1 F5I1 F4R1 F4O1 F4I1 F3R1 F3O1 F3I1 F2R1 F2O1 F2I1 F1R1 F1O1 F1I1 IN1 AVDD
4
3
2
1
5
6
GE5
12K
7
8
9
10
11
12
13
14
15
16
17
2K
CH2
CH1
2K
18
SBK
AVDD 70K 40K
19
20
21
22
23
70K
24
GE1
AVSS 40K
GE1
68K
25
26
27
28
GE2
GE2
29
30
31
GE3
GE3
32
33
34
GE4
GE4
35
12K
12K
36
37
GE5
38
(No.49843)1-37
4.12 LA47505 (IC301) : Power amp. · Block diagram
6
20
11
9 7
1 Protective circuit 8
5 12 3
2 4 Stand by Switch
10
Ripple Filter
Mute circuit
22
15
17 19
25 protective circuit 13 21 14 23 Muting & On Time Control Circuit 18
16
24
1-38 (No.49843)
· Pin layout
AC CONT1 GND1 OUTFRSTBY OUTFR+ Vcc1/2 OUTRRGND2 OUTRR+ VREF INRR INFR SGND INFL INRL ONTIME OUTRL+ GND3 OUTRLVcc3/4 OUTFL+ MUTE OUTFLGND4
· Pin function Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 Symbol AC CONT1 GND1 OUTFRSTBY OUTFR+ Vcc1/2 OUTRRGND2 OUTRR+ VREF INRR INFR SGND INFL INRL ONTIME OUTRL+ GND3 OUTRLVcc3/4 OUTFL+ MUTE OUTFLGND4 NC Header of IC Power GND Outpur(-) for front Rch Stand by input Output (+) for front Rch Power input Output (-) for rear Rch Power GND Output (+) for rear Rch Ripple filter Rear Rch input Front Rch input Signal GND Front Lch input Rear Lch input Power on time control Output (+) for rear Lch Power GND Output (-) for rear Lch Power input Output (+) for front Muting control input Output (-) for front Power GND No connection Function
NC
(No.49843)1-39
4.13 LH28F160BJHET92 (IC803) : 16M flash memory · Pin Layout
A15 A14 A13 A12 A11 A10 A9 A8 A19 NC WE# RP# VCCW WP# RY/BY# A18 A17 A7 A6 A5 A4 A3 A2 A1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 44 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 A16 BYTE# GND DQ15/A-1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 VCC DQ11 DQ3 DQ10 DQ2 DQ9 DQ1 DQ8 DQ0 OE# GND CE# A0
48-LEAD TSOP STANDARD PINOUT 12mm x 20mm TOP VIEW
· Block Diagram
DQ0 to DQ15
Output buffer
Input buffer
Output Multiplexer
ID code register Data register Status register Command user interface
I/O logic
VCC BYTE# CE# WE# OE# RP# WP#
Data comparator Y decoder
0 1 2 3 4 5 Boot block 0 Boot block 1 Parameter block Parameter block Parameter block Parameter block Parameter block Parameter block
A-1-A19
Input buffer Address latch Address counter
Y gate Main block 29 Main block 30 Main block 0 Main block 1
Write state machine
X decoder
32k word (64k byte) Main block x 31
Write/Erase voltage selecter
RY/BY# VCCW
VCC GND
1-40 (No.49843)
· Pin function Pin No. 1 to 8 9 10 11 12 13 14 15 16,17 18 to 25 26 27 28 29 30 31 32 Symbol A15 to A8 A19 NC WE# RP# VCCW WP# RY/BY# A18,A17 A7 to A0 CE# GND OE# DQ0 DQ8 DQ1 DQ9 I/O I I I I I I I I I Function Address input for memory address Address input for memory address Non connection Write enable Reset Power supply for write/erase Write protect Address input for memory address Address input for memory address Chip enable Ground Output enable Pin No. 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Symbol DQ2 DQ10 DQ3 DQ11 VCC DQ4 DQ12 DQ5 DQ13 DQ6 DQ14 DQ7 DQ15 A-1 GND BYTE# A16 I/O Function I/O Data input/output I/O Data input/output I/O Data input/output I/O Data input/output Power supply I/O Data input/output I/O Data input/output I/O Data input/output I/O Data input/output I/O Data input/output I/O Data input/output I/O Data input/output I/O Data input/output I I I Address input for memory address Ground Byte enable Address input for memory address
O Ready/Busy
I/O Data input/output I/O Data input/output I/O Data input/output I/O Data input/output
(No.49843)1-41
4.14 MN102H60KCG (IC801) : LCD display sub CPU · Pin Layout
100 1 76 75
25 26 50
51
· Pin function Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 to 16 17 18 19 20 21 22 23 24 25 26 to 33 34 35 to 42 43 44 45 46 47 48 49 50 51 52,53 54 55 56 1-42 (No.49843) Symbol RES RE WE VccWCNT RY/BY CS1 NC SWLED4 SWLED5 SWLED6 NC /WORD A0 to A3 VDD NC GND XI NC VDD OSCI OSCO MODE A4 to A11 AVDD A12 to A19 VREFA20 Thermal ANA WDOUT PON RD LCDCLK WR NC VREF+ RS CS I/O O O O O I O O O O O O I O O I O I O I O O O I I O O O O O O O LCD reset output Read enable output for extension memory Write enable output for extension memory Writing voltage control for external ROM Read/Busy input for extension memory Chip select1 output for extension memory Not use SW_LED flashing output 4 for [PRESET1-6] key LED SW_LED flashing output 5 for [SEEKUP]+[SEEKDOWN] key LED SW_LED flashing output 6 for [DISCUP]+[DISCDOWN] key LED Not use Bus width setting for extension memory (H: 8-bit width) Extension memory output 0 to 3 Power supply Base clock output Ground Connect to ground Not connect Power supply Crystal connecting terminal (25MHz) Crystal connecting terminal (25MHz) Mode setting input, pull up (H: memory extension mode) Extension memory output 4 to 11 Analog power supply Extension memory output 12 to 19 Analog reference power supply, connect to ground Extension memory output 20 Thermal fuse input Audio level input for spectrum analyzer Watch dog timer over flow output (H: over flow) Power on output LCD read strobe output LCD driver clock output (300kHz) LCD write strobe output Not use Analog reference power supply, connect to AVDD LCD regist select output LCD chip select output Function
Pin No. 57 58 59 60 61 62 to 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 to 91 92 93 to 100
Symbol NC VOL1 VOL2 NC AGND KEY0 to KEY3 VDD SWLED0 SWLED1 SWLED2 DISPCLK DISPDATA KEYDATA SIFDA SIFCK NMI DISPCE PSAVE2 NC KEY_IN ADSEP RESET VDD D0 to D7 GND P10 to P17
I/O O I I I O O O I I O I I I I I I I I I Not use Rotary encoder input 1 Rotary encoder input 2 Not use Analog ground Key 0 to 3 input AD terminal Power supply
Function
SW_LED flashing output 0 for [VOL] key LED SW_LED flashing output 1 for [SEL] key LED SW_LED flashing output 2 for [DISP] key LED Serial communication clock input Displaying data input (Serial) Key code data output (Serial) On board serial writing clock input, pull up NMI (H fix) Chip enable input for serial communication Ground POWER SAVE2 (Memory power supply off) detecting input Not use Key interrupt input Address data separate/common mode setting terminal H: separate mode Reset input (L: reset) Power supply terminal Extension memory input 0 to 7 Ground LCD data bus input/output 0 to 7
I/O On board serial writing data input/output, pull up
(No.49843)1-43
4.15 NJM2360AM-X (IC921) : DC-DC convertor · Pin layout
1. Cs 1 2 3 4 8 7 6 5 2. Es 3. CT 4. GND 5. INVIN 6. Vcc 7. SI 8. CD
· Block diagram
Switch collector 1
Q1
Q2
Q S R
8
Driver collector
Switch emitter
2
Ipk C T OSC COMP
7
Ipk sense
Timing 3 capacitor
VREF 1.25V
6 V+
+ -
GND 4
5 Comparator reversal input
4.16 NJM4565V-X (IC132,IC572) : Dual operational amplifier · Pin layout & Block diagram
1 A 2 -
8
+ B
7
3
-
+
6
1 2 3 4 5 6 7 8
AOUTPUT A-INPUT A+INPUT V B+INPUT B-INPUT B OUTPUT V
4
5
1-44 (No.49843)
4.17 NJU7241F25-X (IC651) : Regulator · Pin layout
GND 1 VIN 2 VOUT 3
5 STB
4 NC
· Block diagram
Short protect VIN 2 3 VOUT
STB 5
Vref GND 1 1 GND
4.18 NJU7241F33-X (IC504,IC804) : Voltage regulator · Pin layout
1 2 3
5
PIN FUNCTION 1. GND 2. VIN 3. VOUT 4. +NC 5. STB
4
4.19 RPM6938-SV4 (IC805) : Remote control receiver · Block diagram
Vcc AMP I/V conversion PD BPF AGC Detector Comp 22k ohm
3 1
VDD OUT
for trimming circuit
2
magnetic shield
GND
(No.49843)1-45
4.20 PCM1716E-X (IC571) : D/A converter · Pin layout
28
15
1
· Block diagram
14
BCK LBCK DATA
Serial Input I/F 8X Oversampling Digital Filter with Modulator DAC DAC Mult-level Delta-Sigma
Vcc2R AGND2R
Vcc2L AGND2L
Low-pass Filter
VoutL EXTL
Low-pass Filter
VoutR EXTR ZERO
ML/llS MC/DM1 MD/DM0 CS/WO MODE MUTE RST
Function Controller Mode Control I/F SCK BPZ-Cont Crystal OSC Power Supply Open drain
XTI
XTO
CLKO
Vcc1 AGND1
Vcc DGND
· Pin function Pin No. Symbol I/O 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 LRCK DATA BCK CLKO XTI XTO DGND VDD VDD2R AGND2R EXTR NC VOUTR AGND1 Vcc1 I I I I Function LRCK clock input Serial audio data input Bit clock input for serial audio data Oscillator input / External clock input Digital ground Digital power +5V Analog power +5V Analog ground Non connection 17 18 19 20 21 22 23 24 25 26 27 28 NC EXTL AGND2L Vcc2L ZERO RST CS/IWO MODE MUTE MD/DM0 MC/DM1 ML/IIS Pin No. Symbol I/O 16 VOUTL Function O Lch analog voltage output of audio signal I I I I I I I Non connection Analog ground Analog power +5V Reset Chip select / Input format selection Mode control select Mute control Mode control, Data / De-emphasis selection 1 Mode control, BCK / De-emphasis selection 2 Mode control, WDCK / Input format selection O Lch common pin of analog output amp
O Buffered output of system clock O Oscillator output
O Zero data flag
O Rch common pin of analog output amp O Rch analog voltage output of audio signal Analog ground Analog power +5V
1-46 (No.49843)
4.21 SAA6579T-X (IC51) : RDS detecter · Pin layout
QUAL DATA Vref MUX Vdd GND CIN SCOUT 1 2 3 4 5 6 7 8 16 CLK 15 T57 14 OSCO 13 OSCI 12 Vdd 11 GND 10 TEST 9 MODE
· Block diagram
13 14 12
4
ANTIALIASING FILTER
57 kHz BAND PASS (8th ORDER)
RECONSTRUCTION FILTER
OSCILLATOR AND DIVIDER
QUALITY BIT GENERATOR
1
8
7
CLOCKED COMPARATOR
COSTAS LOOP VARIABLE AND FIXED DIVIDER
BIPHASE SYMBOL DECODER
DIFFERENTIAL 2 DECODER 15
5
VP1
3
REFERENCE VOLTAGE
CLOCK REGERATION AND SYNC
TEST LOGIC AND OUTPUT SELECTOR SWITCH
15
6
9
10
11
· Pin function Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Symbol QUAL DATA Vref MUX Vdd GND CIN SCOUT MODE TEST GND Vdd OSCI OSCO T57 CLK Quality indication output RDS data output Reference voltage output (0.5VDDA) Multiolex signal input +5V supply voltage for analog part Ground for analog part (0V) Sub carrier input to comparator Sub carrier output of reconstruction filter Oscillator mode / test control input Test enable input Ground for digital part (0V) +5V supply voltage for digital part Oscillator input Oscillator output 57 kHz clock signal output RDS clock output Description
(No.49843)1-47
4.22 TA2157FN-X (IC601) : RF amp · Pin layout
24
~
13
1
· Block diagram
~
12
13
20k
20k
PEAK 50k 15k
12
14 20k 15 10pF 15k 20k 40k 20k 10pF 40k
11
10
16 20k
50 A 12k 12k 1.3V 2k 50k
9
17 20k 18 40k BOTTOM PEAK
8
1k 14k 2k
7
19 240k 15pF 20 20k 21 30k 180k 40pF 240k 15pF
1.75k
6
x0.5 K x2
5
x0.5 1 x2 94k 60k 22k 94k 22k
4
22 180k 23 3k 3k 24 40pF
3
60k
2
1
PIN VCTRLPIN VCC HiZ GND
SEL (APC SW) APC ON APC ON APC OFF (LDO=H)
TEB (TE BAL) -50% 0% 50%
RFGC (AGC Gian) +12dB +6dB 0dB
TEB (TE BAL) Normal mode (0dB) Normal mode (0dB) CD-RW mode (+12dB)
1-48 (No.49843)
· Pin function Pin No. 1 2 3 4 5 6 7 8 Symbol VCC FNI FPI TPI TNI MDI LDO SEL I/O I I I I I O I 3.3V power supply pin Main-beam amp input pin Main-beam amp input pin Sub-beam amp input pin Sub-beam amp input pin Monitor photo diode amp input pin Laser diode amp output pin APC circuit ON/OFF control signal, laser diode (LDO) control signal input or bottom/peak detection frequency change pin. Function
SEL GND Hiz VCC
9 TEB I
APC circuit OFF ON ON
LDO Connected VCC through 1k resistor Control signal output Control signal output
Tracking error balance adjustment signal input pin Adjusts TE signal balance by eliminating carrier component from PWM signal (3-state output, PWM carrier = 88.2kHz) output from TC94A14F/FA TEBC pin using RC-LPF and inputting DC. TEBC input voltage:GND~VCC Tracking error signal generation amp negative-phase input pin Tracking error signal generation amp output pin. Combining TEO signal RFRP signal with TC94A14F/FA configures tracking search system. RF signal peak detection output pin AGC/FE/TE amp gain change pin
10 11 12 13
TEN TEO RFDC GVSW
I O O I
GVSW GND Hiz VCC
14 15 16 17 18 19 20 VRO FEO FEN RFRP REIS RFGO RFGC O O I O I O I Reference voltage (VRO) output pin *VRO=1/2VCC When VCC=3.3V Focus error signal generation amp output pin
Mode CD-RW Normal
Focus error signal generation amp negative-phase input pin Signal amp output pin for track count Combining RFRP signal and TEO signal with TC94A14F/FA configures tracking search system. RF signal amplitude adjustment amp output pin RF amplitude adjustment control signal input pin Adjusts RF signal amplitude by eliminating carrier component from PWM signal (3-state output, PWM carrier=88.2kHz)output fromTC94A14F/14FA *RFGC pin using RC-LPF and inputting DC. *RFGC input voltage:GND~VCC RF signal amplitude adjustment amp input pin RF signal generation amp output pin RF signal generation amp input pin GND pin
21 22 23 24
AGCIN RFO RFI GND
I O I -
(No.49843)1-49
4.23 TC94A14FA (IC621) : DSP & DAC · Pin layout & Block daiagram
48 49 50 51 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
32
Clock generator LPF
PWM
D/A
31 30
52 53 54 55 56 57 58 59 60 61 62 63 64 Microcontroller interface
1-bit DAC
Servo control
29
A/D
28 27
Address circuit Correction circuit
ROM
Digital equalizer automatic RAM adjustment circuit
26 25 24 23
16 k RAM
CLV servo
Data slicer
Synchronous guarantee EFM decoder Audio out circuit Digital output Sub code decoder
22
VCO
21 20 19 18 17
PLL TMAX
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
· Pin function Pin No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Symbol BCK LRCK AOUT DOUT IPF VDD3 VSS3 SBOK CLCK DATA SFSY SBSY HSO UHSO PVDD3 PDO I/O O O O O O O O O O O I/O O Descroption Bit clock output pin.32fs,48fs,or 64fs selectable by command. L/R channel clock output pin."L" for L channel and "H" for R channel. Output polarity can be inverted by command. Audio data output pin. MSB-first or LSB-first selectable by command. Digital data output pin.Outputs up to double-speed playback. Correction flag output pin. When set to "H", AOUT output cannot be corrected by C2 correction processing. Digital 3.3V power supply voltage pin. Digital GND pin. Subcode Q data CRCC result output pin. "H" level when result is OK. Subcode P-W data read I/O pin. I/O polarity selectable by command. Subcode P-W data output pin. Playback frame sync signal output pin. Subcode block sync signal output pin. "H" level at S1 when subcode sync is detected. General-purpose input / output pins.Input port at reset. PLL-only 3.3V power supply voltage pin. EFM and PLCK phase difference signal output pin.
1-50 (No.49843)
Pin No 17
Symbol TMAX
I/O O
Descroption TMAX detection result output pin.
TMAX Detection Result Longer than fixed period Within fixed period Shorter than fixed period
18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 LPFN LPFO PVREF VCOF AVSS3 SLCO RFI AVDD3 RFCT RFZI RFRP FEI SBAD TEI TEZI FOO TRO VREF RFGC TEBC SEL AVDD3 FMO DMO VSS3 VDD3 TESIN XVSS3 XI XO XVDD3 DVSS3R RO DVDD3 DVR LO DVSS3L ZDET VSS5 BUS0 BUS1 BUS2 BUS3 BUCK /CCE /RST VDD5 I O O O I I I I I I I I O O O O O O O I I O O O O -
TMAX Output "PVDD3" "HiZ" "AVSS3"
Inverted input pin for PLL LPF amp. Output pin for PLL LPF amp. PLL-only VREF pin. VCO filter pin. Analog GND pin. DAC output pin for data slice level generation. RF signal input pin. Zin selectable by command. Analog 3.3V power supply voltage pin. RFRP signal center level input pin. RFRP signal zero-cross input pin. RF ripple signal input pin. Focus error signal input pin. Sub-beam adder signal input pin. Tracking error input pin. Inputs when tracking servo is on. Tracking error signal zero-cross input pin. Focus equalizer output pin. Tracking equalizer output pin. Analog reference power supply voltage pin. RF amplitude adjustment control signal output pin. Tracking balance control signal output pin. APC circuit ON/OFF signal output pin. At laser on, high impedance with UHS="L", H output with UHS="H". Analog 3.3V power supply voltage pin. Feed equalizer output pin. Disc equalizer output pin. Digital GND pin. Digital 3.3V power supply voltage pin. Test input pin. Normally, fixed to "L". System clock oscillator GND pin. System clock oscillator input pin. System clock oscillator output pin. System clock oscillator 3.3V power supply voltage pin. DA converter GND pin. R-channel data forward output pin. DA converter 3.3V power supply pin. Reference voltage pin. L-channel data forward output pin. DA converter GND pin. 1 bit DA converter zero detection flag output pin. Microcontroller interface GND pin.
I/O I I I -
Microcontroller interface data I/O pins. Microcontroller interface clock input pin. Microcontroller interface chip enable signal input pin.At "L", BUS0 to BUS3 are active. Reset signal input pin. At reset, "L". Microcontroller interface 5V power supply pin.
(No.49843)1-51
1-52 (No.49843)
VDDM(SRAM) VSSM(SRAM) Po6/A9 Po5/A8 Po4/A7 Po3/A6 Po2/A5 Pi1/io1 VDDT Po7 Pi0/io0 IRQ/REQ/A10R Fi1/ /CAS Fi0/ /OE VSS VSS
48 47 44 40 42 46 43 37 36 45 41 38 34 33 39 35
· Pin layout & Block diagram
Pi2/io2
SRAM I/F Interrupt Control Timer Flag General Output Port
49
32
Po1/A4
31
Pi3/io3
I-Bus General Input Port
50
Po0/A3
DIT
30
Pi4/CLCK/io4
SRAM I/F XRAM 4k word X-Pointer register 1Mbit SRAM X-Bus Y-Bus SubQ I/F register X0 - X1 - X2 Y0 - Y1 - Y2 Y-Pointer register YRAM 4k word C-Pointer register CROM 4k word *7 ERAM 2k word Address Calc. 2sets
51
TXo
29
VDD
52
TESTP
28
Pi5/DATA/io5
53
VSSR
Bus Switch DAC
27
TSTiN/SFSY/io6
54
VRAR
26
Fi2/SBSY/io7
55
Ro
25
VSSP
PRAM 256word PROM VC0 4k*3 =12kword A0 40bit Instruction Decoder round & limit Program Control MX MY MAC A1
56
VDAR
24
PDo
57
VDAL
DAC MZ AX AY ALU A2 A3
21 23
4.24 TC94A20F-008 (IC652) : Audio digital processor with DAC and SRAM
VCoi
58
Lo
22
VDDP
59
VRAL VSSL
round & limit
20
CKi/CKo/Po6/SBOK
Timing Generator
60
VDDX
61
VSS
19
Xi
62
STANDBY
18
Xo
Microcom. I/F
63
VDD
Audio. I/F
17
VSSX
64
/LRCKiB/A2
1 2 3 4 5
6
7
8
9
10
11
12
13
14
15
16
SDo
SDi0
MiMD
BCKo
VDDT
BCKiA
LRCKo
LRCKiA
/RESET
SDi1/A0
BCKiB/A1
/MiCK/SCL
MiDiO/SDA
/MiCS/ /WE
/MiLP/ /RAS
MiACK/A11R
· Pin function Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 Symbol /RESET MiMD /MiCS /WE /MiLP /RAS MiDio /MiCK MiACK A11R VDDT SDo BCKo LRCKo SDi0 BCKiA LRCKiA SDi1 A0 BCKiB A1 LRCKiB A2 VDD STANBY VSS VSSL VRAL LO VDAL VDAR RO VRAR VSSR TESTP TXO Po0 A3 Po1 A4 Po2 A5 Po3 A6 VDDT Po4 A7 Po5 A8 Po6 A9 Po7 VSS IRQ/REQ A11R VDDM Fi0 /OE Fi1 /CAS VSSM I/O I I I O I O I/O I O O O O O I I I I O I O I O I O O I O O O O O O O O O O O O O O O O I/O O I O I O Function Hard reset input (H:Operation L: Reset) Mode select input for MCU interface (H:IIC L:Serial) Chip select input for MCU interface Write-enable for external DRAM Latch pulse input for MCU interface Low address strobe for external DRAM Data input and output for MCU interface (IIC:SDA) Clock input for MCU interface (IIC:SCL) Acknowledge output for MCU interface Address output-11 for external DRAM Power supply for digital circuit (3.3V) Data output Bit clock output LR clock output Data input-0 Bit clock input-A LR clock input-A Data input-1 (Address output-5 for external SRAM) Address output-1 for external DRAM Bit clock input-B External DRAM address output-1 LR clock input-B (Enable signal output for external SRAM) Address-2 for external DRAM Power supply for digital circuit (2.5V) Control input for stand-by mode (H:STB,L:Normal) Ground for digital circuit Ground for DAC Lch Reference voltage for DAC Lch DAC Lch output Power supply for DAC Lch (2.5V) Power supply for DAC Rch (2.5V) DAC Rch output Reference voltage for DAC Rch Ground for DAC Rch Test terminal (H:Test mode L:Normal) SPDIF output General output port-0 Address-3 for external DRAM General output port-1 Address-4 for external DRAM General output port-2 Address-5 for external DRAM General output port-3 Address-6 for external DRAM Power supply for digital circuit (3.3V) General output port-4 Address-7 for external DRAM General output port-5 (Address output-7 for external SRAM) Address-8 for external DRAM General output port-6 (Address output-6 for external SRAM) Address-9 for external DRAM General output port-7 Ground for digital circuit Interruption input (BS I/F:REQ output) Address-11 for external DRAM Power supply for built-in 1Mbit SRAM (2.5V) Flag input-0 Enable output for external up DRAM Flag input-1 Column address strobe for external DRAM Ground for built-in 1Mbit SRAM (No.49843)1-53
4.25 TMP91CW12AF4RA3 (IC501) : CPU · Pin layout
75 76 51 50
100 1 25
26
· Block diagram Pin No 1 2 3 4 5 6 7 8 9 to 11 12 13 14 to 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31,32 33 34 35 36 37 38 tp 42 43 44 45 46 47 Symbol VREFL AVSS AVCC CDON CDREQ CDMUTE MP3RESET MP3STB NC SW2 REST NC LCDCE/SO LCDDA/SI LCDCK BUSS0 BUSSI BUSSCK AM0 DVCC X2 DVSS X1 AM1 RESET NC EMU0 EMU1 B.DET SW1 P.DET NC ALE BUS3 BUS2 BUS1 BUS0 I I I I I/O I/O I/O I/O I/O O O O O O I I O O O I O I/O Connect to ground Connect to ground Connect to 3.3V CD power supply (3.3V) control CD mechanism power supply request ICD mute CD MP3 reset CD MP3 standby (H: Standby) Not connect CD mechanism SW2 CD mechanism rest SW Not connect Chip enable to LCD driver (Not connect) Data to LCD driver (Not connect) Clock to LCD driver (Not connect) JVC BUS data JVC BUS data JVC BUS clock Pull up to 3.3V Connect to 3.3V Crystal oscillator (24.576MHz) Connect to ground Crystal oscillator (24.576MHz) Pull up to 3.3V Reset Not connect Not connect Not connect Back up power supply detection (H: STOP mode) CD mechanism SW1 Main power off detection (H: HALT mode) Not connect Not connect CD DSP data3 CD DSP data2 CD DSP data1 CD DSP data0 Function
1-54 (No.49843)
Pin No 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 to 77 78 79 80 81 82,83 84 85 86 87,88 89 90 91 92 93 94 95 96 t0 99 100
Symbol BUCK CCE DSPRESET NC DISCSEL DACSEL WMASEL TESTMODE RWSEL LD/FE LOAD /BUSIO BUSIO NC DVSS NMI DVCC DACML DACMC DACMD DACCS NC BOOT NC 8VDET MP3REQ NC MP3DI MP3CK BUSINT NC DVCC NC DVSS KEY0 KEY1 TEMP IOP NC VREFH
I/O O O O I I I I O O O O O I O O O O I I I O I I I I I Clock to CD DSP data CD DSP chip enable CD DSP reset Not connect 8cm DISC mode (L) DAC mode (H) WMA mode (H)
Function
LCD/AD key/Remocon invalidity selection (L) CD-RW switching (RW:L) LOADING/FEED switching (H:LD, L:FE) Loading (L:Loading, H:Eject) JVC BUS input/output control (Inverting output) JVC BUS input/output control Not connect Connect to ground Connect to P.DET Connect to 3.3V DAC mode control latch DAC mode control BCk DAC mode control data DAC chip select Not connect Not connect CD mechanism power supply detection (L: 8V exist) CD MP3 request Not connect CD MP3 data Clock for CD MP3 data Interrupt for JVC BUS transmission start Not connect Connect to 3.3V Not connect Connect to ground Key input0 (8-bits A/D input) Key input1 (8-bits A/D input) detecting signal for high temperture IOP measuring signal of pick Not connect Connect to 3.3V
(No.49843)1-55
4.26 UPD784217AGC220 (IC701) : CPU · Pin layout
75 76 51 50
100 1 25
26
· Block diagram Pin No 1 to 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 to 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 1-56 (No.49843) Symbol NC ANT CONT VDD X2 X1 VSS XT2 XT1 RESET REMOCON BUS-INT PS2 CD-REQ RDS-SCK STEERING REMOCON KEY DATA AVDD AVREF0 VOL1 VOL2 NC MRC SQ SM AVSS NC STAGE3 AVREF BUS-SI BUS-SO BUS-SCK BUS-I/O DISP DA DISP SCK DISP CE BUZZER E2PROM-DI E2PROM-DO E2PROM-CLK I/O I I I I I I I I I I I I I I I O I/O O O O O O I O O J-BUS data input J-BUS data output J-BUS clock input/output J-BUS I/O selection output:H, input:L DISPLAY DATA output DISPLAY SCK DISPLAY CE Buzzer output I2C data input I2C data output I2C clock output System reset Remocon input J-BUS INT Power save2, H means STOP mode CD REQ INPUT Not use Steering remocon input KEY DATA A/D converter power supply A/D reference voltage Volume encoder pulse input 1 Volume encoder pulse input 2 Not use MRC input Not use, pull down S.METER input Ground Not use Feature selection, pull up Ground Not use Antenna remote control Power supply Function
Pin No 48 49 50 51 to 53 54 55 56 57 to 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 to 93 84 85 to 100
Symbol OPEN DETACH NC NC EQ-CLK EQ-DA EQ-LA NC RDS DA SD/ST AFCK SEEK/STOP CF SEL FM/AM PLL-CE PLL-DO PLL-CLK PLL-DI TEL-MUTING DIM-OUT VSS DIM-IN PS1 POWER CD-ON MUTING CD MUTING CD RESET LINE SEL VDD NC VOL-DA VOL-CLK WOOFER SEL SUB MUTING LPF1 LPF2 STAGE2 STAGE1 NC TEST NC
I/O I I O O O I I O O O O O O O I I O I I O O I O I O O I O O O I I DOOR OPEN SW Detach detect input; H means detaching Not use Not use Clock output for e-EQ IC Data output for e-EQ IC Latch output for e-EQ IC Not use Not use
Function
Station detector or stereo indicator input; H means a station is there, L means the program is stereo. Not use Auto seek and stop selecting output; H means seeking, L means receiving. Wide & Narrow FM,AM band selecting output; H=FM, L=AM CE output for PLL IC Data output for PLL IC Clock output for PLL IC Data input from PLL IC Telephone muting detection input; Active level can be selected H or L in PSM Dimmer detector output Ground Dimmer detector input L=dimmer on Power save1 L=ACC off Power on/off control output H=power on Not use Muting output L=muting on CD mute input L=mute on CD reset control out H=reset on Feature selection H: line input (U57:not support), L: support Power supply Not use Data output for e-vol IC Clock output for e-vol IC Feature selection H:support L:Not support Muting control output for subwoofer LPF control1 LPF control2 Feature selection H: R or Do L: J or U Feature selection H: R or U L: J or Do Not use For rewriting flash memory Not use
(No.49843)1-57
4.27 TDA7404D-X (IC911) : Car radio signal processor · Pin layout
1 28
14
15
· Block diagram
MIX Mono Fader Gain/Auto Zero Mixing Stage Mono Fader Loudness Soft Mute Volume Treble Bass Mono Fader Mono Fader
Input Multiplexer
Mono Fader Mono Fader Zero Cross Mono/Beep Beep Digital Control I2C-Bus
Supply
1-58 (No.49843)
(No.49843)1-59
VICTOR COMPANY OF JAPAN, LIMITED AV & MULTIMEDIA COMPANY MOBILE ENTERTAINMENT CATEGORY 10-1,1chome,Ohwatari-machi,Maebashi-city,371-8543,Japan
(No.49843)
Printed in Japan WPC