Text preview for : Quanta CT1.pdf part of HP ZE2000 M2000 DV1000 Schematic Diagram HP Pavilion ZE2000 Compaq Presario M2000 HP Pavilion DV1000 Quanta Computer Inc. CT1 Rev. 1a CPU: PENTIUM-M North Bridge: Montara-GM South Bridge: ICH4-M



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PCB STACK UP
LAYER 1 : TOP LAYER 2 : GND
A

CT1 BLOCK DIAGRAM
PENTIUM-M / Montara-GM / ICH4-M
CPU THERMAL SENSOR
GMT-781 PAGE: 3

LAYER 3 : IN1 LAYER 4 : IN2 LAYER 5 : VCC LAYER 6 : BOT

CPU PENTIUM-M
478 Pins (micro FC-PGA)
PAGE: 3, 4 HCLK_CPU, HCLK_CPU#

14.318MHz

A

SYSTEM POWER(1.2V/1.05V/1.25V) CLOCK GEN
CY28346/ ICS950810 PCLK_591

PAGE: 38

HCLK_MCH, HCLK_MCH# DREFSSCLK CLK66_MCH

CPU CORE MAX1907 POWER 1.356V

FSB 4X100MHZ

PAGE: 33

PAGE: 2

SYSTEM MAX1999 POWER(3/5V)

PAGE: 36

CRT port PAGE: 30 LCD PanelPAGE: 15

R.G,B LVDS X1

NORTH BRIDGE Montara-GM
732 micro-FCBGA
INTEGRADED VGA FUNCTION PAGE: 5, 6, 7

DDR I/F 2.5V, 266MHz

DDR-SODIMM1
PAGE: 11, 12

SYSTEM POWER(2.5VSUS/1.5V_S5)
PAGE: 37
B

B

DDR-SODIMM2
PAGE: 11, 12

BATT CHARGER
PAGE: 34

7015 DVOC
PAGE: 13
32.768KHz 14.318MHz

14M_ICH CLK66_ICH PCLK_ICH CLK48_USB

HUB LINK
66MHZ

DISCHARGE
PAGE: 35 DREFCLK PCLK_LAN PCI_CLK_7411 PCLK_MINI

USB PORT 0, 1
PAGE: 19

USB 2.0

33MHZ, 3.3V PCI

ICH4-M
1st IDE - HDD
PAGE: 28

AC97

24.576MHz

25MHz

24.576MHz

48MHz

ATA 66/100

421 BGA
PWRCLKP PWRCLKN DIB_DATAN DIB_DATAP

2nd IDE - CDROM
C

AC97
CX20468-31 MBAMC20493-010
PAGE: 20

LAN
Realtek 8100CL
PAGE: 23

MINI-PCI

ATA 66/100

PAGE: 28

PAGE: 8, 9, 10

CARDBUS / IEEE 1394 CONTROLLER/CF
TI 7411
PAGE: 16, 17, 18, 19

C

3.3V LPC, 33MHz
32.768KHz

PAGE: 14

CABLE DOCK

Daughter Board
TV, USB, BLUE TOOTH

AV BOARD

Power Board

PC97551
PCLK_591

SMARTDAA MODEM, MDC
PAGE: 22

AMP
TPA0312 PAGE: 21

5 IN 1
CARD READER SD/MMC, SM, MS, XD PAGE: 18

CARDBUS SLOT X1
PAGE: 16

1394 CONN
PAGE: 19

TQFP 176
PAGE: 27

WIRE RJ11 JACK
PAGE: 24

D

REQ0 : PCMCIA REQ1 : MINI PCI REQ2 : LAN REQ3 : X PIRQA#: RTL8100CL PIRQB#: NC PIRQC#: MINI PCI PIRQD#: MINI PCI PIRQE#: 7411 PIRQF#: 7411 PIRQG#: 7411 PIRQH#: Internal USB

FAN
PAGE: 30

Touchpad
PAGE: 32

Keyboard
PAGE: 32

FLASH
PAGE: 26

JACK
HEADPHONE, 2ND HEADPHONE, MIC PAGE: 21

RJ45 JACK
PAGE: 24

D

PROJECT : CT1

Quanta Computer Inc.
Size Document Number Custom BLOCK DIAGRAM Date: Wednesday, April 14, 2004
7

Rev 1A 1
8

Sheet

of

38

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CLK GEN
L33 FBMJ2125HM330-T +3V

S2 1 1 1 1
A

S1 0 0 1 1 0 0 1 1

S0 0 1 0 1 0 1 0 1

CPU 66 100 200 133 66 100 200 133

3V66[0..4] 66IN 66IN 66IN 66IN 66 66 66 66

3V66_5/66IN 66 Input 66 Input 66 Input 66 Input 66 Input 66 Input 66 Input 66 Input
9 CLK_PWRDWN# 9 STP_PCI# 9,33 STP_CPU# 33 CLK_EN# CLK_EN# CGCLK_SMB CGDAT_SMB 10K SELPSB2_CLK SELPSB1_CLK SELPSB0_CLK CLKVDD_CPU +3V C396 2.2p R188 2M 1

VDDA_CKG

300 ohms@100Mhz
C421 C395 2.2p XIN 2 Y4 14.318MHz/20PF 2 XOUT R211 *10K 25 34 53 28 30 29 40 55 54 1 8 14 19 32 46 50 PWR_DWN# PCI_STP# CPU_STP# PWRGD# SCLK SDATA SEL2 SEL1 SEL0 VDD_REF VDD_PCI_1 VDD_PCI_2 VDD_3V66_1 VDD_3V66_2 VDD_CPU_1 VDD_CPU_2 IREF MULT0 48M_USB 48M_DOT VDD_48MHZ GND_REF GND_PCI_1 GND_PCI_2 GND_3V66_1 GND_3V66_2 GND_IREF GND_CPU 3 26 27 .01U/16V/0402 C427 10U/10V/V R198 R201 R194 R196 49.9/F 49.9/F 49.9/F 49.9/F
A

0 0 0 0
+3V

U20 XTAL_IN XTAL_OUT

VDDA

VSSA

REF CPU2 CPU#2 CPU1 CPU#1 CPU0 CPU#0

56 45 44 49 48 52 51 33 35 24 23 22 21 7 6 5 18 17 16 13 12 11 10 39 38

14M_REF

R187 4P2R-S-33 R_HCLK_CPU 1 R_HCLK_CPU# 3 4P2R-S-33 R_HCLK_MCH 1 R_HCLK_MCH# 3 R_HCLK_ITP R_HCLK_ITP# 3V66_0 3V66_1 3V66_5 R_CLK66_MCH R_CLK66_ICH R_CLK66_SSC R_PCLK_ICH R_PCIF1 R_PCIF0 R_PCLK_SIO R_PCLK_PCM R_PCLK_AUDIO R_PCLK_591 R_PCLK_CBS R_PCLK_TCPA R_PCLK_MINI R_CLK48_USB R_DREFCLK R212 R210 R206 R193

33 2 RN59 4 2 RN58 4 T47 T50 T57 T58 T54 33 T49 T48 PCLK_ICH 33 33 33 HCLK_CPU HCLK_CPU# HCLK_MCH HCLK_MCH# B: Swap the pin for select to 48M wo SSC or 66M w SSC . DREFSSCLK CLK66_MCH CLK66_ICH

14M_ICH

9

HCLK_CPU 3 HCLK_CPU# 3 HCLK_MCH 5 HCLK_MCH# 5

R190 *10K

R192 10K SELPSB1_CLK SELPSB0_CLK

+3V

PR93 10K

CLK_EN#

from IMVP4
R207

CK-408

3V66_0 3V66_1/VCH 66IN/3V66_5 66B2/3V66_4 66B1/3V66_3 66B0/3V66_2 PCI_F2 PCI_F1 PCI_F0 PCI6 PCI5 PCI4 PCI3 PCI2 PCI1 PCI0

DREFSSCLK 6 CLK66_MCH 6 CLK66_ICH 9 PCLK_ICH 8

27

CPU66M# R391 *0

R189 10K

R191 *10K

R202 R199 R197 R195 R204 R208

T53 T52 T51

33 33 33 33 22 33

PCI_CLK_7411 PCLK_591 PCLK_LAN PCLK_MINI CLK48_USB DREFCLK

PCI_CLK_7411 17 PCLK_591 27 PCLK_LAN 23 PCLK_MINI 14 CLK48_USB 9 DREFCLK 6
B

B

L34 +3V

FBMJ2125HM330-T CLKVDD_CPU C428 10U/10V/V C401 C405 C422 L32 +3V .1U/16V/0402 .1U/16V/0402 .1U/16V/0402 +3V

R203 R200

475/F 10K

IREF_CLK CK_MULT0

42 43

C434 *.1U_0402

FBMJ2125HM330-T CLK_48MVDD 37

300 ohms@100Mhz

C419 10U/10V/V

C418 .1U/16V/0402 36 GND_48MHZ CK-TITAN-B

C398 C403 C410 C413 .1U/16V/0402

4 9 15 20 31

.1U/16V/0402 .1U/16V/0402 .1U/16V/0402 +3V

CYPRESS: CY28346

C

2

R220 10K 1

R219 10K
C

9

PDAT_SMB

3 2N7002E Q28 +3V 2

CGDAT_SMB

CGDAT_SMB 12

41 47

internal internal pull-up pull-down pin 6,FS_IN1 pin 5,FS_IN0MHz 0 0 1 1 0 1 0 1 14M in 48M out 14M in 66M out 48M in/out, 66M in/out 48M in/out, 66M in/out

SPREAD % -1.0% down sprd -1.0% down sprd -1.0% down sprd +-1.0% down center

9

PCLK_SMB

3 2N7002E Q27

1

CGCLK_SMB

CGCLK_SMB 12

CLK66_ICH CLK66_MCH DREFSSCLK CLK48_USB DREFCLK
D

PCLK_LAN PCLK_ICH PCLK_591 PCLK_MINI PCI_CLK_7411 C404 15P/0603 C409 15P/0603 C414 15P/0603 C411 15P/0603 C423 *10P C417 *10P C412 *10P C402 15P/0603 C406 15P/0603 C399 15P/0603
D

PROJECT : CT1

Quanta Computer Inc.
Size Document Number Custom Date:

CLOCK GENERATOR
Sheet 2
8

Rev 1A of 38

Wednesday, April 14, 2004
7

1

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PDF created with pdfFactory trial version www.pdffactory.com

A

B

C

D

E

HD#[0..63] U9A 5 HA#[3..31] HA#[3..31] HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31 P4 U4 V3 R3 V2 W1 T4 W2 Y4 Y1 U1 AA3 Y3 AA2 AF4 AC4 AC7 AC3 AD3 AE4 AD2 AB4 AC6 AD5 AE2 AD6 AF3 AE1 AF1 A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31#

HD#[0..63]

5 +3V

Banias
1 OF 3

4

REQUEST PHASE SIGNALS

DATA PHASE SIGNALS

5 5
3

HADSTB0# HADSTB1# HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4 ADS#

U3 AE5 R2 P3 T2 P1 T1 N2

ADSTB0# ADSTB1# REQ0# REQ1# REQ2# REQ3# REQ4# ADS# ERROR SIGNALS

5 5 5 5 5 5

VCCP

R167

56 5 5 5 5 5 5 5 8 6 4 2 HBREQ0# BPRI# BNR# HLOCK# HIT# HITM# DEFER#

H_IERR#

A4 N4 J3 L1 J2 K3 K4 L4

IERR# BREQ0# BPRI# BNR# LOCK# HIT# HITM# DEFER# BPM0# BPM1# BPM2# BPM3# TRDY# RS0# RS1# RS2# A20M# FERR# IGNNE# PWRGOOD SMI# TCK TDO TDI TMS TRST# ITP_CLK0 ITP_CLK1 PREQ# PRDY# DBR# LINT0 LINT1 STPCLK# SLP# DPSLP# THERMDA THERMDC THERMTRIP# PROCHOT# THERMAL DIODE ARBITRATION PHASE SIGNALS SNOOP PHASE SIGNALS RESPONSE PHASE SIGNALS

RN57 VCCP 7 5 3 1

BPM0# BPM1# BPM2# BPM3# 5 5 5 5 8 8 8 9 8 HTRDY# RS#0 RS#1 RS#2 A20M# FERR# IGNNE# CPUPWRGD SMI#

2

*8P4R-S-1K

C8 B8 A9 C9 M3 H1 K1 L2 C2 D3 A3 E4 B4 A13 A12 C12 C11 B13 A16 A15 B10 A10 A7 D1 D4 C6 A6 B7 B18 A18 C17 B17

D0# D1# D2# D3# D4# D5# D6# D7# D8# D9# D10# D11# D12# D13# D14# D15# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63#

A19 A25 A22 B21 A24 B26 A21 B20 C20 B24 D24 E24 C26 B23 E23 C25 H23 G25 L23 M26 H24 F25 G24 J23 M23 J25 L26 N24 M25 H26 N25 K25 Y26 AA24 T25 U23 V23 R24 R26 R23 AA23 U26 V24 U25 V26 Y23 AA26 Y25 AB25 AC23 AB24 AC20 AC22 AC25 AD23 AE22 AF23 AD24 AF20 AE21 AD21 AF25 AF22 AF26

HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63

+3V R182 2 Q23 27,34 MBDATA 3 +3V 2 C369 .1U/16V/0402 1 2N7002E 1 THCLK_SMB THERMDA C368 2200P/50V THERMDC 36 1999_RST# 2 3 4 2N7002E 10K R183 10K 6657VCC R170 100/F
4

1 THDAT_SMB

H/W MONITOR
U11
VCC DXP DXN -OVT SMCLK SMDATA -ALT GND 8 7 6 5 THCLK_SMB THDAT_SMB

27,34

MBCLK

Q24 3

C
ICH_THRM# 9

MAX6657/GMT-781

+3V

VCCP R184 1K
3

THERMTRIP#

R178

330 2 1

3

R179 56

THERMTRIP_SIO Q22 3904

27

VCCP

3VSUS
2

CPUPWRGD TCK TDO TDI TMS TRST# HCLK_ITP HCLK_ITP# PREQ# PRDY# DBR#

PC COMPATIBILITY SIGNALS

VCCP

R168

330/F

DIAGNOSTIC & TEST SIGNALS

DSTBN0# DSTBP0# DSTBN1# DSTBP1# DSTBN2# DSTBP2# DSTBN3# DSTBP3# DBI0# DBI1# DBI2# DBI3# DBSY# DRDY#

C23 C22 K24 L24 W25 W24 AE24 AE25 D25 J26 T24 AD20 M2 H2 B14 B15

HDSTBN0# HDSTBP0# HDSTBN1# HDSTBP1# HDSTBN2# HDSTBP2# HDSTBN3# HDSTBP3# HDBI0# HDBI1# HDBI2# HDBI3# DBSY# DRDY#

5 5 5 5 5 5 5 5 5 5 5 5 5 5 HCLK_CPU# 2 HCLK_CPU 2

R172 *54.9/F

R171 *54.9/F

R48 39/F

R173 150

R166 150

DBR# TDI TMS TCK TDO CPURST# TRST# R176 680 R174 27.4/F

T8 T91 T12 T105 T106 T107 T87

T94 T89 T5 T90 9 8 8 8 8 6,8 DBR# INTR NMI STPCLK# CPUSLP# DPSLP#

R177 R181

*22.6/F *22.6/F

TDO-1

CPUSLP#

EXECUTION CONTROL SIGNALS

BCLK1 BCLK0

THERMDA THERMDC
1

INIT# RESET# DPWR#

B5 B11 CPURST# C19

CPUINIT# CPURST# DPWR#

8 5 6 R164 *22 C372 R165
1

THERMTRIP# VCCP R180 56 CPU_PROCHOT#

*22 C373 *5P

Banias_Processor

*5P

PROJECT : CT1

Quanta Computer Inc.

BANIAS CPU 1 of 2 (HOST BUS)
A B C D

Size Document Number Custom Date: Wednesday, April 14, 2004
E

Rev 1A Sheet 3 of 38

PDF created with pdfFactory trial version www.pdffactory.com

A

B

C

D

E

COMP0 & 2=> Trace Z =27.4ohm COMP1 & 3=> Tracer Z =55ohm

WITHIN 0.5" & SPACE 50 mil
R16 R15 R14 R20 R12 1K/F T83 R13 T4 2K/F TEST1 TEST2 R169 *1K R26 *1K 27.4/F 54.9/F 27.4/F 54.9/F COMP0 COMP1 COMP2 COMP3 GTLREF0 P25 P26 AB2 AB1 AD26 E26 G1 AC1 C5 F23

VCCP U9B COMP0 COMP1 COMP2 COMP3 GTLREF0 GTLREF1 GTLREF2 GTLREF3 TEST1 TEST2 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS A2 A5 A8 A11 A14 A17 A20 A23 A26 B3 B6 B9 B12 B16 B19 B22 B25 C1 C4 C7 C10 C13 C15 C18 C21 C24 D2 D5 D7 D9 D11 D13 D15 D17 D19 D21 D23 D26 E3 E6 E8 E10 E12 E14 E16 E18 E20 E22 E25 F1 F4 F5 F7 F9 F11 F13 F15 F17 F19 F21 F24 G2 G6 G22 G23 G26 H3 H5 H21 H25 J1 J4 J6 J22 J24 K2 K5 K21 K23 K26 L3 L6 L22 L25 M1 M4 M5 M21 M24 N3 N6 N22 N23 N26 P2 P5 P21 P24 R1 R4 3,5,7,8,10,35,38 VCCP D10 D12 D14 D16 E11 E13 E15 F10 F12 F14 F16 K6 L5 L21 M6 M22 N5 N21 P6 P22 R5 R21 T6 T22 U21 P23 W4 VCCP0 VCCP1 VCCP2 VCCP3 VCCP4 VCCP5 VCCP6 VCCP7 VCCP8 VCCP9 VCCP10 VCCP11 VCCP12 VCCP13 VCCP14 VCCP15 VCCP16 VCCP17 VCCP18 VCCP19 VCCP20 VCCP21 VCCP22 VCCP23 VCCP24 VCCP25 VCCP26 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS U9C W23 W26 Y2 Y5 Y21 Y24 AA1 AA4 AA6 AA8 AA10 AA12 AA14 AA16 AA18 AA20 AA22 AA25 AB3 AB5 AB7 AB9 AB11 AB13 AB15 AB17 AB19 AB21 AB23 AB26 AC2 AC5 AC8 AC10 AC12 AC14 AC16 AC18 AC21 AC24 AD1 AD4 AD7 AD9 AD11 AD13 AD15 AD17 AD19 AD22 AD25 AE3 AE6 AE8 AE10 AE12 AE14 AE16 AE18 AE20 AE23 AE26 AF2 AF5 AF9 AF11 AF13 AF15 AF17 AF19 AF21 AF24

CHANGE TO 0805
R21 +1.5V *0 VCCP

Banias
2 OF 3

Banias
3 OF 3
POWER, GROUND AND NC

Q4
4

+3V

1 2

VIN GND

OUT

3

1.8V

WITHIN 0.5" & SPACE 25 mil
A0 : STUFF A1 : NC

4

C44 0.1U_0402

G952

C55 0.1U_0402

FOR VTT/ 0.1UF X10
VCCP 1.8V

AC26 N1 B1 F26 VCC_CORE C59 33 VCC_CORE D6 D8 D18 D20 D22 E5 E7 E9 E17 E19 E21 F6 F8 F18 F20 F22 G5 G21 H6 H22 J5 J21 K22 U5 V6 V22 W5 W21 Y6 Y22 AA5 AA7 AA9 AA11 AA13 AA15 AA17 AA19 AA21 AB6 AB8 AB10 AB12 AB14 AB16 AB18 AB20 AB22 AC9 AC11 AC13 AC15 AC17 AC19 AD8 AD10 AD12 AD14 AD16 AD18 AE9 AE11 AE13 AE15 AE17 AE19 AF8 AF10 AF12 AF14 AF16 AF18

POWER, GROUND, RESERVED SIGNALS VCCA3 VCCA2 VCCA1 VCCA0

C26 + C352 150U/6.3V + 10U/6.3V C351 *150U/6.3V

C41 10U/6.3V

C27 10U/6.3V

VCCP

C16 .01U

C60 .01U

C17 .01U

C36 .01U

3

C377 .1U

C79 .1U

C40 .1U

C39 .1U

C15 .1U

CC0402

VCCP

C28 .1U

C38 .1U

C379 .1U

C378 .1U

C42 .1U

VCC_CORE

10U/6.3V/X5R(CC0805) *35
C24 10U/6.3V C25 10U/6.3V C30 10U/6.3V C31

VCC_CORE

C7
2

C4 10U/6.3V

C10 10U/6.3V

C32 10U/6.3V

C33 10U/6.3V

C45 10U/6.3V

C9 10U/6.3V

10U/6.3V

10U/6.3V

VCC_CORE

C29 10U/6.3V

C34 10U/6.3V

C48 10U/6.3V

C47 10U/6.3V

C19 10U/6.3V

VCC_CORE

VCC_CORE

C8 10U/6.3V

C20 10U/6.3V

C21 10U/6.3V

C22 10U/6.3V

C23 10U/6.3V

C43 10U/6.3V

C53 10U/6.3V

C49 10U/6.3V

C353 10U/6.3V

1

VCC_CORE

VCC_CORE

VCC00 VCC01 VCC02 VCC03 VCC04 VCC05 VCC06 VCC07 VCC08 VCC09 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 Banias_Processor

10U/6.3V

33 33 33 33 33 33

CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5

E2 F2 F3 G3 G4 H4

VID0 VID1 VID2 VID3 VID4 VID5

VID

3

R17 R18

*54.9/F *54.9/F

Z0501 Z0502 Z0503 Z0504 Z0505 Z0506 Z0507

AE7 AF6 B2 AF7 C14 C3 C16 E1 R6 R22 R25 T3 T5 T21 T23 T26 U2 U6 U22 U24 V1 V4 V5 V21 V25 W3 W6 W22

VCCSENSE VSSSENSE NC0 NC1 NC2 NC3 TEST3 PSI VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS Banias_Processor

T6 T71 T88 R175T7

*1K

2

1

C35 10U/6.3V

C52 10U/6.3V

C51 10U/6.3V

C50 10U/6.3V

C46 10U/6.3V

C354 10U/6.3V

C355 10U/6.3V

C356 10U/6.3V

C357 10U/6.3V

C18 10U/6.3V

PROJECT : CT1

Quanta Computer Inc.

BANIAS CPU 2 of 2 (PWR)
A B C D

Size B Date:

Document Number

CPU POWER
Wednesday, April 14, 2004 Sheet
E

Rev 1A 4 of 38

PDF created with pdfFactory trial version www.pdffactory.com

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7

8

U16E U16A 3 HA#[3..31] HA#[3..31] HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31 ADS# HADSTB0# HADSTB1# HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4 RS#0 RS#1 RS#2 DBSY# BPRI# BNR# HBREQ0# HLOCK# HIT# HITM# DRDY# HTRDY# DEFER# CPURST# HCLK_MCH HCLK_MCH# HXSWING HYSWING HXRCOMP HYRCOMP HL0 HL1 HL2 HL3 HL4 HL5 HL6 HL7 HL8 HL9 HL10 P23 T25 T28 R27 U23 U24 R24 U28 V28 U27 T27 V27 U25 V26 Y24 V25 V23 W25 Y25 AA27 W24 W23 W27 Y27 AA28 W28 AB27 Y26 AB28 L28 T26 AA26 R28 P25 R23 R25 T23 N23 P26 M27 M26 P28 N25 M23 P27 N27 N28 N24 M25 M28 F15 AE29 AD29 B18 K28 B20 H28 U7 U4 U3 V3 W2 W6 V6 W7 T3 V5 V4 W3 V2 HLRCOMP HUBSWING_MCH HUBVREF_GMCH 1 1 C101 .01U 2 2 T2 U2 W1 HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31 HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63 DINV#0 DINV#1 DINV#2 DINV#3 HDSTBN#0 HDSTBP#0 HDSTBN#1 HDSTBP#1 HDSTBN#2 HDSTBP#2 HDSTBN#3 HDSTBP#3 HAVREF HCCVREF HDVREF0 HDVREF1 HDVREF2 K22 H27 K25 L24 J27 G28 L27 L23 L25 J24 H25 K23 G27 K26 J23 H26 F25 F26 B27 H23 E27 G25 F28 D27 G24 C28 B26 G22 C26 E26 G23 B28 B21 G21 C24 C23 D22 C25 E24 D24 G20 E23 B22 B23 F23 F21 C20 C21 G18 E19 E20 G17 D20 F19 C19 C17 F17 B19 G16 E16 C16 E17 D16 C18 J25 E25 B25 G19 J28 K27 C27 D26 E22 E21 D18 E18 Y22 Y28 K21 J21 J17 HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63 HD#[0..63] HD#[0..63] 3 AA29 W29 U29 N29 L29 J29 G29 E29 C29 AE28 AC28 E28 D28 AJ27 AG27 AC27 F27 A27 AJ26 AB26 W26 U26 R26 N26 L26 J26 G26 AE25 AA25 D25 A25 AG24 AA24 V24 T24 P24 M24 K24 H24 F24 B24 AJ23 AC23 AA23 D23 A23 AE22 W22 U22 R22 N22 L22 J22 F22 C22 AG21 AB21 AA21 Y21 V21 T21 P21 M21 H21 D21 A21 AJ20 AC20 AA20 J20 AE19 AB19 H19 D19 A19 AJ18 AG18 AA18 J18 F18 AC17 AB17 U17 R17 N17 H17 D17 A17 AE16 AA16 T16 VSS0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 P16 J16 F16 AG15 AB15 U15 R15 N15 H15 D15 AC14 AA14 T14 P14 J14 AE13 AB13 U13 R13 N13 H13 F13 D13 A13 AJ12 AG12 AA12 J12 AJ11 AC11 AB11 H11 F11 D11 AJ10 AE10 AA10 J10 C10 AG9 AB9 W9 U9 T9 R9 N9 L9 E9 AC8 Y8 V8 T8 P8 K8 H8 AJ7 AE7 AA7 R7 M7 J7 G7 E7 C7 AG6 Y6 L6 Y5 U5 B5 AE4 AC4 AA4 W4 T4 N4 K4 G4 D4 AJ3 AG3 R2 AJ1 AE1 AA1 U1 L1 G1 C1 F20

HCLK_MCH HCLK_MCH#
A

A

R104 *22 C247 *5P

R108 *22 C252 *5P

HOST

VCCP

R50 301/F

width:10 mil; space: 20 mil

3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 2 2

ADS# HADSTB#0 HADSTB#1 HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4 RS#0 RS#1 RS#2 DBSY# BPRI# BNR# BREQ0# HLOCK# HIT# HITM# DRDY# HTRDY# DEFER# CPURST# BCLK BCLK# HXSWING HYSWING HXRCOMP HYRCOMP HI_0 HI_1 HI_2 HI_3 HI_4 HI_5 HI_6 HI_7 HI_8 HI_9 HI_10 HLSTB HLSTB# HLRCOMP PSWING HLVREF

1

B

R55 150/F

C96 .1U

VCCP

B

2

R89 49.9/F

VSS

VCCP

C217

C200

R86 100/F

R87 301/F

width:10 mil; space: 20 mil

1U_10V .1U

VCCP

R88 150/F

C212 .1U

HCLK_MCH HCLK_MCH#

1

R98 49.9/F

2

R63 R85
C

27.4/F 27.4/F

+1.5V

width:10 mil; space: 20 mil

C

HUB I/F

HDBI0# HDBI1# HDBI2# HDBI3#

3 3 3 3 3 3 3 3 3 3 3 3

C237 1U_10V

1

C233 .1U

R94 100/F

R52 255/F

0.8V +/- 8%
9 9 9 1.2V HL[0..10] HLSTB HLSTB# R51 27.4/F HL[0..10] 1

HDSTBN0# HDSTBP0# HDSTBN1# HDSTBP1# HDSTBN2# HDSTBP2# HDSTBN3# HDSTBP3# HAVREF HCCVREF

2

VCCP

R54 C62 162/F .1U

C98 .1U

R59 49.9/F HDVREF C144 1 C110 C159 C105 .1U 2 .1U .1U R78 100/F

2 R58 127/F 2 1 C106 .1U

0.35V +/- 8%
HLRCOMP: 855GM, 27.4/F pull-up to 1.2V 855GME, 37.4/F pull-up to 1.35V

C102 Montara-GM .01U

1U_10V

D

Montara-GM

D

PROJECT : CT1

Quanta Computer Inc.

MONTARA-GME/ 855GM+ 1of 3 (HOST & GND)
1 2 3 4 5 6

Size Document Number Custom MontaraGM_A Date: Wednesday, April 14, 2004
7

Rev 1A Sheet 5
8

of

38

PDF created with pdfFactory trial version www.pdffactory.com

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2

3

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6

7

8

+3V DREFCLK 1 R49 R34 R33 R47
A

*10K *10K 10K/F 100K

LCLKCTLA LCLKCTLB EXTTS0 DVOBCLKINT R53 1K ADDETECT R35 *1K +1.5V

R36 *22 2

R_MD[0..63] R_MA[0..12] R_SM_DQS[0..7] M_DM[0..7]

R_MD[0..63] 11 R_MA[0..12] 11,12 R_SM_DQS[0..7] 11 M_DM[0..7] 11

C65 *12P

U16C R_MA0 R_MA1 R_MA2 R_MA3 R_MA4 R_MA5 R_MA6 R_MA7 R_MA8 R_MA9 R_MA10 R_MA11 R_MA12 R_SM_DQS0 R_SM_DQS1 R_SM_DQS2 R_SM_DQS3 R_SM_DQS4 R_SM_DQS5 R_SM_DQS6 R_SM_DQS7 R_SM_DQS8 SM_B1 SM_B2 SM_B4 SM_B5 SM_CS0# SM_CS1# SM_CS2# SM_CS3# M_DM0 M_DM1 M_DM2 M_DM3 M_DM4 M_DM5 M_DM6 M_DM7 M_DM8 R_BA0 R_BA1 AC18 AD14 AD13 AD17 AD11 AC13 AD8 AD7 AC6 AC5 AC19 AD5 AB5 AG2 AH5 AH8 AE12 AH17 AE21 AH24 AH27 AD15 AD16 AC12 AF11 AD10 AD23 AD26 AC22 AC25 AE5 AE6 AE9 AH12 AD19 AD21 AD24 AH28 AH15 AD22 AD20 SMA0 SMA1 SMA2 SMA3 SMA4 SMA5 SMA6 SMA7 SMA8 SMA9 SMA10 SMA11 SMA12 SDQS0 SDQS1 SDQS2 SDQS3 SDQS4 SDQS5 SDQS6 SDQS7 SDQS8 SMA_B1 SMA_B2 SMA_B4 SMA_B5 SCS#0 SCS#1 SCS#2 SCS#3 SDM0 SDM1 SDM2 SDM3 SDM4 SDM5 SDM6 SDM7 SDM8 SBA0 SBA1 SRAS# SCAS# SWE# SCKE0 SCKE1 SCKE2 SCKE3 SCMDCLK0 SCMDCLK#0 SCMDCLK1 SCMDCLK#1 SCMDCLK2 SCMDCLK#2 SCMDCLK3 SCMDCLK#3 SCMDCLK4 SCMDCLK#4 SCMDCLK5 SCMDCLK#5 SDQ0 SDQ1 SDQ2 SDQ3 SDQ4 SDQ5 SDQ6 SDQ7 SDQ8 SDQ9 SDQ10 SDQ11 SDQ12 SDQ13 SDQ14 SDQ15 SDQ16 SDQ17 SDQ18 SDQ19 SDQ20 SDQ21 SDQ22 SDQ23 SDQ24 SDQ25 SDQ26 SDQ27 SDQ28 SDQ29 SDQ30 SDQ31 SDQ32 SDQ33 SDQ34 SDQ35 SDQ36 SDQ37 SDQ38 SDQ39 SDQ40 SDQ41 SDQ42 SDQ43 SDQ44 SDQ45 SDQ46 SDQ47 SDQ48 SDQ49 SDQ50 SDQ51 SDQ52 SDQ53 SDQ54 SDQ55 SDQ56 SDQ57 SDQ58 SDQ59 SDQ60 SDQ61 SDQ62 SDQ63 SDQ64 SDQ65 SDQ66 SDQ67 SDQ68 SDQ69 SDQ70 SDQ71 AF2 AE3 AF4 AH2 AD3 AE2 AG4 AH3 AD6 AG5 AG7 AE8 AF5 AH4 AF7 AH6 AF8 AG8 AH9 AG10 AH7 AD9 AF10 AE11 AH10 AH11 AG13 AF14 AG11 AD12 AF13 AH13 AH16 AG17 AF19 AE20 AD18 AE18 AH18 AG19 AH20 AG20 AF22 AH22 AF20 AH19 AH21 AG22 AE23 AH23 AE24 AH25 AG23 AF23 AF25 AG25 AH26 AE26 AG28 AF28 AG26 AF26 AE27 AD27 AG14 AE14 AE17 AG16 AH14 AE15 AF16 AF17 AC16 AC15 R_MD0 R_MD1 R_MD2 R_MD3 R_MD4 R_MD5 R_MD6 R_MD7 R_MD8 R_MD9 R_MD10 R_MD11 R_MD12 R_MD13 R_MD14 R_MD15 R_MD16 R_MD17 R_MD18 R_MD19 R_MD20 R_MD21 R_MD22 R_MD23 R_MD24 R_MD25 R_MD26 R_MD27 R_MD28 R_MD29 R_MD30 R_MD31 R_MD32 R_MD33 R_MD34 R_MD35 R_MD36 R_MD37 R_MD38 R_MD39 R_MD40 R_MD41 R_MD42 R_MD43 R_MD44 R_MD45 R_MD46 R_MD47 R_MD48 R_MD49 R_MD50 R_MD51 R_MD52 R_MD53 R_MD54 R_MD55 R_MD56 R_MD57 R_MD58 R_MD59 R_MD60 R_MD61 R_MD62 R_MD63 T111 T32 T38 T42 T109 T36 T43 T40 T33 T31

R45 +1.5V R42

100K DVOBFLDSTL

TV ENCODER: REQUEST! "ADDETECT" must be low, when we use DVO port.
100K T103 T22 T25 T104 T20 T102 T97 T100 T95 T99 T86 T92 T98 T101 T24 T23 T93 T84 13 DVOBCLKINT DVOBINTRB# R3 R5 R6 R4 P6 P5 N5 P2 N2 N3 M1 M5 P3 P4 T6 T5 L2 M2 G2 M3 K5 K1 K3 K2 J6 J5 H2 H1 H3 H4 H6 G3 J3 J2 K6 L5 L3 H5 MI2C_CLK MI2C_DATA DVI_CLK DVI_DAT K7 N6 N7 M6 P7 T7 E5 F5 E3 E2 G5 F4 G6 F6 L7 D5 F7 Y3 D1 F1 U16B DVOBD0 DVOBD1 DVOBD2 DVOBD3 DVOBD4 DVOBD5 DVOBD6 DVOBD7 DVOBD8 DVOBD9 DVOBD10 DVOBD11 DVOBCLK DVOBCLK# DVOBHSYNC DVOBVSYNC DVOBLANK# DVOBFLDSTL DVOBINTRB# DVOBCLKINT DVOCD0 DVOCD1 DVOCD2 DVOCD3 DVOCD4 DVOCD5 DVOCD6 DVOCD7 DVOCD8 DVOCD9 DVOCD10 DVOCD11 DVOCCLK DVOCCLK# DVOCHSYNC DVOCVSYNC DVOCBLANK# DVOCFLDSTL I2CCLK I2CDATA DVICLK DVIDATA DVI2CLK DVI2DATA ADDID0 ADDID1 ADDID2 ADDID3 ADDID4 ADDID5 ADDID6 ADDID7 ADDETECT DPMS AGPBUSY# CLK66IN DVORCOMP GVREF IYAM0 IYAP0 IYAM1 IYAP1 IYAM2 IYAP2 IYAM3 IYAP3 ICLKAM ICLKAP IYBM0 IYBP0 IYBM1 IYBP1 IYBM2 IYBP2 IYBM3 IYBP3 ICLKBM ICLKBP G14 F14 E15 E14 C15 C14 C13 B13 D14 E13 H12 G12 E12 E11 C12 C11 G11 G10 E10 F10 B4 C5 A5 G8 F8 R43 LIBG A10 TXLOUT0TXLOUT0+ TXLOUT1TXLOUT1+ TXLOUT2TXLOUT2+ T19 T96 TXLCLKOUTTXLCLKOUT+ TXLOUT0TXLOUT0+ TXLOUT1TXLOUT1+ TXLOUT2TXLOUT2+ 15 15 15 15 15 15

A

DVO

TXLCLKOUT- 15 TXLCLKOUT+ 15

LVDS

T34 11,12 11,12 11,12 11,12 11,12 11,12 11,12 11,12 SM_B1 SM_B2 SM_B4 SM_B5 SM_CS0# SM_CS1# SM_CS2# SM_CS3#

DVOBFLDSTL DVOBINTRB# DVOBCLKINT DVOCD0 DVOCD1 DVOCD2 DVOCD3 DVOCD4 DVOCD5 DVOCD6 DVOCD7 DVOCD8 DVOCD9 DVOCD10 DVOCD11

R161 R162

2.2K 2.2K EDIDCLK 15 EDIDDATA 15 DISP_ON 15 15

+3V

13 DVOCD[0..11]
B

DVOCD[0..11]

DDCPCLK DDCPDATA LCDVCCEN BLKCTL BLKEN

DDR 200/266 MHz

B

T15 BKLON 1.5K/F

13 MI2C_CLK 13 MI2C_DATA 13 13 13 13

MI2C_CLK MI2C_DATA

DVOCCLK DVOCCLK# DVOCHSYNC DVOCVSYNC T14

13 DVOCFLDSTL R32 R65 R46 R44 R67 R70 2.2K 2.2K 10K 10K 10K 10K T9 T75 T80 T77 T10 T72 T13

DAC

RED GRN BLU RED# GRN# BLU#

A7 C8 C9 A8 D8 D9 H10 J9 B6 G9 E8 R56 R57 39/F 39/F

CRT_R CRT_G CRT_B

30 30 30

T112 11,12 11,12 R_BA0 R_BA1

HSYNC VSYNC DDCACLK DDCADATA REFSET

HSYNC VSYNC DDCCLK DDCDAT 30 30

30 30

11,12 R_SRASA# 11,12 R_SCASA# 11,12 R_BMWEA# 11,12 11,12 11,12 11,12 CKE0 CKE1 CKE2 CKE3

R_SRASA# AC21 R_SCASA# AC24 R_BMWEA# AD25 CKE0 CKE1 CKE2 CKE3 AC7 AB7 AC9 AC10 AB2 AA2 AC26 AB25 AC3 AD4 AC2 AD2 AB23 AB24 AA3 AB4

+1.5V

IREF

R38

127/F

C

R40 T18 9 2 CLK66_MCH R62 *22 C108 *5P 13 R31 AGP_BUSY#

1K

ADDID7 ADDETECT DPMSCLK AGP_BUSY# DVORCOMP VREF

DREFCLK DREFSSCLK LCLKCTLA LCLKCTLB DPWR# DPSLP# RSTIN# PWROK EXTTS0

B7 B17 H9 C6 AA22 Y23 AD28 J11 D6

DREFCLK DREFSSCLK LCLKCTLA LCLKCTLB

DREFCLK 2 DREFSSCLK 2

T28 T30 2.5VSUS

12 CLK_SDRAM0 12 CLK_SDRAM0# 12 CLK_SDRAM1 12 CLK_SDRAM1# 12 CLK_SDRAM3 12 CLK_SDRAM3# 12 CLK_SDRAM4 12 CLK_SDRAM4#

C

EXTTS0

DPWR# DPSLP# PCIRST# PWROK

3 3,8 8,13,14,17,23,27,28 9,27,33

T26 T27 C182 R103 150/F R105 604/F R66 .1U 60.4/F

VREF

C66 40.2/F .1U A2 B1 AH1 AJ2 AJ4 AA9 A28 AJ28 A29 B29 AH29 AJ29 NC11 NC10 NC9 NC8 NC7 NC6 NC5 NC4 NC3 NC2 NC1 NC0

MISC

DVORCOMP width:10 mil; space: 20 mil
+1.5V

R23
D

RVSD14 RVSD13 GST2 RVSD11 RVSD10 RVSD9 GST1 RVSD7 RVSD6 GST0 RVSD4 RVSD3 RVSD2 RVSD1 RVSD0

D7 B2 C2 D2 F2 B3 C3 D3 F3 C4 L4 AA5 B12 D12 F12

T11 T81 GST2 T82 T73 GST1 T78 T74 GST0 T16 T29 T85 T17 T21

R25

*10K

SMDDR_VREF SMRCOMP SMVSWINGH SMVSWINGL

AJ24 AB1 AJ19 AJ22

SMVREF SMRCOMP SMVSWINGH SMVSWINGL

SRCVENIN# SRCVENOUT#

R27 R28

*10K *10K

+1.5V

R97 604/F

R100 150/F

R64 C236 60.4/F .1U .1U C241

C248 .1U

C242 1U_10V

Montara-GM

1K DPMSCLK 3 Q6 RHU002N06 Montara-GM

D

ST2 ST1 ST0

PSB Memory GFX Core Clock GFX Core Clock Frequency Frequency - Low - High 400MHz 400MHz 400MHz 400MHz 533MHz 533MHz 533MHz 400MHz 266MHz 200MHz 200MHz 266MHz 266MHz 266MHz 333MHz 333MHz 133MHz 100MHz 100MHz 133MHz 133MHz 133MHz 166MHz 166MHz
5

9

SUSCLK

2 1

*0 0
0 0 1 1 1 1

MONTARA-GME/ 855GM+ 2 of 3 (DVO & DDR)
1 2 3

0 0 1 1 0 0 1 1
4

0 1 0 1 0 1 0 0

200MHz 200MHz 133MHz 266MHz 200MHz 266MHz 266MHz 250MHz
6

PROJECT : CT1

Quanta Computer Inc.
Size Document Number Custom MontaraGM_B Date: Wednesday, April 14, 2004
7

Rev 1A Sheet 6
8

of

38

PDF created with pdfFactory trial version www.pdffactory.com

1

2

3

4

5

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7

8

U16D
A A

1.2V + C390 150U/6.3V CC7343 1.2V C153 .1U C167 .1U C164 .1U C179 .1U C163 C371 10U_6.3V .1U C175 .1U C139 .1U C151 .1U

POWER

W21 AA19 AA17 T17 P17 U16 R16 N16 AA15 T15 P15 J15 U14 R14 N14 H14 T13 P13 V9 W8 U8 V7 U6 W5 Y1 V1 D29 Y2 A6 B16 P9 M9 K9 R8 N8 M8 L8 J8 H7 E6 M4 J4 E4 N1 J1 E1 B9 A9 B8 B15 B14 J13 G13 A12 D10 B10 F9 A4 A3 A11 B11

VCC0 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCCHL0 VCCHL1 VCCHL2 VCCHL3 VCCHL4 VCCHL5 VCCHL6 VCCHL7 VCCAHPLL VCCAGPLL VCCADPLLA VCCADPLLB VCCDVO0 VCCDVO1 VCCDVO2 VCCDVO3 VCCDVO4 VCCDVO5 VCCDVO6 VCCDVO7 VCCDVO8 VCCDVO9 VCCDVO10 VCCDVO11 VCCDVO12 VCCDVO13 VCCDVO14 VCCDVO15 VCCADAC0 VCCADAC1 VSSADAC VCCDLVDS0 VCCDLVDS1 VCCDLVDS2 VCCDLVDS3 VCCTXLVDS0 VCCTXLVDS1 VCCTXLVDS2 VCCTXLVDS3 VCCGPIO0 VCCGPIO1 VCCALVDS VSSALVDS

1.2V 1.2V R83 0 VCCAHPLL C185 .1U

9.16mA
C67 C157 C187 .1U C181 .1U C133 .1U *10U_6.3V .1U

VTTLF0 VTTLF1 VTTLF2 VTTLF3 VTTLF4 VTTLF5 VTTLF6 VTTLF7 VTTLF8 VTTLF9 VTTLF10 VTTLF11 VTTLF12 VTTLF13 VTTLF14 VTTLF15 VTTLF16 VTTLF17 VTTLF18 VTTLF19 VTTLF20 VCCSM0 VCCSM1 VCCSM2 VCCSM3 VCCSM4 VCCSM5 VCCSM6 VCCSM7 VCCSM8 VCCSM9 VCCSM10 VCCSM11 VCCSM12 VCCSM13 VCCSM14 VCCSM15 VCCSM16 VCCSM17 VCCSM18 VCCSM19 VCCSM20 VCCSM21 VCCSM22 VCCSM23 VCCSM24 VCCSM25 VCCSM26 VCCSM27 VCCSM28 VCCSM29 VCCSM30 VCCSM31 VCCSM32 VCCSM33 VCCSM34 VCCSM35 VCCSM36 VCCQSM0 VCCQSM1 VCCASM0 VCCASM1 VTTHF0 VTTHF1 VTTHF2 VTTHF3 VTTHF4

AB29 Y29 K29 F29 A26 V22 T22 P22 M22 H22 U21 R21 N21 L21 H20 A20 J19 H18 A18 H16 G15 AG29 AF29 AC29 AF27 AJ25 AF24 AB22 AJ21 AF21 AB20 AF18 AB18 AJ17 AB16 AF15 AB14 AJ13 AA13 AF12 AB12 AA11 AB10 AJ9 AF9 Y9 AB8 AA8 AC1 Y7 AF6 AB6 AA6 AJ5 Y4 AF3 AB3 AG1 AJ8 AJ6 AF1 AD1 V29 M29 H29 A24 A22 VTTHF0 VTTHF1 VTTHF2 VTTHF3 VTTHF4

VCCP C184 .1U C240 .1U C160 .1U C143 .1U + C392 150U/6.3V CC7343

VCCP C194 .1U C197 .1U C176 .1U C389 10U_6.3V

2.5VSUS C189 .1U C134 .1U C225 .1U C215 .1U + C254 150U/6.3V CC7343
B

B

1.2V

R68

0

VCCAGPLL C123 .1U

5.57mA

VCCAHPLL VCCAGPLL VCCADPLLA VCCADPLLB +1.5V

2.5VSUS C178 .1U C219 .1U C231 .1U C205 .1U CC7343 2.5VSUS C230 .1U C162 .1U C213 .1U C145 .1U + C391 150U/6.3V

R22 1.2V 1

L4

.1UH VCCADPLLA C362 + 220U/2.5V CC7343

1.97mA ~ 5.36mA
C63 +1.5V .1U

+ C360 150U/6.3V CC7343

C107 .1U

C114 .1U

C120 .1U

C61 .1U

C358 10U_6.3V R39 1.2V 1 + 220U/2.5V CC7343 L8 .1UH VCCADPLLB C370 C92 .1U

C88 .1U

C89 .1U

C71 .1U

2.5VSUS C192 .1U C177 .1U C161 .1U C253 .1U

3.35mA
+1.5V C136 C140 .01U .1U

Route this VSSDAC to other side of the cap, then to GND.

L28 VCCQSM C193 .1U C367 4.7U_10V R163 VCCASM C165 .1U C127 C132 C388 C216 C224

BK1608HS800-T 2.5VSUS

134mA
C

C

VCCDLVDS

1 L11 BK1608HS800-T 1.2V + C204 150U/6.3V CC7343

VCCTXLVDS +3V C361 +1.5V R24 0 C56 .1U

165mA

5.6mA
C359 C78 C129 .1U C86 .1U +1.5V

10U_6.3V

rev.d Del C363
22U/CC1206 .1U C68 .1U 2.5VSUS R29 C365
D

C76 Montara-GM .01U

.1U .1U .1U .1U .1U

0

17.95mA
C364 C94 C93 .1U C85 .1U 22U/CC1206 .1U

Route this VSSALVDS to other side of the cap, then to GND.

*47U_6.3V

D

change +2.5v to 2.5vsus

PROJECT : CT1

Quanta Computer Inc.

MONTARA-GME/ 855GM+ 3 of 3 (POWER & CAP.)
1 2 3 4 5 6

Size Document Number Custom MontaraGM_C Date: Wednesday, April 14, 2004
7

Rev 1A Sheet 7
8

of

38

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8

ICH4-M 1/3 (CPU, PCI, IDE)
VCCP 2

PCI Bus pull high resistor
R232 56

CLOSE TO CPU
1

CLOSE TO ICH4
3 3 3 3 3 27 27 NMI A20M# IGNNE# INTR CPUINIT# RCIN# GATEA20 R233 2 1 56 V21 AB23 AA21 W21 AB22 V22 U22 Y22

U3A NMI A20M# FERR# IGNNE# INTR INIT# RCIN# A20GATE APICD0 APICD1 APICCLK SMI# STPCLK# CPUSLP# DPSLP# H19 K20 J19 W23 V23 U21 U23 R217 1 R216 1 2 10K 2 10K +3V SMI# STPCLK# CPUSLP# DPSLP# 3 3 3 3,6 REQ0# STOP# TRDY# FRAME# +3V 6 7 8 9 10 SERIRQ IRQ14 SERR# IRQ15 6 7 8 9 10

RP7 5 4 3 2 1 10P8R-8.2K RP6 5 4 3 2 1 10P8R-8.2K FRAME# 14,17,23 IRDY# 14,17,23 TRDY# 14,17,23 DEVSEL# 14,17,23 STOP# 14,17,23 PAR 14,17,23 SERR# 14,17,23 PERR# 14,17,23 PLOCK# R434 B1 A2 B3 C7 B6 C1 E6 A7 B7 D6 D5 C2 B4 A3 C8 D7 C3 C4 J22 B5 A6 REQ0# REQ1# REQ2# REQ3# REQ4# GNT0# GNT1# GNT2# GNT3# GNT4# INTA# INTB# INTC# INTD# INTE# INTF# INTG# ICH_GPIO5 REQA# REQB# 33rev.d REQ0# REQ1# REQ2# 17 14 23 RP4 ICH_GPIO5 INTD# REQ2# INTC# +3V PLOCK# 17 REQ0 : PCMCIA REQ1 : MINI PCI REQ2 : LAN REQ3 : X 6 7 8 9 10 10P8R-8.2K 5 4 3 2 1

+3V PLOCK# DEVSEL# PERR# IRDY#

A

3

FERR#

CPU

A

+3V REQ1# INTG# INTE# INTF#

14,17,23 AD[0..31] AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 H5 J3 H3 K1 G5 J4 H4 J5 K2 G2 L1 G4 L2 H2 L3 F5 F4 N1 E5 N2 E3 N3 E4 M5 E2 P1 E1 P2 D3 R1 D2 P4 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 C/BE0# C/BE1# C/BE2# C/BE3# FRAME# IRDY# TRDY# DEVSEL# STOP# PAR SERR# PERR# PLOCK# REQ0# REQ1# REQ2# REQ3# REQ4# GNT0# GNT1# GNT2# GNT3# GNT4# PIRQA# PIRQB# PIRQC# PIRQD# PIRQE#/GPIO2 PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5 SERIRQ REQA#/GPIO0 REQB#/REQ5#/GPIO1 J2 K4 M4 N4 F1 L5 F2 M3 F3 G1 K5 L4 M2 FRAME# IRDY# TRDY# DEVSEL# STOP# SERR# PERR# PLOCK#_R C/BE0# C/BE1# C/BE2# C/BE3# 14,17,23 14,17,23 14,17,23 14,17,23

+3V REQA# REQB# REQ4# REQ3#

+3V

PCI

+3V
B

5

C326 *.1U_0402 4 PCIRST#

R346 10K

B

1 PCI_RST# 2 U28 *TC7SH08FU 0 3 PCIRST# 6,13,14,17,23,27,28

+3V GNT0# GNT1# GNT2# T119 T126 INTA# INTC# INTD# INTE# INTF# INTG# SERIRQ 17 14 23 9 9,27 23 14 14 17 17 17 PIRQA#: RTL8100CL PIRQB#: NC PIRQC#: MINI PCI PIRQD#: MINI PCI PIRQE#: 7411 PIRQF#: 7411 PIRQG#: 7411 PIRQH#: Internal USB 9,27 SUSA# SUSB# SUSC# INTA# INTB# SUSA# SUSB# R296 R318 R256 2 R342 2 8.2K 8.2K 1 *4.7K 1 *4.7K 1 *4.7K 3V_S5

R344

SUSC# R325 2

14,17,23 PCI_PME# 2 PCLK_ICH +3V 2 PCI_RST# R317 2 1 10K 15 CLKRUN#

PCI_PME#

R287 17,23 *33 1
C

FPBACK# T121

W2 P5 U5 AC2 FPBACK# E8 ICH_GPIO17 C5

PME# PCICLK PCIRST# CLKRUN#/GPIO24 GNTA#/GPIO16 GNTB#/GNT5#/GPIO17

PME CIRCUIT
RP5 GNT0# GNT1# GNT2# GNT3# +3V 6 7 8 9 10 *10P8R-8.2K 5 4 3 2 1 GNT4# +3V

14,17,27

C512 *18P

SIORDY PIORDY

R378 R379

4.7K 4.7K

+3V

PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15 PDD[0..15]

AB11 AC11 Y10 AA10 AA7 AB8 Y8 AA8 AB9 Y9 AC9 W9 AB10 W10 W11 Y11 Y13 AB14 AA13 AB13 W13 AC12 W12 AB12 AC13 AA11 Y12

PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15 PDCS1# PDCS3# PDA0 PDA1 PDA2 PDIOR# PDIOW# PIORDY IRQ14 PDDREQ PDDACK# ICH4

IDE

SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7 SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15 SDCS1# SDCS3# SDA0 SDA1 SDA2 SDIOR# SDIOW# SIORDY IRQ15 SDDREQ SDDACK#

W17 AB17 W16 AC16 W15 AB15 W14 AA14 Y14 AC15 AA15 Y15 AB16 Y16 AA17 Y17 AB21 AC22 AA20 AC20 AC21 Y18 AA18 AC19 AA19 AB18 AB19

SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7 SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15 SDD[0..15] SDD[0..15] 28 SDCS1# 28 SDCS3# 28 SDA0 28 SDA1 28 SDA2 28 SDIOR# 28 SDIOW# 28 SIORDY 28 IRQ15 28 SDDREQ 28 SDDACK# 28

C

D

28 28 28 28 28 28 28 28 28 28 28 28

PDD[0..15] PDCS1# PDCS3# PDA0 PDA1 PDA2 PDIOR# PDIOW# PIORDY IRQ14 PDDREQ PDDACK#

PIORDY

SIORDY

D

PROJECT : CT1

Quanta Computer Inc.
Size Document Number Custom ICH4-M Date:
1 2 3 4 5 6

(CPU,PCI,IDE)
Sheet 8
8

Rev 1A of 38

Wednesday, April 14, 2004
7

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8

ICH4-M
3V_S5 RP3 USBOC3# USBOC2# USBOC5# USBOC4# +3V USBOC0# USBOC1#
A

15

LCDID[0..2] LCDID0 LCDID1 LCDID2

LCDID[0..2] RN60 1 3 5 7 8P4R-10K 2 4 6 8

+3V

ICH4-M
U3B +3V LCDID0 LCDID1 J20 G22 F20 G20 F21 H20 C20 D20 B15 C18 D18 A15 C16 D16 A14 F19 L19 L20 M19 M21 P19 R19 T21 P21 N20 T2 R4 T4 U2 C13 C9 D13 A13 B13 B8 AC4 AB4 Y1 V1 AB6 AB2 AA1 AA6 W20 V20 T3 R2 J23 AC3 AB1 H23 R3 V4 Y23 Y20 J21 V19 GPIO32 GPIO33 GPIO34 GPIO35 GPIO36 GPIO37 USBP0P USBP0N OC0# USBP2P USBP2N OC2# USBP4P USBP4N OC4# CLK48 HI0 HI1 HI2 HI3 HI4 HI5 GPIO38 GPIO39 GPIO40 GPIO41 GPIO42 GPIO43 USBP1P USBP1N OC1# USBP3P USBP3N OC3# USBP5P USBP5N OC5# USBRBIAS USBRBIAS# HI6 HI7 HI8 HI9 HI10 HI11 F23 H22 G23 H21 F22 E23 A21 B21 C14 A19 B19 B14 A17 B17 D14 A23 B23 T20 R20 P23 L22 N22 K21 M23 R22 R23 U3 U4 T5 Y6 AC7 AC6 AB5 W7 D9 W6 AA5 Y4 Y2 AA2 AA4 Y3 W18 Y21 W19 AB3 V5 W3 V2 W1 W4 LCDID2 GPIO40 GPIO41 GPIO42 SM_EN# R225 R229 R228 10K 10K 10K R285 10M Y6 CLK_32KX2 1 C495 USBOC1# USBOC3# USBOC5# USBRBIAS HL6 HL7 HL8 HL9 HL10 HL11 R218 USBP5+ USBP5R230 32 32 +1.5V USBP1+ USBP119 19 15P 2 2 2 1 1 32.768KHZ C526 15P
A

1 3 5 7

2 4 6 8

CLK_32KX1

8P4R-10K R240 10K R250 10K

USB

C556 *.1U/16V/0402 5

R345

0

SUSA# SUSB#

2 4 1 U29 *7SH08 3 CLK_PWRDWN# 2

USB0~1: MB USB USB2: DAUGHTER/B USB USB4: CABLE DOCK USB5: BLUE TIITH/ LCD
2 C426 *22P CLK48_USB1

19 19 32 32 31 31

USBP0+ USBP0USBP2+ USBP2USBP4+ USBP4-

USBOC0# USBOC2# USBOC4#

CLK48_USB R226 *22 HL0 HL1 HL2 HL3 HL4 HL5 CLK66_ICH HLSTB HLSTB# LAD0/FWH0 LAD1/FWH1 LAD2/FWH2 LAD3/FWH3 33 AC_SYNC_1

22.6/F

R223 255/F HUB_VSWING

0.8V +/- 8%
R221 162/F

CLK66_ICH 14M_ICH R231 *22
B

DNBSWON# R234 *22 CLK66_ICH-1 C432 *22P

Internal pull-high 20K

5 2 5 5 27 27 27 27

HL[0..10] CLK66_ICH HLSTB HLSTB# LAD0/FWH0 LAD1/FWH1 LAD2/FWH2 LAD3/FWH3 R277

HUB LINK

HL[0..10] 56

HL[0..10]

5

C424 .1U

HI_CLK HL_STB/HL_STBS HL_STB#/HLSTBF LAD0/FWH0 LAD1/FWH1 LAD2/FWH2 LAD3/FWH3 AC_RST# AC_SYNC AC_SDIN0 AC_SDIN1 AC_SDIN2 AC_BITCLK SMBCLK SMBDATA RI# THRM# PWROK BATLOW# PWRBTN# RSMRST# THRMTRIP# DPRSLPVR C3_STAT#/GPIO21 AGPBUSY#/GPIO6 CLK14 SMLINK0 SMLINK1 SPKR GPIO7 GPIO8

HI_REF HI_VSWING HUB_RCOMP LDRQ0# LDRQ1# LFRAME#/FWH4 VBIAS RTCX1 RTCX2 VCCRTC RTCRST# AC_SDOUT

HUB_REF HUB_VSWING ICH_RCOMP R215 LPC_DRQ0# LPC_DRQ1# LFRAME#/FWH4 VBIAS CLK_32KX1 CLK_32KX2 VCCRTC RTCRST# AC_SDO R127 R298 100K SMBALERT# SUSB# SUSC# SLP_S5#

2

1

48.7/F

+1.5V

C436

C435

HUB_REF C429 1 R222 127/F 2

0.35V +/- 8%
B

.01U/16V/0402

LPC&FWH

14M_ICH-1 C425 *22P

LPC_DRQ0# 27 T122 LFRAME#/FWH4 27

.01U/16V/0402 .1U

14,20,22 -CODEC_RST 14,20,22 SYNC1 20,22 SDINA 14 SDINB T63 14,20,22 BITCLK C544 *.1U/16V/0402

SDINA SDINB AC_SDIN2 BITCLK C580 2 2 PCLK_SMB PDAT_SMB PCLK_SMB PDAT_SMB RI# ICH_THRM# PWROK BATLOW# DNBSWON# RSMRST# 56

AC97&RTC SM PM

C484 33

.1U/16V/0402 SDOUT1 VCCRTC T124 14,20,22

3V_S5 3V_S5 R315 *100K 3 -RSMRST 6 A B GND C548 *.1U/16V/0402
C

rev.d

INTRUDER# SMBALERT#/GPIO11 SLP_S3# SLP_S4# SLP_S5# SUSCLK SYS_RESET# SLP_S1#/GPIO19 STP_PCI#/GPIO18 STP_CPU#/GPIO20 SUS_STAT#/LPCPD# GPIO12 GPIO13

22P 17 RI# 3 ICH_THRM# 6,27,33 PWROK 27 BATLOW# 27 DNBSWON#

VCC Y ORGND U26 *NC7SZ58 R310 *100K 2 VCCRTC +3V VCCRTC 27 30 CRT_SENSE# 3 33 R333 10K 20 27 4 RSMRST# R311 0 RSMRST_# 27

SUSB# SUSC# T127 SUSCLK

8,27 8,27 6

5

FROM EC

+1.5V 33 6 14M_ICH SPK KBSMI#

R214

SUSA#

2

1

DPRSLPVR T125 AGP_BUSY# +3V R330 14M_ICH SMLINK0 SMLINK1 SPK 10K

DBR# 3 SUSA# 8 STP_PCI# 2 STP_CPU# 2,33 SUSPEND# 17

R137 R138

10K 10K

3V_S5

rev.d

SWI#_1 SCI#_1 R327 WP *10K T69 T131 +3V

2 D1

D2 1SS355 2 1 1 1SS355

SWI# SCI#

27 27

C

MISC&GPIO

D12 3VPCU 2 1 RB500 D9 2 1 R270 RB500 C507 .1U/16V/0402 2 200K 1 RTCRST# Delay 18~25 ms C485 1U/16V

rev.e

3V_S5 CPUPWRGD T114 T113 IMVPOK

KBSMI# R343 10K CPUPERF#

GPIO25 GPIO27 GPIO28

CPUPWRGD CPUPERF#/GPIO22 SSMUXSEL/GPIO23 VGATE/VRMPWRGD

SpeedStep
LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2 LAN_RST# LAN_CLK LAN_RSTSYNC A10 A9 A11 B10 C10 A12 Y5 C11 B11 R329 *10K LPC_DRQ0# LPC_DRQ1# R392 10K +3V LAN_CLK-1 R274 *100K LFRAME#/FWH4

+3V

R255 +3V G1 *SHORT_ PAD1 +3V 3V_S5 R313 R324 R341 R308 R309 R326 R323 R297 4.7K 4.7K 10K 10K 10K 10K 10K 100K SMLINK0 SMLINK1 SMBALERT# PCLK_SMB PDAT_SMB RI# BATLOW# PWROK R227 100K SM_EN#

100K C12 A8 D11 D10 EE_SHCLK EE_DOUT EE_DIN EE_CS R314 *10K R331 *10K

LAN

R272 1K

C500 .047/0402 R_3VRTC VBIAS R260 3K

R300 10M CLK_32KX1 5VPCU

ICH4

3VRTC
D

1

3 RTC_N01 Q31 3904 R251 4.7K RTC_N02 SDINA SPK SDOUT1 R129 *10K R268 *10K R266 *10K VCCP 3,4,5,7,8,10,35,38
6

+3V BITCLK ICH_THRM# SDINB R224 R289 *8.2K *8.2K R328 8.2K

1

BT2 RTC-BAT 2

2

ICH4-M 2/3 (USB, HUB LINK, LPC&FWH, AC97, SM, PM, MISC&GPIO, LAN)
PROJECT : CT1

D

RTC
1 2

R258 15K

Quanta Computer Inc.
Size Document Number Custom ICH4-M USB,HUB & LPC INTERFACE Date: Wednesday, April 14, 2004
7

Rev 1A 9
8

Sheet

of

38

3

4

5

PDF created with pdfFactory trial version www.pdffactory.com

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8

D16 1 RB751V D8
A

2

5VSUS

V5REF_SUS C476 +1.5V C469 C522 .1U .01U U3C .1U

1 C305 RB751V

2

A

3V_S5 R281 2 1K D10 1 C520 C509 RB751V 2 +3V 1 +5V N21 N23 N5 P11 P13 P20 P22 P3 R18 R21 R5 T1 T19 T23 U20 V15 V17 V3 W22 W5 W8 Y19 Y7 A1 A16 A18 A20 A22 A4 AA12 AA16 AA22 AA3 AA9 AB20 AB7 AC1 AC10 AC14 AC18 AC23 AC5 B12 B16 B18 B20 B22 B9 C15 C17 C19

U3D VSS000 VSS001 VSS002 VSS003 VSS004 VSS005 VSS006 VSS007 VSS008 VSS009 VSS010 VSS011 VSS012 VSS013 VSS014 VSS015 VSS016 VSS017 VSS018 VSS019 VSS020 VSS021 VSS022 VSS023 VSS024 VSS025 VSS026 VSS027 VSS028 VSS029 VSS030 VSS031 VSS032 VSS033 VSS034 VSS035 VSS036 VSS037 VSS038 VSS039 VSS040 VSS041 VSS042 VSS043 VSS044 VSS045 VSS046 VSS047 VSS048 VSS049 VSS050 ICH4 VSS051 VSS052 VSS053 VSS054 VSS055 VSS056 VSS057 VSS058 VSS059 VSS060 VSS061 VSS062 VSS063 VSS064 VSS065 VSS066 VSS067 VSS068 VSS069 VSS070 VSS071 VSS072 VSS073 VSS074 VSS075 VSS076 VSS077 VSS078 VSS079 VSS080 VSS081 VSS082 VSS083 VSS084 VSS085 VSS086 VSS087 VSS088 VSS089 VSS090 VSS091 VSS092 VSS093 VSS094 VSS095 VSS096 VSS097 VSS098 VSS099 VSS100 VSS101 C21 C23 C6 D1 D12 D15 D17 D19 D21 D23 D4 D8 D22 E10 E14 E16 E17 E18 E19 E21 E22 F8 G19 G21 G3 G6 H1 J6 K11 K13 K19 K23 K3 L10 L11 L12 L13 L14 L21 M1 M11 M12 M13 M20 M22 N10 N11 N12 N13 N14 N19

1U_16V CC0805

VCCP C468 C451 C431 .01U

C22

VCCPLL

V5REF_SUS V5REF1 V5REF2 VCCHI_0 VCCHI_1 VCCHI_2 VCCHI_3

E15 .1U E7 V6 L23 M14 P18 T22 E12 E13 E20 F14 G18 R6 T6 U6 A5 AC17 AC8 B2 H18 H6 J1 J18 K6 M10 P12 P6 U1 V10 V16 V18 VCC5REF

1U_16V CC0805

1U_10V .1U

AA23 P14 U18 E9 F9 F6 F7

V_CPU_IO_0 V_CPU_IO_1 V_CPU_IO_2 VCCLAN3_3_1 VCCLAN3_3_0 VCCLAN1_5_0 VCCLAN1_5_1

+1.5V C464 .1U C502 .1U C443 1U_10V 1.5V_S5

B

+3V +1.5V

B

VCC

+1.5V

C462

C470

C517 .1U

C433 .1U

C441 .1U

22U/CC1206 .1U

K10 K12 K18 K22 P10 T18 U19 V14

VCC1_5_0 VCC1_5_1 VCC1_5_2 VCC1_5_3 VCC1_5_4 VCC1_5_5 VCC1_5_6 VCC1_5_7

VCCSUS1_5_0 VCCSUS1_5_1 VCCSUS1_5_2 VCCSUS1_5_3 VCCSUS1_5_4 VCCSUS1_5_5 VCCSUS1_5_6 VCCSUS1_5_7 VCC3_3_0 VCC3_3_1 VCC3_3_2 VCC3_3_3 VCC3_3_4 VCC3_3_5 VCC3_3_6 VCC3_3_7 VCC3_3_8 VCC3_3_9 VCC3_3_10 VCC3_3_11 VCC3_3_12 VCC3_3_13 VCC3_3_14 VCC3_3_15

C518 .1U

C527 .1U

C479 .1U C304 10U/10V +3V

GND

C445 .1U

C450 .1U

C487 .1U

C471 .1U

C475 22U/CC1206

3V_S5

C

C489

C499

C496 .1U

C466 .1U

C453 .1U

22U/CC1206 .1U

E11 F10 F15 F16 F17 F18 K14 V7 V8 V9

VCCSUS3_3_0 VCCSUS3_3_1 VCCSUS3_3_2 VCCSUS3_3_3 VCCSUS3_3_4 VCCSUS3_3_5 VCCSUS3_3_6 VCCSUS3_3_7 VCCSUS3_3_8 VCCSUS3_3_9 ICH4

+3V

C

C555 .1U

C516 .1U

C490 .1U

C549 .1U

C508 .1U

C503 .1U

C510 .1U

C460 .1U

C505 .1U

D

D

PROJECT : CT1

Quanta Computer Inc.

ICH4-M 3/3 (PWR, GND)
1 2 3 4 5 6

Size Document Number Custom ICH4-M Date: Wednesday, April 14, 2004
7

(POWER&GND)
Sheet 10 of
8

Rev 1A 38

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A

B

C

D

E

SM_B1 R_MA[0..12] R_BA[0..1] R_MA[0..12] 6,12 R_BA[0..1] 6,12 SM_B2 SM_B4 SM_B5

SM_B1 SM_B2 SM_B4 SM_B5

6,12 6,12 6,12 6,12

R_SM_DQS[0..7] SM_DQS[0..7] R_MD[0..63] MD[0..63] M_DM[0..7] DM[0..7]

R_SM_DQS[0..7] 6 SM_DQS[0..7] 12 R_MD[0..63] 6 MD[0..63] 12 M_DM[0..7] 6 DM[0..7] 12

CKE[0..3] SM_CS3# SM_CS2# SM_CS1# SM_CS0#

CKE[0..3] 6,12 SM_CS3# 6,12 SM_CS2# 6,12 SM_CS1# 6,12 SM_CS0# 6,12

R_BA0 R_BA1 R_MA11 R_MA8 R_MA12 R_MA9 R_MA6 R_MA7 R_MA3 R_MA0 R_MA10 R_SRASA# R_BMWEA# R_SCASA# 1 3 5 7

R99 R96

10-0402 10-0402 2 4 6 8 MA11 MA8 MA12 MA9

BA0 BA1

BA0 BA1 MA11 MA8 MA12 MA9 MA6 MA7 MA3 MA0 MA10 SRASA# BMWEA# SCASA#

12 12 12 12 12 12 12 12 12 12 12 12 12 12

R_MD30 R_MD27 R_MD31 R_MD26 M_DM3 R_SM_DQS3 R_MD29 R_MD25 R_MD28 R_MD24 R_MD19 R_MD23 R_MD22 R_MD18 M_DM2 R_SM_DQS2

7 5 3 1

8 6 4 2

MD30 MD27 MD31 MD26

RN22 8P4R-S-10 DM3 3 4 SM_DQS3 1 2 RN21 4P2R-S-10 7 8 5 6 3 4 1 2 RN18 8P4R-S-10 7 8 5 6 3 4 1 2 MD29 MD25 MD28 MD24
4

4

RN23 8P4R-S-10 MA6 1 2 MA7 3 4 MA3 5 6 MA0 7 8 RN27 8P4R-S-10 MA10 1 2 SRASA# 3 4 BMWEA# 5 6 SCASA# 7 8 RN30 8P4R-S-10

USE 8P4R-0402 package
SMDDR_VTERM SMDDR_VTERM 35,38 MD62 MD59 SM_DQS7 MD61 MD56 MD51 MD55 SM_DQS6 MD52 MD53 MD47 MD42 SM_DQS5 MD41 MD44 MD35 MD38 SM_DQS4 MD32 MD36 RN53 8P4R-S-56 RN55 8P4R-S-56 MD63 1 2 1 2 MD58 3 4 3 4 DM7 5 6 5 6 MD57 7 8 7 8 RN50 8P4R-S-56 RN51 8P4R-S-56 MD60 1 2 1 2 MD54 3 4 3 4 MD50 5 6 5 6 DM6 7 8 7 8 RN45 8P4R-S-56 RN42 8P4R-S-56 DM5 1 2 1 2 MD40 3 4 3 4 MD45 5 6 5 6 MD39 7 8 7 8 RN41 8P4R-S-56 RN37 8P4R-S-56 MD34 1 2 1 2 DM4 3 4 3 4 MD33 5 6 5 6 MD37 7 8 7 8 RN39 8P4R-S-56 RN34 8P4R-S-56 1 2 1 2 R_SCASA# 3 4 3 4 R_SRASA# 5 6 5 6 R_BA1 7 8 7 8 RN46 8P4R-S-56 MD49 1 2 MD48 3 4 MD43 5 6 MD46 7 8 RN25 8P4R-S-56 R_MA2 1 2 R_MA4 3 4 CKE0 5 6 CKE1 7 8

6,12 R_SRASA# 6,12 R_BMWEA# 6,12 R_SCASA#

MD19 MD23 MD22 MD18

RN17 8P4R-S-10 DM2 3 4 SM_DQS2 1 2 RN14 4P2R-S-10 7 8 5 6 3 4 1 2 RN13 8P4R-S-10 7 8 5 6 3 4 1 2 MD21 MD17 MD16 MD20 MD11 MD14 MD10 MD15

R_MD54 R_MD51 R_MD55 R_MD50 M_DM6 R_SM_DQS6 R_MD49 R_MD52 R_MD53 R_MD48 R_MD43 R_MD47 R_MD42 R_MD46 M_DM5 R_SM_DQS5 R_MD40 R_MD41 R_MD44 R_MD45

7 5 3 1

8 6 4 2

MD54 MD51 MD55 MD50

RN49 8P4R-S-10 DM6 3 4 SM_DQS6 1 2 RN48 4P2R-S-10 7 8 5 6 3 4 1 2 RN47 8P4R-S-10 7 8 5 6 3 4 1 2 MD49 MD52 MD53 MD48 MD43 MD47 MD42 MD46

R_MD21 R_MD17 R_MD16 R_MD20 R_MD11 R_MD14 R_MD10 R_MD15 M_DM1 R_SM_DQS1 R_MD8 R_MD9 R_MD13 R_MD12

RN10 8P4R-S-10 DM1 3 4 SM_DQS1 1 2 RN9 7 5 3 1 RN8 4P2R-S-10 8 6 4 2 8P4R-S-10 8 6 4 2 MD6 MD2 MD7 MD3 MD8 MD9 MD13 MD12
3

3

RN44 8P4R-S-10 DM5 3 4 SM_DQS5 1 2 RN43 4P2R-S-10 7 8 5 6 3 4 1 2 RN40 8P4R-S-10 MD40 MD41 MD44 MD45

R_MD6 R_MD2 R_MD7 R_MD3 M_DM0 R_SM_DQS0 R_MD0 R_MD1 R_MD5 R_MD4

7 5 3 1 RN5 3 1 RN4 7 5 3 1 RN1

RN35 8P4R-S-56 RN32 8P4R-S-56 R_MA0 1 2 1 2 SM_B2 R_BMWEA# 3 4 3 4 SM_B4 R_BA0 5 6 5 6 R_MA10 R_MA6 7 8 7 8 R_MA9 R_MA12 CKE3 T39 RN24 8P4R-S-56 RN26 8P4R-S-56 R_MA8 1 2 1 2 R_MA11 3 4 3 4 CKE2 5 6 5 6 Z0801 7 8 7 8 R101 SM_CS2# R102 56-0402 RN28 1 3 56-0402 SM_CS3# 4P2R-S-56 R_MA1 2 R_MA5 4 SMDDR_VTERM MD27 MD31 SM_DQS3 MD25
2

8P4R-S-10 DM0 4 SM_DQS0 2 4P2R-S-10 8 6 4 2 8P4R-S-10 8 6 4 2 MD39 MD35 MD38 MD34 MD0 MD1 MD5 MD4

Place Rterms close to second DIMM

T41

R_MD39 R_MD35 R_MD38 R_MD34 SMDDR_VTERM SMDDR_VTERM M_DM4 R_SM_DQS4 R_MD33 R_MD32 R_MD37 R_MD36

7 5 3 1

RN19 8P4R-S-56 RN20 8P4R-S-56 MD30 1 2 1 2 MD26 3 4 3 4 DM3 5 6 5 6 MD29 7 8 7 8 RN16 8P4R-S-56 RN15 8P4R-S-56 MD24 1 2 1 2 MD19 3 4 3 4 MD18 5 6 5 6 DM2 7 8 7 8 RN11 8P4R-S-56 RN7 1 2 1 3 4 3 5 6 5 7 8 7 RN6 1 3 5 7 RN2 1 3 5 7 8P4R-S-56 RN3 2 1 4 3 6 5 8 7 8P4R-S-56 RN31 2 1 4 3 6 8 8P4R-S-56 2 4 6 8 8P4R-S-56 2 4 6 8 DM1 MD8 MD12 MD6 MD3 DM0 MD0 MD4

RN38 8P4R-S-10 DM4 3 4 SM_DQS4 1 2 RN36 4P2R-S-10 7 8 5 6 3 4 1 2 RN33 8P4R-S-10 MD33 MD32 MD37 MD36

C250 C286 C209 C280 C269 C259 C261 C229 C90

C214

C198 C188 C172 C152 C104 C124 C270 C75

C87

C115

C135 C148 C168 C180 C201 C221 C227 C238 C249 C255 .01U_0402 .01U_0402 .01U_0402 .01U_0402 .01U_0402 .01U_0402 .01U_0402 .01U_0402 .01U_0402 .01U_0402

MD28 MD23 MD22 SM_DQS2 MD17 MD16 MD14 MD10 SM_DQS1 MD9 MD13 MD2 MD7 SM_DQS0 MD1 MD5 SM_B1 R_MA3 SM_B5 R_MA7

.1U_0402 .1U_0402 .1U_0402 .1U_0402 .1U_0402 .1U_0402 .1U_0402 .1U_0402 .1U_0402 .1U_0402

.1U_0402 .1U_0402 .1U_0402 .1U_0402 .1U_0402 .1U_0402 .1U_0402 .1U_0402 .1U_0402 .1U_0402

2

SMDDR_VTERM

SMDDR_VTERM

50 PCS

R_MD63 R_MD62 R_MD59 R_MD58 M_DM7 R_SM_DQS7 R_MD57 R_MD61 R_MD56 R_MD60

7 5 3 1

8 6 4 2

MD63 MD62 MD59 MD58

C263 C275 C282 C91

C284 C278 C266 C260 C258 C186

C235 C226 C207 C203 C171 C154 C142 C125 C103 C211 .1U_0402 .1U_0402 .1U_0402 .1U_0402 .1U_0402 .1U_0402 .1U_0402 .1U_0402 .1U_0402 .1U_0402

+ C416 150U/6.3V

.1U_0402 .1U_0402 .1U_0402 .1U_0402 .1U_0402 .1U_0402 .1U_0402 .1U_0402 .1U_0402 .1U_0402

RN56 8P4R-S-10 DM7 3 4 SM_DQS7 1 2 RN54 4P2R-S-10 7 8 5 6 3 4 1 2 RN52 8P4R-S-10 MD57 MD61 MD56 MD60

4P2R-S-56 SM_CS0# 2 SM_CS1# 4

RN29 8P4R-S-56 RN12 8P4R-S-56 MD21 1 2 1 2 MD20 3 4 3 4 MD11 5 6 5 6 MD15 7 8 7 8

1

1

PROJECT : CT1

Quanta Computer Inc.
Size Document Number Custom DDR I/F Date:
A B C D

Rev 1A Sheet
E

Wednesday, April 14, 2004

11

of

38

PDF created with pdfFactory trial version www.pdffactory.com

1

2

3

4

5

6

7

8

2.5VSUS

2.5VSUS 6,7,35,37,38 2.5VSUS 6,38 SMDDR_VREF 2.5VSUS SMDDR_VREF

2.5VSUS

2.5VSUS 2.5VSUS

0.1U cap per power pin. Place each capclose to pin. 33pin per socket (11*6).

SMDDR_VREF CN14 MD5 MD1 SM_DQS0 MD7 MD2 MD13 MD9 SM_DQS1 MD10 MD14 6 CLK_SDRAM0 6 CLK_SDRAM0# MD16 MD17 SM_DQS2 MD22 MD23 MD28 MD25 SM_DQS3 MD31 MD27
B

SMDDR_VREF

SMDDR_VREF CN13

SMDDR_VREF

SODIMM0
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 VREF VSS DQ0 DQ1 VDD DQS0 DQ2 VSS DQ3 DQ8 VDD DQ9 DQS1 VSS DQ10 DQ11 VDD CK0 CK0 VSS VREF VSS DQ4 DQ5 VDD DM0 DQ6 VSS DQ7 DQ12 VDD DQ13 DM1 VSS DQ14 DQ15 VDD VDD VSS VSS 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 MD4 MD0 DM0 MD3 MD6 MD12 MD8 DM1 MD15 MD11 6 CLK_SDRAM3 6 CLK_SDRAM3# MD20 MD21 DM2 MD18 MD19 MD24 MD29 DM3 MD26 MD30 MD16 MD17 SM_DQS2 MD22 MD23 MD28 MD25 SM_DQS3 MD31 MD27 MD5 MD1 SM_DQS0 MD7 MD2 MD13 MD9 SM_DQS1 MD10 MD14 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199

SODIMM1
VREF VSS DQ0 DQ1 VDD DQS0 DQ2 VSS DQ3 DQ8 VDD DQ9 DQS1 VSS DQ10 DQ11 VDD CK0 CK0 VSS VREF VSS DQ4 DQ5 VDD DM0 DQ6 VSS DQ7 DQ12 VDD DQ13 DM1 VSS DQ14 DQ15 VDD VDD VSS VSS 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 SMDDR_VREF 6,38 MD4 MD0 DM0 MD3 MD6 MD12 MD8 DM1 MD15 MD11 C288 C287 C277 C276 C268 C267 C256 C257 C244 C245 .1U_0402.1U_0402.1U_0402.1U_0402.1U_0402.1U_0402.1U_0402.1U_0402.1U_0402.1U_0402

2.5VSUS
A

A

C222 C190 C191 C169 C170 C155 C156 C116 .1U_0402.1U_0402.1U_0402.1U_0402.1U_0402.1U_0402.1U_0402.1U_0402 2.5VSUS

SM_DQS8

T35 T37 6,11 11 11 11 11 11 11 11 6,11
C

CKE1 MA12 MA9 MA7 MA3 MA10 BA0 BMWEA# SM_CS0#

CKE1 MA12 MA9 MA7 R_MA5 MA3 R_MA1 MA10 BA0 BMWEA# SM_CS0# MD36 MD32 SM_DQS4 MD38 MD35 MD44 MD41 SM_DQS5 MD42 MD47

MD53 MD52 SM_DQS6 MD55 MD51 MD56 MD61 SM_DQS7 MD59 MD62 CGDAT_SMB CGCLK_SMB +3V R114 *10K Z0901

D

Z0902 *10K

201 202 GND GND

DQ16 DQ20 DQ17 DQ21 VDD VDD DQS2 DM2 DQ18 DQ22 VSS VSS DQ19 DQ23 DQ24 DQ28 VDD VDD DQ25 DQ29 DQS3 DM3 VSS VSS DQ26 DQ30 DQ27 DQ31 VDD VDD CB0 CB4 CB1 CB5 VSS VSS DQS8 DM8 CB2 CB6 VDD VDD CB3 CB7 DU DU/RESET VSS VSS VSS CK2 VDD CK2 VDD VDD CKE1 CKE0 DU/A13 DU/BA2 A12 A11 A9 A8 VSS VSS A7 A6 A5 A4 A3 A2 A1 A0 VDD VDD A10/AP BA1 BA0 RAS CAS WE S0 S1 DU DU VSS VSS DQ32 DQ36 DQ33 DQ37 VDD VDD DQS4 DM4 DQ34 DQ38 VSS VSS DQ35 DQ39 DQ40 DQ44 VDD VDD DQ41 DQ45 DQS5 DM5 VSS VSS DQ42 DQ46 DQ43 DQ47 VDD VDD VDD CK1 CK1 VSS VSS VSS DQ52 DQ48 DQ53 DQ49 VDD VDD DM6 DQS6 DQ54 DQ50 VSS VSS DQ55 DQ51 DQ56 DQ60 VDD VDD DQ61 DQ57 DM7 DQS7 VSS VSS DQ62 DQ58 DQ63 DQ59 VDD VDD SA0 SDA SA1 SCL SA2 VDD(SPD) DU VDD(ID) AMP-DDR_SODIMM

SM_DQS8

T108 T110 CKE0 MA11 MA8 MA6 R_MA4 R_MA2 MA0 BA1 SRASA# SCASA# SM_CS1# MD37 MD33 DM4 MD34 MD39 MD45 MD40 DM5 MD46 MD43 CLK_SDRAM1# 6 CLK_SDRAM1 6 MD48 MD49 DM6 MD50 MD54 MD60 MD57 DM7 MD58 MD63 2 2 CGDAT_SMB CGCLK_SMB +3V R113 MD53 MD52 SM_DQS6 MD55 MD51 MD56 MD61 SM_DQS7 MD59 MD62 CGDAT_SMB CGCLK_SMB CKE0 MA11 MA8 MA6 MA0 BA1 SRASA# SCASA# SM_CS1# 6,11 11 11 11 6,11 11 11 11 11 6,11 6,11 SM_B5 SM_B1 6,11 CKE3 CKE3 R_MA12 R_MA9 R_MA7 SM_B5 R_MA3 SM_B1 R_MA10 R_BA0 R_BMWEA# SM_CS2# MD36 MD32 SM_DQS4 MD38 MD35 MD44 MD41 SM_DQS5 MD42 MD47

6,11 R_BMWEA# 6,11 SM_CS2#

DQ16 DQ20 DQ17 DQ21 VDD VDD DQS2 DM2 DQ18 DQ22 VSS VSS DQ19 DQ23 DQ24 DQ28 VDD VDD DQ25 DQ29 DQS3 DM3 VSS VSS DQ26 DQ30 DQ27 DQ31 VDD VDD CB0 CB4 CB1 CB5 VSS VSS DQS8 DM8 CB2 CB6 VDD VDD CB3 CB7 DU DU/RESET VSS VSS VSS CK2 VDD CK2 VDD VDD CKE1 CKE0 DU/A13 DU/BA2 A12 A11 A9 A8 VSS VSS A7 A6 A5 A4 A3 A2 A1 A0 VDD VDD A10/AP BA1 BA0 RAS CAS WE S0 S1 DU DU VSS VSS DQ32 DQ36 DQ33 DQ37 VDD VDD DQS4 DM4 DQ34 DQ38 VSS VSS DQ35 DQ39 DQ40 DQ44 VDD VDD DQ41 DQ45 DQS5 DM5 VSS VSS DQ42 DQ46 DQ43 DQ47 VDD VDD VDD CK1 CK1 VSS VSS VSS DQ52 DQ48 DQ53 DQ49 VDD VDD DM6 DQS6 DQ54 DQ50 VSS VSS DQ55 DQ51 DQ56 DQ60 VDD VDD DQ61 DQ57 DM7 DQS7 VSS VSS DQ62 DQ58 DQ63 DQ59 VDD VDD SA0 SDA SA1 SCL SA2 VDD(SPD) DU VDD(ID)

MD20 MD21 DM2 MD18 MD19 MD24 MD29 DM3 MD26 MD30

C285 C243 C281 C271 C272 C81 C82 C251 .1U_0402.1U_0402.1U_0402.1U_0402.1U_0402.1U_0402.1U_0402.1U_0402 2.5VSUS

C195 C196 C95 C83 C99 C100 C173 C174 C158 .1U_0402.1U_0402.1U_0402.1U_0402.1U_0402.1U_0402.1U_0402.1U_0402.1U_0402 2.5VSUS
B

C122 C283 C273 C262 C84 C119 C111 C74 C265 .1U_0402.1U_0402.1U_0402.1U_0402.1U_0402.1U_0402.1U_0402.1U_0402.1U_0402 2.5VSUS

CKE2 R_MA11 R_MA8 R_MA6 SM_B4 SM_B2 R_MA0 R_BA1 R_SRASA# R_SCASA# SM_CS3# MD37 MD33 DM4 MD34 MD39 MD45 MD40 DM5 MD46 MD43

CKE2

6,11 C234 C228 C220 C208 C199 C183 C166 C150 C126 C109 C97 .1U_0402.1U_0402.1U_0402.1U_0402.1U_0402.1U_0402.1U_0402.1U_0402.1U_0402.1U_0402.1U_0402

PC2100 DDR SDRAM SO-DIMM (200P)

PC2100 DDR SDRAM SO-DIMM (200P)

SM_B4 SM_B2

6,11 6,11

2.5VSUS

R_SRASA# 6,11 R_SCASA# 6,11 SM_CS3# 6,11

+ C400 100U/10V
C

SMDDR_VREF

C69 .1U_0402

C70 .1U_0402

C73 .1U_0402

C72 .1U_0402

DM[0..7] CLK_SDRAM4# 6 CLK_SDRAM4 6 MD[0..63]

DM[0..7]

11

MD[0..63] 11

MD48 MD49 DM6 MD50

SM_DQS[0..7]

SM_DQS[0..7] 11

MA[0..12] MD54 MD60 MD57 DM7 R_BA[0..1] MD58 MD63 +3V AMP-DDR_SODIMM(REVERSE) R_MA[0..12]

MA[0..12] 11 R_MA[0..12] 6,11
D

R_BA[0..1] 6,11

PROJECT : CT1

SMbus address A0
1

CLOCK 0,1 CKE 0,1
2 3

SMbus address A1
4

CLOCK 3,4 CKE 2,3
6

Quanta Computer Inc.
Size Date: Document Number DDR RAM Wednesday, April 14, 2004
7

EMI

rev.d
5

Rev 1A Sheet 12
8

of

38

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5

4

3

2

1

VDD3_3 L10 VDD3_3 FBM1608
D

+3V AVDD3_3 L9 AVDD3_3 +1.5V FBM1608 VDDV C137 C130 .1U C117 FBM1608 .01U 10U/10V/V C381 .01U C380 .1U C376 10U/10V/V DVDD3_3 L30 FBM1608 C141 C131 .01U C386 .01U C385 .1U C387 10U/10V/V +3V L29
D

+3V

C138 6 DVOCD[0..11] DVOCD11 DVOCD10 DVOCD9 DVOCD8 DVOCD7 DVOCD6 DVOCD5 DVOCD4 DVOCD3 DVOCD2 DVOCD1 DVOCD0 13 12 11 10 9 7 6 4 3 2 1 48 U15 CH7015 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 VDD GND[0] AVDD AGND VDDV DVDD[0] DVDD[1] DVDD[2] DGND[0] DGND[1] DGND[2] DGND[3] BCO VREF POUT H V RESET* DACB1 DACB2 DACB3 24 22 20 28 19 34 37 41 5 16 33 8 18 31 39 .01U

C147 .1U C149 10U/10V/V

+1.5V

R30 1K

6 6

DVOCCLK DVOCCLK#

43 44 42 45 46 32

XCLK XCLK*

.01U

R60 38 40

*0 DVOCFLDSTL 6 DVOBCLKINT 6
C

6
C

VREF C118 .1U

VREF R61 1K

6 6

DVOCHSYNC DVOCVSYNC

CH7015
Y Y_Pr Y_Pb 31 31 31

6,8,14,17,23,27,28 PCIRST#

DVDD3_3 6 R76 10K R75 10K 6 MI2C_DATA MI2C_CLK 29 30 SPD SPC

CVBS Y C CVBS/B ISET

17 25 23 21 27 R79 R73 75/F

S-CVBS1 31 S-YD1 31 S-CD1 31

R431 75

R432 75

R433 75

R81 75

R72 75

R80 75

rev.d

GPIO0 GPIO1

14 15

GPIO[0] GPIO[1]/HSYNC GND[1] NC 26

140/F Place close to 7205 Connect to Pin 33 ground using short/wide trace. XO 36

B

R77 *330

R74 *330

47

CLOSE TO CHIP

B

35

XI/FIN

7015_XIN

7015_XOUT Y3 14.318MHZ

C384 22P

C375 22P

A

GPIO[1:0] Pull Up and Pull Down TV output option will be defined later by SW group.
PROJECT : CT1

A

Quanta Computer Inc.
Size Document Number Custom Date:
5 4 3 2

Rev 1A Sheet
1

Wednesday, April 14, 2004

13

of

38

PDF created with pdfFactory trial version www.pdffactory.com

5

4

3

2

1

D

+3V CN21 R150 10K 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 TIP LAN1 LAN3 LAN5 LAN7 LED_GP LED_GN NC1 -INTB +3V R(IRQ3) GND PCICLK GND -REQ +3V AD31 AD29 GND AD27 AD25 (V) -CBE3 AD23 GND AD21 AD19 GND AD17 -CBE2 -IRDY +3V -CLKRUN -SERR GND -PERR -CBE1 AD14 GND AD12 AD10 GND AD8 AD7 +3V AD5 (V) AD3 +5V AD1 GND SYNC SDIN0 BITCLK -AC_PRIMARY BEEP AGND +MIC -MIC AGND -RI +5VA GND RING LAN2 LAN4 LAN6 LAN8 LED_YP LED_YN NC2 +5V -INTA R(IRQ4) +3VAUX -RST +3V -GNT GND -PME (V) AD30 +3V AD28 AD26 AD24 IDSEL GND AD22 AD20 PAR AD18 AD16 GND -FRAME -TRDY -STOP +3V -DEVSEL GND AD15 AD13 AD11 GND AD9 -CBE0 +3V AD6 AD4 AD2 AD0 (V) SERIRQ GND M66EN SDOUT SDIN1 -RESET -MPCICACK AGND +SPK -SPK AGND NC4 +3VAUX GND 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 +3V

D

MINI PCI TYPE III SLOT
+5V INTC# LANVCC PCIRST# GNT1# R140 1K 6,8,13,17,23,27,28 8 8

32 27

RF_LINK RF_OFF#

D3

1 8

1SS355 2 INTD#

2

PCLK_MINI 2 R402 *33 8 8,17,23 8,17,23 8,17,23 8,17,23 8,17,23 8,17,23 8,17,23 8,17,23 8,17,23 8,17,23 8,17,23 8,17,23 8,17,23 8,17,23 8,17,23 8,17,23 8,17,23 8,17,23 8,17,23 8,17,23 8,17,23 R145 *10K 9,20,22 9 9,20,22 BITCLK 8,17,23 SYNC1 SDINB REQ1# AD31 AD29 AD27 AD25 C/BE3# AD23 AD21 AD19 AD17 C/BE2# IRDY# SERR# PERR# C/BE1# AD14 AD12 AD10 AD8 AD7 AD5 AD3 +5V AD1 R148 33 SDIN1

rev.d

1

PCI_PME# 8,17,23 BC0EX2 32 AD30 8,17,23 AD28 AD26 AD24 AD22 AD20 PAR AD18 AD16 FRAME# TRDY# STOP# 8,17,23 8,17,23 8,17,23 8,17,23 8,17,23 8,17,23 8,17,23 8,17,23 8,17,23 8,17,23 8,17,23
C

C581 *18P
C

32

BC0EX1

R149 1K

R139

100 AD22 AD22

DEVSEL# 8,17,23 AD15 AD13 AD11 AD9 C/BE0# AD6 AD4 AD2 AD0 SERIRQ SDOUT1 8,17,23 8,17,23 8,17,23 8,17,23 8,17,23 8,17,23 8,17,23 8,17,23 8,17,23 8,17,27 9,20,22 9,20,22 R141 1K R393 2 LANVCC 1 10K
B

+3V

+3V

R142 *10K

B

-CODEC_RST

C335 R146 *10K SDIN1 *22P 2 R147 10K 1 +5V

125

126

MINIPCI_TYPE_III

+5V

+5V

+5V

rev.d

C582 .1U/16V/0402

C583 .1U/16V/0402

C584 .1U/16V/0402

rev.d
A A

PROJECT : CT1

Quanta Computer Inc.
Size Document Number Custom Date:
5 4 3 2

Rev 1A Sheet
1

Wednesday, April 14, 2004

14

of

38

PDF created with pdfFactory trial version www.pdffactory.com

1

2

3

4

5

6

7

8

CN1 31 32 33 34 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

rev.d
VADJ_R LCD_VCC

R425 1K L25 PBY201209T-4A VADJ LCDVIN LCDVCC 27

+5V 1

Q17 2 DTA124EUA RF_LED# 25,32

A

rev.d

VADJ_R BLON +3V LCDVIN 1 C344 C346 .1U/16V/0402 C343 C348 .1U/16V/0402 +3V R156 Q18 SI3443DV 3 R155 10K 6 DISP_ON 2 Q19 C349 DTC144EU 1 10U/10V C347 .1U 2 1 3 G D D S D D 4 5 6 +3V LCDVCC 10K

A

BLON

EDIDDATA 6 EDIDCLK 6 3

rev.d

Del R4
LCDID2 LCDID1 LCDID0 9 9 9 C345 2

.1U_0603_25V 10U/25V

.1U/16V/0402

TXLOUT0+ TXLOUT0TXLOUT1+ TXLOUT1TXLOUT2+ TXLOUT2TXLCLKOUT+ TXLCLKOUT-

TXLOUT0+ 6 TXLOUT0- 6 TXLOUT1+ 6 TXLOUT1- 6 TXLOUT2+ 6 TXLOUT2- 6 TXLCLKOUT+ 6 TXLCLKOUT- 6

C623 100P

C624 100P

C625 100P

24mil

EMI rev.d

B

B

LCD_CON30

3VPCU +3V

R382 Q38 SI3443DV

100K

R3 33K R383 3 D4 6 BKLON R154 1K BLON 2 1 1SS355

3 10K 2 Q39 2 1

G D D

S D D

4 5 6

VIN

Close to EC
LID_EC# 27

30mils
LCDVIN

rev.d

3 4 SW6 3 LID

1 2

DTC144EU

C

1

C

8

FPBACK#

2 Q16 DTC144EUA 1

D

D

PROJECT : CT1

Quanta Computer Inc.
Size B Date:
1 2 3 4 5 6

Document Number Wednesday, April 14, 2004
7

Rev 1A Sheet 15
8

of

38

PDF created with pdfFactory trial version www.pdffactory.com

5

4

3

2

1

CardBus Connector
3VSUS 5VSUS A_VCC 5VSUS U5 C465 1 1 C554 2
D

5VSUS 1 2 3 4 5 6 7 8 9 10 11 12 24 5V_0 5V_2 23 5V_1 NC_3 22 DATA NC_2 21 CLOCK SHDN# 20 LATCH 12V_1 19 NC_0 BVPP/BVCORE 18 12V_0 BVCC1 17 AVPP/AVCORE BVCC0 16 AVCC0 NC_1 15 AVCC1 OC# 14 3VSUS GND 3.3VIN0 13 RESET# 3.3VIN1 TPS2224A/2220A (PWR) 25 NC

C483 C481 C482 1000P .01U_0402 .1U_0603_25V

1 C501 10U/10V/0805

+

C553 4.7U/10V

C559 2

.01U_0402 C557 4.7U/10V

TPS_CLOCK

2

17 17 17

TPS_DATA TPS_CLOCK TPS_LATCH AVPP A_VCC 17,27 PCICGRST#

TPS_DATA TPS_CLOCK TPS_LATCH

D

R373 .1U_0603_25V .1U_0603_25V *43K

U21-3 VCCB VCCB B_CAD31/B_D10 B_CAD30/B_D9 B_CAD29/B_D1 B_CAD28/B_D8 B_CAD27/B_D0 B_CAD26/B_A0 B_CAD25/B_A1 B_CAD24/B_A2 B_CAD23/B_A3 B_CAD22/B_A4 B_CAD21/B_A5 B_CAD20/B_A6 B_CAD19/B_A25 B_CAD18/B_A7 B_CAD17/B_A24 B_CAD16/B_A17 B_CAD15/B_IOWR B_CAD14/B_A9 B_CAD13/B_IORD B_CAD12/B_A11 B_CAD11/B_OE B_CAD10/B_CE2 B_CAD9/B_A10 B_CAD8/B_D15 B_CAD7/B_D7 B_CAD6/B_D13 B_CAD5/B_D6 B_CAD4/B_D12 B_CAD3/B_D5 B_CAD2/B_D11 B_CAD1/B_D4 B_CAD0/B_D3 B_CC/BE3/B_REG B_CC/BE2/B_A12 B_CC/BE1/B_A8 B_CC/BE0/B_CE1 B_CPAR/B_A13 B_CFRAME/B_A23 B_CTRDY/B_A22 B_CIRDY/B_A15 B_CSTOP/B_A20 B_CDEVSL/B_A21 B_CBLOCK/B_A19
B

U21-2 D19 K19 B15 A16 B16 A17 C16 D17 C19 D18 E17 E19 G15 F18 H14 H15 G17 K17 L13 K18 L15 L17 L18 L19 M17 M14 M15 N19 N18 N15 M13 P18 P17 P19 F15 G18 K14 M18 K13 G19 H17 J13 J17 H19 J19 J18 B18 E18 J15 F14 A18 H18 B19 F17 C17 N13 B17 C18 F19 N17 A15 K15 PCI7411GHK VCCA VCCA A_CAD31/A_D10 A_CAD30/A_D9 A_CAD29/A_D1 A_CAD28/A_D8 A_CAD27/A_D0 A_CAD26/A_A0 A_CAD25/A_A1 A_CAD24/A_A2 A_CAD23/A_A3 A_CAD22/A_A4 A_CAD21/A_A5 A_CAD20/A_A6 A_CAD19/A_A25 A_CAD18/A_A7 A_CAD17/A_A24 A_CAD16/A_A17 A_CAD15/A_IOWR A_CAD14/A_A9 A_CAD13/A_IORD A_CAD12/A_A11 A_CAD11/A_OE A_CAD10/A_CE2 A_CAD9/A_A10 A_CAD8/A_D15 A_CAD7/A_D7 A_CAD6/A_D13 A_CAD5/A_D6 A_CAD4/A_D12 A_CAD3/A_D5 A_CAD2/A_D11 A_CAD1/A_D4 A_CAD0/A_D3 A_CC/BE3/A_REG A_CC/BE2/A_A12 A_CC/BE1/A_A8 A_CC/BE0/A_CE1 A_CPAR/A_A13 A_CFRAME/A_A23 A_CTRDY/A_A22 A_CIRDY/A_A15 A_CSTOP/A_A20 A_CDEVSL/A_A21 A_CBLOCK/A_A19 A_CPERR/A_A14 A_CSERR/A_WAIT A_CREQ/A_INPACK A_CGNT/A_WE A_CSTSCHG/A_BVD1(STSCHG/RI) A_CCLKRUN/A_WP(IOIS16) A_CCLK/A_A16 A_CINT/A_READY(IREQ) A_CRST/A_RESET A_CAUDIO/A_BVD2(SPKR) A_CCD1/A_CD1 A_CCD2/A_CD2 A_CVS1/A_VS1 A_CVS2/A_VS2 A_RSVD/A_D14 A_RSVD/A_D2 A_RSVD/A_A18 A5 A11 D1 C1 D3 C2 B1 B4 A4 E6 B5 C6 B6 G9 C7 B7 A7 A10 E11 G11 C11 B11 C12 B12 A12 E12 C13 F12 A13 C14 E13 A14 B14 E14 C5 F9 B10 G12 G10 C8 A8 B8 A9 C9 E10 F10 B3 E7 B9 B2 C3 E9 C4 A6 A2 C15 E5 A3 E8 B13 D2 C10

A_VCC

C

A_D10 A_D9 A_D1 A_D8 A_D0 A_A0 A_A1 A_A2 A_A3 A_A4 A_A5 A_A6 A_A25 A_A7 A_A24 A_A17 A_IOWR# A_A9 A_IORD# A_A11 A_OE# A_CE2# A_A10 A_D15 A_D7 A_D13 A_D6 A_D12 A_D5 A_D11 A_D4 A_D3 A_REG# A_A12 A_A8 A_CE1# A_A13 A_A23 A_A22 A_A15 A_A20 A_A21 A_A19 A_A14 A_WAIT# A_INPACK# A_WE# A_STSCHG_P A_IOIS16# A_A16 R262 A_IREQ# A_RESET A_SPKR_P A_CD1# A_CD2# A_VS1# A_VS2# A_D14 A_D2 A_A18

CN6
A_D3 A_D4 A_D11 A_D5 A_D12 A_D6 A_D13 A_D7 A_D15 A_A10 A_CE2# A_OE# A_A11 A_IORD# A_A9 A_IOWR# A_A17 A_A24 A_A7 A_A25 A_A6 A_A5 A_A4 A_A3 A_A2 A_A1 A_A0 A_D0 A_D8 A_D1 A_D9 A_D10 A_CE1# A_A8 A_A12 A_REG# A_A23 A_A15 A_A22 A_A21 A_A20 A_A13 A_A14 A_WAIT# A_INPACK# A_WE# A_IREQ# A_A19 A_IOIS16# A_RESET A_D14 A_A18 A_VS1# A_VS2# A_CD1# A_CD2# A_SPKR_P A_STSCHG_P A_D2 2 3 37 4 38 5 39 6 41 8 42 9 10 44 11 45 46 55 22 56 23 24 25 26 27 28 29 30 64 31 65 66 7 12 21 61 19 54 20 53 50 49 13 14 59 60 15 16 48 33 58 40 47 43 57 36 67 62 63 32 SKTAAD0/D3 SKTAAD1/D4 SKTAAD2/D11 SKTAD3/D5 SKTAD4/D12 SKTAD5/D6 SKTAAD6/D13 SKTAAD7/D7 SKTAAD8/D15 SKTAAD9/A10 SKTAAD10/CE2# SKTABAD11/OE# SKTAAD12/A11 SKTAAD13/IORD# SKTAAD14/A9 SKTAAD15/IOWR# SKTAAD16/A17 SKTAAD17/A24 SKTAAD18/A7 SKTAAD19/A25 SKTAAD20/A6 SKTAAD21/A5 SKTAAD22/A4 SKTAAD23/A3 SKTAAD24/A2 SKTAAD25/A1 SKTAAD26/A0 SKTAAD27/D0 SKTAAD28/D8 SKTAAD29/D1 SKTAAD30/D9 SKTAAD31/D10 -SKTACBE0/CE1# -SKTACBE1/A8 -SKTACBE2/A12 -SKTACBE3/REG# SKTAPCLK/A16 -SKTAFRAME/A23 -SKTAIRDY/A15 -SKTATRDY/A22 -SKTADEVSEL/A21 -SKTASTOP/A20 SKTAPAR/A13 -SKTAPERR/A14 0SKTASERR/WAIT# -SKTAREQ/INPACK# -SKTAGNT/WE# -SKTAINT/RDY -SKTALOCK/A19 -SKTACLKRUN/WP -SKTARST/RESET SKTARSVD/D14 -SKTRSVD/A18 -SKTAVS1/VS1# -SKTAVS2VS2# -SKTACD1/CD1# -SKTACD2/CD2# SKTAAUDIO/BVD2 -SKTASTSCHG/BVD1 SKTARSVD/D2

SKTA/VCC1 SKTA/VCC2

17 51

A_VCC

C

SKTA/VPP1 SKTA/VPP2

18 52

AVPP C513 10U/10V/0805 C488 .001U_0402

B_CPERR/B_A14 B_CSERR/B_WAIT B_CREQ/B_INPACK B_CGNT/B_WE B_CSTSCHG/B_BVD1(STSCHG/RI) B_CCLKRUN/B_WP(IOIS16) B_CCLK/B_A16 B_CINT/B_READY(IREQ) B_CRST/B_RESET B_CAUDIO/B_BVD2(SPKR) B_CCD1/B_CD1 B_CCD2/B_CD2 B_CVS1/B_VS1 B_CVS2/B_VS2 B_RSVD/B_D14 B_RSVD/B_D2 B_RSVD/B_A18 PCI7411GHK

33

GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 GND11 GND12 GND13 GND14 GND15 GND16 GND17 GND18 GND19 GND20 GND21 GND22 GND GND

1 34 35 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88

B

rev.d ESD

CARDBUS SLOT
FOX=WZ21131-G2

A

A

PROJECT : CT1

Quanta Computer Inc.
Size Document Number Custom Date:
5 4 3 2

Rev 1A Sheet
1

Wednesday, April 14, 2004

16

of

38

PDF created with pdfFactory trial version www.pdffactory.com

5

4

3

2

1

CardBus
3VSUS 3VSUS U21-1 W3 W10
D

U21-5 R303 10K SCL SDA SUSPEND# 9 PCI7411GHK DATA CLOCK LATCH SPKROUT MFUNC0 MFUNC1 MFUNC2 MFUNC3 MFUNC4 MFUNC5 MFUNC6 N1 L6 N2 L7 N3 M5 P1 P2 P3 N5 R1 TPS_DATA TPS_CLOCK TPS_LATCH TPS_DATA 16 TPS_CLOCK 16 TPS_LATCH 16 PCMSPK 20 INTE# 8 INTF# 8 INTG# 8 SERIRQ 8,14,27 PLOCK# 8 CARD_LED 18,25 CLKRUN# 8,23 M3 M2 SCL SDA

3VSUS U27 8 7 6 5 VCC NC SCL SDA 24LC08 A0 A1 A3 GND 1 2 3 4 SCL SDA R336 2.7K R322 2.7K 3VSUS
D

8,14,23 AD[0..31]

VCCP VCCP AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 C/BE3 C/BE2 C/BE1 C/BE0 PAR FRAME TRDY IRDY STOP DEVSEL IDSEL PERR SERR REQ GNT PCLK PRST GRST RI_OUT/PME PCI7411GHK

C

AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0

U2 V1 V2 U3 W2 V3 U4 V4 V5 U5 R6 P6 W6 V6 U6 R7 V9 U9 R9 N9 V10 U10 R10 N10 V11 U11 R11 W12 V12 U12 N11 W13 W4 W7 W9 W11 P9 V7 R8 U7 W8 N8 W5 V8 U8 U1 T2 P5 R3 T1 T3

3VSUS

SUSPEND

R2

R304

*0

PCIXX21 Power Terminals
3VSUS U21-4 H8 H9 H10 H11 H12 J8 M7 J12 M9 M10 M12 K8 K12 N7 G7 G8 G13 H13 J9 J10 J11 K9 K10 K11 L8 L9 L10 L11 L12 M8 VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC 3VSUS

C528

C529

C498 .1U

C511 1U_0402_6.3V

48MHz Clock
Y7 CLK_48 M1 CLK48M 3 2 OUT GND VDD OE 4 L40

+3V FCM1608K221

.001U_0402 .01U_0402 C438 M19 H1 C531 H2 1U_0402_6.3V 3VSUS 1U_0402_6.3V

C

1

R302

0 C530 .01U_0402

rev.d
C585 .01U_0402

SG-8002CA 48M L41 FCM1608K221

1.5V 1.5V

8,14,23 8,14,23 8,14,23 8,14,23 8,14,23

C/BE3# C/BE2# C/BE1# C/BE0# PAR

rev.d

8,14,23 FRAME# 8,14,23 TRDY# 8,14,23 IRDY# 8,14,23 STOP# 8,14,23 DEVSEL# 8,14,23 8,14,23 8 8
B

AD25

R284

100

GND GND VR_EN GND GND GND GND GND GND GND GND GND GND GND GND GND GND PCI7411GHK

C461

C467

C519 .1U

C536 1U_0402