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Revisions REV TABLE OF CONTENTS ECN NO. Description Of Change DATE

Approvals DFTG. ENGR. REL.

PAGE 4 - CLOCK GENERATOR 5-7 - BANIAS PROCESSOR 8-11 - ATI RS200MB 12 - H/W STRAP 13-16 - DDR 17,18 - ALI_M1535 19 - CRT & LCD CONNECTOR INTERFACE 20 - KAHUNA LITE 21 - FWH & EEPROM 22 - CARDBUS CONTROLLER 23 - PC & SD CARD SLOT 24 - AC97 CODEC 25 - EQ & MIC JACK 26 - AUDIO AMP & HP JACK 27 - HDD CONNECTOR 28 - INT KBD./ POINTING DEVICE

PAGE 29 - LID SW / LEDS / SW BOARD CONN 30 - PORT REPLICATOR 31 - MINI PCI 32 - USB, IR 33 - INVERTER & MDC CONN 34 - THERMAL SENSOR & FAN CONTROLLER 35 - AC JACK & BATT CONN 36 - DECOUPLING CAPS 37 - DRILL HOLE 38 - HIGH SPEED 39 - PULL UPS 40,41 - LAN INTERFACE 42 - USB2.0 43-47 - POWER 48 - CHARGER 49 - SWITCH BOARD 50 - CHANGE LIST

Engineer
Jerry Huang

Drawn by
Jerry Huang

INVENTEC
TITLE Size

R&D CHK DOC CTRL CHK MFG ENGR CHK Changed by
EE1

Sapphire
TABLE OF CONTENTS
VER Model Number

A3

Date Changed
Wednesday, March 5, 2003

Time Changed
6:15:22 pm

QA CHK

240

P8607-40i-PVR-03

Sheet

1

of

50

ITP

BANIAS
(Micro-FCPGA)
mPGA478

CLK GENERATOR ICS_951402

DDR_SODIMM0

LCM CRT
USB 2.0 NEC UPD20101

NB ATI RS200

USB0

USB1

USB2

USB3

USB4

SB
ALi 1535+

Modem Dauhghter Card

AC'97 CODEC
AD_1981B

CARDBUS
OZ711M1

DDR_SODIMM1

Mini PCI

LAN
BCM5705M

FWH
SD CARD PC CARD

Wireless 802.11

2nd BATTERY

Power On Board

PORT REPLICATOR

SMC/KBC
KAHUNA LITE LPC47N250
Engineer
Jerry Huang

BATTERY

Drawn by
Jerry Huang

INVENTEC
TITLE Size

R&D CHK DOC CTRL CHK MFG ENGR CHK Changed by
EE1

Sapphire
BLOCK DIAGRAM
VER Model Number

A3

Date Changed
Wednesday, March 5, 2003

Time Changed
6:15:44 pm

QA CHK

240

P8607-40i-PVR-03

Sheet

2

of

50

+V5 +VBATR
0.04

5V

+V5A +V3A

+V12

ADPT
SKIP#

3V VL

+V5S

+VBDC

+VBATA +V3

ICTL

ACOK

+V3S

+VBATB

1.2V 2.5V

+V1.2L +V2.5L

+V2.5S

PDS CHGA THMA DISA COMA CHGB THMB DISB BATSEL COMB BATSTAT ACPRES#

V2.5

1.05V

+VCCP +V1.8S
+V1.25S

+V2.5S

1.8V

+V5S +VCC_CORE

Engineer
Jerry Huang

Drawn by
Jerry Huang

INVENTEC
TITLE Size

R&D CHK DOC CTRL CHK MFG ENGR CHK Changed by
EE1

Sapphire
BLOCK DIAGRAM
VER Model Number

A3

Date Changed
Wednesday, March 5, 2003

Time Changed
6:16:02 pm

QA CHK

240

P8607-40i-PVR-03

Sheet

3

of

50

EXT CLK FREQUENCY SELECT TABLE FS4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 FS3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 FS2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 FS1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 FS0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 CPU MHz MEM MHz 100.01 133.33 200.01 166.64 100.01 133.34 133.16 166.45 105.00 140.00 66.67 175.00 109.99 146.66 201.00 183.27 99.80 133.06 199.58 166.30 99.80 133.06 133.06 166.30 99.80 133.06 199.58 166.30 99.80 133.06 133.06 166.30 100.01 133.33 200.01 166.64 133.34 100.01 166.45 133.16 105.00 140.00 66.67 175.00 109.99 146.66 201.00 183.27 99.80 133.06 199.58 166.30 133.06 133.06 133.06 166.30 99.80 133.06 199.58 166.30 133.06 99.80 166.30 133.06 66MHz 66.67 66.67 66.67 66.66 66.67 66.67 66.58 66.58 70.00 70.00 66.67 70.00 73.33 73.33 70.00 73.31 66.53 66.53 66.53 66.52 66.53 66.53 66.53 66.52 66.53 66.53 66.53 66.52 66.53 66.53 66.53 66.52 PCI MHz With Spread Enabled... 33.34 33.33 33.34 33.33 33.34 33.34 33.29 33.29 35.00 35.00 33.34 35.00 36.66 36.67 35.00 36.65 33.27 33.27 33.26 33.26 33.27 33.27 33.27 33.26 35.27 33.27 33.26 33.26 33.27 33.27 33.27 33.26 (15/5)
C225 1 C217 1 C183 1 C210 1 C227 1 1 C187

Spread OFF OR Center spread +/-0.3%

Down spread +/-0.6% +V3S L34 NFM40P12C223 1 2 4 3
1 C218

Down spread +/-0.8%

2

2 2 2 2 0.01UF_16V 0.01UF_16V 22UF_6.3V 0.01UF_16V 0.01UF_16V 0.01UF_16V

2 (10/5)
1 C211 C203

10UF_K_6.3V

1 L33 2 BLM11A221S

(10/5) Stuff when useing ITP port R559 R558
1 1 2 2

1

2 0.01UF_16V 22UF_6.3V

OPEN OPEN

38-,638-,6-

CLK_ITP CLK_ITP#

U22
+V3S
Place crystal within 500 mils of CLK_TITAN 1 1 1 1

CLK_NB14_EXTR CLK_KBC14_EXTR CLK_SB14_EXTR CLK_CODEC14_EXTR

1038-,2038-,1838-,24-

(NI 33) 1 R195

R211 OPEN
2 OPEN 2 2

R223 OPEN
2

R221 OPEN R222 2.2K_5%
2

NO_STUFF_10PF
C195 1 C209 1 OPEN 2 OPEN 2

1 X5

1

1 13 19 29 30 42 48 9 R213 OPEN

VDD VDD VDD VDD VDD VDD VDD VDDXTAL

38-,538-,5-

VDDA GNDA CPUCLKT0 CPUCLKC0 CPUCLKT1 CPUCLKC1

36 37 40 CLK_CPU_BCLK_3 39 CLK_CPU_BCLK#_3 CLK_NB_BCLK_3 44 43 CLK_NB_BCLK#_3

CLK_CPU_BCLK CLK_CPU_BCLK# Close to CPU R571 R570 R543 R542
1 1 1 2 2 2

R216 R227 R197 R215

1 1 1 1

2 2 2 2

33_5% 33_5% 33_5% 33_5%
1010-

49.9_1% 49.9_1% 49.9_1% 49.9_1%

CLK_NB_BCLK CLK_NB_BCLK#
38-,1038-,10-

Close to NB

CLK_KBC14_EXT 1 L521 2 BLM11A121S CLK_SB14_EXT 1 L522 2 BLM11A121S L523 CLK_CODEC14_EXT 1 2 BLM11A121S
1

2 NO_STUFF_10PF

14.318MHZ 2

6 X1 7 X2 2 3 4 12 45 10 FS0 (RFF0) FS1 (RFF1) FS2 (RFF2) PCI_STOP# CPU_STOP# VTT_PWRGD

R212 2.2K_5%
1

PCISTOP#_3 CPUSTOP#_NB VGATE_U
1 1

17-,10104439-,34-,18-,1339-,34-,18-,13-

1 R235 2 +V3S 2.2K_5% CLK_SBPCI_EXT 14 PCICLK_F0 1 R233 2 1 R234 2 PCICLK_F1 15 (FS4) OPEN (FS3) 2.2K_5%

SDRAM 47 AGPCLK0 32 AGPCLK1 31

CLK_NB66_3 CLK_AGP_3

R198 R238

1 1

2 2

33_5% 33_5%

CLK_NB66 CLK_AGP

1

R225

2

33_5%

18-

CLK_SBPCI_EXTR

R224 R210 2.2K_5% OPEN
2 2 2 2

SMBDATA_3 R232 SMBCLK_3 2.2K_5%
1

34 SDATA 35 SCLK 11 PCI33_66#SEL 38 IREF 5 8 18 24 25 33 41 46 GND GNDXTAL GND GND GND GND GND GND

R263

2

48MHZ0 28 48MHZ1 27 24_48MHZ 26

CLK_USB48_EXT

1

R245

2 33_5%

18-

CLK_USB48_EXTR

475_1%

PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5

16 17 20 21 22 23

CLK_CBPCI_EXT CLK_NICPCI_EXT CLK_MINIPCI_EXT CLK_NBPCI_EXT CLK_FWHPCI_EXT CLK_USBPCI_EXT

R226 R237 R236 R243 R242 R254 R244

1 1 1 1 1 1 1

2 33_5% 2 33_5% 2 33_5% 2 33_5% 2 33_5% 2 33_5% 2 33_5%

38-,224038-,311038-,2142-,3838-,20-

CLK_CBPCI_EXTR CLK_NICPCI_EXTR CLK_MINIPCI_EXTR CLK_NBPCI_EXTR CLK_FWHPCI_EXTR CLK_USBPCI_EXTR CLK_KBCPCI_EXTR

ICS_951402YFT_TSSOP_48P

Jerry Huang Jerry Huang

INVENTEC
Sapphire
CLK GENERATOR
240 P8607-40i-PVR-03 4 50 A3

+VCCP +VCCP

+VCCP
38-,17-,5-

H_INIT#

1

1

R219 470_5%
2 2

R574 200_5%
38-,5-

1

1

1

1

H_DPSLP#

2

R231 OPEN (470_5% NI)

R573 56_5%
2 38-,17-,52

R193 470_5%
2

R192 200_5%

KBCPURST_3

21-,20-

2G

Q13 3 D
S

2N7002_OPEN 1
38-,5-

Q16 3 2B C
E

H_A20M# Q14 3 2B C
E

Q19 3 2
C B E

H_PWRGD

CPUSTOP#_3

44-,17-,10-

1

R218

2

Q22 3 2B C
E

SST3904 1 H_A20M_KBC#
201

SST3904_OPEN Q20 3 2B C
E

470_5%

R253

2

SST3904 1

1 Q24 3 2 B C SST3904_OPEN
E

SST3904 1

OPEN (470_5% NI)

1

SB_PWG

20-,18-

1

R220

2

470_5%

SST3904 1

+VCCP

H_IGNNE# H_STPCLK# H_INTR H_NMI H_SMI# H_CPUSLP# H_INIT#

38-,17-,538-,17-,538-,17-,538-,17-,538-,17-,538-,17-,538-,17-,5-

56_5% 56_5% 56_5% 56_5% 56_5% 56_5% 56_5%

2 2 2 2 2 2 2

1 1 1 1 1 1 1

R191 R576 R569 R575 R190 R187 R188

H_D#(0:15)

38-,8-

+VCCP H_A#(3:16)
38-,8-

CN9
H_A#(3) H_A#(4) H_A#(5) H_A#(6) H_A#(7) H_A#(8) H_A#(9) H_A#(10) H_A#(11) H_A#(12) H_A#(13) H_A#(14) H_A#(15) H_A#(16)

H_REQ#(4:0)

38-,8-

DATA GRP 1

H_RS#(0) H_RS#(1) H_RS#(2)

38-,838-,838-,8-

H_A#(17:31)

38-,8-

H_TRDY# H_HIT# H_HITM# +VCCP H_BPM0_ITP# H_BPM1_ITP# H_BPM2_ITP# H_BPM3_ITP# H_BPM4_PRDY# H_BPM5_PREQ# H_TCK H_TDO H_TMS H_TRST# ITP_DBRESET#
1 343417-

H_A#(17) H_A#(18) H_A#(19) H_A#(20) H_A#(21) H_A#(22) H_A#(23) H_A#(24) H_A#(25) H_A#(26) H_A#(27) H_A#(28) H_A#(29) H_A#(30) H_A#(31)

H_ADSTB#1 H_A20M# H_FERR_S# H_IGNNE# H_STPCLK# H_INTR H_NMI H_SMI#

38-,838-,17-,538-,1738-,17-,538-,17-,538-,17-,538-,17-,538-,17-,5-

AF4 AC4 AC7 AC3 AD3 AE4 AD2 AB4 AC6 AD5 AE2 AD6 AF3 AE1 AF1 AE5

A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# ADSTB#1

K3 HIT# K4 HITM# BPM#0 BPM#1 BPM#2 BPM#3 PRDY# PREQ# TCK TDI TDO TMS TRST# DBR# C8 B8 A9 C9 A10 B10 A13 C12 A12 C11 B13 A7
TP138

ADDR GROUP 1

ITP SIGNALS

666666666618-,6-

+VCCP
1

DATA GRP 3

H_REQ#(0) H_REQ#(1) H_REQ#(2) H_REQ#(3) H_REQ#(4)

H_ADSTB#0

P4 U4 V3 R3 V2 W1 T4 W2 Y4 Y1 U1 AA3 Y3 AA2 38-,8- U3 R2 P3 T2 P1 T1

A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# ADSTB#0 REQ0# REQ1# REQ2# REQ3# REQ4#

ADS# BNR# BPRI# ADDR GROUP 0 DEFER# DRDY# DBSY# CONTROL BR0# IERR# INIT# LOCK# RESET# RS0# RS1# RS2# TRDY#

N2 L1 J3 L4 H2 M2 N4 A4 B5 J2 B11 H1 K1 L2 M3

38-,838-,838-,838-,838-,838-,8-

H_ADS# H_BNR# H_BPRI#
1 1

H_D#(0) H_D#(1) H_D#(2) H_D#(3) H_D#(4) H_D#(5) H_D#(6) H_D#(7) H_D#(8) H_D#(9) H_D#(10) H_D#(11) H_D#(12) H_D#(13) H_D#(14) H_D#(15)
38-,838-,838-,8-

H_DEFER# H_DRDY# H_DBSY#
2

R189 R567 56_5% 56_5%
2

H_DSTBN#0 H_DSTBP#0 H_DINV#0 H_D#(16:31)

A19 A25 A22 B21 A24 B26 A21 B20 C20 B24 D24 E24 C26 B23 E23 C25 C23 C22 D25

CN9
D0# D1# D2# D3# D4# D5# D6# D7# D8# D9# D10# D11# D12# D13# D14# D15# DSTBN0# DSTBP0# DINV0# D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# DSTBN2# DSTBP2# DINV2#

Y26 AA24 T25 U23 V23 R24 R26 R23 AA23 U26 V24 U25 V26 Y23 AA26 Y25 W25 W24 T24

38-,8-

H_D#(32) H_D#(33) H_D#(34) H_D#(35) H_D#(36) H_D#(37) H_D#(38) H_D#(39) H_D#(40) H_D#(41) H_D#(42) H_D#(43) H_D#(44) H_D#(45) H_D#(46) H_D#(47)
38-,838-,838-,8-

H_D#(32:47)

DATA GRP 0

DATA GRP 2

H_DSTBN#2 H_DSTBP#2 H_DINV#2 H_D#(48:63)

38-,8-

38-,17-,538-,838-,8-,6-

H_INIT# H_LOCK# H_CPURST#
38-,8-

H_RS#(0:2)

H_D#(16) H_D#(17) H_D#(18) H_D#(19) H_D#(20) H_D#(21) H_D#(22) H_D#(23) H_D#(24) H_D#(25) H_D#(26) H_D#(27) H_D#(28) H_D#(29) H_D#(30) H_D#(31)
38-,838-,838-,8-

R577 150_5%
2 6-

1

H_DSTBN#1 H_DSTBP#1 H_DINV#1 R89 1K_1%

H23 G25 L23 M26 H24 F25 G24 J23 M23 J25 L26 N24 M25 H26 N25 K25 K24 L24 J26 AC1 G1 E26 AD26

D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# DSTBN1# DSTBP1# DINV1# GTLREF3 GTLREF2 GTLREF1 GTLREF0

D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63# DSTBN3# DSTBP3# DINV3#

AB25 AC23 AB24 AC20 AC22 AC25 AD23 AE22 AF23 AD24 AF20 AE21 AD21 AF25 AF22 AF26 AE24 AE25 AD20

38-,8-

H_D#(48) H_D#(49) H_D#(50) H_D#(51) H_D#(52) H_D#(53) H_D#(54) H_D#(55) H_D#(56) H_D#(57) H_D#(58) H_D#(59) H_D#(60) H_D#(61) H_D#(62) H_D#(63)
38-,838-,838-,81 1 1 1 2 2 2 2

H_DSTBN#3 H_DSTBP#3 H_DINV#3

TDI_FLEX

2 1

COMP0 P25 R565 COMP1 P26 R561 COMP2 AB2 R557 COMP3 AB1 R554 MISC B7 DPSLP# C19 DPWR# E4 PWRGOOD A6 SLP#

27.4_1% 54.9_1% 27.4_1% 54.9_1% H_DPSLP# H_PWRGD H_CPUSLP#
1

R85 2K_1% R578 680_5%
2 2

A1 NC0 B2 NC1 C14 NO_STUFF_1K C3 AF7 1 R579 C16 TP137 E1 RSVD1 RSVD2 RSVD3 TEST3 PSI#

38-,538-,538-,17-,5-

8-

C2 A20M# D3 FERR# A3 IGNNE# C6 D1 D4 B4 STPCLK# LINT0 LINT1 SMI#

B17 PROCHOT# B18 THERMDA A18 THERMDC C17 THERMTRIP# A15 ITP_CLK1 A16 ITP_CLK0 B14 BCLK1 B15 BCLK0

THERM

H_THERMDA H_THERMDC PM_THRMTRIP#

10K_5%2 R580

P4_DPWR#

OPEN2

H_CLK

383838-,438-,4-

TEST1 C5 R572 1 TEST2 F23 R581 1

2OPEN 2OPEN

NO_STUFF_1K NO_STUFF_1K

CLK_ITP_CPU# CLK_ITP_CPU CLK_CPU_BCLK# CLK_CPU_BCLK

AMP_MPGA479M_C_1376756_479P_BANIAS

AMP_MPGA479M_C_1376756_479P_BANIAS

PSI#

44-

BANIAS 1 OF 3
Jerry Huang Jerry Huang

INVENTEC
Sapphire
Banias(1/3)
240 P8607-40i-PVR-03 5 50 A3

CN9
A2 A5 A8 A11 A14 A17 A20 A23 A26 AA1 AA4 AA6 AA8 AA10 AA12 AA14 AA16 AA18 AA20 AA22 AA25 AB3 AB5 AB7 AB9 AB11 AB13 AB15 AB17 AB19 AB21 AB23 AB26 AC2 AC5 AC8 AC10 AC12 AC14 AC16 AC18 AC21 AC24 AD1 AD4 AD7 AD9 AD11 AD13 AD15 AD17 AD19 AD22 AD25 AE3 AE6 AE8 AE10 AE12 AE14 AE16 AE18 AE20 AE23 AE26 AF2 AF5 AF9 AF11 AF13 AF15 AF17 AF19 AF21 AF24 B3 B6 B9 B12 B16 B19 B22 B25 C1 C4 C7 C10 C13 C15 C18 C21 C24 D2 D5 D7 D9 D11 VSS0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191

D13 D15 D17 D19 D21 D23 D26 E3 E6 E8 E10 E12 E14 E16 E18 E20 E22 E25 F1 F4 F5 F7 F9 F11 F13 F15 F17 F19 F21 F24 G2 G6 G22 G23 G26 H3 H5 H21 H25 J1 J4 J6 J22 J24 K2 K5 K21 K23 K26 L3 L6 L22 L25 M1 M4 M5 M21 M24 N3 N6 N22 N23 N26 P2 P5 P21 P24 R1 R4 R6 R22 R25 T3 T5 T21 T23 T26 U2 U6 U22 U24 V1 V4 V5 V21 V25 W3 W6 W22 W23 W26 Y2 Y5 Y21 Y24

In-Target Probe
+VCCP +VCCP

1

1

1

R591 54.9_1%
2 2

R587 54.9_1%
2

R588 39.2_1% 1 2 5 7 3 CN502 1 2 5 7 3 27 27 28 28 26 26 25 25 24 24 23 21 19 17 15 13 23 21 19 17 15 13

+V3A +VCCP
1

+VCC_CORE CN9 POWER15/5 AA11 VCC0 AA13 AA15 VCC1 AA17 VCC2 AA19 VCC3 AA21 VCC4 AA5 VCC5 AA7 VCC6 AA9 VCC7 AB10 VCC8 AB12 VCC9 AB14 VCC10 AB16 VCC11 AB18 VCC12 AB20 VCC13 AB22 VCC14 AB6 VCC15 AB8 VCC16 AC11 VCC17 AC13 VCC18 AC15 VCC19 AC17 VCC20 AC19 VCC21 AC9 VCC22 AD10 VCC23 AD12 VCC24 AD14 VCC25 AD16 VCC26 AD18 VCC27 AD8 VCC28 AE11 VCC29 AE13 VCC30 AE15 VCC31 AE17 VCC32 AE19 VCC33 AE9 VCC34 AF10 VCC35 AF12 VCC36 AF14 VCC37 AF16 VCC38 AF18 VCC39 AF8 VCC40 D18 VCC41 D20 VCC42 D22 VCC43 D6 VCC44 D8 VCC45 E17 VCC46 E19 VCC47 E21 VCC48 E5 VCC49 E7 VCC50 E9 VCC51 F18 VCC52 F20 VCC53 F22 VCC54 F6 VCC55 F8 VCC56 G21 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 G5 H22 H6 J21 J5 K22 U5 V22 V6 W21 W5 Y22 Y6

+VCC_CORE

TDI_FLEX H_TMS H_TCK H_TDO H_TRST#

5555538-,8-,5538-,438-,41

R590 1 R592 1

2 22.6_1%

1 C654 2 0.1UF_16V

R593 240_5%
2 18-,5-

POWER15/5 H_CPURST# H_TCK CLK_ITP# CLK_ITP

2

22.6_1%

12 12 11 11 8 8 9 9

ITP_DBRESET#

+V1.8S
2

R589 27.4_1%

39.2_1%

R252 39.2_1%

R209 39.2_1%

R584 39.2_1%

R596 39.2_1%

R586 39.2_1%

R585

10 14 16 18 20 22

10 14 16 18 20 22

555555-

H_BPM0_ITP# H_BPM1_ITP# H_BPM2_ITP# H_BPM3_ITP# H_BPM4_PRDY# H_BPM5_PREQ#

4 4 6 6

1

1

1

1

1

1

F26 VCCA0 B1 VCCA1 N1 VCCA2 AC26 VCCA3 D10 VCCP0 D12 VCCP1 D14 VCCP2 D16 VCCP3 E11 VCCP4 E13 VCCP5 E15 VCCP6 F10 VCCP7 F12 VCCP8 F14 VCCP9 F16 VCCP10 K6 VCCP11 L21 VCCP12 L5 VCCP13 M22 VCCP14 M6 VCCP15 N21 VCCP16 N5 VCCP17 P22 VCCP18 P6 VCCP19 R21 VCCP20 R5 VCCP21 T22 VCCP22 T6 VCCP23 U21 VCCP24 P23 VCCQ0 W4 VCCQ1 E2 VID0 F2 VID1 F3 VID2 G3 VID3 G4 VID4 H4 VID5 VCCSENSE VSSSENSE AE7 AF6

MLX_52435_2891 +VCCP

+VCCP

2

2

2

2

2

2

+V1.8S

444444444444-

H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5

1 C647 2 0.01UF

1 C587 2 0.01UF

1 C601 2 0.01UF

1 C578 2 0.01UF

1

C609

1

C638

1

C640

1

C560

2 10UF_K_6.3V 2 10UF_K_6.3V 2 10UF_K_6.3V 2 10UF_K_6.3V

1

1

NO_STUFF_54.9_1% R555 OPEN

AMP_MPGA479M_C_1376756_479P_BANIAS
NO_STUFF_54.9_1% 2

R553 OPEN
2

BANIAS 2 OF 3

Jerry Huang Jerry Huang

AMP_MPGA479M_C_1376756_479P_BANIAS

INVENTEC
Sapphire
Banias(2/3)
240 P8607-40i-PVR-03 6 50 A3

+VCC_CORE

POWER15/5 C72 1 1 120UF_2V_AP_METAL 120UF_2V_AP_METAL C73 1 C70 1 120UF_2V_AP_METAL 120UF_2V_AP_METAL C69 1 120UF_2V_AP_METAL C534

+VCC_CORE

1 C559 2 10UF_K_6.3V

1 C565 2 10UF_K_6.3V

1 C549 2 10UF_K_6.3V

1 C524 2 10UF_K_6.3V

1 C618 2 10UF_K_6.3V

1 C557 2 10UF_K_6.3V

1 C552 2 10UF_K_6.3V

1 C624 2 10UF_K_6.3V

1 C619 2 10UF_K_6.3V

1 C556 2 10UF_K_6.3V

1 C68 2 10UF_K_6.3V

1 C623

1 C622

1 POWER15/5 1 C52 C617

1 C558

1 POWER15/5 1 C550 C551

2 2 10UF_K_6.3V 2 10UF_K_6.3V 10UF_K_6.3V 10UF_K_6.3V 2 10UF_K_6.3V 10UF_K_6.3V 10UF_K_6.3V 2 2 2

+VCC_CORE

1 C580 2 10UF_K_6.3V

1 C568 2 10UF_K_6.3V

1 C71 2 10UF_K_6.3V

1 C581 2 10UF_K_6.3V

1 C533 2 10UF_K_6.3V

1 C74 2 10UF_K_6.3V

1 C538 2 10UF_K_6.3V

1 C584 2 10UF_K_6.3V

1 C537 2 10UF_K_6.3V

1 C582 2 10UF_K_6.3V

1 C567 2 10UF_K_6.3V

1 C586 2 10UF_K_6.3V

1 C583

1 POWER15/5 1 C579 C539

1 POWER15/5 1 C566 C585

2 2 2 10UF_K_6.3V 2 10UF_K_6.3V 10UF_K_6.3V 2 10UF_K_6.3V 10UF_K_6.3V

+VCCP

(20/5) POWER15/5 1 C594 1 C599 1 C621 1 C598 2 0.1UF_10V 1 C600 2 0.1UF_10V 1 C597 2 0.1UF_10V 1 C596 2 0.1UF_10V 1 C593 2 0.1UF_10V 1 C595 2 0.1UF_10V 2 0.1UF_10V POWER15/5 1 C620 2 0.1UF_10V

C555 1

2 150UF_6.3V_METAL 0.1UF_10V

2 0.1UF_10V POWER15/5

Jerry Huang

BANIAS 3 OF 3

Jerry Huang

INVENTEC
Sapphire
Banias(3/3)
240 P8607-40i-PVR-03 7 50 A3

+VCCP H_A#(31:3)
38-,5-

U12
H_A#(3) H_A#(4) H_A#(5) H_A#(6) H_A#(7) H_A#(8) H_A#(9) H_A#(10) H_A#(11) H_A#(12) H_A#(13) H_A#(14) H_A#(15) H_A#(16) H_REQ#(0) H_REQ#(1) H_REQ#(2) H_REQ#(3) H_REQ#(4)

38-,5-

H_D#(63:0)

NB_GTLREF

1

2

1

1 C140 R144 1 C145 100_1% 2 1UF_6.3V 2 270PF_50V
2

H_REQ#(4:0)

38-,5-

ADDR GROUP 0

DATA GROUP 0

R143 49.9_1%

H_ADSTB#0

38-,5-

M24 P22 M23 N26 N25 M22 P25 P24 P21 R26 P26 R25 N22 N21 M25 N23 R21 M26 L26 P23

A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# REQ0# REQ1# REQ2# REQ3# REQ4# ADSTB0#

D0# D1# D2# D3# D4# D5# D6# D7# D8# D9# D10# D11# D12# D13# D14# D15# DBI0# DSTBN0# DSTBP0#

J24 H23 H26 H25 J25 J26 G25 H24 F25 G26 G21 F23 F24 H22 F22 F26 H2138-,5G2238-,5G2338-,5-

H_D#(0) H_D#(1) H_D#(2) H_D#(3) H_D#(4) H_D#(5) H_D#(6) H_D#(7) H_D#(8) H_D#(9) H_D#(10) H_D#(11) H_D#(12) H_D#(13) H_D#(14) H_D#(15)

H_DINV#0 H_DSTBN#0 H_DSTBP#0

H_ADSTB#1

38-,5-

AGTL + I/F

H_A#(17) H_A#(18) H_A#(19) H_A#(20) H_A#(21) H_A#(22) H_A#(23) H_A#(24) H_A#(25) H_A#(26) H_A#(27) H_A#(28) H_A#(29) H_A#(30) H_A#(31)

T24 T26 R24 R22 R23 T25 U26 T21 U25 U22 U24 T22 V25 U21 V21 U23

A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# ADSTB1#

D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# DBI1# DSTBN1# DSTBP1#

F21 E25 B25 E23 D24 E26 D26 E24 D22 B26 B24 C23 A24 A25 D23 A26 C2638-,5C2538-,5C2438-,5-

H_D#(16) H_D#(17) H_D#(18) H_D#(19) H_D#(20) H_D#(21) H_D#(22) H_D#(23) H_D#(24) H_D#(25) H_D#(26) H_D#(27) H_D#(28) H_D#(29) H_D#(30) H_D#(31)

ADDR GROUP 1

DATA GROUP 1

H_DINV#1 H_DSTBN#1 H_DSTBP#1

H_RS#(2:0)

38-,5-

H_CPURST#

38-,6-,5-

H_RS#(2) H_RS#(1) H_RS#(0)
38-,538-,538-,5-

E14 K22 K21 M21

CPURST# RS2# RS1# RS0#

+V3S

1

H_TRDY# H_HIT# H_HITM# R202 2 OPEN
1744-,20-

J21 TRDY# K26 HIT# L22 HITM#

PENTIUM IV

DATA GROUP 2

R114 1

2 0_5% 38-,5H_LOCK#

CONTROL

H_ADS# H_BNR# H_BPRI# H_DEFER# H_DRDY# H_DBSY# P4_DPWR#

38-,538-,538-,538-,538-,538-,55-

K24 K25 L21 L23 L25 J23 J22 L24

ADS# BNR# BPRI# DEFER# DRDY# DBSY# DPWR# LOCK#

SUS_STAT#_5

17-

1

R171

2

1.5K_5%
1

+VCCP R170 1.5K_5%
2 1

R157
2

NB_RST# NB_PWG +V3S

1

0_5% R165 R78
1 1 1 2 2 2

AA8 SUSSTAT# AB6 SYSRST# 2 R552 D6 POWERGOOD V23 V22 COMPVDD COMPVSS

D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# DBI2# DSTBN2# DSTBP2#

E21 E20 F18 F20 D20 D21 A23 F19 E18 A22 C22 C21 B21 A21 D18 F17 B2238-,5E1938-,5D1938-,5-

H_D#(32) H_D#(33) H_D#(34) H_D#(35) H_D#(36) H_D#(37) H_D#(38) H_D#(39) H_D#(40) H_D#(41) H_D#(42) H_D#(43) H_D#(44) H_D#(45) H_D#(46) H_D#(47)

H_DINV#2 H_DSTBN#2 H_DSTBP#2

27_1%

49.9_1% 75_1% 10_1%

V24 NB_GTLREF A16 G16 G18 G19 H20 J20 M20 N20 W26 P20

P4_VREF VCPU VCPU VCPU VCPU VCPU VCPU VCPU VCPU VCPU VCPU

+VCCP

MISC.

R79

DATA GROUP 3

C15 COMPCLKVDD D15 COMPCLKVSS

D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63# DBI3# DSTBN3# DSTBP3#

C19 A20 B20 B19 E17 F15 A19 B18 B17 C18 A18 C17 E15 C16 F14 B16 F16 38-,5D1638-,5E1638-,5-

H_D#(48) H_D#(49) H_D#(50) H_D#(51) H_D#(52) H_D#(53) H_D#(54) H_D#(55) H_D#(56) H_D#(57) H_D#(58) H_D#(59) H_D#(60) H_D#(61) H_D#(62) H_D#(63)

H_DINV#3 H_DSTBN#3 H_DSTBP#3

ATI_CHS_216RS200MB_00_02_BGA_596P
C63 1 47UF_6.3V 1 C588 1 C589 1 C543 1 C540 1 C569 1 C553 1 C625 1 C561
Jerry Huang Jerry Huang

2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V

2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V

INVENTEC
Sapphire
ATI_RS200M (1/4)
240 P8607-40i-PVR-03 8 50 A3

9-

M_A_R(0:14)

15-,13-

M_A_R(13) M_A_R(10) M_A_R(1) M_A_R(3) M_A_R(5) M_A_R(7) M_A_R(9) M_A_R(12) M_A_R(14) M_A_R(0) M_A_R(2) M_A_R(4) M_A_R(6) M_A_R(8) M_A_R(11)

RS510
1 2 3 4

0
8 7 6 5

M_A(0:14) M_A(0:14)
9-

1 2 3 4

RS511

0
8 7 6 5

RS11
1 4 3 2

0
8 5 6 7

RS10
4 2 1 3

0
5 7 8 6

M_A(13) M_A(10) M_A(1) M_A(3) M_A(5) M_A(7) M_A(9) M_A(12) M_A(14) M_A(0) M_A(2) M_A(4) M_A(6) M_A(8) M_A(11)

U12
AB20 AA19 AB19 AC20 AE21 AD20 AE20 AD19 AC19 AA18 AA20 AC18 AB18 AC21 AD22 AD9 AA9 AB12 AD13 AB15 AE19 AE26 AB25 DDR_A0 DDR_A1 DDR_A2 DDR_A3 DDR_A4 DDR_A5 DDR_A6 DDR_A7 DDR_A8 DDR_A9 DDR_A10 DDR_A11 DDR_A12 DDR_A13 DDR_A14 DDR_DM0 DDR_DM1 DDR_DM2 DDR_DM3 DDR_DM4 DDR_DM5 DDR_DM6 DDR_DM7 DDR_DQ0 DDR_DQ1 DDR_DQ2 DDR_DQ3 DDR_DQ4 DDR_DQ5 DDR_DQ6 DDR_DQ7 DDR_DQ8 DDR_DQ9 DDR_DQ10 DDR_DQ11 DDR_DQ12 DDR_DQ13 DDR_DQ14 DDR_DQ15 DDR_DQ16 DDR_DQ17 DDR_DQ18 DDR_DQ19 DDR_DQ20 DDR_DQ21 DDR_DQ22 DDR_DQ23 DDR_DQ24 DDR_DQ25 DDR_DQ26 DDR_DQ27 DDR_DQ28 DDR_DQ29 DDR_DQ30 DDR_DQ31 DDR_DQ32 DDR_DQ33 DDR_DQ34 DDR_DQ35 DDR_DQ36 DDR_DQ37 DDR_DQ38 DDR_DQ39 DDR_DQ40 DDR_DQ41 DDR_DQ42 DDR_DQ43 DDR_DQ44 DDR_DQ45 DDR_DQ46 DDR_DQ47 DDR_DQ48 DDR_DQ49 DDR_DQ50 DDR_DQ51 DDR_DQ52 DDR_DQ53 DDR_DQ54 DDR_DQ55 DDR_DQ56 DDR_DQ57 DDR_DQ58 DDR_DQ59 DDR_DQ60 DDR_DQ61 DDR_DQ62 DDR_DQ63 VDRM VDRM VDRM VDRM VDRM VDRM VDRM DDR_VREF AD6 AE7 AD10 AF10 AE6 AF6 AE9 AE10 AB7 AB8 AB10 AC10 AC7 AB9 AA10 AC9 AB11 AC11 AA13 AC13 AA11 AA12 AB13 AD14 AF11 AE12 AD12 AF12 AF13 AF14 AD15 AE14 AA14 AC14 AA16 AA17 AB14 AA15 AB16 AC16 AF15 AF16 AF17 AD17 AE15 AE16 AE18 AD18 AE24 AE25 Y22 AD26 AD24 Y21 AC24 AC25 AB23 AB26 Y25 W25 AC26 AB24 AA25 W24 Y12 Y13 Y14 Y17 Y18 V20 W20 AC6 1 C197 2 0.1UF_16V M_DATA(0) M_DATA(1) M_DATA(2) M_DATA(3) M_DATA(4) M_DATA(5) M_DATA(6) M_DATA(7) M_DATA(8) M_DATA(9) M_DATA(10) M_DATA(11) M_DATA(12) M_DATA(13) M_DATA(14) M_DATA(15) M_DATA(16) M_DATA(17) M_DATA(18) M_DATA(19) M_DATA(20) M_DATA(21) M_DATA(22) M_DATA(23) M_DATA(24) M_DATA(25) M_DATA(26) M_DATA(27) M_DATA(28) M_DATA(29) M_DATA(30) M_DATA(31) M_DATA(32) M_DATA(33) M_DATA(34) M_DATA(35) M_DATA(36) M_DATA(37) M_DATA(38) M_DATA(39) M_DATA(40) M_DATA(41) M_DATA(42) M_DATA(43) M_DATA(44) M_DATA(45) M_DATA(46) M_DATA(47) M_DATA(48) M_DATA(49) M_DATA(50) M_DATA(51) M_DATA(52) M_DATA(53) M_DATA(54) M_DATA(55) M_DATA(56) M_DATA(57) M_DATA(58) M_DATA(59) M_DATA(60) M_DATA(61) M_DATA(62) M_DATA(63)

14-

M_DATA(0:63)

M_DM_R(0:7)

15-,13-

M_A(13) M_A(14) M_DM_R(0) M_DM_R(1) M_DM_R(2) M_DM_R(3) M_DM_R(4) M_DM_R(5) M_DM_R(6) M_DM_R(7)

R282 R283 R284 R285
15-,1315-,1315-,1315-,13-

1 1 1 1

2 2 2 2

R271 R272 R273 R274 22_5% 22_5% 22_5% 22_5%

1 1 1 1

2 2 2 2

22_5% 22_5% 22_5% 22_5%

M_DM(0) M_DM(1) M_DM(2) M_DM(3) M_DM(4) M_DM(5) M_DM(6) M_DM(7)
20_5% 20_5%

M_RAS_R# M_CAS_R# M_DQS_R(0:7)
15-,13-

R276 R277 R278 R275 R612 R611 R610 R609 R606 R605 R604 R603
1 1 1 1 1 1 1 1

1 1 1 1 2 2 2 2 2 2 2 2

M_RAS# M_CAS#

AF20 DDR_RAS# AD23 DDR_CAS#

M_DQS_R(0) M_DQS_R(1) M_DQS_R(2) M_DQS_R(3) M_DQS_R(4) M_DQS_R(5) M_DQS_R(6) M_DQS_R(7)

22_5% 22_5% 22_5% 22_5% 22_5% 22_5% 22_5% 22_5%

M_DQS(0) M_DQS(1) M_DQS(2) M_DQS(3) M_DQS(4) M_DQS(5) M_DQS(6) M_DQS(7)

AF7 AC8 AC12 AE13 AC15 AE17 AD25 Y24

DDR_DQS0 DDR_DQS1 DDR_DQS2 DDR_DQS3 DDR_DQS4 DDR_DQS5 DDR_DQS6 DDR_DQS7

M_CLK_DDR0# M_CLK_DDR0 M_CLK_DDR1# M_CLK_DDR1

13131313-

1 1 1 1

0_5% 2 R203 0_5% 2 R204 0_5% 2 R207 0_5% 2 R208

M_CLK_DDR_R0# M_CLK_DDR_R0 M_CLK_DDR_R1# M_CLK_DDR_R1 TP240 TP241

AD8 DDR_CK0# AE8 DDR_CK0 AF22 DDR_CK1# AE22 DDR_CK1 AA22 DDR_CK2# AB22 DDR_CK2 AB17 DDR_CK3# AC17 DDR_CK3 AF23 DDR_CK4# AE23 DDR_CK4 Y23 DDR_CK5# AA23 DDR_CK5 AC22 AA21 AF21 AF24 DDR_CS0# DDR_CS1# DDR_CS2# DDR_CS3#

M_CLK_DDR3# M_CLK_DDR3 M_CLK_DDR4# M_CLK_DDR4 +V3 M_CS0_R# M_CS1_R# M_CS2_R# M_CS3_R#

13131313-

1 1 1 1

0_5% 2 R206 0_5% 2 R205 0_5% 2 R583 0_5% 2 R582

M_CLK_DDR_R3# M_CLK_DDR_R3 M_CLK_DDR_R4# M_CLK_DDR_R4 TP238 TP239

1

R181 OPEN
2

15-,1315-,1315-,1315-,13-

R280 R279 R607 R281

1 1 1 1

2 2 2 2

0_5% 0_5% 0_5% 0_5%

M_CS0# M_CS1# M_CS2# M_CS3#

W23 TESTMODE AA24 AF25 AA26 AD7 AD21 AF9 AF18 Y7 Y8 Y9 VDRM VDRM VDRM VDRM VDRM VDRM VDRM VDRM VDRM VDRM

DDR I/F

M_WE_R# M_CKE_R#

20_5% M_WE# 2 0_5% M_CKE#

AB21 DDR_WE# AE11 DDR_CKE

+V2.5

1

R182 330_5%
2

+V2.5

1 C198 2 0.1UF_16V
45-,13-

SM_VREF

ATI_CHS_216RS200MB_00_02_BGA_596P

1 C651

1 C631 1 C635 1 C634 1 C636 1 C632 1 C633 47UF_6.3V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 1 C642 1 C644 1 C628 1 C630 1 C629 1 C641

1 C643

Jerry Huang Jerry Huang

2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V

INVENTEC
Sapphire
ATI_RS200M (2/4)
240 P8607-40i-PVR-03 9 50 A3

+V3S

+V3S

SR1 0 0

SR0 0 1 0 1

Spreading Range +/- 1.00% +/- 2.00% +/- 0.25% +/- 0.75%

Modulation rate (Fin/40)*62.49 KHz (Fin/40)*62.49 KHz (Fin/40)*62.49 KHz (Fin/40)*62.49 KHz

R426 4.7K_5%

R427 4.7K_5%

R428 4.7K_5%

1 C132 2 0.1UF_16V U503 1 CLKIN 2 VDD 3 VSS 4 MODOUT
1

1

1

1

1

2

2

2

*
R546 R545 R550

1

+V3 1 L19 2 BLM11A121S 1 C93 2 1UF_6.3V

LVDS_SSOUT LVDS_SSIN

10-

10-

NC SR0 SR1 SSON

8 7 6 5

1 1 1

2 2 2

OPEN OPEN OPEN

PCI_AD(0:31)

12-,31-,22-,42-,40-,17-

U12
AA7 AF5 AD5 AF4 AF3 AE4 AE3 AC4 AE2 AE1 AD2 AC3 AD1 AE5 AC5 AC2 AA1 AA2 Y2 AA6 Y5 Y4 Y6 W5 W4 W3 W2 W6 V6 V5 W1 V4 AD3 AC1 AA3 Y1 PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31 PCI_CBE0# PCI_CBE1# PCI_CBE2# PCI_CBE3# PCI_PAR PCI_FRAME# PCI_IRDY# PCI_TRDY# INTA# PCI_DEVSEL# PCI_STOP# PCI_SERR# PCI_ACTIVE_REQ# VID0 VID1 VID2 VID3 VID4 VID5 VID6 VID7 XVID0 XVID1 XVID2 XVID3 XVID4 XVID5 XVID6 XVID7 VVSYNC VHREF VPCLK0 TMDS_D0 TMDS_D1 TMDS_D2 TMDS_D3 TMDS_D4 TMDS_D5 TMDS_D6 TMDS_D7 TMDS_D8 TMDS_D9 TMDS_D10 TMDS_D11 TMDS_DE TMDS_VSYNC TMDS_HSYNC TMDS_SCL TMDS_SDA TMDS_IDCK+ TMDS_IDCKJ4 G6 F5 M4 H6 F4 G5 K6 L6 J5 G3 K4 K5 J6 L4 G4 AVDD +V1.8S 1 L14 2 BLM11A121S C66 1 1 C65

PCI/AGP I/F

PCI_CBE#(0:3)
31-,12-,42-,22-,17-,40-

PCI_AD(0) PCI_AD(1) PCI_AD(2) PCI_AD(3) PCI_AD(4) PCI_AD(5) PCI_AD(6) PCI_AD(7) PCI_AD(8) PCI_AD(9) PCI_AD(10) PCI_AD(11) PCI_AD(12) PCI_AD(13) PCI_AD(14) PCI_AD(15) PCI_AD(16) PCI_AD(17) PCI_AD(18) PCI_AD(19) PCI_AD(20) PCI_AD(21) PCI_AD(22) PCI_AD(23) PCI_AD(24) PCI_AD(25) PCI_AD(26) PCI_AD(27) PCI_AD(28) PCI_AD(29) PCI_AD(30) PCI_AD(31) PCI_CBE#(0) PCI_CBE#(1) PCI_CBE#(2) PCI_CBE#(3)

R549 33_5%
2

PULSECORE_P1708C_SOIC_8P SSON/SBM 0 1

Spread Spectrum OFF ON

U12
1 C64 2 0.1UF_16V G14 +3.3V A10 AVDD C8 A2VDDQ C11 AVSSQ A11 AVSSN A9 A2VDD W22 THERMALDIODE_N W21 THERMALDIODE_P A8 A2VSSN B8 A2VSSQ A12 PLLVDD0 A14 PLLVDD1 A13 PLLVSS0 A15 PLLVSS1 TXOUT_U0N TXOUT_U0P TXOUT_U1N TXOUT_U1P TXOUT_U2N TXOUT_U2P TXCLK_UN TXCLK_UP TXOUT_L0N TXOUT_L0P TXOUT_L1N TXOUT_L1P TXOUT_L2N TXOUT_L2P TXCLK_LN TXCLK_LP LVDS_BLON# LVDS_DIGON LPVDD LPVSS LVDDR LVDDR LVSSR LVSSR LVDS_SSIN LVDS_SSOUT B5 C5 C6 B6 A6 A7 C7 B7 A2 A3 C3 B3 C4 B4 A4 A5 D2 D3 F8 D7 D8 E8 E7 F7 C1 E6
383838383838383838-,1938-,1938-,1938-,1938-,1938-,1938-,1938-,193319-

10UF_6.3V2 0.1UF_16V

SVID

PCI_PAR_3 PCI_FRAME#_3 PCI_IRDY#_3 PCI_TRDY#_3 PIRQA#_3 PCI_DEVSEL#_3 PCI_STOP#_3 PCI_SERR#_3 PCI_PREQACT#

42-,40-,31-,22-,17AB3 42-,40-,39-,31-,22-,17AA4 42-,40-,39-,31-,22-,17AA5 42-,40-,39-,31-,22-,17AB1 39-,17T4 42-,40-,39-,31-,22-,17AB4 42-,40-,39-,31-,22-,17AB5 42-,40-,39-,31-,22-,20-,17- AB2 17-,12R6 39-,1739-,1739-,3140-,3939-,2242-,3939-,3140-,3939-,2242-,39-

+V2.5S 1 L16 2 TP1 L5 TP2 M5 BLM11A121S C546 1 TP19 C83 1 TP3 H5 TP20 4PLVDD 2 0.1UF_16V CLK_NB14_EXTR 10UF_6.3V J3 K3 +V1.8S 1 K2 (NI 301) R77 1 L505 2 L2 OPEN C541 M3 BLM11A121S 1 C544 1 C545 1 L1 2 L3 2 0.1UF_16V 10UF_6.3V2 0.1UF_16V 1 L506 2 N2 N1 BLM11A121S N3 P1 (NI 383) 1 PLL_GND 2 0_5% R_R 30-,19P2 R73 1 R R76 2 0_5% G_R 30-,19J2 R72 1 G OPEN 2 0_5% B_R 30-,19R71 1 B TP4 19H2 2 VSYNC 19TP5 H1 HSYNC C51 22PF_50V 1 R75 2 0_5% 1 1 1 R544 2 TP242 R2 1 2 R63 X1 TP243 R1 1M_5% 499_1% C43 22PF_50V 14.318MHZ 1 R74 2 75_5% TP6 M1 +V3S 2 2 TP7 M2 1 2
191919-

TXOUTU0TXOUTU0+ TXOUTU1TXOUTU1+ TXOUTU2TXOUTU2+ TXCLKOUTUTXCLKOUTU+ TXOUTL0TXOUTL0+ TXOUTL1TXOUTL1+ TXOUTL2TXOUTL2+ TXCLKOUTLTXCLKOUTL+ BLON# DIGON +V1.8S

LVDS

1 L20 2 BLM11A121S C94 1 2 1UF_6.3V 1 C547 2 0.1UF_16V C133 1 10UF_6.3V

CRT

E10 D10 C10 E11 F11

RED GREEN BLUE DACVSYNC DACHSYNC

+V1.8S
1010-

B10 RESET

LVDS_SSIN LVDS_SSOUT CHROMA_C LUMA_Y TV_COMP_B
2

SBREQ#_3 SBGNT#_3 MPCIREQ0#_3 NICREQ1#_3 CBREQ2#_3 USBREQ3#_3 MPCIGNT0#_3 NICGNT1#_3 CBGNT2#_3 USBGNT3#_3

T2 PCI_SBREQ# R4 PCI_SBGNT# V3 U5 U6 T5 V2 V1 U2 T6

LCD_CNTL0_GPIO8 D1 LCD_CNTL1_GPIO9 E3 G1 LCD_CNTL2_GPIO10 TMDS_VREF R3 TMDS_VOLT_DET B1 TMDS_HPD E1 RESERVED H4 RESERVED F1 RESERVED G2 RESERVED F3 RESERVED E2 RESERVED E5 RESERVED C2 RESERVED F6 GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 P3 N5 P6 P4 R5 M6 N6 P5

B12 XTLIN B11 XTLOUT D13 HCLKIN E13 HCLKIN# B13 SYS_FBCLKOUT# B14 SYS_FBCLKOUT

LCM_ID0 LCM_ID1 LCM_ID2

1

R121 1K_5%
2

CLK_NB_BCLK CLK_NB_BCLK#

44-

C_R C9 D9 Y_G COMP_B E9 R2SET B9 DACSCL F10 DACSDA F9
1

1 L17 2 BLM11A121S 1 C84 1 C548 2 1UF_6.3V 0.1UF_16V 2 +V3S
1

30-,1930-,1930-

C139 1 10UF_6.3V

R548

+V3S R82
2

715_1%
19191

PCI_BREQ0# PCI_BREQ1# PCI_BREQ2# PCI_BREQ3#_PCI_CLK3 PCI_GNT0# PCI_GNT1# PCI_GNT2# PCI_GNT3#_PCI_CLK4

10K R547

+V3S
2

1

R130 1K_5%
2

1

U3 PCI_CLKF CLK_NBPCI_EXTR CLK_AGP CLK_NB66 X2 VDD OUT 1 OE 3 GND 2
41

DDCCLK DDCDATA
2 2 2

R556

2

0_5%
TP22

1 1

8.2K_5% R84 2

E12 PCICLK_NB D12 AGPCLK_OUT C13 AGPCLKIN_AGP_FBCLKIN C12 EXT_MEM_CLK_AGP_FBCLKOUT PCICLK_STOP# CPUSTOP# AGP_BUSY# STP_AGP# CLK_RUN#

R156 R430 R551

10K_5% OPEN 0_5%

10K_5% 1 R164 2 10K_5% PCISTOP#_3 CPUSTOP#_NB AGP_BUSY# AGP_STP# CLKRUN#_3

+V5S

R83 2 8.2K_5%

+V3S POWER15/5
1 R64 1 C67 2

38-,438-,41 R60

2 1 C62 2

+V3S 1 C152 2 0.1UF_16V

T1 VDD_5V

0_5%

33_5%

U1 USBCLK B15 REF27_PCICLK5 F12 OSC

U4 F13 D5 D4 F2

1 1

17-,44-,10171742-,40-,39-,31-,22-,20-,17-

1919TP13 TP14 TP15 TP17 TP18

AF2 Y3 T3 U7 V7 W7

LCM_DDCDATA LCM_DDCCLK +V3S
2

CLK. GEN.

SYSCLK C14 SYSCLK# D14

2 0.1UF_16V

27MHZ

15PF

VPCI VPCI VPCI VPCI VPCI VPCI

ATI_CHS_216RS200MB_00_02_BGA_596P

1

R562

8.2K_5%

ATI_CHS_216RS200MB_00_02_BGA_596P
CPUSTOP#_3
44-,17-,5-

+V3S
17-

PCI_RST#_3

8 2 4

1 CPUSTOP#_NB U10 TC7WH126FU 6
4-,10-

Jerry Huang Jerry Huang

INVENTEC
Sapphire
ATI_RS200M (3/4)
240 P8607-40i-PVR-03 10 50 A3

+V1.8S

U12
K10 K11 K12 K15 K16 K17 L10 L11 L12 L15 L16 L17 M10 M11 M12 M15 M16 M17 R10 R11 R12 R15 R16 R17 T10 T11 T12 T15 T16 T17 U10 U11 U12 U15 U16 U17 VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND A1 A17 E4 AC23 N4 J1 Y26 AD4 AF8 AF19 N24 V26 D17 K23 AF1 C20 G24 AF26 E22 B2 B23 D25 G8 G9 G12 G13 G15 G20 J7 G7 K13 K14 K20 L13 L14 L20 D11 M7 M13 M14 G17 N7 N10 N11 N12 N13 N14 N15 N16 N17 P10 P11 P12 P13 P14 P15 P16 P17 R7 R13 R14 R20 T7 T13 T14

+V1.8S

1 C650

1 C611

1 C605

1 C592

1 C614

1 C602

1 C604

1 C573

1 C591

1 C590

47UF_6.3V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V C653 1 C610 1 C571 1 C574 1 C613 1 C572 1 C570 1 C612 1 C615 1 C603 1 47UF_6.3V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V

CORE PWR

Decoupling caps for VDD_CORE.

+V3S

PWR/GND

1 C652

+V3

1 C637 1 C616 1 C626 1 C627 1 C645 47UF_6.3V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V

1 C554 2 0.1UF_16V +V3S

G10 VDD_3.3V G11 VDD_3.3V

Decoupling caps for VPCI.

K1 H3 P7 L7 K7 H7 T23 U13 U14 U20 Y20 AD11 Y19 Y16 Y15 Y11 Y10 AD16 T20

VDD_AGP VDD_AGP VDD_AGP VDD_AGP VDD_AGP VDD_AGP GND GND GND GND GND GND GND GND GND GND GND GND GND

1 C562 2 220P_25V

AGP

+V3S

1 C575

1 C576

1 C563

1 C577

1 C606

2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V2 0.1UF_16V

ATI_CHS_216RS200MB_00_02_BGA_596P

Decoupling caps for VDD_AGP.

Engineer
Jerry Huang

Drawn by
Jerry Huang

INVENTEC
TITLE Size

R&D CHK DOC CTRL CHK MFG ENGR CHK Changed by
EE1

Sapphire
Model Number

A3

ATI_RS200M (4/4)
VER

Date Changed
Wednesday, March 5, 2003

Time Changed
6:15:26 pm

QA CHK

240

P8607-40i-PVR-03

Sheet

11

of

50

+V3S R292

PCI_AD(31)

42-,40-,31-,22-,17-,10-

1

2

1

OPEN R293 2

4.7K_5%

AD(31:30): SET FSB CLOCK DEFAULT:00 (0:0): 100MHZ (0:1): 133MHZ (1:0): 166MHZ (1:1): 66MHZ +V3S

PCI_AD(30)

42-,40-,31-,22-,17-,10-

1

R635

2

1

OPEN R634 2

4.7K_5%

+V3S R291

PCI_AD(29)

42-,40-,31-,22-,17-,10-

1

2

1

OPEN R290 2

AD29: RS200M FULL CONFIGURATION DEFAULT: 1 0: FULL CONFIGUTAION 1: USES DEFAULT VALUES

4.7K_5%

+V3S R288

PCI_AD(28)

42-,40-,31-,22-,17-,10-

1

2

1

OPEN R289 2

AD28: SPREAD SPECTRUM ENABLE DEFAULT: 0 0: DISABLE 1: ENABLE

4.7K_5%

+V3S R637 AD27: MCERR OBSERVATION DEFAULT: 1 0: ENABLE 1: DISABLE +V3S R296 OPEN R297

PCI_AD(27)

42-,40-,31-,22-,17-,10-

1

2

4.7K_5%
1

PCI_AD(14)

42-,40-,31-,22-,17-,10-

1

2

R621 OPEN

2 1

AD14: AGTL+VDDQ DEFALT: 0 0: 1.2V MOBILE PART 1: 1.7V DESKTOP PART

2

+V3S R287

4.7K_5%

PCI_AD(26)

42-,40-,31-,22-,17-,10-

1

2

1

OPEN R286 2

AD26: QUICK START SELECT DEFAULT: 1 0: ENABLE 1: DISABLE PCI_AD(3)
42-,40-,31-,22-,17-,101

+V3S R674 OPEN R666 AD3: PCI66 MODE DEFAULT: 0 0: PCI-33 1: A-LINK +V3S R701

4.7K_5%

2

1

2

+V3S R269 OPEN +V3S R638 AD24: IOQ ENABLE DEFAULT: 1 0: DISABLE 1: ENABLE +V3S R639 AD22: 27MHz/33 MHz CLOCK SELECTION DEFAULT: 1 0: 33 MHz CLOCK OUTPUT 1: 27 MHz CLOCK INPUT PCI_AD(1)
42-,40-,31-,22-,17-,10-

4.7K_5% AD25: INIT OBSERVATION DEFAULT: 1 0: ENABLE 1: DISABLE PCI_AD(2)
42-,40-,31-,22-,17-,101

PCI_AD(25)

42-,40-,31-,22-,17-,101

1 2

2

PCI_PREQACT# +V3S R268 OPEN R267

17-,10-

1

2

R270

1

OPEN R700 2

PCI_PREQACT#: INTERNAL CLOCK GEN. DEFAULT: 1 0: DISABLE 1: ENABLE

4.7K_5%

4.7K_5%
2

PCI_AD(24)

42-,40-,31-,22-,17-,10-

1

2

AD2: CAL DEFAULTS FOR CPU DEFAULT: 1 (FOR BRING UP)
2

4.7K_5%

1

4.7K_5%

0: ENABLE 1: DISABLE PCI_CBE#(3)
42-,40-,31-,22-,17-,101

+V3S R199 CBE#3: PROD TEST DEFAULT: 1
2

4.7K_5%
1

0: SHORT TIMERS 1: NORMAL OPERATION

PCI_AD(22)

42-,40-,31-,22-,17-,101

1 2

2

R692

2

R622 OPEN

4.7K_5%

4.7K_5%

AD1: FrcShortReset DEFAULT: 0 PCI_CBE#(0) 0: DISABLE 1: ENABLE

42-,40-,31-,22-,17-,10-

1

R667

2

4.7K_5%

RESERVED 0: NORMAL OPERATION

PCI_AD(21)

42-,40-,31-,22-,17-,10-

1

R640

2

+V3S AD21: RESERVED
Engineer

4.7K_5% PCI_AD(0) R641
42-,40-,31-,22-,17-,101

R675 OPEN R685

2

AD0: PCI/AGP CONFIG. DEFAULT: 1 0: 33MHz 1: 66MHz

Jerry Huang

Drawn by
Jerry Huang

INVENTEC
TITLE Size

1 2

2

R&D CHK DOC CTRL CHK MFG ENGR CHK Changed by
EE1

PCI_AD(20)

42-,40-,31-,22-,17-,10-

1

4.7K_5%

AD20: PCICLK EXPANSION DEFAULT: 0 0: PCI_REQ#3, PCI_GNT#3 USED AS REQ/GNT 1: PCI_REQ#3, PCI_GNT#3 USED AS PCICLK

4.7K_5%

Sapphire
H/W Strap
VER Model Number

A3

Date Changed
Wednesday, March 5, 2003

Time Changed
6:15:27 pm

QA CHK

240

P8607-40i-PVR-03

Sheet

12

of

50

+V2.5

CN17
9 21 33 45 57 69 81 93 113 131 143 155 157 167 179 191 10 22 34 36 46 58 70 82 92 94 114 132 144 156 168 180 192 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19 VDD20 VDD21 VDD22 VDD23 VDD24 VDD25 VDD26 VDD27 VDD28 VDD29 VDD30 VDD31 VDD32 VDD33

201 202

GG

M_DATA_R_(63:0) M_A_R(14:0)
15-,9-,13-

15-,14-

M_A_R(14:0)

15-,9-,13-

CN17
112 111 110 109 108 107 106 105 102 101 115 100 99 97
M_A_R(13) M_A_R(14)

CN505
112 111 110 109 108 107 106 105 102 101 115 100 99 97 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10_AP A11 A12 A13_DU BA0 BA1 BA2_DU CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 CK0 CK0# CK1# CK1 CK2 CK2# CKE0 CKE1 CAS# RAS# WE# S0# S1# SA0 SA1 SA2 SCL SDA RESET_DU DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 5 7 13 17 6 8 14 18 19 23 29 31 20 24 30 32 41 43 49 53 42 44 50 54 55 59 65 67 56 60 66 68 127 129 135 139 128 130 136 140 141 145 151 153 142 146 152 154 163 165 171 175 164 166 172 176 177 181 187 189 178 182 188 190

R729

1

0_5%

2

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10_AP A11 A12 A13_DU BA0 BA1 BA2_DU CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 CK0 CK0# CK1# CK1 CK2 CK2# CKE0 CKE1 CAS# RAS# WE# S0# S1# SA0 SA1 SA2 SCL SDA RESET_DU DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8

117 116 98 71 1 73 R342 79 0_5% 83 72 2 74 80 84 935 M_CLK_DDR0 937 M_CLK_DDR0# 9158 M_CLK_DDR1# 9160 M_CLK_DDR1 89 91 15-,9-,13- 96 M_CKE_R# 95 15-,9-,13-120 M_CAS_R# 15-,9-,13-118 M_RAS_R# 15-,9-,13-119 M_WE_R# 15-,9121 M_CS2_R# 15-,9122 M_CS3_R# 194 196 198 39-,34-,18-,4-,13195 SMBCLK_3 39-,34-,18-,4-,13193 SMBDATA_3 86 M_DM_R(0:7)
15-,9-,13-

M_DM_R(0) M_DM_R(1) M_DM_R(2) M_DM_R(3) M_DM_R(4) M_DM_R(5) M_DM_R(6) M_DM_R(7)
15-,9-,13-

12 26 48 62 134 148 170 184 78 11 25 47 61 133 147 169 183 77

M_DQS_R(7:0)

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

5 7 13 17 6 8 14 18 19 23 29 31 20 24 30 32 41 43 49 53 42 44 50 54 55 59 65 67 56 60 66 68 127 129 135 139 128 130 136 140 141 145 151 153 142 146 152 154 163 165 171 175 164 166 172 176 177 181 187 189 178 182 188 190

R608

1

0_5%

M_A_R(0) M_A_R(1) M_A_R(2) M_A_R(3) M_A_R(4) M_A_R(5) M_A_R(6) M_A_R(7) M_A_R(8) M_A_R(9) M_A_R(10) M_A_R(11) M_A_R(12)
2

117 116 98 71 73 R343 79 0_5% 83 72 2 74 80 84 935 M_CLK_DDR3 937 M_CLK_DDR3# 9158 M_CLK_DDR4# 9160 M_CLK_DDR4 89 91 15-,9-,13- 96 M_CKE_R# 95 15-,9-,13-120 M_CAS_R# 15-,9-,13-118 M_RAS_R# 15-,9-,13-119 +V3S M_WE_R# 15-,9121 M_CS0_R# 15-,9122 M_CS1_R# 194 196 198 39-,34-,18-,4-,13195 SMBCLK_3 39-,34-,18-,4-,13193 SMBDATA_3 86 15-,9-,13M_DM_R(0:7) 12 M_DM_R(0) 26 M_DM_R(1) 48 M_DM_R(2) 62 M_DM_R(3) 134 M_DM_R(4) 148 M_DM_R(5) 170 M_DM_R(6) 184 M_DM_R(7) 78 15-,9-,13M_DQS_R(7:0) 11 25 47 61 133 147 169 183 77
M_A_R(13) M_A_R(14)
1

+V3S

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33

3 15 27 39 51 63 75 87 103 125 137 149 159 161 173 185 4 16 28 38 40 52 64 76 88 90 104 126 138 150 162 174 186

1 C383 2 0.1UF_16V

1 2

C721 0.1UF_16V

199 VDDID 197 VDDSPD 1 VREF1 2 VREF2

85 DU1 DU2 123 DU3 124 200 DU4

AMP_1565618_1_DDR_SODIMM_200P
+V2.5

CN505
9 21 33 45 57 69 81 93 113 131 143 155 157 167 179 191 10 22 34 36 46 58 70 82 92 94 114 132 144 156 168 180 192 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19 VDD20 VDD21 VDD22 VDD23 VDD24 VDD25 VDD26 VDD27 VDD28 VDD29 VDD30 VDD31 VDD32 VDD33

201 202 GG

AMP_1565618_1_DDR_SODIMM_200P

AMP_1565619_1_200P

+V3S

SO DIMM 0
SCK/SCK#(0)=SCK/SCK#(1)=SCK/SCK#(2) SCK/SCK#(3)=SCK/SCK#(4)=SCK/SCK#(5) DQ=CB=DQS SCK(2:0) be longer than DQS 1"~2" SCK(5:3) be longer than DQS 1"~2" SDQ(63:0) from MCH to DIMM0 2"~3.5" SCS#,SCKE from MCH to DIMM0 2"~4.5" SMA(12:0),SBS(1:0),SRAS#,SCAS#,SWE# 2"~3.5" SCK 3"~6.5"

SO DIMM 1
SCK(2:0) be longer than SCS(1:0),CKE(1:0) SMA(12:0),SBS(1:0) RAS#,CAS#,WE# SCS(3:2),CKE(3:2) SMA(12:0),SBS(1:0) RAS#,CAS#,WE# 1"~3"

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 DU1 DU2 DU3 DU4

3 15 27 39 51 63 75 87 103 125 137 149 159 161 173 185 4 16 28 38 40 52 64 76 88 90 104 126 138 150 162 174 186 85 123 124 200

SM_VREF

45-,9-

1

R706 0_5%

2

199 VDDID 197 VDDSPD 1 VREF1 2 VREF2 1 C720 2 0.1UF_16V 1 C382 2 0.1UF_16V

AMP_1565619_1_200P

SCK(5:3) be longer than

1"~3"
Jerry Huang Jerry Huang

INVENTEC
Sapphire
DDR(1/4)
240 P8607-40i-PVR-03 13 50 A3

15-,13-

M_DATA_R_(63:0)

RS509 22
1 2 3 4 8 7 6 5 1 2 3 4

RS505 22
8 7 6 5

4 3 2 1

RS6

22
5 6 7 8 4 3 2 1

RS12

22
5 6 7 8

1 2 3 4

RS508 22
8 7 6 5

1 2 3 4

RS504 22
8 7 6 5

RS7
4 3 2 1

22
5 6 7 8 4 3 2 1

RS13

22
5 6 7 8

RS507 22
1 2 3 4 8 7 6 5 1 2 3 4

RS503 22
8 7 6 5

RS8
4 3 2 1

22
5 6 7 8 4 3 2 1

RS14

22
5 6 7 8

RS506 22
1 2 3 4 8 7 6 5 1 2 3 4

RS502 22
8 7 6 5

RS9
4 3 2 1

22
5 6 7 8 4 3 2 1

RS15

22
5 6 7 8

M_DATA(63:0)

9-

close to DIMM0<750 mil

Jerry Huang Jerry Huang

INVENTEC
Sapphire
DDR(2/4)
240 P8607-40i-PVR-03 14 50 A3

M_A_R(13) M_A_R(10) M_CS2_R# M_WE_R#

13-,9-,1513-,9-,1513-,913-,9-

+V1.25S M_DM_R(7:0) M_DATA_R_(63:0)
14-,13-,1513-,9-,15-

M_A_R(14:0)

9-,13-,15-

M_DQS_R(8:0)

13-,9-,15-

1 C658

1 C243

2 47PF_50V 47PF_50V 2

BETWEEN NB & 1ST DIMM
R341 R340 R710 R713 56_5% 56_5% R719 56_5% R720 56_5% R711 56_5% R712
1 1 1 1 2 1 4 3 4 3 2 1 1 2 3 4 4 3 2 1 1 2 3 4 4 3 2 1 4 3 2 1 4 3 2 1 4 3 2 1 4 3 2 1 1 3 4 2

R718

RS519 56
5 6 7 8 8 7 6 5

RS17 56
5 6 7 8

RS520 56
8 7 6 5

RS16 56
5 6 7 8

RS514 56
5 6 7 8

RS515 56
5 6 7 8

RS517 56
5 6 7 8

RS516 56
5 6 7 8

RS18 33
8 6 5 7

RS518 33

1

1 1 1 1

2 2 2 2

RS19 33
7 8 5 6

2

2 2 2 2

R348 33_5%

R349 33_5% 33_5% R350

R724 56_5%

R726 56_5%

56_5% 56_5% 56_5% 56_5%

R725 56_5%

1 2 3 4

4 3 2 1

1 2 3 4

4 3 2 1

1 2 3 4

4 3 2 1

1 2 3 4

4 3 2 1

1

1

1

1 2 3 4

1

1

R728 33_5%
1

1

R727 33_5%
1

R354 R353 R352 R351

4 3 1 2

RS521 56
8 7 6 5 5 6 7 8

RS25 56
8 7 6 5

RS522 56
5 6 7 8

RS24 56
8 7 6 5

RS523 56
5 6 7 8

RS23 56
8 7 6 5

RS524 56
5 6 7 8

RS22 56

RS526 33
8 7 6 5

1 1 1 1

RS525 33
5 6 8 7

2

2

2

2

2

2

2

2

2 2 2 2

56_5% 56_5% 56_5% 56_5%

1 C657 2 47PF_50V 1 C660 2 47PF_50V 1 C656 1 C655 1 C659

M_DATA_R_(63:0)

14-,13-,1513-,99-,13-,159-,13-,15-

2 47PF_50V 2 47PF_50V 2 47PF_50V

M_CKE_R# M_A_R(14:0) M_DQS_R(7:0)

BETWEEN NB & 1ST DIMM
1 C668 2 47PF_50V M_RAS_R#
13-,913-,9-

close to DIMM1< 800mil

M_DM_R(7:0)

13-,9-,15-

BETWEEN NB & 1ST DIMM

BETWEEN NB & 1ST DIMM

M_CS1_R#

M_CS0_R# M_CS3_R# M_A_R(14:0)
9-,13-,15-

13-,913-,913-,9-

M_CAS_R#

1 C664 1 C661 1 C662 1 C663 1 C665 1 C666 1 C241 1 C235 2 47PF_50V 47PF_50V 2 2 47PF_50V 2 47PF_50V 2 47PF_50V 2 47PF_50V 2 47PF_50V 2 47PF_50V 1 C239 1 C237 1 C667 1 C242 1 C240 1 C238 1 C236 2 47PF_50V 2 47PF_50V 2 47PF_50V 2 47PF_50V 2 47PF_50V 2 47PF_50V 2 47PF_50V

Jerry Huang

BETWEEN NB & 1ST DIMM

Jerry Huang

INVENTEC
Sapphire
DDR(3/4)
240 P8607-40i-PVR-03 15 50 A3

+V2.5 +V1.25S +V2.5

C276 1 C277 1 C296 1 C300 1 C278 1 C303 1 C283 1 C282 1 C285 1 C290 1 C289 1 C304 1 C737

0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V

1 C713

1 C705

1 C284

1 C704

1 C272

1 C715

1 C707

1 C717

1 C719

1 C703

1 C723

1 C685

1 C684

1 C680

1 C686

1 C682

1 C683

1 C687

2 2 0.1UF_16V0.1UF_16V0.1UF_16V0.1UF_16V0.1UF_16V0.1UF_16V0.1UF_16V0.1UF_16V0.1UF_16V0.1UF_16V0.1UF_16V 2 2 2 2 2 2 2 2 2

2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V

1

1

1

1

1 C273

1 C714

1 C706

1 C716

1 C708

1 C718

2 0.1UF_16V0.1UF_16V0.1UF_16V0.1UF_16V0.1UF_16V0.1UF_16V 2 2 2 2 2 C214 C228 C248 C245 150UF_10V 150UF_10V 150UF_10V 150UF_10V

1 2 C765 0.1UF_16V 1 2 C287 0.1UF_16V 1 2 C735 0.1UF_16V 1 2 C751 0.1UF_16V 1 C294 1 C739 1 C763 1 C764 1 C753 1 C754 1 C745 1 C729 1 C295 1 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V 2

+V1.25S

1 C761

1 C298

1 C302

1 C760

1 C736

1 C301

1 C756

1 C744

1 C748

Close to DDR as passible

2 2 2 2 2 2 2 2 2 0.1UF_16V0.1UF_16V0.1UF_16V0.1UF_16V0.1UF_16V0.1UF_16V0.1UF_16V0.1UF_16V0.1UF_16V

1 C749

1 C291

1 C734

1 C755

1 C286

1 C762

1 C730

1 C281

1 C280

1 C757

1 C732

2 2 2 2 2 2 0.1UF_16V0.1UF_16V0.1UF_16V0.1UF_16V0.1UF_16V0.1UF_16V0.1UF_16V0.1UF_16V0.1UF_16V0.1UF_16V0.1UF_16V 2 2 2 2 2

1 C738

1 C293

1 C758

1 C747

1 C750

1 C740 2 0.1UF_16V

1 C288

1 C759

2 2 2 0.1UF_16V0.1UF_16V0.1UF_16V

2 0.1UF_16V0.1UF_16V 2

2 2 0.1UF_16V0.1UF_16V

1 C731 2 0.1UF_16V

1 C746 2 0.1UF_16V

1 C733 2 0.1UF_16V

1 C741 2 0.1UF_16V

1 C279

1 C743

2 0.1UF_16V0.1UF_16V 2

1 C742 2 0.1UF_16V

1 C292 2 0.1UF_16V

1 C299 2 0.1UF_16V

1 C297 2 0.1UF_16V

Jerry Huang Jerry Huang

INVENTEC
Sapphire
DDR(4/4)
240 P8607-40i-PVR-03 16 50 A3

+V5A +V3S +V5S +V3A

1 C271 2 0.1UF_16V 1 C269 1 C257 1 C253 1 C268

1 C262 2 0.1UF_16V

1 C254

1 C252 0.1UF_16V

2 0.1UF_16V 2

+V3S

1 C258 1 C263 2 0.1UF_16V 2 0.1UF_16V

2 2 2 2 0.1UF_16V 0.1UF_16V 0.1UF_16V 0.1UF_16V

+V3S

1 C267 2 0.1UF_16V

PCI_AD(31:0)

12-,31-,22-,42-,40-,10-

1 C698 2 0.1UF_16V

PCI_AD(0) PCI_AD(1) PCI_AD(2) PCI_AD(3) PCI_AD(4) PCI_AD(5) PCI_AD(6) PCI_AD(7) PCI_AD(8) PCI_AD(9) PCI_AD(10) PCI_AD(11) PCI_AD(12) PCI_AD(13) PCI_AD(14) PCI_AD(15) PCI_AD(16) PCI_AD(17) PCI_AD(18) PCI_AD(19) PCI_AD(20) PCI_AD(21) PCI_AD(22) PCI_AD(23) PCI_AD(24) PCI_AD(25) PCI_AD(26) PCI_AD(27) PCI_AD(28) PCI_AD(29) PCI_AD(30) PCI_AD(31)

E10 G6 N6 N15 R15 R7 R13 T10 R6 R8 R14 P15 F6 F7 F14 P6 G15 K16 F15

VCC_5A VCC_5A VCC_5A VCC_5A VCC_5A VCCR_5D VCCR_5D UPSPWR VCCR_3E VCCR_3E VCCR_3E VCC_3B VCC_3C VCC_3C VCC_3C VCC_3C VCC_F VCC_F VCC_G

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

M12 M11 M10 M9 L12 L11 L10 L9 K12 K11 K10 K9 J12 J11 J10 J9 H8 H9 H10 H11 H12 H13

A9 B9 C9 A8 B8 C8 D8 A7 C7 D7 E7 A6 B6 C6 D6 E6 C3 A2 B2 C2 A1 B1 C1 D3 D1 E3 E2 E1 F3 F2 F1 G2

47_5% RS20

PCI_DEVSEL#_3 PCI_FRAME#_3 PCI_IRDY#_3 PCI_PAR_3 PCI_RST#_3 SBREQ#_3 SBGNT#_3 PCI_SERR#_3 PCI_STOP#_3 PCI_TRDY#_3 PCI_CBE#(3:0)

42-,40-,39-,31-,22-,1042-,40-,39-,31-,22-,1042-,40-,39-,31-,22-,1042-,40-,31-,22-,1010-,1739-,1039-,1042-,40-,39-,31-,22-,20-,1042-,40-,39-,31-,22-,1042-,40-,39-,31-,22-,1031-,12-,40-,10-,42-,22PCI_CBE#(0)

PCI_CBE#(1) PCI_CBE#(2) PCI_CBE#(3)

PIRQA#_3 PIRQB#_3 PIRQC#_3 PIRQD#_3 PIRQE#_3 PIRQF#_3

39-,1042-,3939-,223940-,3939-,31-

B4 A3 D4 B5 C5 C11 A10 D5 A4 C4 B7 A5 B3 D2 F4 F5 G3 G4 G5 H4

DEVSELJ FRAMEJ IRDYJ PAR PCIRSTJ PHOLDJ PHLDAJ SERRJ STOPJ TRDYJ CBEJ0 CBEJ1 CBEJ2 CBEJ3 INTAJ_M1 INTBJ_S0 INTCJ_S1_GPI27 INTDJ_S2_GPI28 INTEJ_GPI29 INTFJ_GPI30_MOTOR_ONJ

PCI

POWER U506 ALI_M1535_BGA_352P
V9 USB_PWRENJ_RSM_ENT2_GPI31_GPO38 T9 OFF_CDPWR_RSM_ENT3_GPI32_GPO39

PRIMARY IDE

1

SMIJ STPCLKJ SLEEPJ_GPO32 ZZ_RATIOJ CLKRUNJ_GPIO20 CPU_STPJ_GPO44 PCI_STPJ SLOWDOWN_GPIO21 PCIREQJ THRMJ AGP_BUSYJ_GPI26_CBLIDP AGP_STPJ_GPO33_CBLID_S

R326 100K_5% RI#_5R
302

SLP_S3#_5 SLP_S5#_5 CFG_SPLED CFG_LB# LOW_BAT#_3 USB_SMI# PCI_PME#_3 +V5A
1

26-,17171818201 0_5% 4242-,40-,31-,221 R698 10K_5%

RDATAJ_RUN_ENT16_EGPIO0 WGATEJ_RUN_ENT17_EGPIO1 WDATAJ_RUN_ENT18_EGPIO2 HDSELJ_RUN_ENT19_EGPIO3 FD_DIRJ_RUN_ENT20_EGPIO4 STEPJ_RUN_ENT21_EGPIO5 DSKCHGJ_RUN_ENT22_EGPIO6 DRV0J_RUN_ENT23_EGPIO7 DRV1J_EGPIO8 MOT0J_EGPIO9 MOT1J_EGPIO10 WPROTJ_EGPIO11 TRK0J_EGPIO12 INDEXJ_EGPIO13 DENSEL_EGPIO14

+V5A

RSM_RST SUS_STAT#_5 PWR_SWIN#_3 H_THRMTRIP#

20830-,29-,2017-

+V5A +V3A R246 10K_5%
1 2

SIDEIOWJ SIDEIORJ SIDEDAKJ SIDEDRQ SIDERDY SIDECS1J SIDECS3J SIDEA2 SIDEA1 SIDEA0

GND GND GND GND GND GND GND GND GND GND GND

M13 GND M8 GND L8 GND

INIT CPURST IGNNEJ INTR NMI A20MJ FERRJ_IRQ131

W10 W13 Y15 V10 TP250 V14 W14 Y14 Y13 W11 Y11 2 R690 Y10 W12 V11 2 Y12

PIDED15 PIDED14 PIDED13 PIDED12 PIDED11 PIDED10 PIDED9 PIDED8 PIDED7 PIDED6 PIDED5 PIDED4 PIDED3 PIDED2 PIDED1 PIDED0 PIDEA2 PIDEA1 PIDEA0 PIDECS3J PIDECS1J PIDEDRQ PIDEDAKJ PIDERDY PIDEIORJ PIDEIOWJ SIDE15

G18 PDD(15) 1 8 G16 PDD(14) 2 7 F19 PDD(13) 3 6 F17 PDD(12) 4 5 E20 PDD(11) E18 PDD(10) D19 PDD(9) C20 PDD(8) 47_5% RS529 B20 PDD(7) 1 8 D18 PDD(6) 3 6 D20 PDD(5) 2 7 E19 PDD(4) 4 5 F16 PDD(3) F18 PDD(2) F20 PDD(1) G17 PDD(0) 47_5% RS527 J16 PDA(2) 4 5 H19 PDA(1) 2 7 H20 PDA(0) 1 8 J18 PDCS3# 3 6 J17 PDCS1# 1 G19 PDDRQ 1 H18 PDDACK H17 PDIORDY H16 PDIOR# G20 PDIOW# B17

27PDD_R(15) PDD_R(14) PDD_R(13)

PDD_R(15:0)

47_5% RS530 PDD_R(12) 6 PDD_R(11) 3 5 PDD_R(10) 4 2 7 PDD_R(9) 1 8 PDD_R(8)
PDD_R(7) PDD_R(6) PDD_R(5)

47_5% RS528 3 2 1 4

PDD_R(4)

6 7 8 5

PDD_R(3) PDD_R(2) PDD_R(1) PDD_R(0)

47_5% 2 R345 47_5% 2R344 3 2 1 4 6 7 8 5 RS21 47_5%

27272727272727272727-

PDA(2)_R PDA(1)_R PDA(0)_R PDCS3#_3R PDCS1#_3R PDDRQ_R PDDACK#_3R PDIORDY_R PDIOR#_3R PDIOW#_3R

RSM_RSTJ SUSPENDJ PWRBTNJ SLPBTNJ OFF_PWR0_GPO36 OFF_PWR1_GPO37 OFF_PWR2 SPLED LBJ_RSM_ENT0 LLBJ_RSM_ENT1_CPUPWG ACPWR_RSM_ENT8 PMEJ RI IRQ8J

PMU1

PMU2

CPU

E16 C16 FLOPPY SECONDARY SIDE14 A16 SIDE13 SIDE12 D15 SIDE11 IDE B15 SIDE10 E14 SIDE9 SIDE8 SIDE7 SIDE6 SIDE5 SIDE4 SIDE3 SIDE2 SIDE1 SIDE0 D13 E13 D14 A15 C15 E15 B16 D16 A17 +V3

M18 L19 L18 M19 L16 L17 M20 K19 K20 K17 K18 M16 L20 J20 J19

A13 B14 D12 E12 A11 C10 B10 D9 B11 T18 D11 E11

C14 B13 C13 B12 C12 A14 A12

N8 N9 N10 N11 N12 N13 J13 J8 K8 K13 L13

1

0_5% R707

R747 10K_5% SLP_S3#_3R SLP_S5#_3R
2 47-,46-,45-,43-,24-,202

R363 10K_5% RB400D 2 RB400D 2 D519 26-,173 D17 173

0_5% R330

20-

1

1

D17 E17 B18 C17 A18 C19 A20 B19 C18 A19

IRQ8

14 Place these caps close to SB. C270 180PF_50V 1 180PF_50V C255 2 1 C256 1 C722 1 C260 2 180PF_50V 2 180PF_50V 2 180PF_50V 1 7

SLP_S3#_5 SLP_S5#_5 WAKEUP0#_3 LID_SW#_5 H_SMI# H_STPCLK# H_CPUSLP#
39-,202938-,5-

U507 2

9

14 U507 8
1

R625

2

22_5%

2

42-,402

PCIRST3#_3

43-

7

0_5% 0_5%

14 PCI_RST#_3 +V5S
1 10-,173

U507 4

11

38-,5-

14 U507 10 1 R624 2 31-,27-,2222_5% 7

PCIRST2#_3

1 1

R619

38-,5-

38-,538-,538-,5-

R618

38-,517-

+V3S CLKRUN#_3 CPUSTOP#_3 PCISTOP#_3 FWH_WP#_3 PCI_PREQACT# TEMP_WARN#_3 AGP_BUSY# AGP_STP#

+V3S
4.7K_5% R614 1 42-,40-,39-,31-,22-,20-,10- 2 44-,10-,510-,42112-,103410101

1 2

7
1

2 2 TP251

H_IGNNE# H_INTR H_NMI H_A20M# H_FERR#

H_INIT#

+VCCP

R251 470_5%
2 2

R250 300_5%
17-

+VCCP

R229 470_5%
2 2

R228 300_5%
17-

R656 4.7K_5%
2

1

14 5 7

U507 6

13

14 U507 12 1 R623 2 21-,2022_5% 1 R201 22_5%
2 8-

1

PCIRST1#_3 NB_RST#

H_THRMTRIP#

H_FERR#

SN74HC04 7

R598 56_5%

1

3 2
C B E

R595 56_5%

1

3 2
C B E

Q21 SST3904
Jerry Huang Jerry Huang

Q23 180PF_50V C265 180PF_50V C266 180PF_50V SST3904 C261 1 2 1 2 1 2 PM_THRMTRIP#
5-

H_FERR_S#

38-,5-

2 R597 470_5% 1 2

Q507 3 2B C
E

1

2 R594 470_5% 1 2

Q506 3 2B C
E

1

INVENTEC
Sapphire
ALI_M1535 (1/2)
240 P8607-40i-PVR-03 17 50 A3

SST3904 1

SST3904 1

Place these caps close to SB.

+V3A
27-

IDE_RST_5 THERM_SCI# +V5S

21-,20392139-,2024-

LPC_FRAME#_3 LPC_DRQ0# ROMEN_5 RUNSCI0#_3 PC_SPKR_5
30303030303030303030-

1

R309

2

U510 4 TC7S08F

5

1 2

20-,56-,5-

SB_PWG ITP_DBRESET#
181818-

39-,34-

100K_5% 1 BAT54 3 D15

+V5S
41-,30-

PREP

3

CFG_GPO34 CFG_GPO35 CFG_GPO30

1

TP181 TP182 TP183 TP184

PDATA(7)

PDATA(6)

PDATA(5)

PDATA(4)

PDATA(3)

PDATA(2)

PDATA(1)

M17 GPI24_IOCHRDY N18 GPO30_AEN

E9 GPI25 P19 GPOW_GPO35 P18 GPIRJ_GPO34

T3 N20 P17 Y4 W4 V4 Y3

U10

T19

E5 LRCLK_PDMA_GNTJ_RUN_ENT15_GPIO15 E4 SCLK_PDMA_REQJ_RUN_ENT14_GPIO14

SIN2_RUN_ENT8_GPIO8 SOUT2_RUN_ENT9_GPIO9 RTS2J_RUN_ENT10_GPIO10 DTR2J_RUN_ENT11_GPIO11 CTR2J_RUN_ENT12_GPIO12 DSR2J_RUN_ENT13_GPIO13 DCD2J_RUN_ENT14_GPIO14 RI2J_RUN_ENT15_GPIO15

PCMDATA_RUN_ENT10 LFRAMEJ_RUN_ENT5_GPIO5 LDRQJ_RUN_ENT4_GPIO4 RUN_ENT3_GPIO3 RUN_ENT2_GPIO2 RUN_ENT1_GPIO1 RUN_ENT0_GPIO0_IN_STROBJ

SIN1 SOUT1 RTS1J_CONFIG DTR1J CTS1J DSR1J DCD1J RI1J

LPC_AD(3) LPC_AD(2) LPC_AD(1) LPC_AD(0)

21-,2021-,2021-,2021-,20-

U3 ACGP_UP_RUN_ENT11_GPIO11 R5 ACGP_DOWN_RUN_ENT12_GPIO12 U2 ACGP_MUTE_RUN_ENT13_GPIO13

W19 Y19 V20 W20 Y20 U18 U19 U20 T15 U15 V15 W15 T16 U16 V16 W16 Y16 R17 T17 U17 V17 W17 Y17 V18 W18 Y18 V19 T14 U14 T13 U13 E8 D10 W6 Y6 V13 H5 V6

AUTOFDJ PRINITJ SLCTINJ STROBJ BUSY PRNACKJ PE SLCT ERRORJ PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0

TESTJ

SPKR

PWG

R1 R2 R3 P1 M4 M3 M5 L5 T1 M2 N5 N4 N3 N2 N1 P3 P2

H2 J5 H1 J3 J4 H3 G1 J2

K4 K2 K3 L2 K1 K5 J1 L1

U4

PDATA(0)

RI#_5 SDCD#_5 SDSR#_5 SCTS_5 SDTR#_5 SRTS#_5 STXD_5 SRXD_5

303030303030-,183030-

CFG_DTR2# CFG_RTS2#

1818-

+V3S
1 1 1K_5% R294 1

2

1

10K_5%

R740 10K_5%

10K_5%

R307

1

1

2

2

2

2

2

1K_5%

R304 1K_5%

R319

R655

ALF#_5 PINIT#_5 SLCTIN#_5 STRB#_5 BUSY_5 ACK#_5 PE_5 SLCT_5 ERROR#_5 PDATA(7:0)

10K_5%

R306

2

XD7 XD6 XD5 XD4 SERIAL XD3 XD2 PORT 1 XD1 XD0 BIOSA18_GPO24_CLK_OFFJ BIOSA17_GPO25 BIOSA16_GPO26 SA15_SD15_EGPIO15_EEGPIO15 SA14_SD14_EGPIO14_EEGPIO14 SA13_SD13_EGPIO13_WWGPIO13 SA12_SD12_EGPIO12_EEGPIO12 SERIAL SA11_SD11_EGPIO11_EEGPIO11 SA10_SD10_EGPIO10_EEGPIO10 PORT 2 SA9_SD9_EGPIO9_EEGPIO9 SA8_SD8_EGPIO8_EEGPIO8 SA7_RUN_ENT23_EGPIO7_ERUN_ENT23_EEGPIO7 SA6_RUN_ENT22_EGPIO6_ERUN_ENT22_EEGPIO6 SA5_RUN_ENT21_EGPIO5_ERUN_ENT21_EEGPIO5 SA4_RUN_ENT20_EGPIO4_ERUN_ENT20_EEGPIO4 SA3_LAD3_RUN_ENT19_EGPIO3_ERUN_ENT19_EEGPIO3 SA2_LAD2_RUN_ENT18_EGPIO2_ERUN_ENT18_EEGPIO2 SA1_LAD1_RUN_ENT17_EGPIO1_ERUN_ENT17_EEGPIO1 SA0_LAD0_RUN_ENT16_EGPIO0_ERUN_ENT16_EEGPIO0 MEMRJ MEMWJ IORJ_GPO27 IOWJ_GPO28 XD BUS PCICLK OSC14M OSC32KI OSC32II CLK32KO USBCLK SQWO

+V5S

PRINTER

MISC

USB

USBP0+ USBP0OVCRJ0_GPIO20_SEL_MODE0 USBP1+ USBP1OVCRJ1_GPIO21_SEL_MODE1 USBP2+_RSM_ENT5_GPI34_GPO41 USB2-_RSM_ENT4_GPI33_GPO40 OVCRJ2_GPIO22_INC_CCFT USBP3+_RSM_ENT7_GPI36_GPO43 USBP3-_RSM_ENT6_GPI35_GPO42 OVCRJ3_GPIO23_DEC_CCFT

W8 V8 T5 U9 Y7 T6 W7 V7 U5 U8 T8 U6

10K_5% 10K_5% 10K_5% 10K_5% 10K_5% 10K_5% 10K_5% 10K_5%
0_5%

1 1 1 1 1 1 1 1

2 2 2 2 2 2 2 2

R323 R683 R310 R327 R317 R311 R322 R681
21-

10K_5% 2 1 10K_5% 1 10K_5% 1

R312 2 1 R682 2 R689 2 R313

FWH_TBL#_3 +V3S

SM BUS

U506 ALI_M1535_BGA_352P
SOUND AC' 97
ACMIDI_TXD ACMIDI_RXD ACGAME7_GPIO19 ACGAME6_GPIO18 ACGAME5 ACGAME4 ACGAME3_GPIO17 ACGAME2_GPIO16 ACGAME1 ACGAME0

T2 SMB_ALERT_FANIN1_EM_OFF T7 SMBCLK U7 SMBDATA M1 IRTX L3 IRRX L4 IRRXH
1

10K_5% R305 2 1 39-,34-,13-,439-,34-,13-,4-

SMB_ALERT# SMBCLK_3 SMBDATA_3 IR_TX_3 IR_RX_3 IR_SD_3

IR

323232-

FAN

Y5 FANIN2_RUN_ENT9_GPIO9 V5 FANOUT2_RUN_ENT8_GPIO8 W5 FANOUT1_RUN_ENT7_GPIO7

R308
44-

2

10K_5% PM_DPRSLPVR

CLK_SBPCI_EXTR CLK_SB14_EXTR

438-,4-

0_5% 1

R636 2

RTC CLKS

CLK_32K

22-,201

ACSDATA_OUT ACSYNC ACBIT_CLK ACRESETJ ACSDATA_IN1 ACSDATA_IN0

CFG_CLK32KO CLK_USB48_EXTR CFG_SQWO

18418-

CHIP

N17 GPO29_PCS2J R16 PCS1J_RUN_ENT6_GPIO6_CVROFF P20 PCS0J_GPO31 T20 ROMKBCSJ SEL T12 T11 V12 U12 U11

18181818-

+V5A
R325 R320 2 R3292 R328 2 R324 2 2 10K_5% 1 10K_5% 1 10K_5% 1 10K_5% 1 10K_5% 1

CFG_GPO29 CFG_PCS1# CFG_PCS0# CFG_ROMCS#

(*)
2

R665 OPEN
1

IRQS

(**)
R629 20M_5% 2

(**) X500
4 3 1 2

33_5%

R298

TP185

10K_5% TP186 TP187 TP188 TP189 TP190 TP191 TP192 TP194

R301

(**)
C678 1 10PF 2

32.768KHZ 1

INSTALL X9, C1208, C1209, R1218 and R1219. REMOVE R27 (**)
1 C676 2 10PF

1

R338

1 2

1

1 1 1 R302

R300 10K_5% 10K_5%

1 R331 2 4.7K_5% INSTALL R27 REMOVE X9, C1208, C1209, R1218 and R1219. (**) EXT 32K X'tal

1

R334

2 1

10K_5% R335 2 10K_5%

R4 T4 Y2 Y1 W3 W2 W1 V3 V2 V1

U1 P4 P5 Y9 Y8 W9

(*) EXT 32K CLK

R20 RTCAS R19 RTCRW R18 RTCDS

SERIRQ_3 IRQ14_3

39-,22-,2039-,27-

N19 IRQSER N16 SIRQI P16 SIRQII

KEYBOARD AND MOUSE

MSDATA_IRQ12I MSCLK_FPVEE KBINH_IRQ1I KBDATA_CCFT KBCLK_DISPLAY

10K_5% R303

+V5S CFG_GPO34 CFG_ROMCS# CFG_PCS1# CFG_GPO30 CFG_GPO29 CFG_GPO35 CFG_DTR2# SRTS#_5 CFG_PCS0# CFG_SQWO CFG_RTS2#
1818181818181810K_5% 10K_5% 10K_5% 10K_5% 10K_5% 10K_5% 10K_5% 2 2 2 2 2 2 2 1 1 1 1 1 1 1 R360 R735 R361 R359 R739 R736 R632

10K_5%
33-,2433-,2433-,2433-,243324R299 OPEN 2 1 R673 10K_5% 2 1 R684 10K_5% 2 1

2

+V5S

(**)
R650 15M

2

2 2 2

2

AC97_DATAOUT_3 AC97_SYNC_3R AC97_BCLK_3 AC97_RST#_3 AC97_DATAIN1_3 AC97_DATAIN0_3

LATCHED BY PWG
30-,18181818-

(Hi) DTR2# PULL HIGH PULL LOW

(Lo) RTS2#

(Lo) (Lo) RTS1# CLK32O

(Lo) (Hi) SPLED SQWO

(Hi) PCS1#

(Lo) PCS0#

(Hi) GPO34

(Lo) LB#

OPEN 2 10K_5% OPEN2 2 10K_5% 2 10K_5% OPEN2 1K_5%2 2 1K_5% OPEN2 1K_5%2 2

1 1 1 1 1 1 1

R358 R357 R738 R737 R672 R671 R633

+V3S

(Hi,Hi) GPO30

(Hi,Hi) GPO29 ROMCS# GPO35
FLASH ROM MODE SELECTION L,L - RESERVED L,H - ENABLE 8Mb Flash ROM SIZE H,L - DISABLE ALL FUNC. IN THIS CONFIG. DEFAULT:H,L H,H - ENABLE LPC FLASH ROM

ENABLE INTERNAL SIO BASE 32K CLOCK AT KEYBOARD PS2 INTERNAL ADDRESS TEST MODE POWER KEYBOARD MODE 0X3F0h ENABLE DEFAULT MODE DEFAULT INTERNAL KEYBOARD AT MODE SIO BASE 32K CLOCK DISABLE INTERNAL ADDRESS TEST MODE KEYBOARD 0X370h DISABLE DEFAULT DEFAULT ATX POWER MODE DEFAULT

GPI24 & DISABLE PENTIIUM II GPO30 4Mb FLASH MODE FUNCTIONS ROM MODE DEFAULT DEFAULT

CHIP TEST MODE ACTIVE HIGH TO DISABLE POWER OFF DEFAULT ACTIVE LOW TO POWER OFF DEFAULT

LATCHED BY RSMRST#

L,L - USB TEST MODE L,H - AUDIO/MODEM TEST MODE H,L - SUPER IO TEST MODE H,H - NORMAL OPERATION DEFAULT : H,H

CFG_SPLED CFG_CLK32KO CFG_LB#

171817-

1 1 1

R697 R332 R615

Jerry Huang Jerry Huang

INVENTEC
Sapphire
ALI_M1535 (2/2)
240 P8607-40i-PVR-03 18 50 A3

PENTIIUM / IOCHRDY & ENABLE 4Mb CHIP TEST AEN FLASH ROM K7 MODE MODE ENABLE FUNCTIONS MODE DEFAULT

R

30-,10-

1

L5

2 BLM11B750S
USBVCC1

1 C15 2 10PF L6 2 BLM11B750S

1 C14 2 10PF

1 C13 2 10PF

(20/5)
1 C503 1 C505

2 2 0.1UF_16V 10UF_6.3V

G

30-,10-

1

DOCK_HSYNC
HSYNC B 30-,10101

30-

126_VCC 2.2K_5% 1 R505 1 2.2K_5% R504

1

L7

2

BLM11B750S

R506 10K_5%
2

DOCK_VSYNC

30-

2 +V3 +V3S

2

+V3
VSYNC

101

U1
R511 10K_5% 3 8 4 9 5 10 19 21 16 17 7 6 VIDEO1 TERM1 VIDEO2 TERM2 VIDEO3 TERM3
SYNC_IN1 SYNC_IN2 DDC_IN1 DDC_IN2

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

CN3 1 2 3 4 5 6 7 8 9 10 11 12 G 16 13 G 17 14 15

1

1

R507 4.7K_5%
2 2

R508 4.7K_5%

2

DDCDATA DDCCLK

1010-

AGND DGND

2 12 1 11 23 SYNC_OUT1 20 SD2 24 SYNC_OUT2 22 DDC_OUT1 15 DDC_OUT2 18 VCC3 14 VBIAS 13 VCC1 VCC2 VCC4 PWRUP SD1
1 C12

126_VCC (15/5) D501 1

USBVCC1

SYN_7312S_15G2

1N4148 (15/5) 2

1 C504 2 0.1UF_16V

3030-

DOCK_DDCDATA DOCK_DDCCLK

CMD_VGA200_QSOP_24P

1 C506

2 0.1UF_25V 0.1UF_25V 2

+V3S

1

1

R2 R1 4.7K_5%4.7K_5%
2 2

+V3S LCM_DDCCLK LCM_DDCDATA
1 1010-

R26 47K_5%
2 1

+V3S (20/5)
2

R36

Q3 4 1 C39 3 2 0.01UF_16V 2 1
G

(20/5) 5 6 7 8
1 1

TXOUTL2TXOUTL2+ TXOUTL1TXOUTL1+

38-,1038-,1038-,1038-,10-

100_5% Q5 DIGON
10-

C38 10UF_6.3V

1

C25

1

G1

S1

5

S

D

2 0.1UF_16V

1

R47 10K_5%
2

S2 2 NDC7002N

3 G2

6 D1 D2 4

IRF7404

R27 10K_5%

(20/5)

2

TXCLKOUTLTXCLKOUTL+

38-,1038-,10-

TXOUTL0+ TXOUTL0-

38-,1038-,10-

LUMA_Y

30-,10-

1 L500 2 LS_1MH_1.8U 1 C502 2 82PF

(10/5) 1 C511 2 82PF 2 1
2

+V3 3

1

R503 75_1%

+V3S CN5 GND GND G 5 Y G 6 C

BAV99 D502 (10/5)

1 2 3 4

LCM_ID0 LCM_ID1 LCM_ID2

101010-

6 7 8 5

RS501

3 2 1 4

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

CN6 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 G 31 28 G 32 29 30

IPEX_20265_030E_ML_30P

CHROMA_C

30-,10-

1 L501 2 LS_1MH_1.8U

(10/5) 1 C501 2 82PF 2 +V3 3 1
2 1

SYN_030244FS004TX02FA

10K_5%
Jerry Huang

1 C514 2 82PF

R502 75_1%

SVIDEO CN

Place as passible as close to connector

INVENTEC
Sapphire
LCD & CRT CONNECTOR INTERFACE
240

BAV99 D500

+V3A +V3S 1 L515 2 BLM21A121S
10UF_6.3V

+V3S_MSIO

+V3A 1 L514 2 BLM21A121S

+V3A_MSIO

1

C693 1 C696 1 C694 1 C695 2 0.1UF_16V 0.1UF_16V 0.1UF_16V 2 2

1

C673 10UF_6.3V

1 C679

1 C677

1 C681 1

2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V

R708 100K_5%
2

1 C710 2 0.1UF_16V

5 2 1 2 +V3A_MSIO +V3S_MSIO +V3A
1

U511 4
1

20-

VCC1_POR#_3

C709 3 0.027UF_25V TI_SN74LVC1G17DBVR_SOT_5P

R716 10K_5%
2

VCC2 30 VCC2 38 VCC2 47

U508
SCAN_OUT(11:0) 29-,28SCAN_OUT(0) SCAN_OUT(1) SCAN_OUT(2) SCAN_OUT(3) SCAN_OUT(4) SCAN_OUT(5) SCAN_OUT(6) SCAN_OUT(7) SCAN_OUT(8) SCAN_OUT(9) SCAN_OUT(10) SCAN_OUT(11)

11 67 81 94

VCC1 VCC1 VCC1 VCC1

R670 10K_5%
2

General Purpose I/O Interface

Keyboard/Mouse Interface

SMSC_LPC47N250_TQFP_100P

SCAN_IN(7:0)

28-,29SCAN_IN(0) SCAN_IN(1) SCAN_IN(2) SCAN_IN(3) SCAN_IN(4) SCAN_IN(5) SCAN_IN(6) SCAN_IN(7)

TP30 TP29

17 16 15 14 13 12 10 9 7 6 5 4 3 2 25 24 23 22 21 20 19 18

KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12_OUT8_KBRST KSO13_GPIO18 KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 IMCLK IMDAT KCLK KDAT EMCLK EMDAT

OUT0 99 OUT1_IRQ8# 100 OUT7_SMI# OUT8_KBRST OUT9_PWM2 OUT10_PWM0 OUT11_PWM1 GPIO2 GPIO3 GPIO4_KSO14 GPIO5_KSO15 98 97 96 95 93 62 63 64 66

39-,181

R642 0_5%
TP227

217-

RUNSCI0#_3

IRQ8
BATSELB_A# KBCPURST_3 INV_PWM_3 FAN_PWM_3 CHGCTRL_3

TP31 48-

+V3A

21-,5333448-

D511 3

BAT54 31-,291

1

1

XMIT_OFF#

30-,29-,17-

PWR_SWIN#_3

R669 10K_5%
2 2

R662 10K_5%
2929-

VOL_UP VOL_DN

GPIO7_PWM3 68 GPIO8_RXD 69 GPIO9_TXD 70 GPIO11_AB2A_DATA GPIO12_AB2A_CLK GPIO13_AB2B_DATA GPIO14_AB2B_CLK GPIO15_FAN_TACH1 GPIO16_FAN_TACH2 GPIO17_A20M 71 72 73 74 75 76 77

17481748-

RSM_RST

ACIN# LOW_BAT#_3 BATSTAT#
R658 10K_5% 1 2 100K_5% 1 2

+V3A_MSIO

1

R661 10K_5%
R651 2

29-

SCROLL_LED#_3

29-,20-

NUM_LED#_3

D512 3 1 BAT54 PCI_SERR#_3
42-,40-,39-,31-,22-,17-,10-

Access Bus Interface

IM_CLK_5 IM_DAT_5 KB_CLK_5 KB_DAT_5 EM_CLK_5 EM_DAT_5

282830303030-

26 27 29 31 32 33

48-,355-

THM_MAIN# H_A20M_KBC#

1

TP228 48GPIO20_PS2CLK 78 80 GPIO21_PS2DAT47-,46-,45-,43-,24-,17-

AIRACIN# SLP_S3#_3R
2

R652 100K_5% 48-,35-

THM_MBAY#

Power Mgmt SIRQ

+V3S

CLKRUN#_3 SERIRQ_3 CLK_KBCPCI_EXTR WAKEUP0#_3 LPC_AD(3:0) 21-,18-

42-,40-,39-,31-,22-,17-,1039-,22-,182 38-,4- 0_5% 1 R703 39-,17-

44 46 43 59

CLKRUN# SER_IRQ PCI_CLK EC_SCI#

AB1A_DATA 86 AB1A_CLK 87

39-,3539-,35-

SDA_MAIN SCL_MAIN SDA_MBAY SCL_MBAY

+V3A Reserve pad for debug Layout Note: place accesibly from door
R687 1 R678 1 R648 1 R649 1 R647 1 2 OPEN 2 1K_5% 2 OPEN 2 OPEN 2 1K_5%

AB1B_DATA 84 39-,35-,30AB1B_CLK 85 39-,35-,30-

Miscellaneous

1

LPC Bus

R702 10K_5%
2

LPC_AD(3) LPC_AD(2) LPC_AD(1) LPC_AD(0)

40 39 37 35

LAD3 LAD2 LAD1 LAD0

LPC_FRAME#_3 PCIRST1#_3

21-,1821-,17-

41 LFRAME# 42 LRESET# 34 LPCPD#

GND GND GND GND GND GND GND

1 2

4 3 1

55 AGND

+V3A

X501

53 54 51 52

XTAL1 XTAL2 VCC0 XOSEL

PGM FWP# EA# CLOCK 32KHZ_OUT RESET_OUT# PWRGD VCC1_PWRGD 24MHZ_OUT TEST_PIN MODE DMS_LED# BAT_LED# PWR_LED#_8051TX FDD_LED#_8051RX

56 82 83 48 58 49 61 60 50 1 57 91 88 90 89

38-,422-,18-

CLK_KBC14_EXTR

CLK_32K
2

10K_5%

1

R626
44-,8-

2

18-,5-

SB_PWG

1 TP236

R676 1K_5%

20-

NB_PWG VCC1_POR#_3

RTC

TP230 R677 TP237 1 10K_5% 2

2930-,2929-

+V3A_MSIO

BAT_LED#_3 PWR_LED#_3 CAPS_LED#_3 NUM_LED#_3

29-,20- 3

32.768KHZ

R694 300_5%
1 C697 2 15PF 2

1 C699 2 0.1UF_16V

1 C702 2 15PF

CN13 1 1 2 2 G 7 3 4 4 G 8 5 5 6 6

92 79 65 45 36 28 8

MLX_67451_0006

+V_RTC

1 D514 BAT54C CN14 3 G 1 1 4 G 2 2 JST_BM2B_SRSS
1

3
Engineer
Jerry Huang

R709

2

2 1 C712 2 1000PF_0402 1 C700 2 0.1UF_16V 1 C701 2 1UF_6.3V

Drawn by
Jerry Huang

INVENTEC
TITLE Size

470_5%

R&D CHK DOC CTRL CHK MFG ENGR CHK Changed by
EE1

Sapphire
KAHUNA LITE
VER Model Number

A3

Date Changed
Wednesday, March 5, 2003

Time Changed
6:15:46 pm

QA CHK

240

P8607-40i-PVR-03

Sheet

20

of

50

+V3S +V5S +V3S
1 1 1

R230 10K_5% R631 10K_5%
2 21-

R630 10K_5%
2 2

FWH_INIT#_3

21-

ROMEN#_3 KBCPURST_3
20-,5-

ROMEN_5

18-

2G

Q26 3 D
S

2G

Q17 3 D
S

2N7002 1

NDS7002A 1

+V3S +V3S
1 R749 0_5% 2 1 C772 1 C773

(15/5)
1 2 3 4 1

2 2 4.7UF_M_16V 0.01UF_16V 1

R723 100K_5%

RS531 10K
8 7 6 5

+V3S
2

R748 0_5%

U33
AMP_C822273-1_SOKT_32P 25 VCC1 FWH0 13 32 VCC2 FWH1 14 27 VCCA FWH2 15 FWH3 17 1 VPP 2 RST# 7 WP# 8 TBL# 18 CLKRUN# 24 INIT# 29 IC 31 CLK 19 FDIS 20 DPPO 21 RFU FWH4 23 FWH5 22 FGPI0 FGPI1 FGPI2 FGPI3 FGPI4 ID0 ID1 ID2 ID3 6 PCBREV0 5 PCBREV1 4 PCBREV2 3 30 12 11 10 9

2

+V3S
20-,1820-,1820-,1820-,1820-,18-

1 C311

1 C310

1 C316

LPC_AD(0) LPC_AD(1) LPC_AD(2) LPC_AD(3) LPC_FRAME#_3

1

1

1 R761 OPEN 2

2 0.1UF_16V 2 0.1UF_16V 2 0.1UF_16V

R752 R753 OPEN OPEN 2 2

PCIRST1#_3 FWH_WP#_3 FWH_TBL#_3

20-,1717182138-,4-

FWH_INIT#_3
CLK_FWHPCI_EXTR
1 R355 OPEN 2

GND1 16 GND2 26 GND3 (CE#) 28

R759 100_5%
2

100_5%

R760

R366 1 R356 1 LEGACY_FRE_EN#

2 100_5% 2 100_5%

1

1

1

R762 100_5%
2

2

21-

ROMEN#_3

Jerry Huang

INVENTEC
Sapphire FWH&EEPROM

CLK_32K

20-,18-

+V3 BY DEFAULT, SCLK IS AN INPUT THAT MUST BE DRIVEN BY A 32 KHZ TO 14 MHZ CLOCK +V3 1 C204 OPTIONALLY, SCLK CAN BE A 2 MHZ OUTPUT TO PROVIDE THE POWER SWITCH CLOCK
1

1 C176 1 C205 2 4.7UF_6.3V 0.1UF_16V 2 0.1UF_16V R249 R248 10K_5%
2

1

1 C229 2 4.7UF_6.3V 0.1UF_16V

C196

1

2

CARD_VCC

10K_5% F3 H11 D12 C8 B4

SLATCH_VPP_PGM N12 SDATA_VCC5# N13 SCLK_VCC3# M13

+V3 L9 AUX_VCC G1 PCI_VCC K2 PCI_VCC L6 PCI_VCC
PCI_AD(31) PCI_AD(30) PCI_AD(29) PCI_AD(28) PCI_AD(27) PCI_AD(26) PCI_AD(25) PCI_AD(24) PCI_AD(23) PCI_AD(22) PCI_AD(21) PCI_AD(20) PCI_AD(19) PCI_AD(18) PCI_AD(17) PCI_AD(16) PCI_AD(15) PCI_AD(14) PCI_AD(13) PCI_AD(12) PCI_AD(11) PCI_AD(10) PCI_AD(9) PCI_AD(8) PCI_AD(7) PCI_AD(6) PCI_AD(5) PCI_AD(4) PCI_AD(3) PCI_AD(2) PCI_AD(1) PCI_AD(0) PCI_CBE#(3) PCI_CBE#(2) PCI_CBE#(1) PCI_CBE#(0)

C213 1 SKT_VCC G13 SKT_VCC A7 CAD31 CAD30 CAD29 CAD28