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DVD BACK PANEL BOARD

DVD-FRONT PANEL

DVD SMPS 002

STANDBY voltages still carry power durin VCC-STANDBY J11 #BPRESET SPDIF #BPRESET SPDIF SPDIF_IN PCMCLK SCLK LRCLK SDATA0 SDATA1 SDATA2 BPPIO0 BPPIO1 BPPIO2 BPPIO3 SCL SDA PCMCLK SCLK LRCLK SDATA0 SDATA1 SDATA2 BPPIO0 BPPIO1 BPPIO2 BPPIO3 SCL SDA 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 FFC20 VCC-PCM Reserv ed for SPDIF input

g Standby Mode VCC3-STANDBY +12V -12V +5V 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 J12 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 FFC20

VIDFILTR RED GREEN BLUE CHROMA LUMA CVBS RED GREEN BLUE CHROMA LUMA CVBS RED GREEN BLUE RED_OUT GREEN_OUT BLUE_OUT RED_OUT GREEN_OUT BLUE_OUT

CHROMA CHROMA_OUT CHROMA_OUT LUMA_OUT LUMA LUMA_OUT CVBS_OUT CVBS CVBS_OUT {Value}

C90 U13 4 R145 75R 2 3 1 MCLK SCLK LRCLK SDATA CS4334
7

R59 AOUTL 8 10uF 16V 562R R60 1% 100K 1% C91 JP11 1500pF CVBS 1 2 LEFT 3 4 RIGHT 5 6 HEADER 6

AG ND

VA

AOUTR

5

C92 R61 562R R62 1% 100K 1%

C145 47pF

6

10uF 16V

C93 1500pF

STI5505 - Back Panel Connectors

MA[0..11] MD[0..15]

MA[0..11] MD[0..15] VCC3 VCC3-PCM
DATA8 DATA9 DATA10 DATA11 DATA12 DATA13 DATA14 DATA15 ADR1 ADR2 ADR3 ADR4 ADR5 ADR6 ADR7 ADR8 ADR9 ADR10 ADR11 ADR12 ADR13 ADR14 ADR15 ADR16 ADR17 ADR18 ADR19 ADR20 DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7

ADR[1..20] DATA[0..15] VCC3-DENC VCC3

ADR[1..20] DATA[0..15]

#POWERON_RESET

#JTAG_RESET U3 1 4 2 LMOS TC4S81F R9 NS U1 #SDCS0 84 #SDCS1 85 #SDRAS 88 #SDCAS 89 #SDWE 90 91 DQML DQMU 105 SDCLK 76 104 78 79 80 81 69 70 71 72 73 74 82 83 92 93 94 97 98 99 100 101 106 107 108 109 112 113 114 115

R7 10K

R8 10K

TP1

1 18 34 67 75 86 95 102 110 119 130 139 149 159 171 184 208

161 162 163 164 165 166 167 168 169 170 173 174 175 176 177 178 179 180 181 182 183

141 142 143 144 145 146 147 148

VDDA3 VDDA3

VDD3 VDD3 VDD3 VDD3 VDD3 VDD3 VDD3 VDD3 VDD3 VDD3 VDD3 VDD3 VDD3 VDD3 VDD3 VDD3 VDD3

ADR1 ADR2 ADR3 ADR4 ADR5 ADR6 ADR7 ADR8 ADR9 ADR10 ADR11 ADR12 ADR13 ADR14 ADR15 ADR16 ADR17 ADR18 ADR19 ADR20 ADR21

DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7

VDDA3_PC M

#SDCS0 #SDCS1 #SDRAS #SDCAS #SDWE DQML DQMU SDCLK VCC3 R12 R13 R14 R15 R16 R17 R18 J3 2 4 6 8 10 12 14 16 18 20 1 3 5 7 9 11 13 15 17 19 10K 10K 10K 10K 10K 10K 10K TRIGIN TRIGOUT

SDCS0 SDCS1 SDRAS SDCAS SDWE DQML DQMU

DATA8 DATA9 DATA10 DATA11 DATA12 DATA13 DATA14 DATA15

151 152 153 154 155 156 157 158

48

53 60

MEMCLKOUT MEMCLKIN AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 RESET PWM0/OSLINK_SEL PWM1/BOOTFROMROM PWM2 TCK TDI TDO TMS TRST PARA_REQ/PIO0_3 PARA_SYNC/PIO0_0 PARA_STR/PIO0_4 PARA_DVALID PARA_DATA0/PIO0_5 PARA_DATA1/PIO0_7 PARA_DATA2/B_DATA PARA_DATA3/B_BCLK PARA_DATA4/B_FLAG PARA_DATA5/B_SYNC PARA_DATA6/SDAV_CLK PAR A_DATA7/SDAV_DATA
PIO2_0 PIO1_4 PIO3_0 PIO3_1 PIO3_2 PIO3_3 PIO3_4 PIO3_5 PIO3_6 PIO3_7

MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7
R21

HEADER20 Shrouded

MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15

R22 R23 JP3

10K 10K

#RESET 29 26 27 28 TCK TDI R27 56R TMS #TRST PARA_REQ PARA_SYNC PARA_STR PARA_DVALID PARA_DATA0 PARA_DATA1 PARA_DATA2 PARA_DATA3 PARA_DATA4 PARA_DATA5 PARA_DATA6 PARA_DATA7 R28 R29 R30 R31 R32 R33 R34 R35 220R 220R 220R 220R 220R 220R 220R 220R 188 186 189 187 190 16 15 17 33 20 22 36 37 38 39 30 31 32 TP16 40 42 41

137 PPCCLK R10 33R 134 DMAXFER 138 R11 10K PPC_MODE 135 CS 136 #READY READY 124 33R CE1 125 R127 CE2 126 33R CE3 133 R128 R129 33R R/W 123 33R OE 121 R130 R131 33R BE0 122 BE1 127 R132 33R RAS0 128 33R RAS1 129 R133 33R CAS0 132 R134 R135 33R CAS1 23 IR IRQ0 25 INT IRQ1 47 R202 33R SPDIF SPDIF 45 R19 33R AUDCLK PCM_CLK 43 R203 33R SCLK SCLK 46 R204 33R LRCLK LRCLK 44 R205 33R SDATA0 PCM_OUT0 24 R206 33R SDATA1 PCM_OUT1 21 R207 33R SDATA2 PIO0_6/PCM_OUT2 118 PIXCLK PIXCLK _27Mhz 51 HSYNC 52 TP13 ODD/EVEN 117 TP14 OSD_ACTIVE 57 RED R_OUT 56 GREEN G_OUT 55 BLUE B_OUT 62 LUMA Y_OUT 63 CHROMA C_OUT CVBS_OUT YUV0/PIO4_0 YUV1/PIO4_1 YUV2/PIO4_2 YUV3/PIO4_3 YUV4/PIO4_4 YUV5/PIO4_5 YUV6/PIO4_6 YUV7/PIO1_3 64 191 192 193 194 195 196 197 198 CVBS FP_DATA FP_CLK FP_STB TP17 TP7 TP8 TP9 TP10 OPEN #SENSE CLOSE #PUSH RTS CTS TXD RXD SCL SDA R168

PPCCLK

#READY #CE1 #CE3 R/W #OE #BE0 #RAS0 #RAS1 #CAS0 #CAS1 #CE1 #CE3 R/W #OE #WE #RAS0 #RAS1 #CAS0 #CAS1 IR INT SPDIF AUDCLK SCLK LRCLK SDATA0 SDATA1 SDATA2 PIXCLK

R20 10K 10K

RED GREEN BLUE LUMA CHROMA CVBS R24 10K R25 10K R26 75R

JUMPER TDO

PARA_REQ PARA_SYNC PARA_STR TP15

C86 47pF

PIO2_3 PIO2_4 PIO1_5/TXD1 PIO1_6/RXD1
V_REF DAC RG B I_REF DAC RGB V_REF DAC YC I_REF DAC YC

5 6 11 12 7 8 13 14 10 9 116

OPEN #SENSE CLOSE #PUSH RTS CTS TXD RXD NS VCC SCL SDA

PARA_DATA[0..7]

SDAV_VALID NRSS_CLK/B_WCLK NRSS_IN/B_V4 NRSS_OUT STi5505

VSSA_PCM

VREF_PCM

PARA_DATA[0..7]

PIO2_5 PIO2_7 PIO1_7/TXD3 PIO4_7/RXD3
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSA VSSA

PIO1_2/SCL PIO1_0/SDA AUXCLK

#RESET

#RESET TP11

1 2 3 7

R40

R41

U2 6 A0 SCL 5 A1 SDA A2

201 202 203 204 205 206 207 2

4 19 35 68 77 87 96 103 111 120 131 140 150 160 172 185 200

49

58

59

65

66

54 61

199

50

R38 R39

4K7 4K7

3

BPPIO0 BPPIO1 BPPIO2 BPPIO3 SR0 FS0 FS1 #FERESET

BPPIO0 BPPIO1 BPPIO2 BPPIO3 #SOFT_RESET SR0 FS0 FS1 #FERESET R43 R44 R49 R50 0R0 NS 0R0 NS R45 10K

18K7 1% 11K5 1% R42 10K C87 330pF C88 .0033uF Defa ult configuration PARA_DVALID R147 10K PARA_DATA6 R148 10K PARA_DATA7 R149 10K

WC I2C-EEPROM 256x8 I2C Address: 0xA0

(Write), 0xA1(Read)

#BPRESET

#BPRESET

STI5505 - Core Logic

MD[0..15] MA[0..11]

MD[0..15] MA[0..11] MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 21 22 23 24 27 28 29 30 31 32 20 19 17 16 15 18 14 36 VCC3 35 34 U8 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 RAS CAS WE CS LDQM UDQM CLK CKE SDRAM 1MX16 -7 3.3V U9 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 RAS CAS WE CS LDQM UDQM CLK CKE SDRAM 1MX16 -7 3.3V D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 2 3 5 6 8 9 11 12 39 40 42 43 45 46 48 49
MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15

D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15

2 3 5 6 8 9 11 12 39 40 42 43 45 46 48 49

MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15

#SDCS1

#SDCS1

MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 #SDRAS #SDCAS #SDWE #SDCS0 DQML DQMU SDCLK #SDRAS #SDCAS #SDWE #SDCS0 DQML DQMU SDCLK VCC3 R63 75R R64 75R R65 75R R66 75R R67 75R R68 75R R69 75R R70 75R

21 22 23 24 27 28 29 30 31 32 20 19 17 16 15 18 14 36 35 34

C96 47pF
Note: - place RC terminati on close to U8 & U9 - route SDCLK as short as possible - 125MHz SD RAMs are required

C97 47pF

C98 47pF

C99 47pF

C100 47pF

C101 47pF

C102 47pF

C103 47pF

STI5505 - Decoder / OSD Memory

Onl y used, if external PLL is not used VCC SEE HARDWARE MANUAL FOR UDIO DAC SUPPORT A OSC1 1 4 NC VCC 8 5 SHOWN: 96kHz W/ C rystal CS4334 DAC

GND CLK NS-27MHz

VCC VCC3 R71 NS U12 #BPRESET SR0 FS0 FS1 C104 33pF C105 33pF R77 0R0 Y1 27MHz 6 2 9 #BRESET SR0 FS0 FS1 18 1 19 20 5 RESET
3 VDD 8 VDD PLL 16 VD D3

MCK0 MCK0

10 11

R72 33R VCC3

PIXCLK

PIXCLK

ML/SR0 MD/FS0 MC/FS1 XT2

SCKO1 XT1 MODE NC
GND GNDP LL

12 14 17 13 256fs 384fs 768fs R199 R200 NS NS R197 R198 NS 0R0

R73 U29 8 1 6 3 4

0R0 R74 NS

SCKO2
GND

SCKO3

SCKO4 PLL1700

VCC 7 IN1 OUT1 2 IN2 OUT2 5 IN3 OUT3 GND TC7W34FU

AUDCLK

AUDCLK (5505)

R75 NS PCMCLK PCMCLK (DAC)

4 7

15

R201

NS VCC3
8

U30 Q Q 5 3 R76 0R0

D CLK PR CL

Optional for 96kHz A

udio DAC support

7 6

VCC GND

2 1

4

TC7W74FU

STI5505 - External PLL

Firmware Flash ROM (2n DATA[0..15] ADR[1..20] ADR[1..20]

d part is optional)

VCC-FLASH

Option for one Flas #CE3

h part without U10 R151 0R0

ADR1 ADR2 ADR3 ADR4 ADR5 ADR6 ADR7 ADR8 ADR9 ADR10 ADR11 ADR12 ADR13 ADR14 ADR15 ADR16 ADR17 ADR18 ADR19 ADR20 #CEL

25 24 23 22 21 20 19 18 8 7 6 5 4 3 2 1 48 17 16 9 26 28 11

VSS VSS

#ROMCEL

U6 A0 DQ0 A1 DQ1 A2 DQ2 A3 DQ3 A4 DQ4 A5 DQ5 A6 DQ6 A7 DQ7 A8 A9 DQ8 A10 DQ9 A11 DQ10 A12 DQ11 A13 DQ12 A14 DQ13 A15 DQ14 A16 DQ15/A-1 A17 A18/NC BYTE A19/NC VPP CE #WP OE RP WE RB
VCC 27 46

37

29 31 33 35 38 40 42 44 30 32 34 36 39 41 43 45 47 13 14 12 15

DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 DATA8 DATA9 DATA10 DATA11 DATA12 DATA13 DATA14 DATA15 R175 0R0 R176 #RESET 0R0

29F800 Micron

ADR1 ADR2 ADR3 ADR4 ADR5 ADR6 ADR7 ADR8 ADR9 ADR10 ADR11 ADR12 ADR13 ADR14 ADR15 ADR16 ADR17 ADR18 ADR19 ADR20 #ROMCEH #OE #WE #CEH #OE #WE

25 24 23 22 21 20 19 18 8 7 6 5 4 3 2 1 48 17 16 9 26 28 11

U7 A0 DQ0 A1 DQ1 A2 DQ2 A3 DQ3 A4 DQ4 A5 DQ5 A6 DQ6 A7 DQ7 A8 A9 DQ8 A10 DQ9 A11 DQ10 A12 DQ11 A13 DQ12 A14 DQ13 A15 DQ14 A16 DQ15/A-1 A17 A18/NC BYTE A19/NC VPP CE #WP OE RP WE RB
VCC VSS VSS

37

29 31 33 35 38 40 42 44 30 32 34 36 39 41 43 45 47 13 14 12 15

DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 DATA8 DATA9 DATA10 DATA11 DATA12 DATA13 DATA14 DATA15 R177 NS R178 #RESET NS

NS
27 46

#RESET

STI5505 - FLASH ROM Memory

INSTALL W HEN EPLD NOT USED R208 0R0

VCC DATA[0..15] ADR[1..20] DATA[0..15] ADR[1..20]
DATA8 DATA9 DATA10 DATA11 DATA12 DATA13 DATA14 DATA15 DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7

J4 NS VCC3
1 2 3 4 5 6

VCC R51 NS

VCC R53 NS #FPINT FEINT

52 50 49 42 41 40 39 37

36 35 33 32 30 29 28 27

5 26 38 51 57 88 98

VCC 48 TCK 83 TDO 45 TDI 47 TMS 76 DA0 74 DA1 72 DA2 TCK TDO TDI TMS DA0 DA1 DA2 #FERESET

VCC R52 NS-10K R165 NS-10K R154 NS-1K

U10 ADR1 ADR2 ADR3 ADR19 ADR20 #FERESET PPCCLK #CE1 #CE3 R/W #OE #READY INT #FERESET PPCCLK #CE1 #CE3 R/W #OE #READY INT 8 9 10 11 12 99 22 4 6 1 3 25 23 2 7 PARA_REQ PARA_SYNC PARA_STR R54 75R 65 PARA_REQ PARA_SYNC 63 64 PARA_STR PARA_DATA0 PARA_DATA1 PARA_DATA2 PARA_DATA3 PARA_DATA4 PARA_DATA5 PARA_DATA6 PARA_DATA7 61 60 59 58 56 55 54 53 ADR1 ADR2 ADR3 ADR19 ADR20 #RESET CLK #CE1 #CE3 R/W #OE READY INT NC/SCL NC/SDA

DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7

DATA8 DATA9 DATA10 DATA11 DATA12 DATA13 DATA14 DATA15

VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3

R153 NS-1K

1 37 38 23 25 21 29 27 32 34 31 R157 NS-100R R158 C149 NS-10K NS-100pF 39 28 2 19 22 24

#CS0ATAPI #CS1ATAPI
ATAPI Interface Controlle for STI5505 REV r 1

70 71

#CS0ATAPI #CS1ATAPI #IOW #IOR DMAREQ #DMAACK IORDY #IOCS16 #FPINT #ROMCEL #ROMCEH R155 NS-5K6

PARA_REQ PARA_SYNC PARA_STR PARA_DATA0 PARA_DATA1 PARA_DATA2 PARA_DATA3 PARA_DATA4 PARA_DATA5 PARA_DATA6 PARA_DATA7

DD8 DD9 DD10 DD11 DD12 DD13 DD14 DD15

68 #IOW 67 #IOR 77 DMARQ 66 #DMACK 14 IORDY 13 #IOCS16 20 FPINT 18 FEINT 16 #ROMCEL 17 #ROMCEH 15 ROMSIZE
GND GND GND GND GND GND GND GND

J5 35 RESET HA0 33 HA1 36 CS0 HA2 CS1 17 HD0 15 IOW HD1 13 IOR HD2 11 HD3 9 DMARQ HD4 7 DMACK HD5 5 HD6 3 IOCHRDY HD7 HIO16 4 PDIAG HD8 6 HD9 8 INTRQ HD10 10 HD11 12 DASP HD12 14 HD13 16 CSEL HD14 18 HD15 GND GND GND GND 40 GND 30 GND 26 GND NS Shrouded
KEY

DA0 DA1 DA2 DD0 DD1 DD2 DD3 DD4 DD5 DD6 DD7 DD8 DD9 DD10 DD11 DD12 DD13 DD14 DD15

C89 47pF

NS - XC9572XL-10
78 79 81 82 85 86 87 89 90 91 92 93 94 95 96 97 21 31 44 62 69 75 84 100 DD8 DD9 DD10 DD11 DD12 DD13 DD14 DD15

DD0 DD1 DD2 DD3 DD4 DD5 DD6 DD7

DD0 DD1 DD2 DD3 DD4 DD5 DD6 DD7

20

#ROMCEL #ROMCEH PARA_DATA[0..7] PARA_DATA[0..7] #CE1 R/W #OE #READY TP3 R55 TP4 TP5 TP6 NS NS-0R0 R56 DD[0..15]

VCC3

STI5505 - Front End Interface for ATAPI

ATAPI & GLUE ADR[1..20] DATA[0..15] #FERESET PPCCLK #CE1 #CE3 R/W #OE #READY INT ADR[1..20] DATA[0..15] #FERESET PPCCLK #CE1 #CE3 R/W #OE #READY INT ADR[1..20] DATA[0..15] #FERESET PPCCLK #CE1 #CE3 R/W #OE #READY INT {Value} TVM501 #FERESET SCL SDA OPEN CLOSE #SENSE #PUSH SCL SDA OPEN CLOSE #SENSE #PUSH #FERESET SCL SDA OPEN CLOSE #SENSE #PUSH FEINT {Value} VCC U19 1 C150 .1uF 3 4 C1C2+ 15 GND 2 V+ C1+ VCC 16 C151 .1uF C152 .1uF DB9 PINOUT (FEMALE) TXD : 2 RXD : 3 CTS : 7 RTS : 8 GND : 5 FEINT DATA BCLK FLAG SYNC B_DATA B_BCLK B_FLAG B_SYNC PARA_DATA2 PARA_DATA3 PARA_DATA4 PARA_DATA5 #ROMCEL #ROMCEH #FPINT FEINT #ROMCEL #ROMCEH #ROMCEL #ROMCEH PARA_DATA[0..7] PARA_REQ PARA_SYNC PARA_STR PARA_DATA[0..7] PARA_REQ PARA_SYNC PARA_STR PARA_DATA[0..7] PARA_REQ PARA_SYNC PARA_STR

FEINT

C153 .1uF TXD RTS RXD CTS 5 11 10 12 9 C2V6

C154 .1uF J9 TXD_B RTS_B RXD_B CTS_B 1 2 3 4 5 6 7 8 9 10 HEADER 5X2

14 TIN1 TOUT1 7 TIN2 TOUT2 13 ROUT1 RIN1 8 ROUT2 RIN2 MAX232

STI5505 - Front End Options

#FERESET BCLK FLAG

#FRESET BCLK FLAG J6 1 2 3 4 5 6 7 8 9 10 11 12 PICOFLEX12

VCC J7 1 2 3 4 5 6 7 8 9 10 PICOFLEX10

+8V

+12V VCC3

SYNC DATA FEINT

SYNC DATA FEINT

L4 22uH C107 47uF 16V C108 .1uF L5 22uH

VCC

SCL SDA

SCL SDA

C109 10pF

J8 in1 , in2, out1, out2 pin5, pin6, pin2, pin10 0, 0, 0, 0 (brake) 0, 1, 0, 1 (open) 1, 0, 1, 0 (close) 1, 1, 0, 0 (idle) * Tray motor must be in idl e state for push sense to operate 1 2 LOCKHEADER2 .1" C111 .1uF 10 9 8 7 R79 15R 1/4W +8V C110 .01uF OPEN CLOSE OPEN CLOSE 6 5 4 3 2 1 CLOSE R89 1K Q4 2N2222 D1 B120DI +12V C112 100uF 16V D2 6V8 VCC U11 OUT2 P2 VCC1 VCC2 IN2 IN1 V2 P1 OUT1 GND LB1641

close

open

R82 1K C114 .1uF R83 12K 1% R90 10K R80 10K 1%
8

R84 1K

3 2 7V

+ -

1

OPEN COLLECTOR

R86

0R0 #SENSE

U15A LM393

4

R87

0R0 #PUSH

R88 1K 5 6 R159 10K

U15B LM393 7 OPEN COLLECTOR

C113 .1uF

D3 1N4148

4

8

+ -

STI5505 - Front End TVM501/502 Interface

CONNECT TSOP18XX VCC-STANDBY JP14 JUMPER3

VCC-STANDBY J13 IR FP_DATA FP_CLK FP_STB IR FP_DATA FP_CLK FP_STB 1 2 3 4 5 6 HEADER6

STI5505 - Front Panel Connector

VCC Q1-1 J1 1 2 3 R160 4 5 6 7 C70 8 .1" Keyed 220uF 6V .1uF 220uF 6V .1uF 100uF 16V .1uF NS NS R152 10K C71 C72 C73 C76 C77 C84 C85 1 - VIN 2 - GND 3 - VOUT JP1 JUMPER NS R161 NS VCC-STANDBY VCC-STANDBY VCC3-STANDBY +12V -12V 2 1 7 Q1-2 8 4 3 5 6 NDS8934 NDS8934 DPAK TOP 2 TO-220 TOP VCC3

+12V

U17/2
GND

ANALOG +5V VO

+5V

IN STALL R160, R161 TO BYPASS FET POWER SWITCH

INSTALL TO-220 PACKAGE IF +5VA CURRENT DRAW IS OVER 150mA

VI

NS-7805 TO-220 U17/1 C147 .1uF
GND

ANALOG 5V VO C80 10uF 16V C81 .1uF

VI

SMT78M05 DPAK

+12V 13 123 C148 .1uF

U18 TMM DRIVE SUPPLY +8V
GND

VI

VO C74 10uF 16V C75 .1uF

SMT78M08

DGND U1 STi5505 VCC3 C1 1 .1uF C2 18 .1uF C3 34 .1uF C4 67 .1uF C5 75 .1uF C6 86 .1uF C7 95 .1uF C8 102 .1uF C9 110 .1uF 10uF ELCO 16V VCC3-PCM C20 22uF ELCO 16V VCC3-DENC VCC C22 22uF ELCO 16V NS 10uF ELCO 16V C23 8 .1uF 22uH C61 .1uF 208 .1uF C18 10uF ELCO 16V 184 .1uF C17 25 .1uF C31 U6, U7 & U16 Flash ROM VCC VCC-FLASH R5 C32 0R0 37 .1uF C33 37 VCC3 R6 L2 .1uF C34 14 .1uF U2 I2C EEPROM U13 PCM-DAC +5V L3 C62 10uF ELCO 16V GND VSS VCC-PCM VCC3 C24 171 .1uF C16 6 .1uF C30 10uF ELCO 16V 159 C28 .1uF C15 1 .1uF C29 44 .1uF .1uF C40 44 .1uF C47 98 .1uF C55 OSC1 Oscillator 10uF ELCO 16V U3 TC4S81F 14 .1uF VCC C64 .1uF C46 88 .1uF C53 .1uF C60 149 .1uF C14 139 .1uF C13 130 .1uF C12 25 .1uF U5 DRAM VCC3 38 25 .1uF C39 38 119 .1uF C11 6 .1uF C27 13 .1uF C38 25 .1uF C45 57 VCC3 C10 1 .1uF C26 7 .1uF C37 13 .1uF C44 51 VCC3 .1uF C52 16 C59 U4 DRAM VCC3 C25 1 .1uF C36 7 .1uF C43 38 .1uF C51 10uF ELCO 16V U8 SDRAM VCC3 C35 1 .1uF C42 26 .1uF C50 U9 SDRAM VCC3 C41 5 .1uF C49 8 .1uF C58 U10 EPLD VCC3 C48 3 .1uF C57 U12 PLL DIGITAL VCC C56

R164 0R0

AGND

ANALOG

MOUNTING HOLES MT1 MT2 MT3 MT4 MT5 MT6

OPTIONAL POR CHIP

VCC U14/2 3 MR VCC GNDRST 4 1

PROBE GND CONNECTIONS TP18 TP19 TP20 TP21 VCC

2

NS-TC1270

.1uF C54

10uF ELCO 16V

C63

CONNECT TO EXTERNAL JP10 SWITCH JUMPER

R3 10K 1 2 3 4

.1uF U14/1 MR RESET 8 7 6 5 R4 100K #POWERON_RESET

VCC RESET GND PFI NC PFO

L1

ADM707
VCC VDD VCC3 VDD3

22uH

C19 .1uF

22uH

C21 .1uF

GNDA

VSSA

STI5505 - Power Supply & Decoupling

DRAM 64/128MBit (2nd DATA[0..15] ADR[1..13] DATA[0..15] ADR[1..13] U4/2 ADR1 ADR2 ADR3 ADR4 ADR5 ADR6 ADR7 ADR8 ADR9 ADR10 ADR11 ADR12 ADR13 #RAS0 #CAS0 #CAS1 R/W #OE #RAS0 #CAS0 #CAS1 R/W #OE #RAS0 #CAS0 #CAS1 R/W #OE 19 20 21 22 23 24 27 28 29 30 31 32 33 14 38 37 13 36 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12/NC

part is optional)

DRAM 16MBit

U4/1 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 2 3 4 5 7 8 9 10 41 42 43 44 46 47 48 49 DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 DATA8 DATA9 DATA10 DATA11 DATA12 DATA13 DATA14 DATA15 ADR1 ADR2 ADR3 ADR4 ADR5 ADR6 ADR7 ADR8 ADR9 ADR10 #RAS0 #CAS0 #CAS1 R/W #OE 21 22 23 24 27 28 29 30 31 32 18 35 34 17 33 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 RAS CASL CASH WE OE DRAM 1Mx16 60ns 3.3V D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 2 3 4 5 7 8 9 10 41 42 43 44 46 47 48 49 DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 DATA8 DATA9 DATA10 DATA11 DATA12 DATA13 DATA14 DATA15

RAS CASL CASH WE OE DRAM 4Mx16 60ns 3.3V U5/2

U5/1 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 2 3 4 5 7 8 9 10 41 42 43 44 46 47 48 49 DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 DATA8 DATA9 DATA10 DATA11 DATA12 DATA13 DATA14 DATA15 ADR1 ADR2 ADR3 ADR4 ADR5 ADR6 ADR7 ADR8 ADR9 ADR10 #RAS1 #CAS0 #CAS1 R/W #OE 21 22 23 24 27 28 29 30 31 32 18 35 34 17 33 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 RAS CASL CASH WE OE DRAM 1Mx16 60ns 3.3V D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 2 3 4 5 7 8 9 10 41 42 43 44 46 47 48 49 DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 DATA8 DATA9 DATA10 DATA11 DATA12 DATA13 DATA14 DATA15

ADR1 ADR2 ADR3 ADR4 ADR5 ADR6 ADR7 ADR8 ADR9 ADR10 ADR11 ADR12 ADR13 #RAS1 #RAS1 #RAS1 #CAS0 #CAS1 R/W #OE

19 20 21 22 23 24 27 28 29 30 31 32 33 14 38 37 13 36

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12/NC RAS CASL CASH WE OE DRAM 4Mx16 60ns 3.3V

Overlap footprints of /1 and /2 parts

DRAM SUPPORT FOR 2x16M, 2x64M, OR 2x128M

STI5505 - System Memory (ST20)

INSTALL 'NS' RESISTOR S WITH 0R0 JUMPERS TO BYPASS VIDEO BUFFER CIRCUITRY

NS

R169 +5V

NS

R170 +5V

NS

R171 +5V

C115 .0033uF R94 825R 1%

R91 8R2 1%

C116 .1uF R95 825R 1%

C117 .0033uF

R92 8R2 1%

C118 .1uF R96 825R 1%

C119 .0033uF

R93 8R2 1%

C120 .1uF

R97 12R 1% C122 Q6 2N2907 GREEN L6 RED_OUT 2.7uH 100uF ELCO 16V R103 200R 1%

R98 12R 1% C123 Q7 2N2907 BLUE L7 GREEN_OUT 2.7uH 100uF ELCO 16V R106 200R 1%

R99 12R 1% Q8 2N2907

C121 RED

L8 2.7uH BLUE_OUT C129 390pF

100uF ELCO 16V R100 200R 1%

R101 2K2 1%

R102 75R 1%

C124 390pF

C125 390pF

R104 2K2 1%

R105 75R 1%

C126 390pF

C127 390pF

R107 2K2 1%

R108 75R 1%

C128 390pF

NS

R172 +5V

NS

R173 +5V

NS

R174 +5V

C130 .0033uF R112 825R 1%

R109 8R2 1%

C131 .1uF R113 825R 1%

C132 .0033uF

R110 8R2 1%

C133 .1uF R114 825R 1%

C134 .0033uF

R111 8R2 1%

C135 .1uF

R115 12R 1% C137 Q9 2N2907 LUMA L9 CHROMA_OUT 2.7uH 100uF ELCO 16V R121 200R 1%

R116 12R 1% C138 Q10 2N2907 CVBS L10 LUMA_OUT 2.7uH 100uF ELCO 16V R124 200R 1%

R117 12R 1% Q11 2N2907

CHROMA

C136

L11 2.7uH

100uF ELCO 16V R118 200R 1%

CVBS_OUT

R119 2K2 1%

R120 75R 1%

C139 390pF

C140 390pF

R122 2K2 1%

R123 75R 1%

C141 390pF

C142 390pF

R125 2K2 1%

R126 75R 1%

C143 390pF

C144 390pF

STI5505 - Video Filters

DECMEM MA[0..11] MD[0..15] SDCLK #SDCS0 #SDCS1 #SDRAS #SDCAS #SDWE DQML DQMU MA[0..11] MD[0..15]

STi5505 MA[0..11] MD[0..15] SDCLK #SDCS0 #SDCS1 #SDRAS #SDCAS #SDWE DQML DQMU ADR[1..20] DATA[0..15] #RAS0 #RAS1 #CAS0 #CAS1 R/W #OE #WE ADR[1..20] DATA[0..15]

SYSMEM ADR[1..13] DATA[0..15] #RAS0 #RAS1 #CAS0 #CAS1 R/W #OE

FLASHROM ADR[1..20] DATA[0..15]

FRONTPANEL #CE3 #CE3 #OE #WE #RESET

#ROMCEL #ROMCEH

IR FP_DATA FP_CLK FP_STB

IR FP_DATA FP_CLK FP_STB

#RESET

BACKPANEL #BPRESET SPDIF PCMCLK SCLK LRCLK SDATA0 SDATA1 SDATA2 SCLK LRCLK SDATA0 SDATA1 SDATA2 PPCCLK #CE1 FRONTEND & GLUE ADR[1..20] DATA[0..15] PPCCLK #CE1 #CE3 R/W #OE #READY PARA_DATA[0..7] PARA_DATA[0..7] PARA_REQ PARA_SYNC PARA_STR #FERESET INT OPEN CLOSE #SENSE #PUSH RTS CTS TXD RXD SCL SDA SR0 FS0 FS1 POWER PCMCLK PIXCLK AUDCLK PIXCLK AUDCLK #POWERON_RESET #POWERON_RESET #ROMCEL #ROMCEH #BPRESET SPDIF

RED GREEN BLUE CHROMA LUMA CVBS BPPIO0 BPPIO1 BPPIO2 BPPIO3 SCL SDA

RED GREEN BLUE CHROMA LUMA CVBS BPPIO0 BPPIO1 BPPIO2 BPPIO3 SCL SDA

#READY PARA_DATA[0..7] PARA_REQ PARA_SYNC PARA_STR #FERESET INT OPEN CLOSE #SENSE #PUSH RTS CTS TXD RXD

EXTPLL #BPRESET I2C Add.: I2C EEPROM 0xA0 TVM501 0x30 ... SR0 FS0 FS1

STI5505 - Overview of Decoder Board