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AN1094 Application note
Solution for off-line SMPS using VIPer100-E
Introduction
The present board prototype is a wide-range input off-line 50 W single switch Flyback, working at 100 kHz. It is based on a new off-line smart switcher: the VIPer100-E. The VIPer100-E is a current mode PWM with a 620 V / 2.5 power switch, able to withstand an avalanche current during normal operation. The start-up of the circuit is done with an internal high voltage current source, which is switched off during steady state. It also includes a regulation function designed to minimize the pin count, while maintaining design flexibility. Figure 2 presents the internal block diagram of this monolithic device. Such a device can be easily used in any off-line flyback SMPS, with a 100 W power capability for a single input voltage range, or 50 W with a wide input range. This stand-alone off-line Smart Switcher concept provides a cost effective solution for SMPS for many applications such as VCRs, TV sets, satellite receivers or decoders. The benefits for the customer are a simpler design phase and a reduced overall components count due to the optimization of the product configuration. Figure 1. Standard evaluation board VIPerKITBD

October 2007

Rev 2

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www.st.com

Contents

AN1094

Contents
1 VIPer100-E major features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 VIPer100-E pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2

Board features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 2.2 Feedback loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Special operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

3 4 5

Schematics and board layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 BOM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

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AN1094

VIPer100-E major features

1

VIPer100-E major features


Adjustable Switching Frequency up to 200 kHz Optimized for current mode control topology Inherent feedforward compensation Soft-start and enable functions Overcurrent protection Overtemperature protection Overvoltage protection Undervoltage lock-out with hysteresis Low standby current Integrated start-up supply Automatic burst mode operation in standby condition Internally trimmed BANDGAP reference Block diagram
OSC

Figure 2.

ON/OFF OSCILLATOR SECURITY LATCH
VDD

PWM LATCH

UVLO LOGIC

R/S

FF S

0.5 V ERROR _ AMPLIFIER +

let so b
13 V

COMP

SOURCE

3/9

FC00231

P e

od r
+ _

ct u

OVERTEMP. DETECTOR

)(s

Q

b O

S R1 FF Q R2 R3

ol s

eP et

uc d ro

DRAIN

1.7 µ s DELAY

250 ns BLANKING

0.5V _ + + _

1 V/A

CURRENT AMPLIFIER

4.5 V

Board features

AN1094

1.1

VIPer100-E pin description


VDD: this is the low level supply pin of the device. At start-up, it delivers 2 mA of charging current. It is also connected to the inverted input of the error amplifier. Osc: to be connected to an external R-C network to fix the switching frequency. Comp: the control pin of the device. Its voltage sets the peak current of the power switch, and it is the output of the error amplifier. As this amplifier is transconductance, the compensation network on that pin is simply grounded. Drain & source: the two power pins of the device. The source is also the ground reference of the device for compensation and oscillation networks.



2

Board features


AC input voltage: 90 ~ 265 Vac maximum output power: 50 W DC output voltage / load: Vout = + 12 V, 4 A Operating frequency: 100 kHz Par. 3 gives the complete schematics of this off-line flyback converter.

2.1

Feedback loop
This evaluation board allows the user to choose between primary and secondary regulation. Primary regulation is done through the primary auxiliary winding which delivers the low level supply voltage on the Vdd pin of the device. This voltage represents also the secondary output voltage, if correctly filtered in order to avoid the spikes at the beginning of each off phase. This mode of running is achieved by putting one strap on JP1 in the "P" position. Secondary regulation is made with an optocoupler directly from secondary output voltage. It acts on the "COMP" pin, and the auxiliary winding is delivering the low level supply voltage at a lower value than when in primary regulation configuration, thanks to R6. The internal error amplifier is consequently saturated in high state, sourcing a constant current of about 0.5 mA on the "COMP" pin. To address this configuration, just put two straps on JP1 in the "S" position. In any case, a strap in "G" position must be always present.

2.2

Special operations
No limitation has been set on the VIPer device. This limitation can be implemented on the "COMP" pin with a zener or a Vbe multiplier, or whatever else able to clamp the voltage on this pin at about 3 V. When the voltage is clamped, the evaluation board is able to deliver up to 130 W of power, in continuous running. This operation must not last for more than 5 seconds. The evaluation board is fully protected against short circuits. This type of condition leads to a burst operation, with peak current of up to 25 A on the output. As the burst duty cycle is rather low, no risk exists and this situation can continue indefinitely. The board withstands the no-load condition. Notice that in primary regulation, the output voltage rises at about 20 V. Secondary regulation provides better behavior by maintaining the output voltage at about 12 V, and has also the lowest consumption on the main lines: less than 1 watt on a 325 VDC input voltage.

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AN1094

Schematics and board layout

3

Schematics and board layout
Figure 3. Printed board - copper side (scale 1:1)

ro P
Figure 4. Printed board - components side (scale 1:1)

ct du

ete

ro P

uc d

s) t(

Ob -

5/9

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Figure 5.

t
L1 INDUCTOR D1 +

F1

Schematics and board layout

J1 L2 R1 3.9k

1.6A

Pr e

1 2 R2 600V, 1A D3 C3 100nF 400V D2 DIODE 3.9k

CON2 B82731-R2801-A30 SIEMENS L4 INDUCTOR

R3

C1 100nF 400V

33

D5 BZX55C11V BYW81P150 R4 2k J2 POT1 1k 1 2

Board schematics

C7 22uF 16V 13V COMP SOURCE

du o
C2 100uF 400V L5 10543330-P1 OREGA D4 DIODE ZENER

t(s c
R5 4.7 R6 10 D7

C4 1000uF 16V

C5 1000uF 16V

CON2 D6 LED

P S G
3 DRAIN C6 1nF 1kV

1N4448

-O )
2

R7 3.9k VDD

U1 VIPer100-E

S
JP1 JUMPER

1 OSC

+

so b
5 4 R8 5.1k C10 100nF

C8 4.7n

te le

C9 4.7nF

ISO1 4N25

od Pr

AN1094

AN1094

BOM

4

BOM
Table 1.
Device C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 D1 D2 D3 D4 D5 D6 D7 F1 ISO1 J1 J2 L1 L2 L4 POT1 R1 R2 R3 R4 R5 R6

Bill of material
Pitch (mm) 15 10 15 5 5 7.5 2 5 5 5 8x5 9 5 9 7 4 7 23 5x8 5 5 5 (*) 5 4+3 10 10 7.5 10 10 10 Type 0.1 µF 400 V 100 µF 400 V 0.1 µF 400 V 1000 µF 16 V 1000 µF 16 V 1 nF 400 V 22 µF 16 V 4.7 nF 4.7 nF 100 nF 1 A/600 V BYT11-400 BYW81/100 BZW50-180 BZX55C10 GREEN LED 1N4448 2 A FUSE 4N25 2contacts screw PCB connector 2contacts screw PCB connector 100 µH inductor B82731-R2801-A30 100 µH inductor 1 k POT 3.9 k 3.9 k 33 NTC 2 k 4.7 k 10 1 A rated
(1)

Description Film Electrolytic, high voltage, high temp Film Electrolytic, low ESR Electrolytic, low ESR Ceramic high voltage - classY Electrolytic Film, WYMA Ceramic Ceramic DIL diodes bridge

Zener

1 A rated 3/4 turn, horizontal, miniature 0.25 W 0.25 W LCC 0.25 W 0.25 W 0.25 W

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Revision history Table 1.
Device R7 R8 L5

AN1094 Bill of material (continued)
Pitch (mm) 10 10 (*) Type 3.9 k 5.1 k OREGA 10543330-PI Description 0.25 W 0.25 W
(2)

1. L2 is a SIEMENS MATSUSHITA component. 2. L5 was specially developed by OREGA (THOMSON TELEVISION COMPONENT FRANCE) for this evaluation board.

5

Revision history
Table 2.
Date 04-Jan-2005 25-Oct-2007

Document revision history
Revision 1 2 Initial release ­ Document reformatted no content change ­ VIPer100 replaced by VIPer100-E Changes

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AN1094

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