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5

4

3

2

1

Schematics Page Index (Title / Revision / Change Date)
Page 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 Title of Schematics Page Schematics Page Index Block Diagram ARD (DMI,PEG,FDI) ARD (CLK,MISC,JTAG) ARD (DDR3) ARD (POWER) ARD (GRAPHICS POWER) ARD (GND) ARD (RESERVED) PCH (HDA,JTAG,SAT) PCH (PCI-E,SMBUS,CLK) PCH (DMI,FDI,GPIO) PCH (LVDS,DDI) PCH (PCI,USB,NVRAM) PCH (GPIO,VSS_NCTF,RSVD) PCH (POWER) 1/2 PCH (POWER) 2/2 PCH (VSS) CLOCK GEN DDRIII(SO-DIMM_0) 1/3 DDRIII(SO-DIMM_1) 2/3 VGA (PCI-E) 1/6 VGA (Strap) 2/6 VGA (I/O) 3/6 VGA (Memory BUS) 4/6 VGA (LVDS) 5/6 VGA (Power) 6/6 VRAM(DDR3)# 1/4 VRAM(DDR3)# 2/4 VRAM(DDR3)# 3/4 VRAM(DDR3)# 4/4 VRAM(BYPASS) 1/2 VRAM(BYPASS) 2/2 CRT LVDS Inverter CONNECTOR LVDS CONNECTOR HDMI EC+KBC (NPCE783L) KB Connector SPI Flash ROM Debug Port Rev. SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA Page 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 Title of Schematics Page Express Card Mini-PCIE Card (WLAN) LAN (88E8057) 1/2 LAN (Transformer) 2/2 SATA HDD SATA CD-ROM eSATA COMBO PCIE (MS) 1/2 PCIE (SD) 1/2 Camera Connector Bluetooth Connector Felica Connector Status LED & LID FAN Touch Pad Thermal Sensor Switch DB Conn. AUDIO SPEAKER CONNECTOR Audio/USB DB Conn. Switch (Botton & KB LED) Audio (CODEC) Audio (MUTE) Audio (Power) Audio (Audio & USB Conn.) Audio (Head Phone Jack) Audio (Ext MIC Jack) Audio (USB Port) Power Design Diagram DCIN&Charger Discharge Circuit Identify IC SYS Power (+3_3V/+5V) VTT&PCH Power(+1_1/1_05V) DDR3 Power(+1_5V/+0_75V) SYS Power(+1_8V) CPU Power_VHCORE CPU Power_VID VGA Power(ATI_VDD) Others power plane OVP protection HOLE & AMI LABEL History(1) 1P-0099J00-80SB 1P-1099J00-80SB 1P-1099J01-80SB PCB P/N: 1P-0099500-80SB 1P-1099500-80SB 1P-1099501-80SB Rev. Page Title of Schematics Page SA 85 History(2) SA 86 History(3) SA 87 History(4) SA 88 History(5) SA 89 History(6) SA 90 History(7) SA 91 History(8) SA 92 History(9) SA 93 History(10) SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA SA (IRIS MB) (IRIS AUDIO) (IRIS PWR) P. Leader Check by (HANNSTAR MB) (HANNSTAR Audio) (HANNSTAR PWR) Rev. SA SA SA SA SA SA SA SA SA

D

D

C

C

B

B

Project Code & Schematics Subject: M960&M970 H Model

Design by
A

A

FOXCONN
Title

HON HAI Precision Ind. Co., Ltd. CCPBG - R&D Division
Rev

Index Page
Document Number

Size A3 Date:
5 4 3 2

M960&M970 H Model
Thursday, December 24, 2009
1

SA
1 of 86

Sheet

1

2

3

4

5

6

7

8

M960&M970 H Model Calpella Platform+ AMD Madison/Park Discrete Graphic+ VRAM*8
A

Arrandale Processor
HDMI
Page 38

800/1066 MHZ

SO-DIMM 0 800/1066 MHZ DDR(III) 204 pin
Page 20

CK505 SL28748CLC
Page 19

X,TAL 14.318MHZ

CHARGER BQ24753A
INPUTS DC_IN BATTERY OUTPUTS DCBATOUT

A

TMDS LVDS CRT

GFX
AMD Madison-LP M2 Park-XT M2
29mm X 29mm
Page 22~27

PCIE X16

LVDS
WSXGA

Micro-FCPGA-989 (989-pin rPGA socket) 37.5 mm X 37.5 mm
Page 3~9

800/1066 MHZ

Page 37

SO-DIMM 1 800/1066 MHZ DDR(III) 204 pin
Page 21

SYSTEM DC/DC
SN0608098
INPUTS OUTPUTS +3VALW +5VALW +5VALW_LDO
+12V For Load

CRTPage 34

DCBATOUT DMI X4

B

Camera Module CAM(0.3M)
Page 52

Madison DDR3 1GB(1Gbx8pcs) Park DDR3 512MB(1Gbx4pcs)
Page 28~33

DDR3 VRAM

SYSTEM DC/DC
4 PCIE USB Ethernet GbE 88E8059 Page 45 Marvell 10/100/1000 Ricoh R5U231 CardReader SATA 3Gb/s SATA 3Gb/s SPI SATA 3Gb/s LPC
Page 50

TPS51218+G2998

B

Digital Mic

PCH Ibex Peak-M (HM55)
HDA 3 676 mBGA 25 mm X 27 mm (USB x 12) (PCIE x 8) (SATA x 4)
Page 10~18

4

Transformer LANKom Page 46 LG-2413S-1 MS Duo(HG) SD Card
Page 51

INPUTS RJ45

OUTPUTS +1_5VSUS DCBATOUT +0_75VRUN

SYSTEM DC/DC
TPS51218
INPUTS DCBATOUT OUTPUTS +1_05V_VTT

Int. Speaker
1.0 Walt x 2 Page 60

Realtek ALC269
w/ Class D Amp. Page 63

SATA HDD Page 47 SATA ODD Page 48

USB2.0

ExpressCard 34mm Page 43 Mini-PCIE Card (WLAN) Page 44 Bluetooth
Page 53

CPU DC/DC
MAX17030
INPUTS OUTPUTS

Ext. Mic In Jack
Page 68
C

Pre-AMP

DCBATOUT VHCORE Flash BIOS 32M bit X 1
Page 10
C

Headphone Jack
Page 67

USB 2.0 CONN.X3

Felica
Page 69

SYSTEM DC/DC TPS51217

Audio/USB DB

Page 63~69

Page 54

USB 2.0 / eSATA Combo CONN.
Page 49

Winbond NPCE783L
LQFP-128
Page 39

INPUTS OUTPUTS DCBATOUT VDD CORE

PWM/TACH GPIO SPI 35001 Bus SMBus 2
D

PS/2 SMBus 1
D

FAN
Page 56

Lid Switch
Page 55

Flash BIOS 1M bit x1
Page 41

BATT ID
Page 73

BATT CONN
Page 71

Thermal Sensor W83L771AWG (VGA) Page 58

Touch PAD
Page 57

Switch DB
Page 59

Title

FOXCONN
7

HON HAI Precision Ind. Co., Ltd. CCPBG - R&D Division
Rev

Block Diagram M960&M970 H Model
Thursday, December 24, 2009 Sheet
8

Size Document Number Custom Date:
1 2 3 4 5 6

SA
2 of 86

1

2

3

4

5

6

7

8

A

A

U67A 12 DMI_TXN[3:0] DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3 DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3 DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3

A24 C23 B22 A21 B24 D23 B23 A22 D24 G24 F23 H23 D25 F24 E23 G23

DMI_RX#[0] DMI_RX#[1] DMI_RX#[2] DMI_RX#[3] DMI_RX[0] DMI_RX[1] DMI_RX[2] DMI_RX[3] DMI_TX#[0] DMI_TX#[1] DMI_TX#[2] DMI_TX#[3] DMI_TX[0] DMI_TX[1] DMI_TX[2] DMI_TX[3]

PEG_ICOMPI PEG_ICOMPO PEG_RCOMPO PEG_RBIAS PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8] PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15] PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8] PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15] PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9] PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15] PEG_TX[0] PEG_TX[1] PEG_TX[2] PEG_TX[3] PEG_TX[4] PEG_TX[5] PEG_TX[6] PEG_TX[7] PEG_TX[8] PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

B26 A26 B27 A25 K35 J34 J33 G35 G32 F34 F31 D35 E33 C33 D32 B32 C31 B28 B30 A31 J35 H34 H33 F35 G33 E34 F32 D34 F33 B33 D31 A32 C30 A28 B29 A30 L33 M35 M33 M30 L31 K32 M29 J31 K29 H30 H29 F29 E28 D29 D27 C26 L34 M34 M32 L30 M31 K31 M28 H31 K28 G30 G29 F28 E27 D28 C27 C25

PEG_COMP R361 1 49.9_F PEG_RBIAS R848 1 750_F PEG_RXN15 PEG_RXN14 PEG_RXN13 PEG_RXN12 PEG_RXN11 PEG_RXN10 PEG_RXN9 PEG_RXN8 PEG_RXN7 PEG_RXN6 PEG_RXN5 PEG_RXN4 PEG_RXN3 PEG_RXN2 PEG_RXN1 PEG_RXN0 PEG_RXP15 PEG_RXP14 PEG_RXP13 PEG_RXP12 PEG_RXP11 PEG_RXP10 PEG_RXP9 PEG_RXP8 PEG_RXP7 PEG_RXP6 PEG_RXP5 PEG_RXP4 PEG_RXP3 PEG_RXP2 PEG_RXP1 PEG_RXP0 PEG_TXN15 PEG_TXN14 PEG_TXN13 PEG_TXN12 PEG_TXN11 PEG_TXN10 PEG_TXN9 PEG_TXN8 PEG_TXN7 PEG_TXN6 PEG_TXN5 PEG_TXN4 PEG_TXN3 PEG_TXN2 PEG_TXN1 PEG_TXN0 PEG_TXP15 PEG_TXP14 PEG_TXP13 PEG_TXP12 PEG_TXP11 PEG_TXP10 PEG_TXP9 PEG_TXP8 PEG_TXP7 PEG_TXP6 PEG_TXP5 PEG_TXP4 PEG_TXP3 PEG_TXP2 PEG_TXP1 PEG_TXP0

2 0402 2 0402 PEG_RXN[15..0] 22

12

DMI_TXP[3:0]

If PCIe Graphics is not implemented, the TX/RX pairs can be left as No Connect.
PEG_RXN_C[15..0] PEG_TXN0 PEG_TXN1 C591 PEG_TXN2 PEG_TXN3 C595 PEG_TXN4 C597 C600 PEG_TXN6 PEG_TXN7 C604 PEG_TXN8 PEG_TXN9 C611 PEG_TXN10 C615 PEG_TXN11 C617 PEG_TXN12 C659 PEG_TXN13 C627 PEG_TXN14 C631 PEG_TXN15 C641 C607 C603 PEG_TXN5 C594 C589 22

DMI DMI

12 DMI_RXN[3:0]

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

2 0.1U_6.3V_K 2 0.1U_6.3V_K 2 0.1U_6.3V_K 2 0.1U_6.3V_K 2 0.1U_6.3V_K 2 0.1U_6.3V_K 2 0.1U_6.3V_K 2 0.1U_6.3V_K 2 0.1U_6.3V_K 2 0.1U_6.3V_K 2 0.1U_6.3V_K 2 0.1U_6.3V_K 2 0.1U_6.3V_K 2 0.1U_6.3V_K 2 0.1U_6.3V_K 2 0.1U_6.3V_K

0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R

PEG_RXN_C0 PEG_RXN_C1 PEG_RXN_C2 PEG_RXN_C3 PEG_RXN_C4 PEG_RXN_C5 PEG_RXN_C6 PEG_RXN_C7 PEG_RXN_C8 PEG_RXN_C9 PEG_RXN_C10 PEG_RXN_C11 PEG_RXN_C12 PEG_RXN_C13 PEG_RXN_C14 PEG_RXN_C15
B

12 DMI_RXP[3:0]

PEG_RXP[15..0] 22

B

D22 C21 D20 C18 G22 E20 F20 G19
R1602 R1600 R1601 R1614 R1603

FDI_TX[0] FDI_TX[1] FDI_TX[2] FDI_TX[3] FDI_TX[4] FDI_TX[5] FDI_TX[6] FDI_TX[7] FDI_FSYNC[0] FDI_FSYNC[1] FDI_INT FDI_LSYNC[0] FDI_LSYNC[1]

1 1K_J 1 1K_J 1 1K_J 1 1K_J 1 1K_J

2 2 2 2 2

0402 0402 0402 0402 0402

FDI_FSYNC0 FDI_FSYNC1 FDI_INT FDI_LSYNC0 FDI_LSYNC1

F17 E17 C17 F18 D17

PCI EXPRESS -- GRAPHICS

E22 D21 D19 D18 G21 E19 F21 G18

FDI_TX#[0] FDI_TX#[1] FDI_TX#[2] FDI_TX#[3] FDI_TX#[4] FDI_TX#[5] FDI_TX#[6] FDI_TX#[7]

Intel(R) FDI Intel(R) FDI

PEG_RXP_C[15..0] 22 PEG_TXP0 PEG_TXP1 C590 PEG_TXP2 PEG_TXP3 C593 PEG_TXP4 PEG_TXP5 C598 PEG_TXP6 PEG_TXP7 C602 PEG_TXP8 PEG_TXP9 C608 PEG_TXP10 C612 PEG_TXP11 C616 PEG_TXP12 C61 PEG_TXP13 C65 PEG_TXP14 C628 PEG_TXP15 C642 C605 C601 C596 C592

C588

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

2 0.1U_6.3V_K 2 0.1U_6.3V_K 2 0.1U_6.3V_K 2 0.1U_6.3V_K 2 0.1U_6.3V_K 2 0.1U_6.3V_K 2 0.1U_6.3V_K 2 0.1U_6.3V_K 2 0.1U_6.3V_K 2 0.1U_6.3V_K 2 0.1U_6.3V_K 2 0.1U_6.3V_K 2 0.1U_6.3V_K 2 0.1U_6.3V_K 2 0.1U_6.3V_K 2 0.1U_6.3V_K

0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R

PEG_RXP_C0 PEG_RXP_C1 PEG_RXP_C2 PEG_RXP_C3 PEG_RXP_C4 PEG_RXP_C5 PEG_RXP_C6 PEG_RXP_C7 PEG_RXP_C8 PEG_RXP_C9 PEG_RXP_C10 PEG_RXP_C11 PEG_RXP_C12 PEG_RXP_C13 PEG_RXP_C14 PEG_RXP_C15
C

C

FDI_FSYNC[0], FDI_FSYNC[1], FDI_LSYNC[0], FDI_LSYNC[1] can be ganged together with one resistor

CPU SOCKET_989P FOX_PZ98927-3641-01F

D

For Disable Arrandale Graphic In addition, FDI_RXN_[7:0] and FDI_RXP_[7:0] can be left floating on the PCH. FDI_TX[7:0] and FDI_TX#[7:0] can be left floating on the Arrandale. The GFX_IMON,FDI_FSYNC[0], FDI_FSYNC[1], FDI_LSYNC[0], FDI_LSYNC[1], and FDI_INT signals on the Arrandale side should be tied to GND (through 1-k ±5% resistors). FDI_FSYNC[0], FDI_FSYNC[1], FDI_LSYNC[0], FDI_LSYNC[1] can be ganged together with one resistor.

D

FOXCONN
Title Size A3 Date: Document Number
4 5 6 7

HON HAI Precision Ind. Co., Ltd. CCPBG - R&D Division
Rev

ARD (DMI,PEG,FDI) M960&M970 H Model
Tuesday, December 29, 2009 Sheet 3
8

SA
of 86

1

2

3

5

4

3

2

1

R851 1 49.9_F R852 1 49.9_F 20MIL TP60

2 0402 2 0402 1

COMP1 COMP0 SKTOCC# H_CATERR#

CLOCKS

G16 AT26 AH24 AK14

COMP1 COMP0 SKTOCC# CATERR#

BCLK_ITP BCLK_ITP# PEG_CLK PEG_CLK# DPLL_REF_SSCLK DPLL_REF_SSCLK#

AR30 AT30 E16 D16 A18 A17

BCLK_ITP BCLK_ITP#

1 1

EVT
4 3 0404_4P2R

2

D

D 39 +1_05V_VTT OVT_EC#

CLK_DP_P_R CLK_DP_N_R

2 G

S 2N7002DW null

15

H_PECI

H_PECI

AT15

SM_DRAMRST# SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

1

PECI

DDR3 MISC

DVT
15,39 PM_THRMTRIP#

78

PROCHOT#

2

PROCHOT#

PM_EXT_TS#[0] PM_EXT_TS#[1]

AN15 AP15

PM_EXTTS#0 PM_EXTTS#1

2

PROCHOT#

AL1 AM1 AN1

SM_RCOMP0 R854 1 100_F SM_RCOMP1 R853 1 24.9_F SM_RCOMP2 R855 1 130_F

2 0402 2 0402 2 0402

R932 10K_J 0402

1

F6

DDR3_DRAMRST#_Q

R933 10K_J 0402 PM_EXTTS#0 20 PM_EXTTS#1 20,21

AN26

R939 1 0_J

2 0402 PM_THRMTRIP#_1

1

AK15

THERMTRIP#

PRDY# PREQ#
H_CPURST#_R
C

AP26 AL15 AN14 AN27

RESET_OBS# PM_SYNC VCCPWRGOOD_1 VCCPWRGOOD_0 SM_DRAMPWROK VTTPWRGOOD TAPPWRGOOD RSTIN#

12

H_PM_SYNC

H_PM_SYNC H_CPUPWRGD H_CPUPWRGD

JTAG & BPM

TCK TMS TRST# TDI TDO TDI_M TDO_M DBR# BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

1

1

AN25 XDP_DBRESET# AJ22 BPM#0 AK22 BPM#1 AK24 BPM#2 AJ24 BPM#3 AJ25 BPM#4 AH22 BPM#5 AK23 BPM#6 AH23 BPM#7 1 1 1 1 1 1 1 1

R1607 0_J 0402

1

MP
15 H_CPUPWRGD 12 PM_DRAM_PWRGD

AT29 AR27 AR29 AP29

XDP_TDI_R XDP_TDO_R XDP_TDI_M XDP_TDO_M

2

AN28 XDP_TCLK AP28 XDP_TMS AT27 XDP_TRST#

+3VRUN
C

R1292 NC_51_J 0402

2

AT28 XDP_PRDY# 1 AP27 XDP_PREQ#

TP75

20MIL

R1231 NC_12.4K_F 0402

R962 1 0_J

2 0402

DDR_ALERT# 58

CLK_DP_P_R CLK_DP_N_R R1608 0_J 0402

PM_DRAM_PWRGD AK13 VTTPWRGOOD

AM15 AM26 AL14

20MIL

TP94

1TAPPWRGOOD
BUF_PLT_RST#_R

TP64 TP65 TP66 TP67 TP68 TP69 TP70 TP71

20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL

2

14,39,42,43 BUF_PLT_RST#

1 R925
1.5K_F

2 1

For Disable Arrandale Graphic DPLL_REF_SSCLK and DPLL_REF_SSCLK# can be connected to GND on Arrandale directly if motherboard only supports discrete graphics.

0402

R926 750_F 0402

CPU SOCKET_989P FOX_PZ98927-3641-01F

+1_05V_VTT XDP_TDO_M
B

B

2

2

1

+3VRUN +3VRUN

XDP_TDO_R XDP_TMS XDP_TDI_R XDP_PREQ# XDP_TCLK XDP_TRST#

51_J 1 NC_51_J 1 NC_51_J 1 NC_51_J 1 NC_51_J 1 51_J 2

R1290 R1258 R1259 R1260 R1261 R1262

2 2 2 2 2 1

0402 0402 0402 0402 0402 0402 XDP_TDI_M

2

R969 0_J 0402

JTAG Mapping -Scan Chain (Default)
1 2
C13 0.1U_6.3V_K 0402_X5R

1

R14 10K_J 0402

For Intel S3 Power Reduction issue
R5948 1 NC_0_J 2 0402

+1_5VSUS

1

For Intel S3 Power Reduction issue
12,39,75,76,80 RUN_PWRGD +3VALW +1_5VRUN

U2 1 RUN_PWRGD

4VTTPW_R R1572 3
74AHC1G08GW

1 2K_F

2 0402 1

VTTPWRGOOD DDR3_DRAMRST#_Q

1

R1573 1K_F 0402

2

3

DDR3_DRAMRST#

2

2

Q72 2N7002W null S D G

0402 1K_J R5925 DDR3_DRAMRST# 20,21

2

5

A

1 2

2

1

2

H_CATERR#

2

0402 750_F R5927

3

0402

1.5K_F

2

1

R5950 NC_1.1K_F 0402 PM_DRAM_PWRGD

2

C6316 0.1U_6.3V_K 0402_X5R

1

2

R5926 1

4
RUN_PWRGD 12,39,75,76,80

2

U217 1

5

R5951 10K_J 0402

R970 1 NC_0_J 2 0402 +1_05V_VTT

R5949 100K_J 0402

C6317

1

1

2

1

1

2
0.047U_16V_K 0402_X7R

2

DVT
R861 49.9_F 0402 R936 NC_68_J 0402 15 RST_GATE

1

4

Layout Note: Comp0,1 connect with Zo=49.9 ohm, Comp2,3 connect with Zo=20 ohm, In order to minimize resistance, use thick traces to route all COMP signals, use 10-mils (0.254-mm) wide trace for routing less than 500 mils (12.7 mm), or 20-mils (0.508-mm) wide trace for routing between 500 mils (12.7 mm) and 1000 mils (25.4 mm). Keep 20-mils (0.508-mm) spacing to any other signals in order to minimize crosstalk.

+1_05V_VTT

+3VRUN U67B R849 1 20_F R850 1 20_F

1 1
R258 68_J 0402

2 0402 2 0402

COMP3 COMP2

AT23 AT24

COMP3 COMP2 BCLK BCLK#

A16 B16

ARD_BCLK ARD_BCLK#

CLK_EXP_P_R CLK_EXP_N_R

R1450 1 0_J R1451 1 NC_0_J R1452 1 NC_0_J R1453 1 0_J TP61 20MIL TP63 20MIL 0 1 2 RP80

2 2 2 2

0402 0402 0402 0402

CLK_PCH_CPU_CLK 15 CLK_CPU_BCLK 19 CLK_CPU_BCLK# 19 CLK_PCH_CPU_CLK# 15

R262 4.7K_J 0402 A0205

2 3
D

PROCHOT# Q14A
D

MISC MISC THERMAL THERMAL PWR MANAGEMENT

5 G

6

S 2N7002DW null

CLK_EXP_P 11 CLK_EXP_N 11

Q14B

A

DVT

74AHC1G08GW

FOXCONN
Title Size A3 Date:
3 2

HON HAI Precision Ind. Co., Ltd. CCPBG - R&D Division
Rev

ARD (CLK,MISC,JTAG)
Document Number

DVT
5

H_CPURST#_R
4

M960&M970 H Model
Tuesday, December 29, 2009
1

SA
4 of 86

Sheet

5

4

3

2

1

U67D U67C

21 M_B_DQ[63:0]

D

20 M_A_DQ[63:0]

C

B

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

A10 C10 C7 A7 B10 D10 E10 A8 D8 F10 E6 F7 E9 B7 E7 C6 H10 G8 K7 J8 G7 G10 J7 J10 L7 M6 M8 L9 L6 K8 N8 P9 AH5 AF5 AK6 AK7 AF6 AG5 AJ7 AJ6 AJ10 AJ9 AL10 AK12 AK8 AL7 AK11 AL8 AN8 AM10 AR11 AL11 AM9 AN9 AT11 AP12 AM12 AN12 AM13 AT14 AT12 AL13 AR14 AP14

SA_CK[0] SA_CK#[0] SA_CKE[0] SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

AA6 AA7 P7

M_CLK_DDR0 20 M_CLK_DDR#0 20 M_CKE0 20

SA_CK[1] SA_CK#[1] SA_CKE[1]

Y6 Y5 P6

M_CLK_DDR1 20 M_CLK_DDR#1 20 M_CKE1 20

SA_CS#[0] SA_CS#[1]

AE2 AE8

M_CS#0 20 M_CS#1 20

SA_ODT[0] SA_ODT[1]

AD8 AF9

M_ODT0 20 M_ODT1 20

SA_DM[0] SA_DM[1] SA_DM[2] SA_DM[3] SA_DM[4] SA_DM[5] SA_DM[6] SA_DM[7]

B9 D7 H7 M7 AG6 AM7 AN10 AN13

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DM[7:0] 20

DDR SYSTEM MEMORY A

M_A_DQS[7:0] 20

DDR SYSTEM MEMORY - B

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

C9 F8 J9 N9 AH7 AK9 AP11 AT13

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS#[7:0] 20

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

C8 F9 H9 M9 AH8 AK10 AN11 AR13

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

M_A_A[15:0] 20

20 20 20

M_A_BS0 M_A_BS1 M_A_BS2

AC3 AB2 U7

SA_BS[0] SA_BS[1] SA_BS[2]

20 20 20

M_A_CAS# M_A_RAS# M_A_WE#

AE1 AB3 AE9

SA_CAS# SA_RAS# SA_WE#

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8] SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

B5 A5 C3 B3 E4 A6 A4 C4 D1 D2 F2 F1 C2 F5 F3 G4 H6 G2 J6 J3 G1 G5 J2 J1 J5 K2 L3 M1 K5 K4 M4 N5 AF3 AG1 AJ3 AK1 AG4 AG3 AJ4 AH4 AK3 AK4 AM6 AN2 AK5 AK2 AM4 AM3 AP3 AN5 AT4 AN6 AN4 AN3 AT5 AT6 AN7 AP6 AP8 AT9 AT7 AP9 AR10 AT10

SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

SB_CK[0] SB_CK#[0] SB_CKE[0] SB_CK[1] SB_CK#[1] SB_CKE[1]

W8 W9 M3 V7 V6 M2

M_CLK_DDR2 21 M_CLK_DDR#2 21 M_CKE2 21 M_CLK_DDR3 21 M_CLK_DDR#3 21 M_CKE3 21

D

SB_CS#[0] SB_CS#[1]

AB8 AD6

M_CS#2 21 M_CS#3 21

SB_ODT[0] SB_ODT[1]

AC7 AD1

M_ODT2 21 M_ODT3 21

SB_DM[0] SB_DM[1] SB_DM[2] SB_DM[3] SB_DM[4] SB_DM[5] SB_DM[6] SB_DM[7]

D4 E1 H3 K1 AH1 AL2 AR4 AT8

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DM[7:0] 21

C

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

D5 F4 J4 L4 AH2 AL4 AR5 AR8

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS#[7:0] 21

M_B_DQS[7:0] 21

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

C5 E3 H4 M5 AG2 AL5 AP5 AR7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

B

M_B_A[15:0] 21

21 21 21 21 21 21

M_B_BS0 M_B_BS1 M_B_BS2 M_B_CAS# M_B_RAS# M_B_WE#

AB1 W5 R7 AC5 Y7 AC6

SB_BS[0] SB_BS[1] SB_BS[2] SB_CAS# SB_RAS# SB_WE#

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8] SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

A

CPU SOCKET_989P FOX_PZ98927-3641-01F CPU SOCKET_989P FOX_PZ98927-3641-01F

A

FOXCONN
Title

HON HAI Precision Ind. Co., Ltd. CCPBG - R&D Division
Rev

ARD (DDR3)
Document Number

Size A3 Date:
5 4 3 2

M960&M970 H Model
Tuesday, December 29, 2009
1

SA
5 of 86

Sheet

1

2

3

4

5

6

7

8

U67F

48A (SV)
VHCORE

VHCORE

18A (SV) (VTT)
AG35 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG27 AG26 AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27 AF26 AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AD26 AC35 AC34 AC33 AC32 AC31 AC30 AC29 AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26 Y35 Y34 Y33 Y32 Y31 Y30 Y29 Y28 Y27 Y26 V35 V34 V33 V32 V31 V30 V29 V28 V27 V26 U35 U34 U33 U32 U31 U30 U29 U28 U27 U26 R35 R34 R33 R32 R31 R30 R29 R28 R27 R26 P35 P34 P33 P32 P31 P30 P29 P28 P27 P26 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98 VCC99 VCC100 VTT0_1 VTT0_2 VTT0_3 VTT0_4 VTT0_5 VTT0_6 VTT0_7 VTT0_8 VTT0_9 VTT0_10 VTT0_11 VTT0_12 VTT0_13 VTT0_14 VTT0_15 VTT0_16 VTT0_17 VTT0_18 VTT0_19 VTT0_20 VTT0_21 VTT0_22 VTT0_23 VTT0_24 VTT0_25 VTT0_26 VTT0_27 VTT0_28 VTT0_29 VTT0_30 VTT0_31 VTT0_32 AH14 AH12 AH11 AH10 J14 J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11 1 1 1 1 C911 10U_10V_M 0805_X5R C912 10U_10V_M 0805_X5R C913 10U_10V_M 0805_X5R C914 10U_10V_M 0805_X5R 1 C915 10U_10V_M 0805_X5R

EVT
+1_05V_VTT

+1_05V_VTT

1

1

1

1

2

2

2

2

A

22U_6.3V_M 0805_X5R

22U_6.3V_M 0805_X5R

22U_6.3V_M 0805_X5R

22U_6.3V_M 0805_X5R

NC_22U_6.3V_M 0805_X5R

2

C509

C491

C510

C496

1

C502

A

2

2

2

2

2

1

1

VHCORE

C738 22U_6.3V_M 0805_X5R

C640 22U_6.3V_M 0805_X5R

1 2

C629 22U_6.3V_M 0805_X5R

2

1

1

1

C490 22U_6.3V_M 0805_X5R

C48 22U_6.3V_M 0805_X5R

C492 22U_6.3V_M 0805_X5R

C504 22U_6.3V_M 0805_X5R

C507 22U_6.3V_M 0805_X5R

2

2

2

2

2

2

2

2

VHCORE

C495 22U_6.3V_M 0805_X5R

C497 22U_6.3V_M 0805_X5R

C499

C503 22U_6.3V_M 0805_X5R

C505 NC_22U_6.3V_M 0805_X5R

NC_22U_6.3V_M 0805_X5R

1.1V RAIL POWER

1

1

1

1

2

2

2

2

2

1

VHCORE

18A (SV) (VTT) EVT

2

C916 10U_10V_M 0805_X5R

C917 10U_10V_M 0805_X5R

C918 NC_10U_10V_M 0805_X5R

1

C919 NC_10U_10V_M 0805_X5R

1

1

1

1

1

+1_05V_VTT

C508

1

NC_22U_6.3V_M 0805_X5R

2

2

2

2

2

C893 22U_6.3V_M 0805_X5R

1

B

C921 10U_10V_M 0805_X5R

C922 10U_10V_M 0805_X5R

C923 10U_10V_M 0805_X5R

C924 10U_10V_M 0805_X5R

VHCORE

VTT0_33 VTT0_34 VTT0_35 VTT0_36 VTT0_37 VTT0_38 VTT0_39 VTT0_40 VTT0_41 VTT0_42 VTT0_43 VTT0_44

AF10 AE10 AC10 AB10 Y10 W10 U10 T10 J12 J11 J16 J15

1

1

1

1

1

2

C506 22U_6.3V_M 0805_X5R

B

CPU CORE SUPPLY CPU CORE SUPPLY

2

2

+1_05V_VTT

+1_05V_VTT_43 +1_05V_VTT_44

R858 R859

1 0_J 1 0_J

2 0603 2 0603

1

1

1

1

2

2

2

2

VHCORE

2

C925 10U_10V_M 0805_X5R

C926 10U_10V_M 0805_X5R

C927 10U_10V_M 0805_X5R

C928 10U_10V_M 0805_X5R

1

C929 10U_10V_M 0805_X5R

POWER

2

2

2

2

2

C930 10U_10V_M 0805_X5R

C931 10U_10V_M 0805_X5R

C932 10U_10V_M 0805_X5R

C933 10U_10V_M 0805_X5R

C934 10U_10V_M 0805_X5R

PSI# VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6] PROC_DPRSLPVR

1

1

1

1

1

AN33 AK35 AK33 AK34 AL35 AL33 AM33 AM35 AM34 PM_DPRSLPVR

PSI# VID0 VID1 VID2 VID3 VID4 VID5 VID6

78,79 78,79 78,79 78,79 78,79 78,79 78,79 78,79

C

VHCORE

CPU VIDS

MP
C

For RF Noise
1 1 1 2 2 2 2 C935 10U_10V_M 0805_X5R C936 10U_10V_M 0805_X5R C5244 22P_50V_J 0402_NPO 1 C5245 22P_50V_J 0402_NPO

PM_DPRSLPVR 78,79

VTT_SELECT

G15

VTT_SELECT 1

TP1114 20MIL

VHCORE 1 R27 ISENSE AN35 IMVP_IMON 78 2 100_F 0402 VCCSENSE 78 VSSSENSE 78 1 VTT_SENSE VSS_SENSE_VTT B15 A15 VSS_SENSE_VTT 1 VTT_SENSE 75 TP178 20MIL 2 R19 100_F 0402

SENSE LINES

VCC_SENSE VSS_SENSE

AJ34 AJ35

VCCSENSE VSSSENSE

D

D

CPU SOCKET_989P FOX_PZ98927-3641-01F

FOXCONN
Title Size Document Number Custom Date:
4 5 6 7

HON HAI Precision Ind. Co., Ltd. CCPBG - R&D Division
Rev

ARD (POWER) M960&M970 H Model
Tuesday, December 29, 2009 Sheet 6
8

SA
of 86

1

2

3

1

2

3

4

5

6

7

8

For Disable Arrandale Graphic VAXG should be connected to GND when disable iGPU.
U67G
A

For Disable Arrandale Graphic VAXG_SENSE and VSSAXG_SENSE on Arrandale can be left as no connect.

A

- 1.5V RAILS

2

2

2

2

2

2

2

+1_05V_VTT

POWER

DDR3

2

2

18A (SV) (VTT)

EVT

C824 22U_6.3V_M 0805_X5R

C819 22U_6.3V_M 0805_X5R

J24 J23 H25

VTT1_45 VTT1_46 VTT1_47

+1_05V_VTT

1

1

18A (SV) (VTT)
VTT0_59 VTT0_60 VTT0_61 VTT0_62 P10 N10 L10 K10 1 C940 10U_10V_M 0805_X5R 1 C939 10U_10V_M 0805_X5R

+1_05V_VTT

EVT

2

2

+1_05V_VTT

1.1V

C

2

2

EVT
2

2

2

2

C828 22U_6.3V_M 0805_X5R

C827 22U_6.3V_M 0805_X5R

C826 22U_6.3V_M 0805_X5R

C825 22U_6.3V_M 0805_X5R

1.8V

K26 J27 J26 J25 H27 G28 G27 G26 F26 E26 E25

VTT1_48 VTT1_49 VTT1_50 VTT1_51 VTT1_52 VTT1_53 VTT1_54 VTT1_55 VTT1_56 VTT1_57 VTT1_58

VTT1_63 VTT1_64 VTT1_65 VTT1_66 VTT1_67 VTT1_68

J22 J20 J18 H21 H20 H19

1

C830 22U_6.3V_M 0805_X5R

1

C829 22U_6.3V_M 0805_X5R

1

1

1

1

2

B

AT21 AT19 AT18 AT16 AR21 AR19 AR18 AR16 AP21 AP19 AP18 AP16 AN21 AN19 AN18 AN16 AM21 AM19 AM18 AM16 AL21 AL19 AL18 AL16 AK21 AK19 AK18 AK16 AJ21 AJ19 AJ18 AJ16 AH21 AH19 AH18 AH16

VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36

SENSE LINES

VAXG_SENSE VSSAXG_SENSE

AR22 AT22

GRAPHICS VIDs

GFX_VID[0] GFX_VID[1] GFX_VID[2] GFX_VID[3] GFX_VID[4] GFX_VID[5] GFX_VID[6] GFX_VR_EN GFX_DPRSLPVR GFX_IMON

AM22 AP22 AN22 AP23 AM23 AP24 AN24 AR25 AT25 AM24

For Disable Arrandale Graphic In addition, FDI_RXN_[7:0] and FDI_RXP_[7:0] can be left floating on the PCH. FDI_TX[7:0] and FDI_TX#[7:0] can be left floating on the Arrandale. The GFX_IMON,FDI_FSYNC[0], FDI_FSYNC[1], FDI_LSYNC[0], FDI_LSYNC[1], and FDI_INT signals on the Arrandale side should be tied to GND (through 1-k ±5% resistors).
GFX_IMON 2 R1604 1K_J 0402 GFX_IMON 1

1

1

1

1

1

1

1

1

1

1

1

1

2

2

2

2

2

C941 1U_10V_K 0603_X5R

C942 1U_10V_K 0603_X5R

C943 2.2U_10V_M 0603_X5R

C944 4.7U_10V_K 0805_X5R

1

CPU SOCKET_989P FOX_PZ98927-3641-01F

GRAPHICS
FDI PEG & DMI

EVT
+1_5VRUN

3A (VDDQ)
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1 C1146 1U_10V_K 0603_X5R C1147 1U_10V_K 0603_X5R C1148 1U_10V_K 0603_X5R C1149 1U_10V_K 0603_X5R C1150 1U_10V_K 0603_X5R C832 22U_6.3V_M 0805_X5R C833 22U_6.3V_M 0805_X5R + CAP23 NC_100U_6.3V_M 3528

PVT

B

C

EVT
C831 22U_6.3V_M 0805_X5R

+1_8VRUN

1.35A (VCCPLL)

VCCPLL1 VCCPLL2 VCCPLL3

L26 L27 M26

EVT

D

D

Title

FOXCONN
7

HON HAI Precision Ind. Co., Ltd. CCPBG - R&D Division
Rev

ARD (GRAPHICS POWER) M960&M970 H Model
Thursday, December 24, 2009 Sheet
8

Size Document Number Custom Date:
1 2 3 4 5 6

SA
7 of 86

1

2

3

4

5

6

7

8

U67H U67I AT20 AT17 AR31 AR28 AR26 AR24 AR23 AR20 AR17 AR15 AR12 AR9 AR6 AR3 AP20 AP17 AP13 AP10 AP7 AP4 AP2 AN34 AN31 AN23 AN20 AN17 AM29 AM27 AM25 AM20 AM17 AM14 AM11 AM8 AM5 AM2 AL34 AL31 AL23 AL20 AL17 AL12 AL9 AL6 AL3 AK29 AK27 AK25 AK20 AK17 AJ31 AJ23 AJ20 AJ17 AJ14 AJ11 AJ8 AJ5 AJ2 AH35 AH34 AH33 AH32 AH31 AH30 AH29 AH28 AH27 AH26 AH20 AH17 AH13 AH9 AH6 AH3 AG10 AF8 AF4 AF2 AE35 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD10 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30

A

B

VSS

C

K27 K9 K6 K3 J32 J30 J21 J19 H35 H32 H28 H26 H24 H22 H18 H15 H13 H11 H8 H5 H2 G34 G31 G20 G9 G6 G3 F30 F27 F25 F22 F19 F16 E35 E32 E29 E24 E21 E18 E13 E11 E8 E5 E2 D33 D30 D26 D9 D6 D3 C34 C32 C29 C28 C24 C22 C20 C19 C16 B31 B25 B21 B18 B17 B13 B11 B8 B6 B4 A29 A27 A23 A9

VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233

A

B

VSS
VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7 AT35 AT1 AR34 B34 B2 B1 A35 TP_MCP_VSS_NCTF1 1 TP_MCP_VSS_NCTF2 1 TP124 20MIL TP177 20MIL

NCTF

TP_MCP_VSS_NCTF6 1 TP_MCP_VSS_NCTF7 1

TP204 20MIL TP207 20MIL

C

CPU SOCKET_989P FOX_PZ98927-3641-01F

CPU SOCKET_989P FOX_PZ98927-3641-01F

D

D

FOXCONN
Title

HON HAI Precision Ind. Co., Ltd. CCPBG - R&D Division
Rev

ARD (GND) M960&M970 H Model
Thursday, December 24, 2009 Sheet
8

Size Document Number Custom Date:
1 2 3 4 5 6 7

SA
8 of 86

5

4

3

2

1

PCI Express Configuration Select CFG0 1 : Single PEG 0 : Bifurcation enable 3393727 The VIL Voltage DC Specification for CFG[0] Pin is in Violation of the EDS Value by a Large Amount The Clarksfield EDS Vol1 documents the CFG[1:0] pins for PCI Express Port Bifurcation, the straps may not work correctly when using a pull down resistor of value other than 250 Ohms to drive a value of zero on the CFG[0] pin. When left floating a value of one is sensed and there is no impact in this case.
U67E

RSVD32 RSVD33
20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL TP305 TP307 TP306 TP308 TP310 TP309 TP311 TP312 TP1220 TP1221 TP300 TP302 TP303 TP304

AJ13 AJ12 AH25 AK26 AL26 AR2 AJ26 AJ27

1 1

TP238 20MIL TP240 20MIL
D

D

CFG0

R1272 NC_3.01K_F 0402

EVT

1 1 1 1 1 1 1 1 1 1 1 1 1 1

AP25 AL25 AL24 AL22 AJ33 AG9 M27 L28 J17 H17 G25 G17 E31 E30

RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14

RSVD34 RSVD35 RSVD36 RSVD_NCTF_37 RSVD38 RSVD39

1 1

TP241 20MIL TP258 20MIL

DVT
RSVD_NCTF_40 RSVD_NCTF_41 RSVD_NCTF_42 RSVD_NCTF_43 AP1 AT2 AT3 AR1 1
TP261 20MIL

2

1

CFG0 20MIL TP321 20MIL TP320

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

CFG3 CFG3
C

RESERVED

PCI Express Static Lane Reversal 1 : Normal Operation 0 : Lane Numbers Reversed 15 ->0 , 14-> 1 , ...
CFG3

CFG3 CFG4 CFG7

20MIL TP323 20MIL TP325 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL TP313 TP315 TP314 TP316 TP317 TP318 TP353 TP354 TP355 TP356 TP357

R1273 3.01K_F 0402

AM30 AM28 AP31 AL32 AL30 AM31 AN29 AM32 AK32 AK31 AK28 AJ28 AN30 AN32 AJ32 AJ29 AJ30 AK30 H16

CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15] CFG[16] CFG[17] RSVD_TP_86

RSVD45 RSVD46 RSVD47 RSVD48 RSVD49 RSVD50 RSVD51 RSVD52 RSVD53 RSVD_NCTF_54 RSVD_NCTF_55 RSVD_NCTF_56 RSVD_NCTF_57 RSVD58 RSVD_TP_59 RSVD_TP_60 KEY RSVD62 RSVD63 RSVD64 RSVD65

AL28 AL29 AP30 AP32 AL27 AT31 AT32 AP33 AR33 AT33 AT34 AP35 AR35 AR32 E15 F15 A2 D15 C15 AJ15 AH15

C

DVT

2

1

CFG4 CFG4

Display Port Presence 1 : Disabled ; No Physical Display Port attached to Embedded Display Port 0 : Enable ; An external Display Port device is connected to the Embedded Display Port
CFG4

20MIL TP425 R1583 R1584

1

B19 A19 A20 B20 U9 T9 AC9 AB9

RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22 RSVD_TP_66 RSVD_TP_67 RSVD_TP_68 RSVD_TP_69 RSVD_TP_70 RSVD_TP_71 RSVD_TP_72 RSVD_TP_73 RSVD_TP_74 RSVD_TP_75 RSVD_TP_76 RSVD_TP_77 RSVD_TP_78 RSVD_TP_79 RSVD_TP_80 RSVD_TP_81 RSVD_TP_82 RSVD_TP_83 RSVD_TP_84 RSVD_TP_85 VSS

1 1

0_J 0_J

2 0402 2 0402

B

R1274 NC_3.3K_J 0402

C1 A3

RSVD_NCTF_23 RSVD_NCTF_24

AA5 AA4 R8 AD3 AD2 AA2 AA1 R9 AG7 AE3 V4 V5 N2 AD5 AD7 W3 W2 N3 AE5 AD9 AP34

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

TP331 TP332 TP333 TP334 TP335 TP336 TP337 TP338 TP339 TP340 TP341 TP342 TP343 TP344 TP347 TP348 TP349 TP350 TP345 TP346

20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL

1

B

2

EVT DVT
CFG7

J29 J28 A34 A33 C35 B35

RSVD26 RSVD27 RSVD_NCTF_28 RSVD_NCTF_29 RSVD_NCTF_30 RSVD_NCTF_31

1
R1289 NC_3.01K_F 0402 CPU SOCKET_989P FOX_PZ98927-3641-01F

1

0402 0_J R1582

VSS (AP34) can be left NC is CRB implementation; EDS/DG recommendation to GND

2

2611030 PCI Express Interface May Not Meet PCI Express 2.0 Jitter Specifications
A

Intel has determined that the workaround (3.01K pull down to Vss on signal CFG[7]) is not robust. Intel recommends not implementing this workaround at this time (CFG[7] should not be pulled down). Intel recommends not to test for PCI-E Express 2.0 Jitter specification compliance for the affected steppings.

2

A

FOXCONN
Title Size A3 Date: Document Number
3 2

HON HAI Precision Ind. Co., Ltd. CCPBG - R&D Division
Rev

ARD (RESERVED) M960&M970 H Model
Thursday, December 24, 2009
1

SA
9 of 86

Sheet

5

4

5

4

3

2

1

RTCRST# VccRTC
+ECVCC D17

The traces inside this block should be wider. 18~25mS
VCCRTC Y4 32.768KHZ_12.5P_10PPM Q13MC3061001800 C727 15P_50V_K_N 0402_NPO

1

2 2

DVTRTC_32KX1
1 2
INT_SERIRQ R872 1 10K_J R549 10M_J 0402 SATA0GP R904 1 10K_J U69A SATA1GP R963 1 10K_J

+3VRUN

2 0402 2 0402 2 0402
D

1

2 1
SD103AWS null C723 1U_6.3V_M 0402_X5R R529

6 mils
3 4 1 1 2
RTC_32KX2_R 2 R545 0_J

2

D

1 0402

RTC_32KX2 RTCRST#

B13 D13 C14 D17 A16

RTCX1 RTCX2 RTCRST#

tpc40b_50 TP118

1 1

1
20K_F 0402

2 1 2
C392 1U_6.3V_K 0402_X5R

C702 15P_50V_K_N 0402_NPO SRTCRST# JP1 OPEN_JUMP_OPEN2 VCCRTC

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3 FWH4 / LFRAME#

D33 B33 C32 A32 C34 A34 F34 AB9

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# LPC_DRQ#0 1 TP110 20MIL INT_SERIRQ

LPC_AD0 39,42 LPC_AD1 39,42 LPC_AD2 39,42 LPC_AD3 39,42 LPC_FRAME# 39,42 LPC_DRQ#0 42 INT_SERIRQ 39,42

SRTCRST#

RTC

LPC

1RTC2 2

2

R650 510_F 0402

1

R565 1M_J 0402

2

SM_INTRUDER#

INTRUDER# INTVRMEN

LDRQ0# LDRQ1# / GPIO23 SERIRQ

[HDA_DOCK_EN#/GPIO33]
Low (0) ­ Flash Descriptor Security will be overridden. Also, when this signals is sampled on the rising edge of PWROK then it will also disable Intel ME and its features. High (1) ­ Security measure defined in the Flash Descriptor will be enabled
+3VRUN +ECVCC

1

R279 1 330K_F 2 0402 INTVRMEN A14

R773

IHDA_BITCLK

A30 D29 P1 C30 G30 F30

1
R649 510_F 0402 20K_J 0402

2 1
C876 1U_6.3V_M 0402_X5R

HDA_BCLK HDA_SYNC SPKR HDA_RST# HDA_SDIN0 HDA_SDIN1 HDA_SDIN2 HDA_SDIN3 HDA_SDO HDA_DOCK_EN# / GPIO33 HDA_DOCK_RST# / GPIO13 SATA1RXN SATA1RXP SATA1TXN SATA1TXP SATA0RXN SATA0RXP SATA0TXN SATA0TXP

IHDA_SYNC 61 HDA_SPKR HDA_SPKR IHDA_RESET#

3

2

2

FOX_HS8202E-LH HEADER_2P
SMDFIX1

AK7 AK6 AK11 AK9 AH6 AH5 AH9 AH8 AF11 AF9 AF7 AF6 AH3 AH1 AF3 AF1 AD9 AD8 AD6 AD5 AD3 AD1 AB3 AB1

SATA_RXN0 SATA_RXP0 SATA_TXN0 SATA_TXP0 SATA_RXN1 SATA_RXP1 SATA_TXN1 SATA_TXP1

SATA_RXN0 SATA_RXP0 SATA_TXN0 SATA_TXP0 SATA_RXN1 SATA_RXP1 SATA_TXN1 SATA_TXP1

47 47 47 47 48 48 48 48

2 1
SMDFIX2

RTC1 61 HDA_CODEC_SDATAIN0 +3VRUN 20MIL TP1086

1
R154

1

CN26

1
20MIL TP155

4

IHDA

EVT
C

Stuff for No-reboot Low=Default High=No-reboot

1

E32 F32 B29 H32 J30

R297 NC_10K_J 0402

20MIL TP174

2

1
R1613

1

TP_HDA_SDIN3 IHDA_SDATAO HDA_DOCK_EN#

SATA2RXN SATA2RXP SATA2TXN SATA2TXP SATA3RXN SATA3RXP SATA3TXN SATA3TXP

3 2

R158 R155 100_J 0402 39 FW_HW NC_4.7K_J 0402

1K_J 0402

R156

1
Q12

2
0_J 0402

HDA_DOCK_EN#

1

D

1

2

1

G

S

2

HDA_SPKR IHDA_BITCLK R618

2N7002W null

NC_1K_J 0402

2

2

C

1

68_J 2

0402

HDA_CODEC_BITCLK

61 20MIL TP166

SATA

1

HDA_DOCK_RST#

2

2

C6352 33P_50V_J 0402_NPO

C6353 22P_50V_J 0402_NPO

+3VALW 20MIL TP158

SATA4RXN SATA4RXP SATA4TXN SATA4TXP SATA5RXN SATA5RXP SATA5TXN SATA5TXP

1

1

1 1 1 1 1

JTAG_TCK JTAG_TMS JTAG_TDI JTAG_TDO JTAG_RST#

M3 K3 K1 J2 J4

JTAG_TCK JTAG_TMS

For EMI
IHDA_SDATAO R633 1 33_J 2 0402

MP
61

HDA_CODEC_SDATAOUT

JTAG

R298 10K_J 0402

20MIL TP160 20MIL TP159 20MIL TP164 20MIL TP168

SATA_RXN5 SATA_RXP5 SATA_TXN5 SATA_TXP5 R873 1 37.4_F +3VRUN

SATA_RXN5 49 SATA_RXP5 49 SATA_TXN5 49 SATA_TXP5 49

1

+1.05V_VCC_SATA

JTAG_TDI JTAG_TDO JTAG_RST#

EXTERNAL SPI0 ROM INTERFACE(FOR U98)
+ECVCC SPI0_CLK SPI0_MOSI SPI0_MISO_R SPI_ROM_CS0# MB_FLASH0_EN CARD_INSERT0

2

14

HDA_DOCK_RST#

SATAICOMPO SATAICOMPI

AF16 VCC_SATA AF15

2 0402

DVT
12 11 10 9 8 7 6 5 4 3 2 1
SMDFIX1 SMDFIX2 SMDFIX2

MP

IHDA_RESET#

R288

1 33_J

2 0402

HDA_CODEC_RST#

61

+3VRUN SPI0_CLK

BA2

SPI_CLK SPI_CS0# SPI_CS1# SPI_MOSI SPI_MISO
Ibexpeak-M null

1

SPI_ROM_CS0# AV3 R299 NC_1K_J 0402 20MIL TP169

R5910 NC_10K_J 0402

CN18 FOX_GB5RF120-1203-7F NC_FPC_12P

1

1
SPI0_MOSI

AY3 AY1 AV1

SATALED# SATA0GP / GPIO21 SATA1GP / GPIO19

T3

15 MB_FLASH0_EN SATA_LED# 55

2

DVT
Y9 V1
SATA0GP SATA1GP

61 HDA_CODEC_SYNC

1

SPI_MISO_L R5905 51_J 0402

2

B

EVT
SPI0_MISO_R R1553 1 15_F

13

PVT

SPI

R634 1

33_J 2 0402

IHDA_SYNC

2

JTAG_TCK

+ECVCC

B

MP
2 0402
SPI_MISO_L

1

EVT
1
VCC0

CARD_INSERT0

1 4 2

5

SPI0_CS#

U98 SPI ROM-0
+3VRUN R38 R1557 0_J D23 VCC0 HOLD0# VCC0

SPI_ROM_CS0# R542 NC_10K_J 0402

1

U43 NC_MC74HC1G32DTT1G R1551

2

1K_J 0402

1 null

2
NC_SD103AWS

VCC0

1

R5369 3.3K_J 0402 C428 4.7U_10V_K 0805_X5R

U98 SPI0_CS# 1 SPI0_MISO_R 2 WP#0 3 4

SPI0_MOSI

2

2

1

1

A

R5372 NC_1K_J 0402

FLASH_SOIC-8P_32MB W25Q32BVSSIG

2

DVT
U98 Normal Support - 32Mbit (13-W25032B-7000)

0402 100K_J R5969

0402 100K_J R5970

0402 100K_J R5971
A

2

2

2

1

C424 1U_10V_K 0603_X5R

CS# VCC DO/IO1 HOLD#/IO3 WP#/IO2 CLK GND DI/IO0

1

8 7 6 5

VCC0 HOLD0# SPI0_CLK SPI0_MOSI

1

1

2

SPI0_CLK SPI0_CS#

EVT

2

1

2 0402

1 0_J

3

2 0402

EVT DVT

2

PVT

C815 NC_0.1U_16V_Y 0402_Y5V

FOXCONN
Title Size Document Number Custom Date:
5 4 3 2 1

HON HAI Precision Ind. Co., Ltd. CCPBG - R&D Division
Rev

PCH (HDA,JTAG,SAT) M960&M970 H Model
Tuesday, December 29, 2009 Sheet 10 of

SA
86

1

2

3

4

5

6

7

8

+3VALW U69B

PCI-E Port Table Port
A

GPIO60 44 44 44 44 WLAN_RXN1 WLAN_RXP1 WLAN_TXN1 WLAN_TXP1 50 50 50 50 45 45 45 45 CARD_RXN2 CARD_RXP2 CARD_TXN2 CARD_TXP2 LAN_RXN3 LAN_RXP3 LAN_TXN3 LAN_TXP3 20MIL 20MIL 20MIL 20MIL TP1085 TP1082 TP1083 TP1084 C889 1 C890 1

Function
WLAN Ricoh R5U231 GbE LAN NC NC ExpressCard/34 (PCIE) NC NC

2 0.1U_6.3V_K 0402_X5R 2 0.1U_6.3V_K 0402_X5R

WLAN_TXN1_C WLAN_TXP1_C

BG30 BJ30 BF29 BH29 AW30 BA30 BC30 BD30 AU30 AT30 AU32 AV32 BA32 BB32 BD32 BE32 BF33 BH33 BG32 BJ32

PERN1 PERP1 PETN1 PETP1 PERN2 PERP2 PETN2 PETP2 PERN3 PERP3 PETN3 PETP3 PERN4 PERP4 PETN4 PETP4 PERN5 PERP5 PETN5 PETP5 PERN6 PERP6 PETN6 PETP6 PERN7 PERP7 PETN7 PETP7 PERN8 PERP8 PETN8 PETP8 CLKOUT_PCIE0N CLKOUT_PCIE0P PCIECLKRQ0# / GPIO73 CLKOUT_PCIE1N CLKOUT_PCIE1P PCIECLKRQ1# / GPIO18 CLKOUT_PCIE2N CLKOUT_PCIE2P PCIECLKRQ2# / GPIO20 CLKOUT_PCIE3N CLKOUT_PCIE3P PCIECLKRQ3# / GPIO25 CLKOUT_PCIE4N CLKOUT_PCIE4P PCIECLKRQ4# / GPIO26 CLKOUT_PCIE5N CLKOUT_PCIE5P PCIECLKRQ5# / GPIO44 CLKOUT_PEG_B_N CLKOUT_PEG_B_P PEG_B_CLKRQ# / GPIO56
Ibexpeak-M null

SMBALERT# / GPIO11 SMBCLK SMBDATA SML0ALERT# / GPIO60

B9

WAKE_SCI#

R898 1 10K_J R892 1 10K_J R901 1 10K_J

2 2 2

0402 0402 0402
A

WAKE_SCI# 39

WAKE_SCI# LPD_SPI_INTR#

H14 SMB_CLK_R C8 J14 C6 G8
SMB_DATA_R GPIO60 SML0_CLK SML0_DATA

PCH EEPROM/CKG/DIMM/ExpressCard

Port1 Port2 Port3 Port4 Port5 Port6 Port7 Port8

C704 1 C701 1

2 0.1U_6.3V_K 0402_X5R 2 0.1U_6.3V_K 0402_X5R

CARD_TXN2_C CARD_TXP2_C

SMBus

SML0CLK SML0DATA SML1ALERT# / GPIO74 SML1CLK / GPIO58

SML0_CLK SML0_DATA

R902 1 2.2K_J R903 1 2.2K_J

2 0402 2 0402

DVT

C679 1 C680 1

2 0.1U_6.3V_K 0402_X5R 2 0.1U_6.3V_K 0402_X5R

LAN_TXN3_C LAN_TXP3_C

M14 LPD_SPI_INTR# E10 SMB_THRM_CLK G12 SMB_THRM_DATA T13 T11 T9
+3VRUN PEG_CLKREQ# RP89 0 1 2 R899 1 10K_J 0404_4P2R 4 3 CLK_EXP_N 4 CLK_EXP_P 4 0402 SMB_THRM_CLK 24,39,58 SMB_THRM_DATA 24,39,58

1 1 1 1

PCI-E*

SML1DATA / GPIO75 CL_CLK1
Link

EC/Thermal Sensor

EVT
43 43 43 43 EXPRESS_RXN6 EXPRESS_RXP6 EXPRESS_TXN6 EXPRESS_TXP6 C675 1 C676 1

Controller

CL_DATA1 CL_RST1#

BA34 AW34 2 0.1U_6.3V_K 0402_X5R EXPRESS_TXN6_C BC34 2 0.1U_6.3V_K 0402_X5R EXPRESS_TXP6_C BD34 AT34 AU34 AU36 AV36 BG34 BJ34 BG36 BJ36 AK48 AK47 P9 AM43 AM45 U4 AM47 AM48 N4 AH42 AH41

PEG_A_CLKRQ# / GPIO47 CLKOUT_PEG_A_N CLKOUT_PEG_A_P

H1

2

EVT
B

AD43 CLK_PEG# AD45 CLK_PEG AN4 AN2 AT1 AT3 AW24 BA24 AP3 AP1 F18 E18 AH13 AH12 P41 J42 AH51 AH53 AF38 T45 P43 T42
XTAL25_IN XTAL25_OUT XCLK_RCOMP

PCIE_REFCLK# 22 PCIE_REFCLK 22

R1593 2.2K_J 0402 SMB_CLK_R

1 1
R1594 2.2K_J 0402

B

PEG

+3VSUS

R579 1 10K_J

2 0402

+3VALW

R577 1

NC_10K_J 2 0402 WLAN_CLKREQ# 44 44 CLK_PCIE_WLAN# 44 CLK_PCIE_WLAN

EVT
RP69 0 1 2 0404_4P2R R_PCIE_WLAN# 4 R_PCIE_WLAN 3 WLAN_CLKREQ# 0402 50 CLK_PCIE_CARD# 50 CLK_PCIE_CARD RP71 0 R_PCIE_CARD# R_PCIE_CARD

CLKOUT_DMI_N CLKOUT_DMI_P

2 2

WLAN_CLKREQ# R5579

CLKOUT_DP_N / CLKOUT_BCLK1_N CLKOUT_DP_P / CLKOUT_BCLK1_P

SMB_CLK_R 19,20,21,43

From CLK BUFFER

+3VRUN

1 10K_J

2
R5578

0402

CLKIN_DMI_N CLKIN_DMI_P CLKIN_BCLK_N CLKIN_BCLK_P CLKIN_DOT_96N CLKIN_DOT_96P CLKIN_SATA_N / CKSSCD_N CLKIN_SATA_P / CKSSCD_P REFCLK14IN CLKIN_PCILOOPBACK XTAL25_IN XTAL25_OUT XCLK_RCOMP CLKOUTFLEX0 / GPIO64

CLK_DMI_PCH# 19 CLK_DMI_PCH 19 CLK_PCH_BCLK# 19 CLK_PCH_BCLK 19 DREFCLK# 19 DREFCLK 19 CLK_PCIE_SATA# 19 CLK_PCIE_SATA 19 REF_14M_PCH 19 CLK_PCI_FB 14

SMB_DATA_R

SMB_DATA_R 19,20,21,43

CARD_CLK_REQ#

1 NC_10K_J 2

2 1

3 4

EVT
CLK_DMI_PCH# CLK_DMI_PCH CLK_PCH_BCLK# CLK_PCH_BCLK DREFCLK# DREFCLK CLK_PCIE_SATA# CLK_PCIE_SATA REF_14M_PCH R5992 R5993 R5994 R5995 R5996 R5997 R5998 R5999 R6000 NC_10K_J 2 0402 1 NC_10K_J 2 0402 1 NC_10K_J 2 0402 1 NC_10K_J 2 0402 1 NC_10K_J 2 0402 1 NC_10K_J 2 0402 1 NC_10K_J 2 0402 1 NC_10K_J 2 0402 1 NC_10K_J 2 0402 1
C

0404_4P2R CARD_CLK_REQ# CARD_CLK_REQ# CARD_CLK_REQ# 50 45 CLK_PCIE_LAN# 45 CLK_PCIE_LAN CLK_REQ_LAN# 45 RP67 0 R_PCIE_LAN# R_PCIE_LAN

+3VRUN

R537 1 10K_J CLK_REQ_LAN#

2 0402

2 1

3 4

0404_4P2R CLK_REQ_LAN#

C

+3VRUN

R539 1 10K_J

2 0402

PCIECLKRQ3#

EVT
20MIL TP1125 43 CLK_PCIE_EXPRESS# 43 CLK_PCIE_EXPRESS RP68 0 1 2

PCIECLKRQ3#

A8 AM51 AM53 M9 AJ50 AJ52 H6 AK53 AK51

DVT
+3VRUN R540 1 10K_J

+1_05VRUN_SSCVCC

2 0402

PCIECLKRQ4#

1

PCIECLKRQ4#

R1225

90.9_F

0402

+1_05V_VTT +3VALW

Clock Flex

R555 1

NC_10K_J 2 0402

0404_4P2R R_PCIE_EXPRESS# 4 R_PCIE_EXPRESS 3 EXPRESS_DET#

PVT
2009/11/19 Add reserve 10k pull-low resistor for Intel FCIM function

CLKOUTFLEX1 / GPIO65 CLKOUTFLEX2 / GPIO66 CLKOUTFLEX3 / GPIO67

R556 1 10K_J EXPRESS_DET#

2 0402
EXPRESS_DET# 43 +3VALW R5421

DVT
1 10K_J 2 0402

XTAL25_IN

PEG_B_CLKREQ# P13

2

N50

EVT
1

R1651 0_J 0402 XTAL25_OUT R813

R1226 NC_1M_J 0402

+3VRUN

2

1

NC_25MHZ_20P_30PPM ITTI_L5030-25.000-20 Y8 2 1

NC_0_J 0402 C1288 NC_18P_50V_J 0402_NPO C1289 NC_18P_50V_J 0402_NPO

1

D

8
SMB_CLK_R SMB_DATA_R

VCC SCL SDA VSS

WP A0 A1 A2

7 1 2 3

6 5 4

2

U6

C23 0.1U_16V_Y 0402_Y5V

Calpella Platform ­ Design Guide - Addendum / Update ­ Rev. 1.52 (Doc #414044).). XTAL_IN should be pulled to GND via a 0ohm by default. This pull-down resistor on XTAL_IN should only be un-stuffed when 25MHz crystal is used.

D

EEPROM_SOP-8_256x8 HT24LC02

FOXCONN
Title Size Document Number Custom Date:
7

HON HAI Precision Ind. Co., Ltd. CCPBG - R&D Division
Rev

PCH (PCI-E,SMBUS,CLK) M960&M970 H Model
Tuesday, December 29, 2009 Sheet
8

SMBus Address: AEH
1 2 3 4 5 6

SA
11 of 86

1

2

3

4

5

6

7

8

For Disable Arrandale Graphic In addition, FDI_RXN_[7:0] and FDI_RXP_[7:0] can be left floating on the PCH. FDI_TX[7:0] and FDI_TX#[7:0] can be left floating on the Arrandale. The GFX_IMON,FDI_FSYNC[0], FDI_FSYNC[1], FDI_LSYNC[0], FDI_LSYNC[1], and FDI_INT signals on the Arrandale side should be tied to GND (through 1-k ±5% resistors).
A A

U69C 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3 DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3 DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3 R874
B

DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3 DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3 DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3

BC24 BJ22 AW20 BJ20 BD24 BG22 BA20 BG20 BE22 BF21 BD20 BE18 BD22 BH21 BC20 BD18 BH25 BF25

DMI0RXN DMI1RXN DMI2RXN DMI3RXN DMI0RXP DMI1RXP DMI2RXP DMI3RXP DMI0TXN DMI1TXN DMI2TXN DMI3TXN DMI0TXP DMI1TXP DMI2TXP DMI3TXP DMI_ZCOMP DMI_IRCOMP

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7 FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7 FDI_INT FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1

BA18 BH17 BD16 BJ16 BA16 BE14 BA14 BC12 BB18 BF17 BC16 BG16 AW16 BD14 BB14 BD12 BJ14 BF13 BH13
B

+1.05V_VCC_EXP

DMI

1 49.9_F

2 0402 DMI_COMP

FDI

BJ12 BG14

EVT
42 SB_RST# SB_RST#

T6

SYS_RESET# SYS_PWROK PWROK MEPWROK LAN_RST# DRAMPWROK RSMRST# SUS_PWR_ACK / GPIO30 PWRBTN# ACPRESENT / GPIO31 BATLOW# / GPIO72 RI#
Ibexpeak-M null

WAKE# CLKRUN# / GPIO32

J12 Y1
PM_CLKRUN#

PCIE_WAKE# 43,44,45

1 R972 2 2.2K_J 0402
R927 1 0_J

PWROK

B17

4,39,75,76,80 RUN_PWRGD

2 0402

R918 1 NC_0_J 2 0402 MPWROK_R K5 R940 1 NC_0_J 2 0402 LAN_RST# R917

System Power Management

39,78 IMVP_PWRGD

1 R973 2 2.2K_J 0402

SYS_PWROK M6

PM_CLKRUN# 39,42

SUS_STAT# / GPIO61 SUSCLK / GPIO62 SLP_S5# / GPIO63 SLP_S4# SLP_S3# SLP_M# TP23 PMSYNCH SLP_LAN#

P8 F3 E4 H7 P12 K8 N2 BJ10 F6

PM_SUS_STAT# PM_S4_STATE# 1 PM_SLP_S5# PM_SLP_S4# PM_SLP_S3# PM_SLP_ME# PM_SLP_DSW# H_PM_SYNC PM_SLP_LAN#

PM_SUS_STAT# 42 TP170 20MIL PM_SLP_S5# 39
C

A10 D9

1 10K_J

2 0402

4 PM_DRAM_PWRGD
C

39 PM_RSMRST# 39 SUS_PWR_ACK 39 +3VRUN 39 AC_Present PWRBTN#

1 R916 2 2.2K_J 0402
SUS_PWR_ACK PWRBTN# AC_Present

PM_RSMRST#_R

C16 M1 P5 P7

PM_SLP_S4# 39 PM_SLP_S3# 39 +3VRUN PM_SLP_ME# 39 SB_RST# R945 1 8.2K_J R912 1 8.2K_J

2 0402 2 0402
+3VALW 0402 0402 0402 0402 0402 0402 0402

1

TP362 20MIL H_PM_SYNC 4

2

PM_CLKRUN#

R931 NC_10K_J 0402

PM_BATLOW# PM_RI#

A6 F14

EVT
PCIE_WAKE# PM_RI# PM_SLP_LAN# PM_BATLOW# SUS_PWR_ACK AC_Present SB_RST# R911 R910 R914 R913 R920 R921 R922

1

1

TP361 20MIL

MPWROK_R R923 1 NC_0_J 2 0402 LAN_RST#

1 1 1 1 1 1 1

10K_J 2 10K_J 2 NC_10K_J 2 8.2K_J 2 8.2K_J 2 10K_J 2 NC_8.2K_J 2

EVT
D33 SYS_PWROK
D

PM_SLP_ME#

1

TP171 20MIL

PM_RSMRST# R915 1 10K_J PWROK R1576 1 10K_J

2 0402 2 0402

1 null

2
SD103AWS D28
D

PM_RSMRST#_R 1 null

2
SD103AWS D29

ALW_PWRGD 39,74

PWROK

1 null

2
SD103AWS

FOXCONN
Title Size A3 Date:
3 4 5 6

HON HAI Precision Ind. Co., Ltd. CCPBG - R&D Division
Rev

PCH (DMI,FDI,GPIO)
Document Number

M960&M970 H Model
Tuesday, December 29, 2009
7

SA
12
8

Sheet

of

86

1

2

1

2

3

4

5

6

7

8

U69D
A

T48 T47

L_BKLTEN L_VDD_EN L_BKLTCTL L_DDC_CLK L_DDC_DATA L_CTRL_CLK L_CTRL_DATA LVD_IBG LVD_VBG LVD_VREFH LVD_VREFL LVDSA_CLK# LVDSA_CLK

SDVO_TVCLKINN SDVO_TVCLKINP SDVO_STALLN SDVO_STALLP SDVO_INTN SDVO_INTP

BJ46 BG46 BJ48 BG48 BF45 BH45

1 1 1 1 1 1

TP77 TP78 TP79 TP81 TP82 TP83

20MIL 20MIL 20MIL 20MIL 20MIL 20MIL

A

NC for disable LVDS

Y48 AB48 Y45 AB46 V48 AP39 1LVDS_VBG AP41 AT43 AT42 AV53 AV51 BB47 BA52 AY48 AV47 BB48 BA50 AY49 AV48 AP48 AP47 AY53 AT49 AU52 AT53 AY51 AT48 AU50 AT51

20MIL TP151

SDVO_CTRLCLK SDVO_CTRLDATA DDPB_AUXN DDPB_AUXP DDPB_HPD DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P DDPC_CTRLCLK DDPC_CTRLDATA DDPC_AUXN DDPC_AUXP DDPC_HPD DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P DDPD_CTRLCLK DDPD_CTRLDATA DDPD_AUXN DDPD_AUXP DDPD_HPD DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

T51 T53 BG44 BJ44 AU38 BD42 BC42 BJ42 BG42 BB40 BA40 AW38 BA38 Y49 AB49 BE44 BD44 AV40 BE40 BD40 BF41 BH41 BD38 BC38 BB36 BA36 U50 U52 BC46 BD46 AT38 BJ40 BG40 BJ38 BG38 BF37 BH37 BE36 BD36

1 1

TP84 TP85

20MIL 20MIL

20MIL TP154

1

NC for disable LVDS
B

20MIL TP157

1

LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3 LVDSB_CLK# LVDSB_CLK LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3 LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3

Digital Display Interface

LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3

LVDS

B

20MIL TP162

1

20MIL TP165

1

AA52 AB53 AD53 V51 V53 Y53 Y51
C

CRT_BLUE CRT_GREEN CRT_RED CRT_DDC_CLK CRT_DDC_DATA CRT_HSYNC CRT_VSYNC

1 TP95 20MIL 1 TP96 20MIL DDPD_HPD 1 TP1219

20MIL

1K_J R223 0402 1 2

CRT

EVT

CRT_IREF

AD48 AB51

C

DAC_IREF CRT_IRTN

Calpella Platform ­ Design Guide - Addendum / Update ­ Rev. 1.52 (Doc #414044).).
Ibexpeak-M null

D

D

FOXCONN
Title Size Document Number Custom Date:
1 2 3 4 5 6 7

HON HAI Precision Ind. Co., Ltd. CCPBG - R&D Division
Rev

PCH (LVDS,DDI) M960&M970 H Model
Thursday, December 24, 2009 Sheet
8

SA
13 of 86

5

4

3

2

1

+3VRUN RP13

+3VRUN RP15

DVT
8 INT_PIRQH# PCI_TRDY# 7 6 PCI_FRAME# PCI_REQ#1 5
U69E 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL TP182 TP167 TP186 TP194 TP187 TP199 TP201 TP200 TP202 TP319 TP247 TP322 TP363 TP324 TP426 TP428 TP427 TP429 TP431 TP430 TP432 TP434 TP433 TP435 TP437 TP436 TP438 TP440 TP439 TP441 TP443 TP442 TP446 TP445 TP447 TP444

1 2 3 4

8 7 6 5
8.2K 0804_8P4R

PCI_REQ#2 INT_PIRQD# PCI_IRDY# PCI_STOP#

1 2 3 4

8.2K 0804_8P4R +3VRUN RP16

+3VRUN RP17
D

1 2 3 4

8 7 6 5
8.2K 0804_8P4R

PCI_REQ#3 INT_PIRQF# INT_PIRQB# PCI_REQ#0

1 2 3 4

8 7 6 5
8.2K 0804_8P4R

INT_PIRQA# INT_PIRQE# INT_PIRQC# INT_PIRQG#

RP14

1 2 3 4

PCI_PERR# 8 7 PCI_DEVSEL# PCI_SERR# 6 PCI_LOCK# 5 8.2K 0804_8P4R

NVRAM

+3VRUN

PCI_GNT#3

R1612 NC_4.7K_J 0402

PCI

1

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

H40 N34 C44 A38 C36 J34 A40 D45 E36 H48 E40 C40 M48 M45 F53 M40 M43 J36 K48 F40 C42 K46 M51 J52 K51 L34 F42 J40 G46 F44 M47 H36 J50 G42 H47 G34

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 C/BE0# C/BE1# C/BE2# C/BE3# PIRQA# PIRQB# PIRQC# PIRQD# REQ0# REQ1# / GPIO50 REQ2# / GPIO52 REQ3# / GPIO54 GNT0# GNT1# / GPIO51 GNT2# / GPIO53 GNT3# / GPIO55 PIRQE# / GPIO2 PIRQF# / GPIO3 PIRQG# / GPIO4 PIRQH# / GPIO5 PCIRST# SERR# PERR# IRDY# PAR DEVSEL# FRAME# PLOCK#

NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3 NV_DQS0 NV_DQS1 NV_DQ0 / NV_IO0 NV_DQ1 / NV_IO1 NV_DQ2 / NV_IO2 NV_DQ3 / NV_IO3 NV_DQ4 / NV_IO4 NV_DQ5 / NV_IO5 NV_DQ6 / NV_IO6 NV_DQ7 / NV_IO7 NV_DQ8 / NV_IO8 NV_DQ9 / NV_IO9 NV_DQ10 / NV_IO10 NV_DQ11 / NV_IO11 NV_DQ12 / NV_IO12 NV_DQ13 / NV_IO13 NV_DQ14 / NV_IO14 NV_DQ15 / NV_IO15 NV_ALE NV_CLE NV_RCOMP NV_RB# NV_WR#0_RE# NV_WR#1_RE# NV_WE#_CK0 NV_WE#_CK1 USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P USBRBIAS#

AY9 BD1 AP15 BD8 AV9 BG8 AP7 AP6 AT6 AT9 BB1 AV6 BB3 BA4 BE4 BB6 BD6 BB7 BC8 BJ8 BJ6 BG6 BD3 AY6 AU2 AV7 AY8 AY5 AV11 BF5 H18 J18 A18 C18 N20 P20 J20 L20 F20 G20 A20 C20 M22 N22 B21 D21 H22 J22 E22 F22 A22 C22 G24 H24 L24 M24 A24 C24 B25 D25 N16 J16 F16 L16 E14 G16 F12 T15
USB_PN0 USB_PP0 USB_PN1 USB_PP1 USB_PN2 USB_PP2 USB_PN3 USB_PP3 USB_PN4 USB_PP4 USB_PN5 USB_PP5 USB_PN6 USB_PP6 USB_PN7 USB_PP7 USB_PN8 USB_PP8 USB_PN9 USB_PP9 USB_PN10 USB_PP10 USB_PN11 USB_PP11 USB_PN12 USB_PP12 USB_PN13 USB_PP13 R308 USBRBIAS 1 22.6_F USB_OC#0 USB_OC#1 USB_OC#2 USB_OC#3 USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7 NV_ALE NV_CLE NV_RCOMP

DMI Termination Voltage Set to Vss when LOW

NV_CLE Set to Vcc when HIGH
D

+VCCPNAND NC_1K_J 2 0402 2 0402 NC_1K_J

NV_CLE NV_ALE

R1615 R1616

1 1

Danbury Technology Disabled when Low Enabled when High

1

2

DVT

R1466 NC_32.4_F 0402
C

EVT
C

INT_PIRQA# G38 INT_PIRQB# H51 INT_PIRQC# B37 INT_PIRQD# A44 PCI_REQ#0 PCI_REQ#1 PCI_REQ#2 PCI_REQ#3 +3VRUN NC_10K_J R345 1 2 0402 1 2 R346 NC_10K_J 0402 PCI_GNT#0 PCI_GNT#1 1 PCI_GNT#2 PCI_GNT#3 INT_PIRQE# INT_PIRQF# INT_PIRQG# INT_PIRQH# TP130

2

F51 A46 B45 M53 F48 K45 F36 H53 B41 K53 A36 A48 K6 E44 E50 A42 H44 F46 C46 D49 D41 C48 M7 D5

1 1

20MIL

TP163

EVT
20MIL

1

PCI_RST# PCI_SERR# PCI_PERR# PCI_IRDY# PCI_PAR PCI_DEVSEL# PCI_FRAME#

USB

1 1 1 1 1 1 1 1

20MIL
B

TP127

1

USB_PN0 49 USB_PP0 49 USB_PN1 61 USB_PP1 61 TP450 20MIL TP451 20MIL USB_PN3 43 USB_PP3 43 USB_PN4 61 USB_PP4 61 USB_PN5 61 USB_PP5 61 TP299 20MIL TP301 20MIL TP352 20MIL TP359 20MIL TP360 20MIL TP449 20MIL USB_PN9 52 USB_PP9 52 TP1095 20MIL TP1096 20MIL USB_PN11 54 USB_PP11 54 USB_PN12 44 USB_PP12 44 USB_PN13 53 USB_PP13 53

USB PORT PORT-0 PORT-1 PORT-2 PORT-3 PORT-4

Function eSATA External Port-2

ExpressCard/34 (USB)

External Port-3 External Port-1

EVT EVT

PORT-5 PORT-6 PORT-7

B

PCI_LOCK#

PORT-8 PORT-9 Camera

EVT
22,42,44,45,50 PLT_RST# 42 39 11 PCLK_JIG 20MIL TP132 CLK_KBCPCI 20MIL TP129 CLK_PCI_FB

20MIL 20MIL

TP128 TP126

1 1

PCI_STOP# PCI_TRDY# PME#_ICH PLT_RST#

2
0402

STOP# TRDY# PME# PLTRST# CLKOUT_PCI0 CLKOUT_PCI1 CLKOUT_PCI2 CLKOUT_PCI3 CLKOUT_PCI4
Ibexpeak-M null

USBRBIAS OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43 OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14

R44

22_J0402 22_J0402

1 1

R56

R1223 22_J0402

CLK_PCI_JIG N52 P53 CLK_PCI_KBC P46 P51 CLK_PCI_FB_RP48

DVT

USB_OC#0 USB_OC#1 USB_OC#2 USB_OC#3

49 61 61 61

PORT-10 PORT-11 PORT-12 PORT-13 Felica WLAN Bluetooth

+3VALW

1

EVT
C1359 0.1U_6.3V_K 0402_X5R BUF_PLT_RST# +3VALW BUF_PLT_RST# 4,39,42,43 USB_OC#2 USB_OC#5 USB_OC#4 USB_OC#6

+3VALW RP18

A

U102 74AHC1G08GW 1 PLT_RST#

6 7 8 9 10
10K 1206_10P8R

5 4 3 2 1

USB_OC#1 USB_OC#3 USB_OC#7 USB_OC#0

5

2

A

4 2 3

DVT
Buffer to reduce loading on PLT_RST#.
5 4 3 2

Title

FOXCONN
Document Number

HON HAI Precision Ind. Co., Ltd. CCPBG - R&D Division
Rev

Size A3 Date:

PCH (PCI,USB,NVRAM) M960&M970 H Model
Tuesday, December 29, 2009
1

SA
14 of 86

Sheet

1

2

3

4

5

6

7

8

+3VALW R966 1 1K_J R976 1 10K_J R985 1 10K_J R977 1 10K_J R964 1 10K_J R983 1 10K_J

2 0402 2 0402 2 0402 2 0402 2 0402 2 0402

GPIO15 GPIO28 GPIO12 RST_GATE GPIO45 GPIO8 39 EXTSMI# ID_LPC_PCI# EXTSMI# ID_LPC_PCI# RUNTIME_SCI#_D GPIO8 GPIO12

DVT
BMBUSY#

A

U69F

A

Y3 C38 D37 J32 F10 K9 T7 AA2 F38 Y7 H10 AB12 V13 M11 V6 AB7 AB13 V3 P3 H3 F1 AB6

BMBUSY# / GPIO0 TACH1 / GPIO1 TACH2 / GPIO6

CLKOUT_PCIE6N CLKOUT_PCIE6P

AH45 AH46

+3VRUN 39 RUNTIME_SCI#

42

2 D12
SD103AWS

1
null

MISC

TACH3 / GPIO7 GPIO8

CLKOUT_PCIE7N CLKOUT_PCIE7P

AF48 AF47

DVT
H_A20GATE H_A20GATE 39

DVT
R961 1 10K_J R981 1 10K_J R1627 1 10K_J R978 1 10K_J

2 0402 2 0402 2 0402 2 0402

BMBUSY# GPIO15 EXTSMI# STP_PCI# H_RCIN#

LAN_PHY_PWR_CTRL / GPIO12 GPIO15 SATA4GP / GPIO16 TACH0 / GPIO17

A20GATE

U2

DVT

39 SYSTEM_ID0 39 SYSTEM_ID1 10 MB_FLASH0_EN 36 INV_EN

SYSTEM_ID0 SYSTEM_ID1 MB_FLASH0_EN INV_EN GPIO27 GPIO28 STP_PCI# SATACLKREQ#

CLKOUT_BCLK0_N / CLKOUT_PCIE8N CLKOUT_BCLK0_P / CLKOUT_PCIE8P

AM3 AM1 BG10 T1 BE10 BD10

CLK_PCH_CPU_CLK# CLK_PCH_CPU_CLK H_PECI H_RCIN# H_CPUPWRGD

CLK_PCH_CPU_CLK# CLK_PCH_CPU_CLK H_PECI 4 39 4 4

4

+1_05V_VTT

GPIO

SCLOCK / GPIO22 MEM_LED / GPIO24 GPIO27 GPIO28 STP_PCI# / GPIO34

PECI RCIN#

1
H_RCIN# R291 56_J 0402 H_CPUPWRGD R293 1 56_J 2 0402

R532 1 NC_10K_J 0402 SATACLKREQ# 2 R578 1 10K_J 2 0402 H_A20GATE R980 1 10K_J

2 0402

DIS_FAN_MON#

DVT

CPU

DVT

PROCPWRGD THRMTRIP#

2

EVT
B

PM_THRMTRIP# 4,39
B

R979 1

NC_10K_J 2 0402

GPIO8 35 LCDID0 LCDID1 LCDID2 EVT LCDID3 LCDID0 LCDID1 LCDID2 LCDID3 GPIO45 RST_GATE LCDID4 RST_GATE LCDID4 INV_EN

SATACLKREQ# / GPIO35 SATA2GP / GPIO36 SATA3GP / GPIO37 SLOAD / GPIO38 SDATAOUT0 / GPIO39 PCIECLKRQ6# / GPIO45 PCIECLKRQ7# / GPIO46 SDATAOUT1 / GPIO48 SATA5GP / GPIO49 GPIO57 TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9 TP10 BA22 AW22 BB22 AY45 AY46 AV43 AV45 AF13 M18 N18 AJ24 AK41 AK42 M32 N32 M30 N30 H12 AA23 AB45 AB38 AB42 AB41 T39 P6 C10 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
TP395 TP396 TP398 TP397 TP402 TP399 TP401 TP400 TP410 TP403 TP405 TP404 TP408 TP407 TP409 TP406 TP418 TP411 TP413 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL 20MIL
C

R924 1 10K_J

2 0402

35 35 35

MB_FLASH0_EN 1 2 R943 10K_J 0402

DVT
1 2 R982 NC_10K_J 0402 1 2 R974 NC_10K_J 0402 1 R1626 10K_J 2
0402 GPIO27 GPIO28 SATACLKREQ#

DVT EVT 35
4

39 CRIT_TEMP_REP# 35 DIS_FAN_MON#

CRIT_TEMP_REP# AA4

F8

+3VRUN

DVT
R6004 1 10K_J R6005 1 10K_J

2 0402 2 0402 2 0402

ID_LPC_PCI# RUNTIME_SCI#_D CRIT_TEMP_REP#

C

R6006 1 10K_J

PVT
+3VRUN R5931 1 NC_100K_J2 0402 R5866 1 100K_J 2 0402 R5932 1 100K_J 2 0402 R5933 1 100K_J 2 0402 R5934 1 100K_J 2 0402 LCDID4 LCDID3 LCDID2 LCDID1 LCDID0

DVT
R5939 1 10K_J

2 0402

LCDID4

A4 A49 A5 A50 A52 A53 B2 B4 B52 B53 BE1 BE53 BF1 BF53 BH1 BH2 BH52 BH53 BJ1 BJ2 BJ4 BJ49 BJ5 BJ50 BJ52 BJ53 D1 D2 D53 E1 E53

VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8 VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21 VSS_NCTF_22 VSS_NCTF_23 VSS_NCTF_24 VSS_NCTF_25 VSS_NCTF_26 VSS_NCTF_27 VSS_NCTF_28 VSS_NCTF_29 VSS_NCTF_30 VSS_NCTF_31
Ibexpeak-M null

TP11

NCTF

RSVD

TP12 TP13 TP14 TP15 TP16 TP17 TP18 TP19 NC_1 NC_2 NC_3 NC_4 NC_5 INIT3_3V# TP24

DVT
1 1
TP420 TP419 20MIL 20MIL

D

D

PVT

FOXCONN
Title Size A3 Date:
1 2 3 4 5 6 7

HON HAI Precision Ind. Co., Ltd. CCPBG - R&D Division
Rev

PCH (GPIO,VSS_NCTF,RSVD)
Document Number

M960&M970 H Model
Tuesday, December 29, 2009 Sheet 15
8

SA
of 86

5

4

3

2

1

Default is use Internal VRM
For Disable Arrandale Graphic GPIO27 floating as Internal VRM and there is no need external supply
D

+1_05V_VTT L78

+1.05V_VCCA_CLK

D

NC_10UH_0805 EBLS2012-100K

1

DVT
+1_05V_VTT

2

2

C975 NC_10U_6.3V_Y 0805_Y5V

C894 NC_1U_6.3V_Y 0402_Y5V

U69J

POWER
VCCIO[5] VCCIO[6] VCCIO[7] VCCIO[8] VCCSUS3_3[1] VCCSUS3_3[2] VCCSUS3_3[3] VCCSUS3_3[4] VCCSUS3_3[5] VCCSUS3_3[6] VCCSUS3_3[7] VCCSUS3_3[8] VCCSUS3_3[9] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13] VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16] VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19] VCCSUS3_3[20] VCCSUS3_3[21] VCCSUS3_3[22] VCCSUS3_3[23] VCCSUS3_3[24] VCCSUS3_3[25] VCCSUS3_3[26] VCCSUS3_3[27] VCCSUS3_3[28] VCCIO[56] V5REF_SUS V24 V26 Y24 Y26 V28 U28 U26 U24 P28 P26 N28 N26 M28 M26 L28 L26 J28 J26 H28 H26 G28 G26 F28 F26 E28 E26 C28 C26 B27 A28 A26 U23 V23 F24

+1_05V_VTT

3A (VCCIO)
+1_05V_VTT +1_05VRUN_DPLLA L28 10UH_0805 EBLS2012-100K

1

1

AP51 AP53

VCCACLK[1] VCCACLK[2] VCCLAN[1] VCCLAN[2] DCPSUSBYP VCCME[1] VCCME[2] VCCME[3] VCCME[4] VCCME[5] VCCME[6]

2

320mA

1

2

1

Y20
TP_PCH_VCCDSW

L63 C146 0.1U_10V_K 0402_X5R 10UH_0805 EBLS2012-100K

AD38 AD39 AD41 AF43

2

1

1

2

+3VALW

163mA

+1_05VRUN_DPLLB

USB

R1631

1 0_J

2 0603 1 1 1
C5246 22P_50V_J 0402_NPO C268 22U_6.3V_M_B 0805 C267 22U_6.3V_M_B 0805

VCCME

AF41
C624 1U_6.3V_Y 0402_Y5V

+3VALW

AF42 V39 V41

163mA

1

+3VALW

1

C

Clock and Miscellaneous

VCCME[7] VCCME[8] VCCME[9] VCCME[10] VCCME[11] VCCME[12]

For RF Noise

2

V42 1
C661 1U_6.3V_Y 0402_Y5V

2

C145 0.1U_10V_K 0402_X5R

null SD103AWS D4

2

2

2

2

1

2

+1_05V_VTT

1.85A

1

2

2

C674 0.1U_10V_K 0402_X5R

C494 1U_6.3V_Y_Y 0402

1
R488 NC_NV_0_J 0402

2

R1661 0_J 0603

C626 NC_1U_6.3V_Y 0402_Y5V

2

AF24

1

R1660 1 2 NC_0_J 0603

2

1

VCCLAN

AF23

C474 1U_6.3V_Y_Y 0402

R224 NC_NV_0_J R455 0402 NC_0_J 0603

1

C618 1U_6.3V_Y 0402_Y5V

C

2 R366

1

+1_05V_VTT

1

Y39 Y41 Y42

+5VALW

1mA
+3VRUN

2

3A (VCCIO)

100_F 0402 C141 1U_6.3V_Y 0402_Y5V

2

EVT

1
D14 SD103AWS null

+VCCRTCEXT

V9

DCPRTC

3.062A (VCCIO)
+1_05V_VTT R823 0_J 0805 +1_05VRUN_SSCVCC

68mA 69mA
1

VCCVRM[3] VCCADPLLA[1] VCCADPLLA[2] VCCADPLLB[1] VCCADPLLB[2] VCCIO[21] VCCIO[22] VCCIO[23] VCCIO[2]

PCI/GPIO/LPC

1

1

C667 0.1U_10V_K 0402_X5R

196mA

2

+1_05V_5V_8V_RUN

1mA
+5VRUN

2

AU24 +1_05VRUN_DPLLA BB51 BB53 +1_05VRUN_DPLLB BD51 BD53

V5REF VCC3_3[8] VCC3_3[9] VCC3_3[10] VCC3_3[11] VCC3_3[12] VCC3_3[13] VCC3_3[14]

K49 J38 L38 M36 1 N36 2 P36 U35 AD13
L29 C143 0.1U_10V_K 0402_X5R +3VRUN

2

R325 1 100_F 0402

2

357mA
+3VRUN

C619 1U_6.3V_Y 0402_Y5V

EVT 357mA
1 2
C144 0.1U_10V_K 0402_X5R +3VRUN

2

1 1
C5247 22P_50V_J 0402_NPO

1

2

2

C621 1U_6.3V_Y 0402_Y5V

2

C622 1U_6.3V_Y 0402_Y5V

AH23 AJ35 AH35 AF34

1

1

1

B

2

For RF Noise
2
C666 0.1U_10V_K 0402_X5R

C623 1U_6.3V_Y 0402_Y5V

AH34 AF32 V12

VCCIO[3] VCCIO[4] DCPSST VCCSATAPLL[1] VCCSATAPLL[2] AK3 AK1
+1.05V_VCCAPLL C976 NC_10U_6.3V_Y 0805_Y5V NC_10UH_0805 C737 EBLS2012-100K NC_1U_6.3V_Y +1.05V_VCC_SATA 0402_Y5V

+1_05V_VTT

2

2

2

C6326 NC_680P_50V_K 0603_X7R

C6327 NC_680P_50V_K 0603_X7R

1

31mA

C6328 NC_680P_50V_K 0603_X7R

B

1

1

+1_05V_VTT

DVT
For EMI

2

2

Y22 2
C664 0.1U_10V_K 0402_X5R

DCPSUS VCCIO[9]

1

AH22
+1_05V_5V_8V_RUN

2 1
C731 1U_6.3V_Y 0402_Y5V

R825 1 0_J 0603

3A (VCCIO)

1

P18 U19 U20

VCCSUS3_3[29]

VCCVRM[4]

AT20 AH19 AD20 AF22 AD19 AF20 AF19 AH20 AB19 AB20 AB22 AD22 AA34 Y34 Y35 AA35 L30

DVT

PCI/GPIO/LPC

VCCSUS3_3[30] VCCSUS3_3[31] VCCSUS3_3[32]

SATA

163mA 357mA
+1_05V_VTT +3VRUN

+3VALW

VCCIO[10] VCCIO[11] VCCIO[12] VCCIO[13] VCCIO[14] VCCIO[15] VCCIO[16] VCCIO[17] VCCIO[18] VCCIO[19] VCCIO[20] VCCME[13] VCCME[14] VCCME[15] VCCME[16] VCCSUSHDA

2

1

C665 0.1U_10V_K 0402_X5R

U22

V15 2
C663 0.1U_10V_K 0402_X5R

VCC3_3[5] VCC3_3[6] VCC3_3[7]

V16 Y16

1mA
2 0603 2

1

2
+1_05V_VTT

+VCCPLLVRM 2

R826 1 0_J 0603

1.85A 6mA
2 1
C658 1U_6.3V_Y 0402_Y5V R86 1 0_J 0603 +3VALW
A

R1610 1 0_J

V_CPU_IO

AT18 2
C691 0.1U_10V_K 0402_X5R

A

C136 4.7U_6.3V_K 0603_X5R

1

1

1

C698 0.1U_10V_K 0402_X5R

AU18

V_CPU_IO[2]

CPU

V_CPU_IO[1]

R893 R894 R895 R896

1 1 1 1

0_J 0_J 0_J 0_J

2 2 2 2

0402 0402 0402 0402

2

+VCCSUSHDA

VCCRTC

2

1

1

C673 0.1U_10V_K 0402_X5R

2

2mA

C672 0.1U_10V_K 0402_X5R

2

Ibexpeak-M null

HDA

A12

VCCRTC

RTC

Title

FOXCONN

HON HAI Precision Ind. Co., Ltd. CCPBG - R&D Division
Rev

Size Document Number Custom Date:
5 4 3 2

PCH (POWER) 1/2 M960&M970 H Model
Thursday, December 24, 2009
1

SA
16 of 86

Sheet

5

4

3

2

1

+VCCA_DAC L64
D

70mA
1 R944 2
0_J 0603

+3VRUN

+1_05V_VTT

For RF Noise
1 1
C5248 22P_50V_J 0402_NPO

1

1

1.5A
U69G C632 1U_6.3V_Y 0402_Y5V

D

CRT

2

2

2

TSC

C978 10U_6.3V_Y 0805_Y5V

Default is use Internal VRM

3.062A (VCCIO)
+1_05V_VTT

AB24 AB26 AB28 AD26 AD28 AF26 AF28 AF30 AF31 AH26 AH28 AH30 AH31 AJ30 AJ31

POWER
VCCADAC[1] VCCADAC[2] VSSA_DAC[1] VSSA_DAC[2]

VCCCORE[1] VCCCORE[2] VCCCORE[3] VCCCORE[4] VCCCORE[5] VCCCORE[6] VCCCORE[7] VCCCORE[8] VCCCORE[9] VCCCORE[10] VCCCORE[11] VCCCORE[12] VCCCORE[13] VCCCORE[14] VCCCORE[15]

2

AE50 AE52 AF53 AF51

C977 10U_6.3V_Y 0805_Y5V

1

R407 NC_0_J 0402

180R-100MHZ_0603 TI160808U181

+3VRUN_LDO

1 R408 2
NC_0_J 0603

2

VCC CORE

VCCALVDS VSSA_LVDS VCCTX_LVDS[1] VCCTX_LVDS[2] VCCTX_LVDS[3] VCCTX_LVDS[4]

AH38 AH39 AP43 AP45 AT46 AT45

+1_05V_VTT

L71

+1.05V_VCCPLL_EXP

AK24 BJ24

VCCIO[24] VCCAPLLEXP

LVDS

For Disable Arrandale Graphic GPIO27 floating as Internal VRM and there is no need external supply

VCCALVDS, VCCTX_LVDS to GND VSSA_LVDS NC For disable LVDS

C

NC_1UH_0805 EFLS2012-1R0M RDC15

HVCMOS

2

C979 NC_10U_6.3V_Y 0805_Y5V

VCC3_3[2] AN20 AN22 AN23 AN24 AN26 AN28 BJ26 BJ28 AT26 AT28 AU26 AU28 AV26 AV28 AW26 AW28 BA26 BA28 BB26 BB28 BC26 BC28 BD26 BD28 BE26 BE28 BG26 BG28 BH27 AN30 AN31 AN35 VCCIO[25] VCCIO[26] VCCIO[27] VCCIO[28] VCCIO[29] VCCIO[30] VCCIO[31] VCCIO[32] VCCIO[33] VCCIO[34] VCCIO[35] VCCIO[36] VCCIO[37] VCCIO[38] VCCIO[39] VCCIO[40] VCCIO[41] VCCIO[42] VCCIO[43] VCCIO[44] VCCIO[45] VCCIO[46] VCCIO[47] VCCIO[48] VCCIO[49] VCCIO[50] VCCIO[51] VCCIO[52] VCCIO[53] VCCIO[54] VCCIO[55] VCC3_3[1] VCCVRM[1] VCCFDIPLL VCCIO[1] VCC3_3[3] VCC3_3[4]

1

AB34
C

AB35 AD35

+3VRUN

357mA

3.062A (VCCIO)
+1_05V_VTT R1449

DVT
+1.05V_VCC_EXP

For RF Noise
2 1 1 1 1 1
C5249 22P_50V_J 0402_NPO C980 10U_6.3V_Y 0805_Y5V C636 1U_6.3V_Y 0402_Y5V C635 1U_6.3V_Y 0402_Y5V

1

2

2

2

2

2

2

C634 1U_6.3V_Y 0402_Y5V

1

0_J 1206

1

C115 0.1U_10V_K 0402_X5R

2

+1_05V_5V_8V_RUN