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5

4

3

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FILE LIST

01

D

A3 BLOCK DIAGRAM
35
North Bridge DDR

THERMAL
05

POWER (IMVP4) FAN
03

BANIAS 24.5W
04

37

38

39

40

41

42

43

44

45

PSB
CPU Celeron/ Banias/ Dothan(400) Celeron/ Banias/ Dothan(400) Celeron/ Banias/ Dothan(400) Celeron/ Banias/ Dothan(400)/ Dothan(533) Celeron/ Banias/ Dothan(400)/ Dothan(533)

LVDS LCD
12

DDR TERMINATION MCHM MONTARA -GM 3.8W
06 07 08 09 11

A3N
C

855GM 852GM

266 266

855GM/GME:266/333 852GM/GMV/GME:266/266/333 DUAL DDR SODIMM

A3L

A3Ne/A6Ne 855GME 333 852GME 333 A3Le 852GMV 266

RGB CRT
13

DDR
10

HUB CLOCK GEN
31 18 33
B

AUDIO AMP & MIC
32 30

AC'97 CODEC

AC97 ICH4 2.9W IDE Ultra ATA100
25

SECONDARY IDE

PRIMARY IDE
24

MDC PCI
14 15 16 17

LPC

1394 Card Reader
22

1394 CARDBUS
21 22

MINIPCI & DEBUG PORT
20

LAN
19

USB 2.0 USB X4
34

KBC
26 27

SIO
28

SIR

PCMCIA
23
A

LAN & Modem Jack
33

Discharge circuit
29
5

Function Key
36 46

Screw Hole

USB X2 for CCD & WLAN
12

PRINTER PORT
28

SSID/SVID LAN:1045/1043 MDC:1826/1043 CardBUS:1894/1043 1394:1897/1043
2

01_BLOCK DIAGRAM 02_POWER DIAGRAM 03_CPU-BANIAS(HOST) 04_CPU-BANIAS(PWR) 05_THERMAL D 06_NB-MCHM(DDR) 07_NB-MCHM(HOST) 08_NB-MCHM(VGA) 09_NB-MCHM(PWR) 10_DUAL DDR SODIMM 11_DDR TERMINATION 12_LVDS & BACKLIGHT 13_CRT CONNECTOR 14_ICH4-M(HUB_PCI) 15_ICH4-M(H_U_IDE_PM) 16_ICH4-M(PWR) 17_ICH4-M_PULLUP 18_CLOCK-ICS950815 19_LAN-RTL8100CL 20_MINIPCI C 21_CB1394-R5C593(1) 22_CB1394-R5C593(2) 23_PCMCIA SOCKET 24_IDE-HD 25_IDE-ODD 26_KBC-M38857 27_SIO-ITE7805 28_IR&LPT_PORT 29_DISCHARGE CIRCUIT 30_CODEC-ALC650 31_AUDIO AMP 32_MIC 33_MDC&RJ45&RJ11 34_USB 35_FAN&Audio DJ 36_FUNCTION KEY B 37_PWR & RESET SEQ 38_VCORE 39_1.25V&1.8V 40_2.5V&1.5V&1.35V&1.05V 41_SYSTEM 42_LOAD SWITCH 43_CHARGER 44_PIC16C54 45_BATLOW/SD# 46_SCREW HOLE & M/B SETTING 47_REVISION(1) 55_Power Net Reference 48_REVISION(2) 49_REVISION(3) 50_REVISION(4) 51_BLOCK DIAGRAM 5E A 52_BLOCK DIAGRAM 7H 53_Part Reference 1 54_Part Reference 2

Title : BLOCK DIAGRAM
ASUSTek COMPUTER INC. NB1 Size Custom Project Name

Engineer:

John Hung
Rev 2.4

A3N/A3L
Sheet
1

Date: Monday, November 15, 2004
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System work voltage Adapter in : 19.5 ~18.5 V Battery in : 16.8 ~ 11.6V
CPU_VRON +VCORE
D

VR_VID0-VR_VID5 PM_STPCPU#.,PM_DPRSLPVR.,PCI#.,MCH_OK.,CLK_EN# (25A) VRM_PWRGD +5VO (5A) SUSB# SUSB# SUSC# SUSB# +V5S +V3S +V5 +V3 +V12S +V12 +V1.5S

AC_BAT_SYS

MAX1987 SUSC#. (3V_ON) LTC3728 (Regulator) 78L12 SUSB# +1.5VO (2A)

+V3.3SUS (5A) +12VO (0.15A) +V1.5S +V2.5 +V1.2S

+V1.25S : JP4,5 page 39 +V2.5 : JP6 page 40 +V1.2S : JP7 page 40 +VCCP : JP9 page 40 +V5S : JP13 page 42 +V5 : JP14 page 42 +V1.5SUS : JP15 page 39 +V1.8 : JP16,19 page 39 +V1.8S : JP17 page42 +V12 : JP18 page 42 +V1.5S : JP22 page 40 +V5A : JP24 page 40 +V3.3A : JP26 or 27 page 39 +V3.3S : JP28 page 42 +V3.3 : JP29 page 42

D

C

+2.5VO (5A) SUSC# TPS5130 +5VAO +1.2VO (2A) SUSB# SUSB# SUSB# +V2.5 CM8562 +V1.25S (2A) (Regulator) SUSC# +2.5VO MIC37101-1.8 +1.8VO LDO (1A) +1.05VO (1A)

SUSB#

SWITCH

A/D_VIN BAT_S TS#

+VCCP

Power Signal Circuit

SHUT_DOWN# BAT_IN#_OC ACIN_OC AC_APR_UC

C

+V1.8 SUSB# +V1.8S
TS# SUSB# CHG EN# AC_APR_UC SMC_BAT SMD_BAT

B

PIC + TL494 (Charge) FDS6679 FD6JK3TP

BAT

PIC16C54C

CHG LED_UP PWR LED_UP
B

BAT_LLOW

A/D_VIN

+5VO (20mA) 78L05 SWITCH (Regulator) +5VCHG (100mA) (F02JK2E) +V3.3A

+5VLCM +2.5VREF LM4040BIM (Regulator) (500uA)

+3VALWAYS_M MIC5223MB (Regulator)

+V3.3SUS
A

CM2855 (LDO) +5VAO

+V1.5SUS
A

+5VALWAYS Title : POWER DIAGRAM
ASUSTek COMPUTER INC. NB1 Size Custom Project Name

Engineer:

Adams Lin
Rev 2.4

A3N/A3L
Sheet
1

Date: Monday, November 15, 2004
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CPU Pin A1 need to be enlarged(M)
7 H_A#[16:3] U31B H_A#16 H_A#15 H_A#14 H_A#13 H_A#12 H_A#11 H_A#10 H_A#9 H_A#8 H_A#7 H_A#6 H_A#5 H_A#4 H_A#3 H_REQ#4 H_REQ#3 H_REQ#2 H_REQ#1 H_REQ#0 AA2 Y3 AA3 U1 Y1 Y4 W2 T4 W1 V2 R3 V3 U4 P4 U3 T1 P1 T2 P3 R2 A[16]# A[15]# A[14]# A[13]# A[12]# A[11]# A[10]# A[9]# A[8]# A[7]# A[6]# A[5]# A[4]# A[3]# ADSTB[0]# REQ[4]# REQ[3]# REQ[2]# REQ[1]# REQ[0]# ADDRESS GROUP 0 ADS# PRDY# PREQ# BNR# BPRI# DBR# N2 A10 B10 L1 J3 A7 1 T107TPC28b H_PRDY# H_PREQ# H_ADS# 7 U31A

H_D#[63:0] 7

DATA GROUP 0

D

DATA GROUP

2

H_BNR# H_BPRI#

7 7

COMMON CLOCK -> L6 WIDTH: 5 mils SPACE >= 1:2 GROUP SPACE >=1:5 LENGTH: 1" - 6.5"(OPT: 4"+/-0.5") Breakout Length:<=200 mil (#0011)

7

H_ADSTB#0

DEFER# DRDY# DBSY#

L4 H2 M2

H_DEFER# 7 H_DRDY# 7 H_DBSY# 7 7 H_DINV#0 7 H_DSTBN#0 7 H_DSTBP#0

H_D#15 H_D#14 H_D#13 H_D#12 H_D#11 H_D#10 H_D#9 H_D#8 H_D#7 H_D#6 H_D#5 H_D#4 H_D#3 H_D#2 H_D#1 H_D#0

C25 E23 B23 C26 E24 D24 B24 C20 B20 A21 B26 A24 B21 A22 A25 A19 D25 C23 C22 K25 N25 H26 M25 N24 L26 J25 M23 J23 G24 F25 H24 M26 L23 G25 H23 J26 K24 L24

D[15]# D[14]# D[13]# D[12]# D[11]# D[10]# D[9]# D[8]# D[7]# D[6]# D[5]# D[4]# D[3]# D[2]# D[1]# D[0]# DINV[0]# DSTBN[0]# DSTBP[0]# D[31]# D[30]# D[29]# D[28]# D[27]# D[26]# D[25]# D[24]# D[23]# D[22]# D[21]# D[20]# D[19]# D[18]# D[17]# D[16]# DINV[1]# DSTBN[1]# DSTBP[1]# DATA GROUP 1 SOCKET479P

D[47]# D[46]# D[45]# D[44]# D[43]# D[42]# D[41]# D[40]# D[39]# D[38]# D[37]# D[36]# D[35]# D[34]# D[33]# D[32]# DINV[2]# DSTBN[2]# DSTBP[2]# D[63]# D[62]# D[61]# D[60]# D[59]# D[58]# D[57]# D[56]# D[55]# D[54]# D[53]# D[52]# D[51]# D[50]# D[49]# D[48]# DINV[3]# DSTBN[3]# DSTBP[3]# DATA GROUP 3

Y25 AA26 Y23 V26 U25 V24 U26 AA23 R23 R26 R24 V23 U23 T25 AA24 Y26 T24 W25 W24 AF26 AF22 AF25 AD21 AE21 AF20 AD24 AF23 AE22 AD23 AC25 AC22 AC20 AB24 AC23 AB25 AD20 AE24 AE25

H_D#47 H_D#46 H_D#45 H_D#44 H_D#43 H_D#42 H_D#41 H_D#40 H_D#39 H_D#38 H_D#37 H_D#36 H_D#35 H_D#34 H_D#33 H_D#32

DATA GROUP 0,2 -> L6 DATA GROUP 1,3 -> L6 SPACE >= 1:3 GROUP SPACE >=1:5 LENGTH: 0.5" - 5.5" (#0012)

D

H_DINV#2 7 H_DSTBN#2 7 H_DSTBP#2 7 H_D#63 H_D#62 H_D#61 H_D#60 H_D#59 H_D#58 H_D#57 H_D#56 H_D#55 H_D#54 H_D#53 H_D#52 H_D#51 H_D#50 H_D#49 H_D#48 H_DINV#3 7 H_DSTBN#3 7 H_DSTBP#3 7

CONTROL

7

H_REQ#[4:0]

BR0#

N4 A4 B5 J2

H_BR0# H_IERR#

H_BR0# 2 R271 1 56Ohm H_INIT#

7

+VCCP

IERR# INIT#

7

H_A#[31:17]

ADDRESS GROUP 1

ADDR GROUP 0 -> L6 ADDR GROUP 1 -> L6 SPACE >= 1:2 STROBE SPACE >=1:3 GROUP SPACE >=1:5

LENGTH: 0.5" - 6.5" (#0012)
C

H_A#31 H_A#30 H_A#29 H_A#28 H_A#27 H_A#26 H_A#25 H_A#24 H_A#23 H_A#22 H_A#21 H_A#20 H_A#19 H_A#18 H_A#17

0.5"-12" <=10" <=10"

7

H_ADSTB#1

AF1 AE1 AF3 AD6 AE2 AD5 AC6 AB4 AD2 AE4 AD3 AC3 AC7 AC4 AF4 AE5

A[31]# A[30]# A[29]# A[28]# A[27]# A[26]# A[25]# A[24]# A[23]# A[22]# A[21]# A[20]# A[19]# A[18]# A[17]# ADSTB[1]#

15,27

LOCK#

H_LOCK# 7

RESET# RS[2]# RS[1]# RS[0]# TRDY# HIT# HITM#

B11 L2 K1 H1 M3 K3 K4

H_RS#2 H_RS#1 H_RS#0

<=3"

H_CPURST# 7 7 H_DINV#1 7 H_DSTBN#1 7 H_DSTBP#1 H_RS#[2:0] 7 H_TRDY# 7 H_HIT# H_HITM# 7 7

H_D#31 H_D#30 H_D#29 H_D#28 H_D#27 H_D#26 H_D#25 H_D#24 H_D#23 H_D#22 H_D#21 H_D#20 H_D#19 H_D#18 H_D#17 H_D#16

C

8

H_DPWR#

1"-6.5"

C19

DPWR# SOCKET479P

+VCCP

+VCCP

T92 TPC28b T95 TPC28b

_CLK_CPU_BCLK 1 _CLK_CPU_BCLK# 1

H_VID5 H_VID4 H_VID3 H_VID2 H_VID1 H_VID0

VR_VID5 VR_VID4 VR_VID3 VR_VID2 VR_VID1 VR_VID0

38 38 38 38 38 38

TOPOLOGY 2A: R-CPU-ICH Y-FORK CPU-ICH: 0.5" - 12" R73 R - CPU <= 3" 332Ohm (#0013)
H_PWRGD

TOPOLOGY 1B: CPU-ICH-R CPU-ICH: 0.5" - 12" ICH-R <= 3" (#0013)
H_FERR#

1

1

+VCCP 1 R71 56Ohm 2

HOSTCLK

1

1.71V - 1.89V(+/- 5%) S0-S1M: 0.3A
+V1.8S_PROC +V1.8S_F26 1 C26 0.01UF/10V 2 2 1 C24 10UF/6.3V

T94 TPC28b T96 TPC28b

1 1

B

15 15 15 8,15 15 15 15 15 15

H_A20M# H_FERR# H_IGNNE# H_DPSLP# H_CPUSLP# H_INTR H_NMI H_SMI# H_STPCLK#

<=10" 0.5"-12" <=10" <=10" <=10" <=10" <=10" <=10" <=10" <=10"
H_VID5 H_VID4 H_VID3 H_VID2 H_VID1 H_VID0

C2 D3 A3 B7 A6 D1 D4 B4 C6 E4 H4 G4 G3 F3 F2 E2 AC26 N1 B1 F26 B18 A18 C17 B17

A20M# FERR# IGNNE# DPSLP# SLP# LINT0 LINT1 SMI# STPCLK# PWRGOOD VID[5] VID[4] VID[3] VID[2] VID[1] VID[0]

COMP[3] COMP[2] COMP[1] COMP[0] BPM[3]# BPM[2]# BPM[1]# BPM[0]#

AB1 AB2 P26 P25 C9 A9 B8 C8

CPU_COMP3 CPU_COMP2 CPU_COMP1 CPU_COMP0 H_BPM#3 H_BPM#2 H_BPM#1 H_BPM#0

1

CPU PLL CIRCUITS

U31C 18 _CLK_CPU_BCLK 18 _CLK_CPU_BCLK#

2"-8" 2"-8"

B15 B14 A16 A15

BCLK[0] BCLK[1] ITP_CLK[0] ITP_CLK[1]

TOPOLOGY 2B: MCH-CPU-ICH4 MCH-CPU:0.5"-6.5" CPU-ICH4:0.5"-12" (#0013)
H_DPSLP# 1 1 1 1 T103TPC28b T20 TPC28b T106TPC28b T105TPC28b

TOPOLOGY 1C: CPU-R-LSC-ICH CPU-R: 0.5" - 12" R - LSC<= 3" LSC-ICH:0.5"-12"

+VCCP

H_GTLREF0 LENGTH <=0.5" WIDTH = 5 mils SPACE >= 25 mils X BPSB(#0004)
2

R224 1KOhm

Close to Pin AD26 of CPU

2

H_GTLREF0 Same Side w/ CPU R223 2KOhm

R244 56Ohm H_PROCHOT# 2

LEGACY CPU

15 H_PWRGD +V1.8S_VCCA +V1.8S_AC26 1 C325 0.01UF/10V 2 2 1 C322 10UF/6.3V

GTLREF[3] GTLREF[2] GTLREF[1] GTLREF[0]

AC1 G1 E26 AD26

TOPOLOGY 3: CPU-ICH-R-LSC-FWH CPU-ICH:0.5" - 12" R - LSC <= 3" LSC-FWH:0.5"-6"(#0013)
H_INIT#

TOPOLOGY 1B: CPU-ICH-R CPU-ICH: 0.5" - 12" ICH-R <= 3" (#0013)

+VCCP

2

B

H_GTLREF0

R239 56Ohm 2

H_THRMTRIP_S# TEST1 TEST2 C5 F23 1 1 T21 TPC28b T88 TPC28b

CPU_COMP2 : Length <= 0.5" Width = 20 mils(L1/L4) Space>= 25 mils X BPSB(#0001)
R75 27.4Ohm CPU_COMP2 1 2

CPU_COMP0 : Length <= 0.5" Width = 20 mils(L1/L4) Space>= 25 mils X BPSB(#0001)
R221 27.4Ohm CPU_COMP0 1 2

MISC

2308

+V1.8S_AC26 +V1.8S_N1 +V1.8S_B1 +V1.8S_F26

CPU DEBUG PORT
A13 C12 A12 C11 B13 AE7 H_TCK H_TDI H_TDO H_TMS H_TRST# H_PREQ# H_PRDY# R261 2 R260 2

+VCCP 1 200Ohm / 1 56Ohm

VCCA[3] VCCA[2] VCCA[1] VCCA[0] THERMDA THERMDC THERMTRIP# PROCHOT# RSVD5 RSVD4 RSVD3 RSVD2 RSVD1 RSVD0 SOCKET479P

+V1.8S_N1 1 C104 0.01UF/10V 2 2 1 C100 10UF/6.3V

5 H_THERMDA 5 H_THERMDC 15 H_THRMTRIP_S# 38 PM_PSI#

TCK TDI TDO TMS TRST# VCCSENSE

1

Close to Pin A8 of CPU

Pin AD1,AC2 of BANIAS

H_PROCHOT#

T93 TPC28b T98 TPC28b

+V1.8S_B1 1 1
A

E1 1 C16 C3 1 C14 AF7 B2

Close to Pin A12 of CPU Width= 5 mils H_TMS Length <= 2"
VSSSENSE AF6 H_TDO H_TDI H_TCK H_TRST#

CPU JTAG
R250 R247 R248 R246 R245 2 2 2 1 1 1 1 1 2 2 39Ohm 56Ohm 150Ohm 27.4Ohm 680Ohm

+VCCP

CPU_COMP3 : Length <= 0.5" Width = 5 mils Space>= 25 mils X BPSB(#0001)
R76 56Ohm CPU_COMP3 1 2

CPU_COMP1 : Length <= 0.5" Width = 5 mils Space>= 25 mils X BPSB(#0001)
R222 56Ohm 2

C98 0.01UF/10V

C103 10UF/6.3V

CPU_COMP1 1

A

Celeron Frequency 100 1.8V 1.8V

Banias 100 1.8V 1.8V

Dothan (400) 100 1.8V 1.8V

Dothan (533) 133 NC 1.5V

2

2

Pin AD1,AC2 of BANIAS

2025

2308

VCCA[1:3] VCCA[0]

Title :
ASUSTek COMPUTER INC. NB1

CPU-BANIAS(HOST)
John Hung
Rev 2.4

U54 switch to
5

Engineer:

Pin 3,4
4

Pin 1,2
3 2

Size Custom

Project Name

A3N/A3L
Sheet
1

Date: Monday, November 15, 2004

3

of

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HFM(1.3GHz-1.7GHz): 1.468V LFM( 600MHz): 0.956V

0.745V - 1.356V(+/- 1.5%) C0: 25 A C3: 7.59A C4: 0.9A

+VCORE AC24 AC21 AC18 AC16 AC14 AC12 AC10 AC8 AC5 AC2 AB26 AB23 AB21 AB19 AB17 AB15 AB13 AB11 AB9 AB7 AB5 AB3 AA25 AA22 AA20 AA18 AA16 AA14 AA12 AA10 AA8 AA6 AA4 AA1 Y24 Y21 Y5 Y2 W26 W23 W22 W6 W3 V25 V21 V5 V4 V1 U24 U22 U6 U2 T26 T23 T21 T5 T3 R25 R22 R6 R4 R1 P24 P21

D

U31E SOCKET479P

D

D6 D8 D18 D20 D22 E5 E7 E9 E17 E19 E21 F6 F8 F18 F20 F22 G5 G21 H6 H22 J5 J21 K22 U5 V6 V22 W5 W21 Y6 Y22 AA5 AA7 AA9 AA11 AA13 AA15 AA17 AA19 AA21 AB6 AB8 AB10 AB12 AB14 AB16 AB18 AB20 AB22 AC9 AC11 AC13 AC15 AC17 AC19 AD8 AD10 AD12 AD14 AD16 AD18

U31D SOCKET479P

VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60

+VCCP
C

+VCCP

GND

W4 VCCQ[1] P23 VCCQ[0]

D10 D12 D14 D16 E11 E13 E15 F10 F12 F14 F16 K6 L5 L21 M6 M22 N5 N21 P6 P22 R5 R21 T6 T22 U21

VCCP1 VCCP2 VCCP3 VCCP4 VCCP5 VCCP6 VCCP7 VCCP8 VCCP9 VCCP10 VCCP11 VCCP12 VCCP13 VCCP14 VCCP15 VCCP16 VCCP17 VCCP18 VCCP19 VCCP20 VCCP21 VCCP22 VCCP23 VCCP24 VCCP25

VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72

AE9 AE11 AE13 AE15 AE17 AE19 AF8 AF10 AF12 AF14 AF16 AF18

C35 0.1uF/10V

C89 0.1uF/10V

1.0V - 1.1V(+/- 5%) S0-S1M: 2.5 A(CPU,MCH,ICH)

AD1 AD4 AD7 AD9 AD11 AD13 AD15 AD17 AD19 AD22 AD25 AE3 AE6 AE8 AE10 AE12 AE14 AE16 AE18 AE20 AE23 AE26 AF2 AF5 AF9 AF11 AF13 AF15 AF17 AF19 AF21 AF24

VSS160 VSS159 VSS158 VSS157 VSS156 VSS155 VSS154 VSS153 VSS152 VSS151 VSS150 VSS149 VSS148 VSS147 VSS146 VSS145 VSS144 VSS143 VSS142 VSS141 VSS140 VSS139 VSS138 VSS137 VSS136 VSS135 VSS134 VSS133 VSS132 VSS131 VSS130 VSS129 VSS128 VSS127 VSS126 VSS125 VSS124 VSS123 VSS122 VSS121 VSS120 VSS119 VSS118 VSS117 VSS116 VSS115 VSS114 VSS113 VSS112 VSS111 VSS110 VSS109 VSS108 VSS107 VSS106 VSS105 VSS104 VSS103 VSS102 VSS101 VSS100 VSS99 VSS98 VSS97

VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192

VSS96 VSS95 VSS94 VSS93 VSS92 VSS91 VSS90 VSS89 VSS88 VSS87 VSS86 VSS85 VSS84 VSS83 VSS82 VSS81 VSS80 VSS79 VSS78 VSS77 VSS76 VSS75 VSS74 VSS73 VSS72 VSS71 VSS70 VSS69 VSS68 VSS67 VSS66 VSS65

P5 P2 N26 N23 N22 N6 N3 M24 M21 M5 M4 M1 L25 L22 L6 L3 K26 K23 K21 K5 K2 J24 J22 J6 J4 J1 H25 H21 H5 H3 G26 G23

VCC

C

1

2

2

1

+VCORE

CPU VCORE Decoupling Capacitor
Mid Frequency Decoupling (Place around Processor)
+VCCP

1

1

1

1

B

1

1

1

1

1

1

1

1

1

1

+ CE1 150U/4.0V

C34 0.1uF/10V

C42 0.1uF/10V

C336 0.1uF/10V

C344 0.1uF/10V

C337 0.1uF/10V

C340 0.1uF/10V

C360 0.1uF/10V

C335 0.1uF/10V

C41 0.1uF/10V

1

C359 10UF/6.3V 2 2

C338 10UF/6.3V 2

C368 10UF/6.3V 2

C369 10UF/6.3V 2

1

C51 10UF/6.3V

A2 A5 A8 A11 A14 A17 A20 A23 A26 B3 B6 B9 B12 B16 B19 B22 B25 C1 C4 C7 C10 C13 C15 C18 C21 C24 D2 D5 D7 D9 D11 D13 D15 D17 D19 D21 D23 D26 E3 E6 E8 E10 E12 E14 E16 E18 E20 E22 E25 F1 F4 F5 F7 F9 F11 F13 F15 F17 F19 F21 F24 G2 G6 G22

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64

+VCCP (CPU) Decoupling Capacitor (Place near CPU)
B

C59 0.1uF/10V

2

2

2

2

2

2

2

2

2

1

1

1

1

C70 10UF/6.3V 2 2

C358 10UF/6.3V 2

C57 10UF/6.3V 2

C351 10UF/6.3V 2

1

C352 10UF/6.3V

1

1

1

1

1

C357 10UF/6.3V 2 2

C346 10UF/6.3V 2

C69 10UF/6.3V 2

C39 10UF/6.3V 2

C355 10UF/6.3V 2

1

High Frequency Decoupling (Place underneath Processor) using 10uF/6.3V X5R
C343 10UF/6.3V +V1.8S 1 R397 2 0Ohm +V1.8S_PROC +V1.8S_PROC

2

2308
For A3N/A3NE/A3L: Load R397 For A3LE: Load C537, C538, Q93, R398, R399, R400, R404, R405, U53

C353 10UF/6.3V 2

+VCORE Bulk Decoupling

+V3.3S

Vref=1.176V
U53 3 2 1 EN VOUT GND ADJ VIN PG CM2855IM26 6 5 4 R400 22.1KOhm 2 1 1 1

1

2 1

R398 5.62KOhm

1

C538 4.7U

A

R399 20KOhm 2

R405 0Ohm
A

2

M3N : Four 200 uF are located in IMVP4 A3N : Delete 10uF/6.3V from 35pcs to 17pcs
8,18

R404 10KOhm 1 2 3

Q93A 2 1 Q93B UM6K1N UM6K1N

1

+V3.3S

6

2

C537 4.7U

Title :
ASUSTek COMPUTER INC. NB1 Size Custom Project Name

CPU-BANIAS(PWR)
John Hung
Rev 2.4

2

FREQ_SEL

5 4

Engineer:

A3N/A3L
Sheet
1

Date: Monday, November 15, 2004
5 4 3 2

4

2

of

55

5

4

3

2

1

D

D

C

Route H_THERMDA and H_THERMDC on the same layer ------------------OTHER SIGNALS 12 mils ===============GND 10 mils =========H_THERMDA(10 mils) 10 mils =========H_THERMDC(10 mils) 10 mils =========GND 12 mils ---------------------OTHER SIGNALS Avoid BPSB,Power

C

B

B

+V3.3S

+V3.3S_THM

Standby Mode: 3uA(Max. 10uA) Full Active: 0.5 mA(Max. 1mA)

1 R243 200Ohm

2 1

+V3.3S_THM

U33

2

1

C349 0.1uF/10V

10,17,18 SCL_3S 10,17,18 SDA_3S 15,35 PM_THRM#

SCL_3S SDA_3S

VCC

OS#_OC(Pull-Up 10K in Page 35)
4 2 3 2 OS#_OC H_THERMDA 1 OS#_OC 35 H_THERMDA 3

8 7 6

SMBCLK SMBDATA

OVERT DXP DXN

4"-8"
C354 2200P

PM_THRM#(Pull-Up 10K in Page 35) Close to Pin A18 & B18 of CPU

GND

ALERT#

MAX6657 5

H_THERMDC

4"-8"

H_THERMDC 3

A

A

Title : THERMAL
ASUSTek COMPUTER INC. NB1 Size Custom
5 4 3 2

Engineer:

John Hung
Rev 2.4

Project Name

A3N/A3L
Sheet
1

Date: Monday, November 15, 2004

5

of

55

5

4

3

2

1

3.8W
Thermal Power: ~ 3.8W
U32B DDR_DATA0 DDR_DATA1 DDR_DATA2 DDR_DATA3 DDR_DATA4 DDR_DATA5 DDR_DATA6 DDR_DATA7 DDR_DATA8 DDR_DATA9 DDR_DATA10 DDR_DATA11 DDR_DATA12 DDR_DATA13 DDR_DATA14 DDR_DATA15 DDR_DATA16 DDR_DATA17 DDR_DATA18 DDR_DATA19 DDR_DATA20 DDR_DATA21 DDR_DATA22 DDR_DATA23 DDR_DATA24 DDR_DATA25 DDR_DATA26 DDR_DATA27 DDR_DATA28 DDR_DATA29 DDR_DATA30 DDR_DATA31 DDR_DATA32 DDR_DATA33 DDR_DATA34 DDR_DATA35 DDR_DATA36 DDR_DATA37 DDR_DATA38 DDR_DATA39 DDR_DATA40 DDR_DATA41 DDR_DATA42 DDR_DATA43 DDR_DATA44 DDR_DATA45 DDR_DATA46 DDR_DATA47 DDR_DATA48 DDR_DATA49 DDR_DATA50 DDR_DATA51 DDR_DATA52 DDR_DATA53 DDR_DATA54 DDR_DATA55 DDR_DATA56 DDR_DATA57 DDR_DATA58 DDR_DATA59 DDR_DATA60 DDR_DATA61 DDR_DATA62 DDR_DATA63 AF2 AE3 AF4 AH2 AD3 AE2 AG4 AH3 AD6 AG5 AG7 AE8 AF5 AH4 AF7 AH6 AF8 AG8 AH9 AG10 AH7 AD9 AF10 AE11 AH10 AH11 AG13 AF14 AG11 AD12 AF13 AH13 AH16 AG17 AF19 AE20 AD18 AE18 AH18 AG19 AH20 AG20 AF22 AH22 AF20 AH19 AH21 AG22 AE23 AH23 AE24 AH25 AG23 AF23 AF25 AG25 AH26 AE26 AG28 AF28 AG26 AF26 AE27 AD27 AG14 AE14 AE17 AG16 AH14 AE15 AF16 AF17 AJ24 1 C114 0.1uF/10V

LxWxH=37.5x37.5x2.58
SM_SDQS0 SM_SDQS1 SM_SDQS2 SM_SDQS3 SM_SDQS4 SM_SDQS5 SM_SDQS6 SM_SDQS7 SM_SDQS8 SMA_A0 SMA_A1 SMA_A2 SMA_A3 SMA_A4 SMA_A5 SMA_A6 SMA_A7 SMA_A8 SMA_A9 SMA_A10 SMA_A11 SMA_A12 SMA_B1 SMA_B2 SMA_B4 SMA_B5 SM_CKE0 SM_CKE1 SM_CKE2 SM_CKE3 SM_CS#0 SM_CS#1 SM_CS#2 SM_CS#3 SM_BA0 SM_BA1 SM_RAS# SM_CAS# SM_WE# SM_CMDCLK0 SM_CMDCLK#0 SM_CMDCLK1 SM_CMDCLK#1 SM_CMDCLK2 SM_CMDCLK#2 SM_CMDCLK3 SM_CMDCLK#3 SM_CMDCLK4 SM_CMDCLK#4 SM_CMDCLK5 SM_CMDCLK#5 SM_DM0 SM_DM1 SM_DM2 SM_DM3 SM_DM4 SM_DM5 SM_DM6 SM_DM7 SM_DM8 SM_RCVENOUT# SM_RCVENIN# SMRCOMP AG2 AH5 AH8 AE12 AH17 AE21 AH24 AH27 AD151 AC18 AD14 AD13 AD17 AD11 AC13 AD8 AD7 AC6 AC5 AC19 AD5 AB5 AD16 AC12 AF11 AD10 AC7 AB7 AC9 AC10 AD23 AD26 AC22 AC25 AD22 AD20 AC21 AC24 AD25 AB2 AA2 AC26 AB25 AC3 AD4 AC2 AD2 AB23 AB24 AA3 AB4 AE5 AE6 AE9 AH12 AD19 AD21 AD24 AH28 AH151 AC15 AC16 AB1 AJ22 AJ19 DDR_DQS0 DDR_DQS1 DDR_DQS2 DDR_DQS3 DDR_DQS4 DDR_DQS5 DDR_DQS6 DDR_DQS7 T111TPC28b DDR_AA0 DDR_AA1 DDR_AA2 DDR_AA3 DDR_AA4 DDR_AA5 DDR_AA6 DDR_AA7 DDR_AA8 DDR_AA9 DDR_AA10 DDR_AA11 DDR_AA12 DDR_AB1 DDR_AB2 DDR_AB4 DDR_AB5 DDR_CKE0 DDR_CKE1 DDR_CKE2 DDR_CKE3 DDR_CS0# DDR_CS1# DDR_CS2# DDR_CS3# DDR_AA[12:0] 10,11

_DDR_DATA[63:0] 10,11 _DDR_DM[7:0] 10,11 _DDR_DQS[7:0] 10,11

D

1107
_DDR_DATA0 _DDR_DATA4 _DDR_DATA1 _DDR_DATA5 _DDR_DQS0 _DDR_DM0 _DDR_DATA6 _DDR_DATA2 4 1 3 2 5 6 1 7 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 13 16 14 15 12 11 16 10 RN48D RN48A RN48C RN48B RN48E RN48F RN47A RN48G DDR_DATA0 DDR_DATA4 DDR_DATA1 DDR_DATA5 DDR_DQS0 DDR_DM0 DDR_DATA6 DDR_DATA2 _DDR_DATA32 _DDR_DATA36 _DDR_DATA33 _DDR_DATA37 _DDR_DQS4 _DDR_DM4 _DDR_DATA34 _DDR_DATA38 3 1 4 2 5 6 7 8 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 14 16 13 15 12 11 10 9 RN43C RN43A RN43D RN43B RN43E RN43F RN43G RN43H DDR_DATA32 DDR_DATA36 DDR_DATA33 DDR_DATA37 DDR_DQS4 DDR_DM4 DDR_DATA34 DDR_DATA38

_DDR_DATA3 _DDR_DATA7 _DDR_DATA8 _DDR_DATA12 _DDR_DATA9 _DDR_DATA13 _DDR_DQS1 _DDR_DM1

8 2 3 4 6 5 7 8

10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm

9 15 14 13 11 12 10 9

RN48H RN47B RN47C RN47D RN47F RN47E RN47G RN47H

DDR_DATA3 DDR_DATA7 DDR_DATA8 DDR_DATA12 DDR_DATA9 DDR_DATA13 DDR_DQS1 DDR_DM1

_DDR_DATA35 _DDR_DATA39 _DDR_DATA40 _DDR_DATA44 _DDR_DATA41 _DDR_DATA45 _DDR_DQS5 _DDR_DM5

2 1 6 4 5 3 7 8

10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm

15 16 11 13 12 14 10 9

RN42B RN42A RN42F RN42D RN42E RN42C RN42G RN42H

DDR_DATA35 DDR_DATA39 DDR_DATA40 DDR_DATA44 DDR_DATA41 DDR_DATA45 DDR_DQS5 DDR_DM5

C

_DDR_DATA10 _DDR_DATA14 _DDR_DATA11 _DDR_DATA15 _DDR_DATA16 _DDR_DATA20 _DDR_DATA17 _DDR_DATA21

4 1 3 2 5 6 7 8

10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm

13 16 14 15 12 11 10 9

RN46D RN46A RN46C RN46B RN46E RN46F RN46G RN46H

DDR_DATA10 DDR_DATA14 DDR_DATA11 DDR_DATA15 DDR_DATA16 DDR_DATA20 DDR_DATA17 DDR_DATA21

_DDR_DATA42 _DDR_DATA46 _DDR_DATA43 _DDR_DATA47 _DDR_DATA48 _DDR_DATA52 _DDR_DATA49 _DDR_DATA53

3 1 2 4 5 7 6 8

10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm

14 16 15 13 12 10 11 9

RN41C RN41A RN41B RN41D RN41E RN41G RN41F RN41H

DDR_DATA42 DDR_DATA46 DDR_DATA43 DDR_DATA47 DDR_DATA48 DDR_DATA52 DDR_DATA49 DDR_DATA53

_DDR_DQS2 _DDR_DM2 _DDR_DATA18 _DDR_DATA22 _DDR_DATA19 _DDR_DATA23 _DDR_DATA24 _DDR_DATA28

1 2 4 3 5 6 7 1

10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm

16 15 13 14 12 11 10 16

RN45A RN45B RN45D RN45C RN45E RN45F RN45G RN44A

DDR_DQS2 DDR_DM2 DDR_DATA18 DDR_DATA22 DDR_DATA19 DDR_DATA23 DDR_DATA24 DDR_DATA28

_DDR_DQS6 _DDR_DM6 _DDR_DATA50 _DDR_DATA54 _DDR_DATA51 _DDR_DATA55 _DDR_DATA56 _DDR_DATA60

1 2 3 5 4 6 7 8

10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm

16 15 14 12 13 11 10 9

RN40A RN40B RN40C RN40E RN40D RN40F RN40G RN40H

DDR_DQS6 DDR_DM6 DDR_DATA50 DDR_DATA54 DDR_DATA51 DDR_DATA55 DDR_DATA56 DDR_DATA60

_DDR_DATA25 _DDR_DATA29 _DDR_DQS3 _DDR_DM3 _DDR_DATA26 _DDR_DATA30 _DDR_DATA27 _DDR_DATA31

8 2 3 4 6 7 8 5

10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm

9 15 14 13 11 10 9 12

RN45H RN44B RN44C RN44D RN44F RN44G RN44H RN44E

DDR_DATA25 DDR_DATA29 DDR_DQS3 DDR_DM3 DDR_DATA26 DDR_DATA30 DDR_DATA27 DDR_DATA31

_DDR_DATA57 _DDR_DATA61 _DDR_DQS7 _DDR_DM7 _DDR_DATA58 _DDR_DATA62 _DDR_DATA59 _DDR_DATA63

1 2 3 4 7 5 8 6

10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm 10Ohm

16 15 14 13 10 12 9 11

RN39A RN39B RN39C RN39D RN39G RN39E RN39H RN39F

DDR_DATA57 DDR_DATA61 DDR_DQS7 DDR_DM7 DDR_DATA58 DDR_DATA62 DDR_DATA59 DDR_DATA63

B

DDR_RCVENOUT# 1 DDR_RCVENIN# 1 DDR_SMRCOMP DDR_SMVSWINGL DDR_SMVSWINGH

T110TPC28b T109TPC28b

SO-DIMM0 MCH-M SO-DIMM1 Route for CONTROL 1. DDR_CKE[3:2],DDR_CS[3:2]#

DDR_VREF

SM_VREF RG82855GM

SMVSWINGL SMVSWINGH

Intel suggested that DDR_VREF should be turned off in S3-S5. But measure the leakage because there is no +V2.5S.
+V5 +V2.5 1 1 C116 0.1uF/10V 10KOhm 5
A

20A3L

1.23125V-1.26875V S0-S1M:Max. 80 mA S3: 0 mA

2

Route for CLOCK 1. CLK_DDR[2:0],CLK_DDR[2:0]#
+V2.5_GMCH_SM +V2.5_GMCH_SM 1 +V2.5_GMCH_SM 1

R89 2 TP12 TPC28b 1

1.23125V-1.26875V S0-S1M:Max. 80 mA S3: 0 mA
DDR_SMRCOMP

1

0.2 VCCSM +/- 2%
R273 60.4Ohm 1 C380 DDR_SMVSWINGL 1 0.1uF/10V C401 2

0.8 VCCSM +/- 2%
R279 604Ohm DDR_SMVSWINGH 1 C400 R277 150Ohm

SO-DIMM0
R278 150Ohm

MCH-M SO-DIMM1 Route for CLOCK 1. CLK_DDR[5:3],CLK_DDR[5:3]#
A

1

1

1

4 VLMV321 2

C118 0.1uF/10V

1

R90 10KOhm

3

-

1.225V-1.275V S0-S1M:10 mA(Max. 50 mA)

R272 60.4Ohm

1

1

+

U8 V+

DDR_VREF

2

2

2

2

R280 604Ohm

Close to Pin AJ22
0.1uF/10V 2 2

Close to Pin AJ19
0.1uF/10V 2 2

2

2

Title : NB-MCHM(DDR)
ASUSTek COMPUTER INC. NB1 Size Custom Project Name

2

Engineer:

John Hung
Rev 2.4

A3N/A3L
Sheet
1

Date: Monday, November 15, 2004
5 4 3 2

6

TERMINATION

SM_SDQ0 SM_SDQ1 SM_SDQ2 SM_SDQ3 SM_SDQ4 SM_SDQ5 SM_SDQ6 SM_SDQ7 SM_SDQ8 SM_SDQ9 SM_SDQ10 SM_SDQ11 SM_SDQ12 SM_SDQ13 SM_SDQ14 SM_SDQ15 SM_SDQ16 SM_SDQ17 SM_SDQ18 SM_SDQ19 SM_SDQ20 SM_SDQ21 SM_SDQ22 SM_SDQ23 SM_SDQ24 SM_SDQ25 SM_SDQ26 SM_SDQ27 SM_SDQ28 SM_SDQ29 SM_SDQ30 SM_SDQ31 SM_SDQ32 SM_SDQ33 SM_SDQ34 SM_SDQ35 SM_SDQ36 SM_SDQ37 SM_SDQ38 SM_SDQ39 SM_SDQ40 SM_SDQ41 SM_SDQ42 SM_SDQ43 SM_SDQ44 SM_SDQ45 SM_SDQ46 SM_SDQ47 SM_SDQ48 SM_SDQ49 SM_SDQ50 SM_SDQ51 SM_SDQ52 SM_SDQ53 SM_SDQ54 SM_SDQ55 SM_SDQ56 SM_SDQ57 SM_SDQ58 SM_SDQ59 SM_SDQ60 SM_SDQ61 SM_SDQ62 SM_SDQ63 SM_SDQ64 SM_SDQ65 SM_SDQ66 SM_SDQ67 SM_SDQ68 SM_SDQ69 SM_SDQ70 SM_SDQ71

(MCH-Sighting041) M-GM system memory interface generates single pulse CKE events which may cause Intermittent hangs and display corruptions when using Micron and Infineon S0-DIMMs.

D

SO-DIMM0 MCH-M 10 OHM SO-DIMM1 Route for COMMAND 1. DDR_AA[12:6],DDR_AA3,DDR_AA0 2. DDR_WE# 3. DDR_RAS# 4. DDR_CAS# 5. DDR_BS0#,DDR_BS1#

DDR SYSTEM MEMORY

DDR_AB[2:1] 10,11 DDR_AB[5:4] 10,11

10,11 10,11 10,11 10,11 10,11 10,11 10,11 10,11

TERMINATION

C

Route for CPC 1. DDR_AA[5:4],DDR_AA[2:1] TERMINATION

DDR_BS0# 10,11 DDR_BS1# 10,11 DDR_RAS# 10,11 DDR_CAS# 10,11 DDR_WE# 10,11 CLK_DDR0 CLK_DDR0# CLK_DDR1 CLK_DDR1# CLK_DDR2 CLK_DDR2# CLK_DDR3 CLK_DDR3# CLK_DDR4 CLK_DDR4# CLK_DDR5 CLK_DDR5# DDR_DM0 DDR_DM1 DDR_DM2 DDR_DM3 DDR_DM4 DDR_DM5 DDR_DM6 DDR_DM7 T112TPC28b 10 10 10 10 10 10 10 10 10 10 10 10

SO-DIMM0 MCH-M SO-DIMM1 Route for CPC 1. DDR_AB[5:4],DDR_AB[2:1]

Route for CONTROL 1. DDR_CKE[1:0],DDR_CS[1:0]#

B

of

55

5

4

3

2

1

3 H_A#[31:3]

U32A H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 3 3 H_ADSTB#0 H_ADSTB#1 P23 T25 T28 R27 U23 U24 R24 U28 V28 U27 T27 V27 U25 V26 Y24 V25 V23 W25 Y25 AA27 W24 W23 W27 Y27 AA28 W28 AB27 Y26 AB28 R28 P25 R23 R25 T23 T26 AA26 AD29 AE29 H28 K28 B20 B18 J28 C27 E22 D18 K27 D26 E21 E18 J25 E25 B25 G19 F15 MCH_HDVREF K21 J21 J17 Y28 Y22 HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31

LxWxH=37.5x37.5x2.58
HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63 H_ADS# H_TRDY# H_DRDY# H_DEFER# H_HITM# H_HIT# H_LOCK# H_BREQ0# H_BNR# H_BPRI# H_DBSY# H_RS#0 H_RS#1 H_RS#2 K22 H27 K25 L24 J27 G28 L27 L23 L25 J24 H25 K23 G27 K26 J23 H26 F25 F26 B27 H23 E27 G25 F28 D27 G24 C28 B26 G22 C26 E26 G23 B28 B21 G21 C24 C23 D22 C25 E24 D24 G20 E23 B22 B23 F23 F21 C20 C21 G18 E19 E20 G17 D20 F19 C19 C17 F17 B19 G16 E16 C16 E17 D16 C18 H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

H_D#[63:0] 3

MCH_HLZCOMP : Length <= 0.5" Width = 20 mils(L1/L4) Space>= 25 mils X BPSB(#0002)

D

D

MCH_HLZCOMP

MCH_HYRCOMP : Length <= 0.5" Width = 20 mils(L1/L4) Space>= 25 mils X BPSB(#0002)
R235 MCH_HYRCOMP 1 27.4Ohm 2

3 H_REQ#[4:0]

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_ADSTB0# H_ADSTB1# HCLK# HCLK HYRCOMP HYSWING HXRCOMP HXSWING HDSTBN#0 HDSTBN#1 HDSTBN#2 HDSTBN#3 HDSTBP#0 HDSTBP#1 HDSTBP#2 HDSTBP#3 DINV#0 DINV#1 DINV#2 DINV#3 H_CPURST# HDVREF0 HDVREF1 HDVREF2 HCCVREF HAVREF HUB_PD0 HUB_PD1 HUB_PD2 HUB_PD3 HUB_PD4 HUB_PD5 HUB_PD6 HUB_PD7 HUB_PD8 HUB_PD9 HUB_PD10 HUB_PSTRB HUB_PSTRB# HLZCOMP PSWING HUB_LVREF RG82855GM

HOST

C

MCH_HXRCOMP : Length <= 0.5" Width = 20 mils(L1/L4) Space>= 25 mils X BPSB(#0002)
R226 MCH_HXRCOMP 1 27.4Ohm 2

18 _CLK_MCH_BCLK# 18 _CLK_MCH_BCLK

MCH_HYRCOMP MCH_HYSWING MCH_HXRCOMP MCH_HXSWING 3 3 3 3 3 3 3 3 3 3 3 3 H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3 H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3

MCH_HAVREF: Length <= 0.5" Width = 10 mils Space>= 25 mils X BPSB(#0003)

+VCCP

1

2/3(+VCCP) +/- 2%

R67 49.9Ohm
C

MCH_HAVREF 1 C81 0.1uF/10V 2 2 1 C79 1uF/6.3V

1 R66 100Ohm 2 +VCCP H_ADS# 3 H_TRDY# 3 H_DRDY# 3 H_DEFER# 3 H_HITM# 3 H_HIT# 3 H_LOCK# 3 H_BR0# 3 H_BNR# 3 H_BPRI# 3 H_DBSY# 3

MCH_HYSWING : Length <= 0.5" Width = 15 mils Space>= 25 mils X BPSB(#0005) 1/3(+VCCP) +/- 2%
MCH_HYSWING 1 C345 0.1uF/10V

+VCCP

3 H_CPURST#

R240 301Ohm 2

14 HUB_PD[10:0]

MCH_HCCVREF MCH_HAVREF HUB_PD0 HUB_PD1 HUB_PD2 HUB_PD3 HUB_PD4 HUB_PD5 HUB_PD6 HUB_PD7 HUB_PD8 HUB_PD9 HUB_PD10

R241 150Ohm

+V1.2S_GMCH_HI

HUB I/F

B

Close to Pin H28

2210
R249 27.4Ohm

2

14 HUB_PSTRB 14 HUB_PSTRB#

HUB_PSTRB HUB_PSTRB# MCH_HLZCOMP

<=6" <=6" <=6" <=6" <=6" <=6" <=6" <=6" <=8" <=8" <=8"

U7 U4 U3 V3 W2 W6 V6 W7 T3 V5 V4 W3 V2 T2 U2 W1

L28 M25 N24 M28 N28 N27 P27 M23 N25 P28 M26 N23 H_RS#0 P26 H_RS#1 M27 H_RS#2

MCH_HCCVREF: Length <= 0.5" Width = 10 mils Space>= 25 mils X BPSB(#0003)

1

1

2 R270 49.9Ohm 1 C377 1uF/6.3V 2 2 1 2 R269
B

2/3(+VCCP) +/- 2%

MCH_HCCVREF 1 C376 0.1uF/10V 2

2

2

1

1

100Ohm

H_RS#[2:0] 3

MCH_HXSWING : Length <= 0.5" Width = 15 mils Space>= 25 mils X BPSB(#0005) 1/3(+VCCP) +/- 2%
MCH_HXSWING 1

+VCCP

20A3L
1 +VCCP 2 R225 301Ohm 2 +V1.2S_GMCH_HI

2210
R49 56Ohm / R251 49.9Ohm

MCH_HDVREF: Length <= 0.5" Width = 10 mils Space>= 25 mils X BPSB(#0003)
+V1.2S_GMCH_HI

+VCCP

1

1

2/3(+VCCP) +/- 2%

R44 49.9Ohm

0.343V- 0.357V(Typ. 0.35V)
HUB_VREF_MCH 2 2 HUB_VSWING_MCH 1 1 1 2 R252 C363 0.1uF/10V 2 1 R262 100Ohm 1 240Ohm 2

MCH_HDVREF 1 1 1 C48 0.1uF/10V 2 2 C44 0.1uF/10V 2 C46 0.1uF/10V 2 1 C52 1uF/6.3V

2

R228 150Ohm

H_CPURST#

0.8V +/- 2%
R253 100Ohm

1

2 R46 100Ohm 1

C328 0.1uF/10V

C356 0.1uF/10V

C362 0.01UF/10V

2210

Close to Pin B20
A

2

1

2

1

2

2

A

2025 2210
R249: 27.4ohm (10-003412704) for 855GM/852GM 37.4ohm (10-003413704) for 855GME 48.7ohm (10-003414807) for 852GME/852GMV

2210
R251: 49.9ohm (10-003414909) for 855GM/852GM 68.1ohm (10-003416801) for 855GME 86.6ohm (10-003418606) for 852GME/852GMV

2210
R252: 240ohm (10-003412410) for 855GM/852GM 287ohm (10-003412817) for 855GME 324ohm (10-003413214) for 852GME/852GMV

Title : NB-MCHM(HOST)
ASUSTek COMPUTER INC. NB1 Size Custom Project Name

Engineer:

John Hung
Rev 2.4

A3N/A3L
Sheet
1

Date: Monday, November 15, 2004
5 4 3 2

7

of

55

5

4

3

2

1

U32D C1 G1 L1 U1 AA1 AE1 R2 AG3 AJ3 D4 G4 K4 N4 T4 W4 AA4 AC4 AE4 B5 U5 Y5 Y6 AG6 C7 E7 G7 J7 M7 R7 AA7 AE7 AJ7 H8 K8 P8 T8 V8 Y8 AC8 E9 L9 N9 R9 U9 W9 AB9 AG9 C10 J10 AA10 AE10 D11 F11 H11 AB11 AC11 AJ11 J12 AA12 AG12 A13 D13 F13 H13 N13 R13 U13 AB13 AE13 J14 P14 T14 AA14 AC14 D15 H15 N15 R15 U15 AB15 AG15 F16 J16 P16 VSS0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83

RG82855GM VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 T16 AA16 AE16 A17 D17 H17 N17 R17 U17 AB17 AC17 F18 J18 AA18 AG18 A19 D19 H19 AB19 AE19 F20 J20 AA20 AC20 A21 D21 H21 M21 P21 T21 V21 Y21 AA21 AB21 AG21 B24 F22 J22 L22 N22 R22 U22 W22 AE22 A23 D23 AA23 AC23 AJ23 F24 H24 K24 M24 P24 T24 V24 AA24 AG24 A25 D25 AA25 AE25 G26 J26 L26 N26 R26 U26 W26 AB26 A27 F27 AC27 AG27 AJ27 AC28 AE28 C29 E29 G29 J29 L29 N29 U29

U32C R3 R5 R6 R4 P6 P5 N5 P2 N2 N3 M1 M5 DVOBD0 DVOBD1 DVOBD2 DVOBD3 DVOBD4 DVOBD5 DVOBD6 DVOBD7 DVOBD8 DVOBD9 DVOBD10 DVOBD11 DVOBCLK DVOBCLK# DVOBHSYNC DVOBVSYNC DVOBBLANK# DVOBFLDSTL DVOBCINTRB DVOBCCLKINT DVOCD0 DVOCD1 DVOCD2 DVOCD3 DVOCD4 DVOCD5 DVOCD6 DVOCD7 DVOCD8 DVOCD9 DVOCD10 DVOCD11 DVOCCLK DVOCCLK# DVOCHSYNC DVOCVSYNC DVOCBLANK# DVOCFLDSTL MI2CCLK MI2CDATA MDVICLK MDVIDATA MDDCCLK MDDCDATA BLUE BLUE# GREEN GREEN# RED RED# HSYNC VSYNC REFSET DDCACLK DDCADATA IYAM0 IYAM1 IYAM2 IYAM3 IYAP0 IYAP1 IYAP2 IYAP3 IYBM0 IYBM1 IYBM2 IYBM3 IYBP0 IYBP1 IYBP2 IYBP3 ICLKAM ICLKAP ICLKBM ICLKBP DDCPCLK DDCPDATA PANELBKLTCTL PANELBKLTEN PANELVDDEN LVREFH LVREFL LVBG LIBG DREFCLK DREFSSCLK LCLKCTLA LCLKCTLB DPWR# DPSLP# RSTIN# PWROK C9 D9 C8 D8 A7 A8 H10 J9 E8 B6 G9 G14 E15 C15 C13 F14 E14 C14 B13 H12 E12 C12 G11 G12 E11 C11 G10 D14 E13 E10 F10 B4 C5 G8 F8 A5 D12 F12 B12 A10 B7 B17 H9 C6 AA22 Y23 AD28 J11 D6 AJ1 CRT_BLUE 13 CRT_GREEN 13 CRT_RED 13 CRT_HSYNC 13 CRT_VSYNC 13 CRT_REFSET 1 R40 2 137Ohm
D

D

DAC

Ext PD
RN34B 100KOHM +V1.5S_GMCH_DVO 1 2 R41 100KOhm 1 100KOHM RN34A 2 3 4

P3 P4 T6 T5 L2 M2 G2 M3 K5 K1 K3 K2 J6 J5 H2 H1 H3 H4 H6 G3 J3 J2 K6 L5 L3 H5 K7 N6 N7 M6 P7 T7 E5 F5 E3 E2 G5 F4 G6 F6 L7 D5 F1 F7

CRT_DDC2BC 13 CRT_DDC2BD 13 LVDS_YA0M 12 LVDS_YA1M 12 LVDS_YA2M 12 LVDS_YA0P 12 LVDS_YA1P 12 LVDS_YA2P 12 LVDS_YB0M 12 LVDS_YB1M 12 LVDS_YB2M 12 2 2.2KOhm 2.2KOhm 3 RN33B LVDS_YB0P 12 LVDS_YB1P 12 LVDS_YB2P 12 LVDS_CLKAM LVDS_CLKAP LVDS_CLKBM LVDS_CLKBP LVDS_DDC2BC LVDS_DDC2BD LVDS_BACK_ADJ TPC28b T198 1 LVDS_BACK_EN 12 LVDS_VDD_EN 12 12 12 12 12 1 RN33A 4

+V3.3S_GMCH_GPIO

VSS

Ext PU

Ext PD

C

LVDS

DVO

C

+V1.5S_GMCH_DVO

Ext PD
R43 100KOhm 1 2 R45 1 3 5 7 2 2 2.2KOhm 4 2.2KOhm 6 2.2KOhm 8 2.2KOhm 1 2 1 2.2KOhm RN11A RN11B RN11C RN11D 2.2KOhm

Supprt EDID

1223

1 1 1

TPC28b T87 TPC28b T90 TPC28b T86 1 2 R227 1.5KOhm _CLK_MCH_DREF 18 _CLK_MCH_DREFSS 18 1 C53 5P / 1 C339 5P / +V3.3S_GMCH_GPIO 2 R34 10KOhm 1

Ext PU
R50

CLKS

15

PM_SUSCLK 1 1

R234 1KOhm

2

R35 1KOhm 2 1 CLK_DPMS

2

3

Q54 2N7002 15,17 AGP_BUSY# 18 _CLK_MCH66 C374 5P / 1 T108TPC28b

DVO_VREF

GVREF AGPBUSY# GRCOMP 66IN RVSD0 RVSD1 RVSD2 RVSD3 RVSD4 RVSD5 RVSD6 RVSD7 RVSD8 RVSD9 RVSD10 RVSD11 RG82855GM

B

MISC

/ 1 ADDDETECT

IMVP4_PWRGD 37,38

EXTTS0 MCHDETECTVSS

2

Ext PD when using DVO

ADDID0 ADDID1 ADDID2 ADDID3 ADDID4 ADDID5 ADDID6 ADDID7 ADDDETECT DPMS

1

2

TPC28b T91 M_LCLKCTLB H_DPWR# 3 H_DPSLP# 3,15 PCI_RST# 14,24,29

<=6.5"

2

G 2 S 3 D

B

MCH_GRCOMP D1 Y3 1 AA5 F2 F3 B2 B3 C2 C3 C4 D2 D3 D7 L4

AJ26 VSS181 T9 VSS180 L6 VSS179 E28 VSS178 D28 VSS177 C22 VSS176 AJ20 VSS174 AJ18 VSS173 AJ12 VSS172 AJ10 VSS171 AA29 VSS170 W29 VSS169

+V1.5S_GMCH_DVO

NC

R407 1 R408 1

2 1KOhm 2 1KOhm

/ /

GST2 GST1 GST0

NC0 NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11

B1 AH1 A2 AJ2 A28 AJ28 A29 B29 AH29 AJ29 AA9 AJ4

+V1.5S_GMCH_DVO

2402 20A3L
+V3.3S +V1.5S_GMCH_DVO

GST[2:0] are internal pulled-low. When no using DVO

2 R48 1KOhm ADDDETECT 2 R47 1KOhm / 1 2 R33 10KOhm

20A3L
+V3.3S

+V1.5S_GMCH_DVO 2

0.5 VCCDVO +/- 2%
1 3 RN91A
A

RN91B 1KOhm DVO_VREF

R237 1KOhm

Width= 10 mils Space>=20 mils

1KOhm

1

MCH_GRCOMP 1 M_LCLKCTLB 1

2

4

R409 1 6 3 Q94A UM6K1N 2 Q94B UM6K1N 5 1KOhm 2 GST2

1

C333 0.1uF/10V

2

1

A

R236 1KOhm

Close to Pin F1
2 1 2

R233 40.2Ohm 1%

4,18 FREQ_SEL

Title : NB-MCHM(VGA)
ASUSTek COMPUTER INC. NB1

1

4

Engineer:

John Hung
Rev 2.4

2402
5 4 3 2

Size Custom

Project Name

A3N/A3L
Sheet
1

Date: Monday, November 15, 2004

8

of

55

5

4

3

2

1

+V1.2S

1.14V - 1.26V(+/- 5%) S0-S1M:Max. 1.4 A
1 CE21 150U/4.0V 2 + 1 1 1 C375 10uF/10V 2 2 2 C49 0.1uF/10V C75 0.1uF/10V C74 0.1uF/10V

+V1.2S_GMCH_CORE

C77 0.1uF/10V

(MCH-Sighting041) The core supply (1.2V) should be powered up a minimum of 1ms before the DVO and GPIO IO (1.5V and 3.3V) voltage rails.

1

2

2

1

D

U32E

LxWxH=37.5x37.5x2.58
VTTLF0 VTTLF1 VTTLF2 VTTLF3 VTTLF4 VTTLF5 VTTLF6 VTTLF7 VTTLF8 VTTLF9 VTTLF10 VTTLF11 VTTLF12 VTTLF13 VTTLF14 VTTLF15 VTTLF16 VTTLF17 VTTLF18 VTTLF19 VTTLF20 VTTHF0 VTTHF1 VTTHF2 VTTHF3 VTTHF4 VCCSM0 VCCSM1 VCCSM2 VCCSM3 VCCSM4 VCCSM5 VCCSM6 VCCSM7 VCCSM8 VCCSM9 VCCSM10 VCCSM11 VCCSM12 VCCSM13 VCCSM14 VCCSM15 VCCSM16 VCCSM17 VCCSM18 VCCSM19 VCCSM20 VCCSM21 VCCSM22 VCCSM23 VCCSM24 VCCSM25 VCCSM26 VCCSM27 VCCSM28 VCCSM29 VCCSM30 VCCSM31 VCCSM32 VCCSM33 VCCSM34 VCCSM35 VCCSM36 VCCQSM0 VCCQSM1 VCCASM0 VCCASM1 G15 H16 H18 J19 H20 L21 N21 R21 U21 H22 M22 P22 T22 V22 Y29 K29 F29 AB29 A26 A20 A18 A22 A24 H29 M29 V29 AC1 AG1 AB3 AF3 Y4 AJ5 AA6 AB6 AF6 Y7 AA8 AB8 Y9 AF9 AJ9 AB10 AA11 AB12 AF12 AA13 AJ13 AB14 AF15 AB16 AJ17 AB18 AF18 AB20 AF21 AJ21 AB22 AF24 AJ25 AF27 AC29 AF29 AG29 AJ6 AJ8 AD1 AF1

Caution: L2 be placed between Pin U9 ans U13

+V1.2S_GMCH_CORE

1.14V - 1.26V(+/- 5%) S0-S1M:Max. 90 mA
1 1 C63 10uF/10V 2 C50 0.1uF/10V 2

+V1.2S_GMCH_HI

C73 0.1uF/10V 2

+V1.2S_GMCH_CORE +V1.2S_GMCH_DPLLA L16 1 2 1 + C327 0.1uF/10V 1

1.14V - 1.26V(+/- 5%) S0-S1M: 0.3 A

80Ohm/100MHz CE16 150U/4.0V

1.14V - 1.26V(+/- 5%) +V1.2S_GMCH_CORE S0-S1M: 0.3 A 1.14V - 1.26V(+/- 5%) +V1.2S_GMCH_HI C36 S0-S1M: 0.3 A 0.1uF/10V
1 C83 0.1uF/10V 1 2

J15 P13 T13 N14 R14 U14 P15 T15 AA15 N16 R16 U16 P17 T17 AA17 AA19 W21 H14 V1 Y1 W5 U6 U8 W8 V7 V9 D29 Y2

VCC0 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCCHL0 VCCHL1 VCCHL2 VCCHL3 VCCHL4 VCCHL5 VCCHL6 VCCHL7 VCCAHPLL VCCAGPLL VCCADPLLA VCCADPLLB VCCDVO_0 VCCDVO_1 VCCDVO_2 VCCDVO_3 VCCDVO_4 VCCDVO_5 VCCDVO_6 VCCDVO_7 VCCDVO_8 VCCDVO_9 VCCDVO_10 VCCDVO_11 VCCDVO_12 VCCDVO_13 VCCDVO_14 VCCDVO_15 VCCADAC0 VCCADAC1 VSSADAC

1.0V - 1.1V(+/- 5%) S0-S1M: 2.5 A(CPU,MCH,ICH) S0-S1M: Max. 0.72A
1 1 C58 0.1uF/10V 2 2 C67 0.1uF/10V 2 1 C71 0.1uF/10V

+VCCP
D

1 + CE20 150U/4.0V 2 M_PWR_VTTF0 M_PWR_VTTF1 M_PWR_VTTF2 M_PWR_VTTF3 M_PWR_VTTF4 C27 C25 C334 C350 C364 1 1 1 1 1 2 2 2 2 2 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V +V2.5

2

2

1

POWER

+V1.2S_GMCH_CORE L38 1 2

+V1.2S_GMCH_DPLLB

2.375V - 2.625V(+/- 5%) S0-S1M: Max. 2.07A S3: Max. 25 mA

C

1.14V - 1.26V(+/- 5%) S0-S1M: 0.3 A

CE14 150U/4.0V 2

C326 0.1uF/10V

1

80Ohm/100MHz

1

+

2

+V2.5_GMCH_SM

C

1 + CE23 150U/4.0V 2 1

+V1.5S

1.425V - 1.575V(+/- 5%) S0-S1M: Max. 90 mA
1 CE17 150U/4.0V 2 + 1 C347 10uF/10V 2 C47 0.1uF/10V

+V1.5S_GMCH_DVO

A6 B16 E1 J1 N1 E4 J4 M4 E6 H7 J8 L8 M8 N8 R8 K9 M9 P9 A9 B9 B8 A11 B11

2

1

C60 0.1uF/10V

2

+V1.5S

+V1.5S_GMCH_ADAC

C405 0.1uF/10V

1 1 2

1.425V - 1.575V(+/- 5%) Caution: There is no vias between Pin B8 and C99,C100 (It means C99,C100 must be in same layer with MCHM)

2

1

C406 0.1uF/10V

1

C330 0.1uF/10V

C324 0.01UF/10V

1

2025
+V1.5S +V1.5S_GMCH_ALVDS

1.425V - 1.575V(+/- 5%) S0-S1M: Max. 70 mA

C323 0.1uF/10V

C329 0.01UF/10V

B

2025
+V1.5S +V1.5S_GMCH_DLVDS

G13 B14 J13 B15 F9 B10 D10 A12 A3 A4

Caution: There is no vias between Pin B11 and C106,C107 (It means C106, C107 must be in VCCALVDS VSSALVDS same layer with MCHM) VCCDLVDS0
VCCDLVDS1 VCCDLVDS2 VCCDLVDS3 VCCTXLVDS0 VCCTXLVDS1 VCCTXLVDS2 VCCTXLVDS3 VCCGPIO_0 VCCGPIO_1 RG82855GM

2

2

1

2

C86 0.1uF/10V

C408 0.1uF/10V

1 1 C85 0.1uF/10V 2 +V2.5_GMCH_SM 2 1 2

C90 0.1uF/10V

2

1

2

2

1

1

C99 0.1uF/10V

1

2 C102 0.1uF/10V 2

C87
B

0.1uF/10V

1.425V - 1.575V(+/- 5%) S0-S1M: Max. 70 mA
1

2218
2.375V - 2.625V(+/- 5%) +V2.5 S0-S3: Max. 50 mA

CE18 22uF/6.3V 2

+

C56 0.1uF/10V

1

1

2

+V2.5_GMCHQSM

C407 0.1uF/10V R98 1 1Ohm

1

C117 4.7U

2111

2

2

2

+V2.5_GMCH_TXLVDS L37 1 2 1 + 1 1 C320 0.1uF/10V 2 2 C38 0.1uF/10V 2 C321 0.1uF/10V 2 C95 0.1uF/10V +V3.3S +V3.3S_GMCH_GPIO 2 2 1 80Ohm/100MHz CE15 22uF/6.3V

20A3L
+V1.2S_GMCH_ASM 1 1 + L42 2 80Ohm/100MHz CE22 100UF +V1.2S_GMCH_HI

2

2218

1.14V - 1.26V(+/- 5%) S0-S1M: 0.4 A

1

C30 10uF/10V

A

C29 0.1uF/10V

1

3.135V - 3.465V(+/- 5%)

2209
NB
A

2

2

VCC,VCCASM,VCCHL,VCCAGPLL,VCCADPLLA,VCCADPLLB: 855GM/852GM: 1.2V 855GME: 1.35V 852GME/852GMV: 1.5V
ASUSTek COMPUTER INC. NB1 Size Custom Project Name

1

Title : NB-MCHM(PWR)
Engineer: John Hung
Rev 2.4 Sheet
1

A3N/A3L
9 of 55

Date: Monday, November 15, 2004
5 4 3 2

5

4

3

2

1

6,11 _DDR_DATA[63:0]

+V2.5 DDR_VREF 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35A 37A 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69

+V2.5 DDR_VREF VREF1 VSS1 DQ4 DQ5 VDD1 DM0 DQ6 VSS3 DQ7 DQ12 VDD3 DQ13 DM1 VSS5 DQ14 DQ15 VDD5 VDD6 VSS6 VSS8 DQ20 DQ21 VDD8 DM2 DQ22 VSS10 DQ23 DQ28 VDD10 DQ29 DM3 VSS12 DQ30 DQ31 VDD12 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70

FOR +V2.5 DECOUPLING
+V2.5

CON14A VREF0 VSS0 DQ0 DQ1 VDD0 DQS0 DQ2 VSS2 DQ3 DQ8 VDD2 DQ9 DQS1 VSS4 DQ10 DQ11 VDD4 A:CK0 A:CK0# VSS7 DQ16 DQ17 VDD7 DQS2 DQ18 VSS9 DQ19 DQ24 VDD9 DQ25 DQS3 VSS11 DQ26 DQ27 VDD11

2.375V - 2.625V(+/- 5%) S0-S3: 8.12 A
1 + CE25

+V2.5 1 3 5 7 0.1U 0.1U 0.1U 0.1U 2 4 6 8 CN2A CN2B CN2C CN2D

D

_DDR_DATA0 _DDR_DATA1 6,11 _DDR_DQS0 _DDR_DATA2 _DDR_DATA3 _DDR_DATA8 _DDR_DATA9 6,11 _DDR_DQS1 _DDR_DATA10 _DDR_DATA11 6 6 CLK_DDR0 CLK_DDR0# _DDR_DATA16 _DDR_DATA17 6,11 _DDR_DQS2 _DDR_DATA18 _DDR_DATA19 _DDR_DATA24 _DDR_DATA25 6,11 _DDR_DQS3 _DDR_DATA26 _DDR_DATA27

_DDR_DATA4 _DDR_DATA5 _DDR_DATA6 _DDR_DATA7 _DDR_DATA12 _DDR_DATA13 _DDR_DM1 6,11 _DDR_DATA14 _DDR_DATA15 _DDR_DM0 6,11

1 + CE26

D

150U/4.0V 2

150U/4.0V 2 1 3 5 7 0.1U 0.1U 0.1U 0.1U 2 4 6 8 CN4A CN4B CN4C CN4D

+V2.5

1

+ _DDR_DATA20 _DDR_DATA21 _DDR_DATA22 _DDR_DATA23 _DDR_DATA28 _DDR_DATA29 _DDR_DM3 6,11 _DDR_DATA30 _DDR_DATA31 _DDR_DM2 6,11

1

1 3 5 7 + CE27 1 3 5 7

0.1U 0.1U 0.1U 0.1U

2 4 6 8

CN5A CN5B CN5C CN5D

CE24

150U/4.0V 2

150U/4.0V 2

0.1U 0.1U 0.1U 0.1U

2 4 6 8

CN3A CN3B CN3C CN3D

C

C

DDR_VREF 1

+V2.5 1 GND 2 C531 0.1uF/10V

C150 0.1uF/10V

6 6

CLK_DDR2 CLK_DDR2#

6,11 DDR_CKE1 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 DDR_AA12 DDR_AA9 DDR_AA7 DDR_AA5 DDR_AA3 DDR_AA1 DDR_AA10 DDR_BS0# DDR_WE# DDR_CS0# DDR_AA12 DDR_AA9 DDR_AA7 DDR_AA3 DDR_AA10 DDR_BS0# DDR_WE#

B

_DDR_DATA32 _DDR_DATA33 6,11 _DDR_DQS4 _DDR_DATA34 _DDR_DATA35 _DDR_DATA40 _DDR_DATA41 6,11 _DDR_DQS5 _DDR_DATA42 _DDR_DATA43

_DDR_DATA48 _DDR_DATA49 6,11 _DDR_DQS6 _DDR_DATA50 _DDR_DATA51 _DDR_DATA56 _DDR_DATA57 6,11 _DDR_DQS7 _DDR_DATA58 _DDR_DATA59 5,17,18 5,17,18 SDA_3S SCL_3S +V3.3S 1 C168 0.1uF/10V 2 GND

A

85 87 89A 91A 93 95A 97A 99A 101A 103 105A 107A 109A 111A 113 115A 117A 119A 121A 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199

DU_0 VSS13 A:CK2 A:CK2# VDD14 A:CKE1 A:DU/A13 A:A12 A:A9 VSS16 A:A7 A:A5 A:A3 A:A1 VDD16 A:A10/AP A:BA0 A:WE# A:S0# DU_1 VSS18 DQ32 DQ33 VDD18 DQS4 DQ34 VSS20 DQ35 DQ40 VDD20 DQ41 DQS5 VSS22 DQ42 DQ43 VDD22 VDD24 VSS24 VSS25 DQ48 DQ49 VDD25 DQS6 DQ50 VSS27 DQ51 DQ56 VDD27 DQ57 DQS7 VSS29 DQ58 DQ59 VDD29 SDA SCL VDDSPD VDDID

DU/RESET# VSS14 VSS15 VDD13 VDD15 A:CKE0 DU/BA2 A:A11 A:A8 VSS17 A:A6 A:A4 A:A2 A:A0 VDD17 A:BA1 A:RAS# A:CAS# A:S1# DU_3 VSS19 DQ36 DQ37 VDD19 DM4 DQ38 VSS21 DQ39 DQ44 VDD21 DQ45 DM5 VSS23 DQ46 DQ47 VDD23 A:CK1# A:CK1 VSS26 DQ52 DQ53 VDD26 DM6 DQ54 VSS28 DQ55 DQ60 VDD28 DQ61 DM7 VSS30 DQ62 DQ63 VDD30 A:SA0 A:SA1 A:SA2 DU_2

86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200

GND DDR_CKE0 6,11 DDR_AA11 DDR_AA8 DDR_AA6 DDR_AA0 DDR_BS1# DDR_RAS# DDR_CAS# DDR_AA11 6,11 DDR_AA8 6,11 DDR_AA6 DDR_AA4 DDR_AA2 DDR_AA0 DDR_BS1# DDR_RAS# DDR_CAS# DDR_CS1# 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11

2

2024 EMI : Close to DDR socket power plane of +V2.5
CON14B 6 CLK_DDR3 6 CLK_DDR3# 6 CLK_DDR5 6 CLK_DDR5# 6,11 DDR_CKE3 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 DDR_AA12 DDR_AA9 DDR_AA7 DDR_AB5 DDR_AA3 DDR_AB1 DDR_AA10 DDR_BS0# DDR_WE# DDR_CS2# DDR_AA12 DDR_AA9 DDR_AA7 DDR_AB5 DDR_AA3 DDR_AB1 DDR_AA10 DDR_BS0# DDR_WE# 35 37 89 91 95 97 99 101 105 107 109 111 115 117 119 121 201 202 203 204 B:CK0 B:CK0# B:CK2 B:CK2# B:CKE1 B:DU/A13 B:A12 B:A9 B:A7 B:A5 B:A3 B:A1 B:A10/AP B:BA0 B:WE# B:S0# NC0 NC1 NC2 NC3 B:CKE0 B:A11 B:A8 B:A6 B:A4 B:A2 B:A0 B:BA1 B:RAS# B:CAS# B:S1# B:CK1# B:CK1 B:SA0 B:SA1 B:SA2 NP_NC7 NP_NC6 NP_NC5 NP_NC4 96B 100B 102B 106B 108B 110B 112B 116B 118B 120B 122B 158B 160B 194B 196B 198B 208 207 206 205 DDR_AA11 DDR_AA8 DDR_AA6 DDR_AB4 DDR_AB2 DDR_AA0 DDR_BS1# DDR_RAS# DDR_CAS# DDR_CKE2 6,11 DDR_AA11 6,11 DDR_AA8 6,11 DDR_AA6 6,11 DDR_AB4 6,11 DDR_AB2 6,11 DDR_AA0 6,11 DDR_BS1# 6,11 DDR_RAS# 6,11 DDR_CAS# 6,11 DDR_CS3# 6,11 CLK_DDR4# 6 CLK_DDR4 6 +V3.3S

_DDR_DATA36 _DDR_DATA37 _DDR_DATA38 _DDR_DATA39 _DDR_DATA44 _DDR_DATA45 _DDR_DM5 6,11 _DDR_DATA46 _DDR_DATA47 CLK_DDR1# 6 CLK_DDR1 6 _DDR_DATA52 _DDR_DATA53 _DDR_DATA54 _DDR_DATA55 _DDR_DATA60 _DDR_DATA61 _DDR_DM7 6,11 _DDR_DATA62 _DDR_DATA63 _DDR_DM6 6,11 _DDR_DM4 6,11

B

2 R122

1 10KOhm

GND

Dual_DDR_SODIMM_218P GND

A

Dual_DDR_SODIMM_218P GND ASUSTek COMPUTER INC. NB1 Size Custom Project Name

Title : DUAL DDR SODIMM
Engineer: John Hung
Rev 2.4 Sheet
1

GND

A3N/A3L
10 of 55

Date: Monday, November 15, 2004
5 4 3 2

5

4

3

2

1

6,10 _DDR_DATA[63:0] 6,10 _DDR_DM[8:0] 6,10 _DDR_DQS[8:0] 6,10 DDR_AA[12:0] 6,10 DDR_AB[2:1] 6,10 DDR_AB[5:4]
D

DDR TERMINATION
D

+V1.25S

+V1.25S

_DDR_DATA0 _DDR_DATA4 _DDR_DATA1 _DDR_DATA5 _DDR_DQS0 _DDR_DM0 _DDR_DATA6 _DDR_DATA2

6 8 5 7 4 3 8 2

56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm

11 9 12 10 13 14 9 15

RN58F RN58H RN58E RN58G RN58D RN58C RN57H RN58B

6,10 DDR_BS1# 6,10 DDR_BS0# 6,10 DDR_RAS#

DDR_AB2 DDR_AA1 DDR_AB1 DDR_AA0 DDR_AA10 DDR_BS1# DDR_BS0# DDR_RAS#

1 8 2 5 4 7 3 6

56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm

16 9 15 12 13 10 14 11

RN53A RN62H RN53B RN52E RN62D RN52G RN62C RN52F

FOR +V1.25S DECOUPLING

+V1.25S

+V1.25S

_DDR_DATA3 _DDR_DATA7 _DDR_DATA8 _DDR_DATA12 _DDR_DATA9 _DDR_DATA13 _DDR_DQS1 _DDR_DM1
C

1 7 6 5 3 4 2 1

56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm

16 10 11 12 14 13 15 16

RN58A RN57G RN57F RN57E RN57C RN57D RN57B RN57A

6,10 6,10 6,10 6,10 6,10 6,10

DDR_WE# DDR_CAS# DDR_CS0# DDR_CS2# DDR_CS1# DDR_CS3#

DDR_WE# DDR_CAS# DDR_CS0# DDR_CS2# DDR_CS1# DDR_CS3# _DDR_DATA32 _DDR_DATA36

2 5 6 8 3 1 8 2

56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm

15 12 11 9 14 16 9 15

RN62B RN62E RN62F RN52H RN52C RN62A RN61H RN52B

1 0.1U 5 0.1U 1 5 1 5 1 5 1 5 1 5 1 5 1 5 1 5 1 5 1 5 1 5 1 5 1 5 1 5 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U

2 CN24A 6 CN24C 2 6 2 6 2 6 2 6 2 6 2 6 2 6 2 6 2 6 2 6 2 6 2 6 2 6 2 6 CN19A CN19C CN22A CN22C CN23A CN23C CN27A CN27C CN26A CN26C CN25A CN25C CN20A CN20C CN28A CN28C CN21A CN21C CN16A CN16C CN17A CN17C CN18A CN18C CN15A CN15C CN14A CN14C

3 0.1U 7 0.1U 3 7 3 7 3 7 3 7 3 7 3 7 3 7 3 7 3 7 3 7 3 7 3 7 3 7 3 7 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U

4 CN24B 8 CN24D 4 8 4 8 4 8 4 8 4 8 4 8 4 8 4 8 4 8 4 8 4 8 4 8 4 8 4 8 CN19B CN19D CN22B CN22D
C

_DDR_DATA10 _DDR_DATA14 _DDR_DATA11 _DDR_DATA15 _DDR_DATA16 _DDR_DATA20 _DDR_DATA17 _DDR_DATA21

6 8 5 7 4 3 2 1

56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm

11 9 12 10 13 14 15 16

RN56F RN56H RN56E RN56G RN56D RN56C RN56B RN56A

_DDR_DATA33 _DDR_DATA37 _DDR_DQS4 _DDR_DM4 _DDR_DATA34 _DDR_DATA38 _DDR_DATA35 _DDR_DATA39

7 1 6 5 4 3 1 2

56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm

10 16 11 12 13 14 16 15

RN61G RN52A RN61F RN61E RN61D RN61C RN61A RN61B

CN23B CN23D CN27B CN27D CN26B CN26D CN25B CN25D CN20B CN20D CN28B CN28D CN21B CN21D CN16B CN16D CN17B CN17D CN18B CN18D
B

_DDR_DQS2 _DDR_DM2 _DDR_DATA18 _DDR_DATA22 _DDR_DATA19 _DDR_DATA23 _DDR_DATA24 _DDR_DATA28

8 7 5 6 4 3 2 8

56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm

9 10 12 11 13 14 15 9

RN55H RN55G RN55E RN55F RN55D RN55C RN55B RN54H

_DDR_DATA40 _DDR_DATA44 _DDR_DATA41 _DDR_DATA45 _DDR_DQS5 _DDR_DM5 _DDR_DATA42 _DDR_DATA46

6 7 5 8 4 3 2 1

56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm

11 10 12 9 13 14 15 16

RN51F RN51G RN51E RN51H RN51D RN51C RN51B RN51A

B

_DDR_DATA25 _DDR_DATA29 _DDR_DQS3 _DDR_DM3 _DDR_DATA26 _DDR_DATA30 _DDR_DATA27 _DDR_DATA31

1 7 6 5 4 3 1 2

56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm

16 10 11 12 13 14 16 15

RN55A RN54G RN54F RN54E RN54D RN54C RN54A RN54B

_DDR_DATA43 _DDR_DATA47 _DDR_DATA48 _DDR_DATA52 _DDR_DATA49 _DDR_DATA53 _DDR_DQS6 _DDR_DM6

8 7 6 4 5 3 2 1

56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm

9 10 11 13 12 14 15 16

RN60H RN60G RN60F RN60D RN60E RN60C RN60B RN60A

6,10 6,10 6,10 6,10

DDR_CKE1 DDR_CKE2 DDR_CKE0 DDR_CKE3

DDR_CKE1 DDR_CKE2 DDR_CKE0 DDR_CKE3 DDR_AA12 DDR_AA11 DDR_AA9 DDR_AA8

6 5 6 1 8 3 7 4

56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm

11 12 11 16 9 14 10 13

RN53F RN63E RN63F RN63A RN53H RN63C RN53G RN63D

_DDR_DATA50 _DDR_DATA54 _DDR_DATA51 _DDR_DATA55 _DDR_DATA56 _DDR_DATA60 _DDR_DATA57 _DDR_DATA61

8 6 7 5 4 3 2 1

56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm

9 11 10 12 13 14 15 16

RN50H RN50F RN50G RN50E RN50D RN50C RN50B RN50A

CN15B CN15D CN14B CN14D

DDR_AA7 DDR_AA6 DDR_AA5 DDR_AB5 DDR_AA4 DDR_AB4 DDR_AA3 DDR_AA2

5 7 2 4 7 4 3 8

56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm

12 10 15 13 10 13 14 9

RN53E RN62G RN63B RN53D RN63G RN52D RN53C RN63H

_DDR_DQS7 _DDR_DM7 _DDR_DATA58 _DDR_DATA62 _DDR_DATA59 _DDR_DATA63

6 5 2 4 1 3 7 8

56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm 56Ohm

11 12 15 13 16 14 10 9

RN59F RN59E RN59B RN59D RN59A RN59C RN59G RN59H

A

A

Title : DDR TERMINATION
ASUSTek COMPUTER INC. NB1 Size Custom
5 4 3 2

Engineer:

John Hung
Rev 2.4

Project Name

A3N/A3L
Sheet
1

Date: Monday, November 15, 2004

11

of

55

A

B

C

D

E

2

BIOS BACK_OFF#:When user push "Fn+F7" button, BIOS active this pin to turn off back light.
1

1128
+V3.3S 1 AC_BAT_SYS 1 +V3.3A 1

+V5 1

+V5

+

CE29 100UF/6.3V /USB 15 USB_PN3 4 3 USB_P3-

+V5_USB35 L50 80Ohm/100MHz 2 1 /USB

1

C12 0.1U 2 /USB

R217 10KOhm 2 2

L30 80Ohm/100MHz 2

L35 80Ohm/100MHz

15

BACK_OFF#

D26 RB751V_40 2 1 1 3 2 D27 RB717F

GND 1 2

L51 90Ohm/100MHz /USB 15 USB_PP3 USB_P3+ 1 C516 0.1U /USB_EMI 2 2 1 C517 0.1U /USB_EMI GND

1

8 LVDS_BACK_EN 37 LID_SW#

L34 120Ohm/100MHz AC_INV 2 4 6 8 10 12 14 16 18 20 22 CON1

2029
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 SIDE2 SIDE1 WTOB_CON_20P 1 3 5 7 9 11 13 15 17 19 21

1

1219
USB_WLAN_ON#/OFF +V5_USB35 USB_P5USB_P5+ USB_P3USB_P3+

1210 1124 1212
L33 26 BACK_ADJ 1 2 L29 1 1 L1 1 120Ohm/100MHz 2 INTMIC_A_GND_CON 2 INTMIC_A_CON 120Ohm/100MHz 1 1 120Ohm/100MHz 32
2

L31 1

120Ohm/100MHz 2

2

GND

2213
C11 0.1U 2

2208

USB PORT 3 for CAMERA
+V5_USB35 USB_P54 3 1 /USB 15 USB_PN5

Pin 19 : Add a USB 2.0 Shielding GND cable to USB module.

INTMIC_A

2

1

1

1

BIOS BACK_ADJ: KBC output D/A signal ( adjust voltage level) to adjust Back light.

C1 0.001uF/50V

C291

C293

C290

C295

C292

1

C294 0.1uF/10V 1 2

1UF/10V 2 2 2 2 2 2 0.001uF/50V 0.001uF/50V 0.1uF/10V 0.001uF/50V

L52 90Ohm/100MHz /USB 1 15 USB_PP5 USB_P5+ /USB_EMI C518 0.1U 2 2 1 C519 GND 0.1U /USB_EMI

2

GND_MIC

A3N use D1 R:1.0 Inverter Board
GND

2208

1303
LCD CABLE ID: PID3 14.1 XGA 1 15.1 XGA 1 15.1 SXGA+ 1
CON2 31

1219
+V3.3

USB PORT 5 for WLAN
2208

3

PID2 1 1 0

PID1 1 0 1

PID0 1 1 1

RN86C

RN86D 10KOhm

LCD Power
SI3865: US$0.22
R11 2 1 1 100Ohm 2 D2 1N4148W-A2

5

7

3

RN86A,B: page 20
6

10KOhm

SIDE1

8 LVDS_CLKAP 8 LVDS_CLKAM 8 LVDS_YA2P 8 LVDS_YA2M 8 LVDS_YA1P 8 LVDS_YA1M 8 LVDS_YA0P 8 LVDS_YA0M

6

LVDS_YA2P LVDS_YA2N LVDS_YA1P LVDS_YA1N LVDS_YA0P LVDS_YA0N +V3.3S_LCD ID0 ID2

LVDS_YB2P LVDS_YB2M LVDS_YB1P LVDS_YB1M LVDS_YB0P LVDS_YB0M ID1 ID3

LVDS_YB2P 8 LVDS_YB2M 8 LVDS_YB1P 8 LVDS_YB1M 8 LVDS_YB0P 8 LVDS_YB0M 8

15,20 WLAN_ON#

2 1

Q87A UM6K1N /

3 5 4 Q87B UM6K1N /

LVDS_ACLKP LVDS_ACLKN

SIDE2

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30

LVDS_CLKBP LVDS_CLKBM

8 USB_WLAN_ON#/OFF

LVDS_CLKBP 8 LVDS_CLKBM 8

1211 2211
+V3.3S 2 +V12S 2 +V3.3S +V3.3S_LCD_C R12 1MOhm 1 SI3456DV Q52 1 6 D 2 5 S 4 3 G L2 1 2 80Ohm/100MHz 1 1 1 1 1 C302 47pF/50V 2 2 C10 0.1uF/10V 2 C298 0.1uF/10V 2 C2 1UF/10V 2 1 C7 10uF/10V

+V3.3S_LCD R219 C296 10KOhm 0.1UF/25V 2 GND Q53A UM6K1N 2 PID_0 PID_1 15 15 +V3.3S ID0 ID1 ID2 ID3 1 3 5 7 RN6A 10KOhm 2 RN6B 10KOhm 4 RN6C 10KOhm 6 RN6D 10KOhm 8 8 LVDS_VDD_EN 1

3-3.6V S0-S1M:410 mA(500 mA Max.)
T199 TPC28b +V3.3S_LCD 1
4

4

2215
GND GND

32

WTOB_2X15P

1

1136

Q53B UM6K1N 5 2

R218 47KOhm

4

3

6

5

PID_2 PID_3

15 15

1223 Title :
ASUSTek COMPUTER INC. NB1 Size Custom Project Name

1

Caution: Must tune R369 & C270 to meet Panel Spec
5

LVDS & BACKLIGHT John Hung
Rev 2.4

Engineer:

A3N/A3L
Sheet
E

Date: Monday, November 15, 2004
A B C D

12

of

55

A

B

C

D

E

Guarded by GND (Space>= 20mils)
D5 +V1.5S_GMCH_ADAC
1

Place Pi-Filter close to CRT (<= 200 mils) 2026
L8 70Ohm/100Mhz 1 2 CON9 CRT_L_RED 1 RED VCC 9

8 3

CRT_RED

CRT_Q_RED

2 1 BAV99

37.5 ohm
7

75 ohm
1 C20 15PF/50V 75Ohm 2 2 1 C309 15PF/50V RN4D

75 ohm

1

Length Matching (+/- 100 mils)

1141 1228 2026
Guarded by GND (Space>= 20mils)
D4 3 RN4B 75Ohm
2

8

NC1 NC2

4 11

8 3

CRT_GREEN

CRT_Q_GREEN

L7 70Ohm/100Mhz 1 2

CRT_L_GREEN

2

5

1

1 BAV99

C19 15PF/50V

1

4

+V1.5S_GMCH_ADAC

2

37.5 ohm

75 ohm
C308 15PF/50V 2 RN4C

GREEN

75 ohm

1228

Length Matching (+/- 100 mils)

75Ohm

2

1141
6

2

1228 2026
Guarded by GND (Space>= 20mils)
D3 +V1.5S_GMCH_ADAC 2 3 1 BAV99 8 CRT_BLUE CRT_Q_BLUE L6 70Ohm/100Mhz 1 2 CRT_L_BLUE 3

37.5 ohm
1

75 ohm
1 C17 15PF/50V 1 C307 15PF/50V 2 RN4A

BLUE

75 ohm
15

Length Matching (+/- 100 mils)
+V12S
3

75Ohm 2

2

CRT

1141

PIN
3

1228
Q3A UM6K1N 1 6 R14 39Ohm CRT_Q_HSYNC 1 2 1 C305 33PF/50V CRT_L_HSYNC 13 HSYNC

1

+V3.3SUS

RN3A 3 100KOHM RN3B 2 100KOHM 4 6 8 CRT_HSYNC

1

2

2 1 3

Q4A UM6K1N 8 CRT_VSYNC 4

5

R13 39Ohm 3 CRT_Q_VSYNC 1 2 1

2

2022
CRT_L_VSYNC 14 VSYNC C304 33PF/50V 2
4

14,19,20,21,26,27 BUF_PCI_RST#
4

5 4

Q4B UM6K1N

Q3B UM6K1N

RN5A 2.2KOhm +V5S 1 2 Q89A UM6K1N 1 6 L5 CRT_Q_DDC2BD 1 2 1 C306 5P 2 CRT_L_DDC2BD 12 DATA 75Ohm/100MHz

2022

8 CRT_DDC2BD

1225

2

L4 8 CRT_DDC2BC
5

SIDE_G16 SIDE_G17 GND5 GND4 GND3 GND2 GND1 2 1 C303 5P 2 CRT_L_DDC2BC 15 DCLK

16 17

5

4

3 Q89B UM6K1N

CRT_Q_DDC2BC 1 75Ohm/100MHz

RN5B 2.2KOhm +V5S 3 4

10 8 7 6 5

7846S_15G2T

5

1225 1115 2222
A B C D

Title : CRT CONNECTOR
ASUSTek COMPUTER INC. NB1

Engineer:

John Hung
Rev 2.4

2309 2408

Size Custom

Project Name

A3N/A3L
Sheet
E

Date: Monday, November 15, 2004

13

of

55

5

4

3

2

1

Strap Option Default: Pull-Down Pull-High for Hub Interface 1.5 Buffer Mode

+V1.5S_ICH 1

D

Use Daisy-Chain Topology
19,20,21,22 PCI_AD[31:0] PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31 19,20,21 19,20,21 19,20,21 19,20,21 +V3.3S 17,21 17,20 17,19 17 17 2 10KOhm 4 10KOhm PCI_C/BE#0 PCI_C/BE#1 PCI_C/BE#2 PCI_C/BE#3 PCI_REQ#0 PCI_REQ#1 PCI_REQ#2 PCI_REQ#3 PCI_REQ#4

R310 48.7Ohm HUB_RCOMP_ICH4 2

1109

D

LxWxH=31x31x2.38
U20A H5 J3 H3 K1 G5 J4 H4 J5 K2 G2 L1 G4 L2 H2 L3 F5 F4 N1 E5 N2 E3 N3 E4 M5 E2 P1 E1 P2 D3 R1 D2 P4 J2 K4 M4 N4 B1 A2 B3 C7 B6 A6 B5 C1 E6 A7 B7 D6 C5 E8 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 C/BE0# C/BE1# C/BE2# C/BE3# HI0 HI1 HI2 HI3 HI4 HI5 HI6 HI7 HI8 HI9 HI10 HI11 HI_STB#/HI_STBF HI_STB/HI_STBS HICOMP HI_VSWING EE_CS EE_DIN EE_DOUT EE_SHCLK LAD0/FWH0 LAD1/FWH1 LAD2/FWH2 LAD3/FWH3 LFRAME#/FWH4 LDRQ1# LDRQ0# L19 L20 M19 M21 P19 R19 T20 R20 P23 L22 N22 K21 N20 P21 R23 R22 D10 D11 A8 C12 T2 R4 T4 U2 T5 U4 U3 LPC_AD0 20,26,27 LPC_AD1 20,26,27 LPC_AD2 20,26,27 LPC_AD3 20,26,27 LPC_FRAME# 20,26,27 T48 TPC28b LPC_DRQ#0 27 HUB_PD0 HUB_PD1 HUB_PD2 HUB_PD3 HUB_PD4 HUB_PD5 HUB_PD6 HUB_PD7 HUB_PD8 HUB_PD9 HUB_PD10 HUB_PD11

ICH4 USE
<=6" <=6" <=6" <=6" <=6" <=6" <=6" <=6" <=8" <=8" <=8"
HUB_PD[10:0] 7

R-ICH4 <= 0.5"

PCI_REQ# CB&1394 MINIPCI LAN

PCI_REQ#? PCI_REQ#0 PCI_REQ#1 PCI_REQ#2

+V1.5S_ICH 1

0.8V +/- 2%
R314 56Ohm 1 2 HUB_PSTRB# 7 HUB_PSTRB 7

ICH4(R22)<=3"

R132 130Ohm 2 1 R133 150Ohm 2

HUB_RCOMP_ICH4 HUB_VSWING_ICH4

IDSEL CB&1394 MINIPCI
C

PCI_AD? PCI_AD21 PCI_AD20 PCI_AD16

Caution: The VREF of HUB interface is 0.35V The VSWING of HUB interace is 0.8V But in Intel CRB, their naming convention will make people confused.

HUB_VSWING_ICH4 1 1 2

C436 0.01UF/10V

C439 0.1uF/10V

2025

2

C

LAN

1

RN28A 1 RN28B 3

21 PCI_GNT#0 20 PCI_GNT#1 19 PCI_GNT#2 T43 T49 T46 T150 TPC28b TPC28b TPC28b TPC28b

1 1 1 1

REQ0# REQ1# REQ2# REQ3# REQ4# REQB#/REQ5#/GPIO1 SERR# REQA#/GPIO0 PME# GNT0# PLOCK# GNT1# PCIRST# GNT2# PCICLK GNT3# CLKRUN#/GPIO24 GNT4# GNTB#/GNT5#GPIO17 GNTA#/GPIO16 FW82801DBM

DEVSEL# FRAME# IRDY# TRDY# STOP# PAR PERR#

M3 F1 L5 F2 F3 G1 L4 K5 W2 M2 U5 P5 AC2

PCI_DEVSEL# 17,19,20,21 PCI_FRAME# 17,19,20,21 PCI_IRDY# 17,19,20,21 PCI_TRDY# 17,19,20,21 PCI_STOP# 17,19,20,21 PCI_PAR 19,20,21 PCI_PERR# 17,19,20,21 PCI_SERR# 17,19,20,21 PCI_LOCK# 17 PCI_RST# 8,24,29 _CLK_ICHPCI 18 PM_CLKRUN# 20,21,26 1 2 C455 5P /

PME_SB#

4"-8.5"

ICH4 pin E8
B

B

Strap Option Default: Pull-High 20K Pull-Down for BIOS TOP-BLOCK SWAP
+V3.3S RN30B 7 +V3.3 10KOhm RN30D 1 10KOhm 3 5 10KOhm 6 RN30C +V3.3

+V3.3

1 RN30A 10KOhm 2

C178 0.1uF/10V U17 1 A 2 B VCC 5 2

Q36 PMBS3904 PME_SB# 3 C

pull up to VccSus3_3 by internal pull-up resistor

4

1 B

8

20,21,27 PCI_PME#

E 2

PCI_RST#

19 4 BUF_PCI_RST# 13,19,20,21,26,27

PME_SB#
A

A

3 GND

Y NC7SZ08P5X

Meet LPC reset >= 60 us (Add Buffer)

Title : ICH4-M(HUBPCI)
ASUSTek COMPUTER INC. NB1 Size Custom
5 4 3 2

Engineer:

John Hung
Rev 2.4

Project Name

A3N/A3L
Sheet
1

Date: Monday, November 15, 2004

14

of

55

5

4

3

2

1

10KOhm

10KOhm

10KOhm

USB SIGNALS X Clock Signals | USB+ - USB-|<= 150 mils Pair Width/Space: 7/10 mils Impedence: 90 ohm(differential) Other Signals Space: >= 20 mils Clock Signals Sapce:>= 50 mils

+V3.3S_ICH

+V3.3SUS_ICH 24 IDE_PDD[15:0] RN31A RN31B

LxWxH=31x31x2.38
U20B IDE_PDD0 IDE_PDD1 IDE_PDD2 IDE_PDD3 IDE_PDD4 IDE_PDD5 IDE_PDD6 IDE_PDD7 IDE_PDD8 IDE_PDD9 IDE_PDD10 IDE_PDD11 IDE_PDD12 IDE_PDD13 IDE_PDD14 IDE_PDD15 AB11 AC11 Y10 AA10 AA7 AB8 Y8 AA8 AB9 Y9 AC9 W9 AB10 W10 W11 Y11 AA13 AB13 W13 Y13 AB14 AB12 W12 AC12 Y12 AA11 C11 A10 A9 A11 B10 C10 A12 B11 PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15 PDA0 PDA1 PDA2 PDCS1# PDCS3# PIORDY PDIOW# PDIOR# PDDACK# PDDREQ LAN_CLK LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2 LAN_RSTSYNC SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7 SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15 SDA0 SDA1 SDA2 SDCS1# SDCS3# SIORDY SDIOW# SDIOR# SDDACK# SDDREQ AC_RST# AC_SYNC AC_BIT_CLK AC_SDOUT AC_SDIN0 AC_SDIN1 AC_SDIN2 W17 AB17 W16 AC16 W15 AB15 W14 AA14 Y14 AC15 AA15 Y15 AB16 Y16 AA17 Y17 AA20 AC20 AC21 AB21 AC22 AC19 AA18 Y18 AB19 AB18 C13 C9 B8 D9 D13 A13 B13 W6 AC3 AB1 T21 F19 J23 AC97_SYNC AC97_SDOUT IDE_SDD0 IDE_SDD1 IDE_SDD2 IDE_SDD3 IDE_SDD4 IDE_SDD5 IDE_SDD6 IDE_SDD7 IDE_SDD8 IDE_SDD9 IDE_SDD10 IDE_SDD11 IDE_SDD12 IDE_SDD13 IDE_SDD14 IDE_SDD15

IDE_SDD[15:0]

25

8

RN31D 2

4

LxWxH=31x31x2.38
D

7

1

2108
USBRBIAS: W/S: 5/5 mils Length: <= 0.5"

34 34 34 34 34 34 12 12 34 34 12 12 1 R138 34 34 17 17

USB_PN0 USB_PP0 USB_PN1 USB_PP1 USB_PN2 USB_PP2 USB_PN3 USB_PP3 USB_PN4 USB_PP4 USB_PN5 USB_PP5 2 22.6Ohm USBRBIAS

D20 C20 B21 A21 D18 C18 B19 A19 D16 C16 B17 A17

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBRBIAS USBRBIAS# OC0# OC1# OC2# OC3# OC4# OC5#

<=0.5"

A23 B23 B15 C14 A15 B14 A14 D14

USB_OC#01 USB_OC#24 USB_OC#3 USB_OC#5 1 1

GPIO7 GPIO8 GPIO12 GPIO13 GPIO25 GPIO27 GPIO28 GPIO32 GPIO33 GPIO34 GPIO35 GPIO36 GPIO37 GPIO38 GPIO39 GPIO40 GPIO41 GPIO42 GPIO43

R3 V4 V5 W3 V2 W1 W4 J20 G22 F20 G20 F21 H20 F23 H22 G23 H21 F22 E23

3

U20C

IDE I/F: Width: 5 mils Space: 7 mils Length<= 8" Match: <= 500 mils
EXTSMI#_3A 26 KBDSCI_3A 26 SIO_SMI# 27 802_LED_EN# 36 BACK_OFF# 12

1104
CB_SD# 21 WLAN_ON# 12,20

IDE I/F: Width: 5 mils Space: 7 mils Length<= 8" Match: <= 500 mils

D

CB_SD#

PID_0_ICH4 PID_1_ICH4 CG_FS0 CG_FS1 CG_FS2 CG_FS5 CG_FS6 PID_2_ICH4 PID_3_ICH4

1219

2021 CG_FS0
CG_FS1 CG_FS2 CG_FS5 CG_FS6

24 IDE_PDA0 24 IDE_PDA1 24 IDE_PDA2 24 IDE_PDCS1# 24 IDE_PDCS3#

IDE_SDA0 25 IDE_SDA1 25 IDE_SDA2 25 IDE_SDCS1# 25 IDE_SDCS3# 25 IDE_SIORDY 25 IDE_SDIOW# 25 IDE_SDIOR# 25 IDE_SDDACK# 25 IDE_SDDREQ 25 AC97_RST# 30,33 AC97_BCLK_ICH4 30 AC97_SDIN0 30 AC97_SDIN1 33 SM_INTRUDER# 17 SM_LINK0 17 SM_LINK1 17 _CLK_ICH66 18 _CLK_ICH48 18 _CLK_ICH14 18 1 1 C191 5P / C186 5P / 1 RTC_RST# C184 5P /

18 18 18 18 18

2021

1212

CPUFAN_SPD_A 35

FWH_WP# 27 HA20GATE 26 H_A20M# 3 H_PWRGD 3 H_CPUSLP# 3 H_DPSLP# 3,8 H_FERR# 3 H_IGNNE# 3 H_INIT# 3,27 H_INTR 3 H_NMI 3 H_SMI# 3 H_STPCLK# 3 KBDCPURST 26

24 24 24 24 24

IDE_PIORDY IDE_PDIOW# IDE_PDIOR# IDE_PDDACK# IDE_PDDREQ

8,17 AGP_BUSY# 38 PM_DPRSLPVR
C

RN31C 10KOhm

37 PM_PWRBTN# 37,38 ICH4_PWROK 21 PM_RI# 37 PM_RSMRST# 19,21,37,42 PM_SLP_S3# 35,37,42 PM_SLP_S4# 18 PM_STPPCI# 18,38 PM_STPCPU# 8 PM_SUSCLK

1201

17 PM_SYSRST# 5,35 PM_THRM# 3 H_THRMTRIP_S# 37 PM_VGATE

R2 T3 Y20 V20 Y5 AA1 AB6 Y1 AA6 SLP_S1# W18 Y4 Y2 T166TPC28b 1 AA2 Y21 W19 J21 AA4 T51 TPC28b 1 AB3 Y3 V1 1 2 <=3" W20 R313 56Ohm V19 T50 TPC28b T138TPC28b

A20GATE A20M# CPUPWRGD CPUSLP# AGPBUSY#/GPIO6 DPSLP# C3_STAT#/GPIO21 FERR# CPUPERF#/GPIO22 IGNNE# DPRSLPVR INIT# LAN_RST# INTR PWRBTN# NMI PWROK SMI# RI# STPCLK# RSMRST# RCIN# SLP_S1#/GPIO19 SLP_S3# SLP_S4# SLP_S5# STP_PCI#/GPIO18 STP_CPU#/GPIO20 SSMUXSEL/GPIO23 SUSCLK SUS_STAT#/LPCPD# SYS_RESET# THRM# THRMTRIP# VGATE/VRMPWRGD FW82801DBM

Y22 AB23 Y23 U21 U23 AA21 1 W21 R139 V22 AB22 V21 W23 V23 U22

AC97 MDC

AC97_SDIN0 AC97_SDIN1
C

2 56Ohm

GPIO[32:43] default: Output High ICH4 EDS R:1.0 page 10-94 10.10.8, 10.10.9

2

2

1 3

RN68A 10KOhm 2 RN68B 10KOhm 4 RTC_X2 RTC_X1

AB2 AA5 AC4 AB4

PM_BATLOW# 17 LID_ICH4#_3A 37 SCL_3A 17 SDA_3A 17

AC6 AC7

FW82801DBM

T201 TPC28b

G3: 5 uA
RTC_BAT

T200 +V3.3A TPC28b D18 1 1 3 2 RB715F

+V_RTC

RC time delay should be 10-20 ms
1 2 RTC_RST# R156 180KOhm C212 1UF/10V 2 2

AC97 SDOUT & SYNC AC97 SDIN
ICH4 R2 AMC AC97 T R1 AC97 R2 AMC ICH4

1 R383 1KOhm BAT1 BATT

2

B

C213 0.1uF/10V

2

2119
1 2 RTC_VBIAS 1 RTC_VBIAS 16

Outer Layer: 5 mils W/S= 1:1 ICH4-(T): 1"- 8" R1-(T): 0.1"- 0.4" AC97-R1: <=5.6" R2-(T): 0.1"- 0.4" AMC-R2: 0.9"-5.6"

1

1

1

1

2

17,20,21,26,27 INT_SERIRQ 17,22 PCI_INTA# 17,22 PCI_INTB# 17,19,20 PCI_INTC# 17,20,22 PCI_INTD# 17 ICH4_GPI2 17 ICH4_GPI3 17 ICH4_GPI4 17 ICH4_GPI5 17,24 INT_IRQ14 17,25 INT_IRQ15

J22 D5 C2 B4 A3 C8 D7 C3 C4 AC13 AA19 J19 H19 K20

INTRUDER# SERIRQ SMLINK0 PIRQA# SMLINK1 PIRQB# PIRQC# CLK66 PIRQD# CLK48 PIRQE#/GPIO2 CLK14 PIRQF#/GPIO3 PIRQG#/GPIO4 RTCRST# PIRQH#/GPIO5 IRQ14 IRQ15 SPKR APICCLK APICD0 BATLOW#/TP[0] APICD1 SMBALERT#/GPIO11 RTCX2 SMBCLK RTCX1 SMBDATA

5

W7 H23

6

ICH4_SPKR 30

B

RTC CIRCUITRY
RTC Circuits: RTC_RST#, RTC_VBIAS, RTC_X1, RTC_X2 Width= 5 mils Length<=1" Need GND Guard Measure duty-cycle of SUSCLK (Pin AA4) must be in 30-70%

1215
2 1 C216 18P X2 3 SIDE 2

C225 0.047UF/10V

Outer Layer: 5 mils W/S= 1:1 ICH4-R2: 0.9"- 13.6" AC97-R2: 0.1"-0.4"

AC97_SYNC

/CUSTOMER R143 1 2 33Ohm R141 1 2 33Ohm

AC97_SYNC_MDC 33 AC97_SYNC_CODEC 30

(#0013)
AC97_SDOUT

/CUSTOMER R144 1 2 33Ohm R142 1 2 33Ohm

AC97_SDOUT_MDC 33 AC97_SDOUT_CODEC 30

R170 10MOhm

AC97_SDIN0 AC97_SDIN1 RTC_X1

2206 2121
1 1 2

1 to 8 inches
INTEL REQUEST
+V3.3

2

Vpeak-peak of RTC_X1 < 1V
1

0.1 to 0.4 inches

0.9 to 5.6 inches

A

A2.1 PCB uses "xtal_3p_319x108" footprint, but the SMT recommended 1st source part uses "xtal_3p_335x110" footprint.

T type routing, place R at branch point.
R166 10MOhm PM_SLP_S3# SLP_S1# RTC_X2 U38 1 A 2 B 3 GND 4 Y NC7SZ08P5X PM_SLP_S1# 18,35 1 VCC 5 2 C472 0.1uF/10V +V3.3S_ICH AC97_SDOUT

32.768KHZ +/-20ppm/12.5PF 2 2 1 C220 18P

Strap Option

Default: Pull-Down 20K Pull-High for CPU SAFE_MODE
A

PID_0_ICH4 PID_1_ICH4 PID_2_ICH4 PID_3_ICH4

3 1 5 7

4 2.2KOhm 2 2.2KOhm 6 2.2KOhm 8 2.2KOhm

RN89B RN89A RN89C RN89D

PID_0 PID_1 PID_2 PID_3

12 12 12 12

+V3.3S_ICH

2021
5 4 3

Strap Option

Default: Pull-Down 20K Pull-High for Not Supported
PM_DPRSLPVR 38 ASUSTek COMPUTER INC. NB1 Size Custom
2

Title :
Engineer:
Project Name

ICH4-M(H_U_IDE_PM) John Hung
Rev 2.4

A3N/A3L
Sheet
1

Date: Monday, November 15, 2004

15

of

55

5

4

3

2

1

D

LxWxH=31x31x2.38
U20E +V3.3S VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 VSS_99 VSS_100 VSS_101 VSS_102 G21 G3 G6 H1 J6 K11 K13 K19 K23 K3 L10 L11 L12 L13 L14 L21 M1 M11 M12 M13 M20 M22 N10 N11 N12 N13 N14 N19 N21 N23 N5 P11 P13 P20 P22 P3 R18 R21 R5 T1 T19 T23 U20 V15 V17 V3 W22 W5 W8 Y19 Y7 A1 A16 A18 A20 A22 A4 AA12 AA16 AA22 AA3 AA9 AB20 AB7 AC1 AC10 AC14 AC18 AC23 AC5 B12 B16 B18 B20 B22 B9 C15 C17 C19 C21 C23 C6 D1 D12 D15 D17 D19 D21 D23 D4 D8 D22 E10 E14 E16 E17 E18 E19 E21 E22 F8 G19 VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51

3.135V - 3.465V(+/- 5%) S0-S1M:0.42A
1 1 1 C246 0.1uF/10V 2 2 C