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A
B
C
D
P08A1 Block Diagram
4
Project code: PCB P/N : from 08200 (08236) REVISION : SB
SYSTEM DC/DC
TPS51125
INPUTS
DCBATOUT 3D3V_S5(5A)
E
34 OUTPUTS
5V_S5(5A)
CLK GEN.
ICS9LPRS365YGLFT-GP
2
Mobile CPU
Penryn
3,4
SYSTEM DC/DC
APW7138QAI
4
G7921
19
36
INPUTS
DCBATOUT
OUTPUTS
1D05V_M(11A) 1D8V_S3(10A)
RTM875T-606-VD-GRT
HOST BUS
667/800/[email protected]
LVDS
RT9026
WXGA/SXGA+ 15.6" LCD 31 CRT 30
1D8V_S3
35
DDR_VREF_S0 (1.5A) DDR_VREF_S3
DDR2 socket
11,12
667/8000MHz
Cantiga AGTL+ CPU I/F
DDR Memory I/F INTEGRATED GRAHPICS LVDS, CRT I/F 71.CNTIG.00U
APL5912
CRT 1D8V_S3
1D5V_S0
35
3
DDR2 socket
11,12
667/8000MHz
5,6,7,8,9,10
3
X4 DMI 400MHz HD Audio
C-Link0
Line Out
Codec
ALC269
28
ICH9M
6 PCIe ports PCI/PCI BRIDGE ACPI 1.1 4 SATA 12 USB
PCI-E/USB 2.0
New card
24
G577 24 MS/MS Pro/ MMC/SD
4 in 1
MIC In INT.MIC
USB 2.0
USB Cardreader
RTS5158
25
25
CHARGER
PCI-E
LAN
TRL8101E 22
MAX8731
38
TXFM
23
RJ45
23
INPUTS
OUTPUTS CHG_PWR
2
High Definition Audio
2
INT.SPKR x 2
28
LPC I/F Serial Peripheral I/F
PCI-E / USB 2.0
Mini Card
Shirley Peak a/g/n
DCBATOUT
18V 5V
4.0A 100mA
HDD CDROM
29
SATA-0
20
24
UP+5V
CPU DC/DC Sil3811
29 USB 2.0 USB 2.0 USB 2.0
SATA-5
71.ICH9M.00U
ISL6266A
14,15,16,17,18
LPC BUS
INPUTS OUTPUTS
33
KBC
Winbond
WPC773 27
SPI I/F
BIOS
2M byte 27
LPC
DEBUG CONN. 26
DCBATOUT
VCC_CORE_S0
0~1.3V 38A
1
1
USB x 4
21
WebCOM
31
BlueTooth 2.0
31
Touch Pad 26
INT. KB 26
Title Size A3 Document Number
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
BLOCK DIAGRAM
Rev
P08A1
Sheet 1 of
SB
40
Date: Tuesday, August 26, 2008
5
4
3
2
1
3D3V_S0 R78 2 1 0R0603-PAD
3D3V_48MPWR_S0
3D3V_S0 R67 2 1 0R0603-PAD C61 SCD1U16V2ZY-2GP
3D3V_CLKPLL_S0
3D3V_S0
3D3V_CLKGEN_S0 SC4D7U10V5ZY-3GP
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
C64
C62 SC1U16V3ZY-GP
C56
C58
C44
C46
C59
C45
EC19
C63
C55
C60
C43
C42
C41
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
D
DY
2
1
2 R65 1 0R0603-PAD
SCD1U16V2ZY-2GP
SC4D7U6D3V3KX-GP
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC4D7U10V5ZY-3GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
D
U9
SB
3D3V_S0
3D3V_CLKGEN_S0 3D3V_48MPWR_S0
DY
2
R85 10KR2J-3-GP
DY
2
DY
2 2
R82 10KR2J-3-GP R73 10KR2J-3-GP 3D3V_CLKPLL_S0 PCLKCLK2 PCLKCLK3 PCLKCLK4 PCLKCLK5 R74 10KR2J-3-GP 6 CLK_MCH_OE# TPAD14-GP TPAD14-GP 26 27 15 PCLK_FWH PCLK_KBC PCLK_ICH
2 9 16 61 39 55 12 20 26 36 45 49 1 3 4 5 6 7 59 60 10 57
VDDPCI VDD48 VDDPLL3 VDDREF VDDSRC VDDCPU VDD96_IO VDDPLL3_IO VDDSRC_IO VDDSRC_IO VDDSRC_IO VDDCPU_IO PCI0/CR#_A PCI1/CR#_B PCI2/TME PCI3 PCI4/27_SELECT PCI_F5/ITP_EN X2 X1 USB_48MHZ/FSLA FSLB/TEST_MODE REF0/FSLC/TEST_SEL GNDPCI GND48 GND GND GNDSRC GNDSRC GNDCPU GNDREF GNDSRC
SDATA SCLK SRCT0/DOTT_96 SRCC0/DOTC_96 27MHZ_NONSS/SRCT1/SE1 27MHZ_SS/SRCC1/SE2 SRCT2/SATAT SRCC2/SATAC SRCT3/CR#_C SRCC3/CR#_D SRCT4 SRCC4 PCI_STOP# CPU_STOP# SRCT6 SRCC6 SRCT7/CR#_F SRCC7/CR#_E CPUT2_ITP/SRCT8 CPUC2_ITP/SRCC8 CPUT1_F CPUC1_F CPUT0 CPUC0 CK_PWRGD/PD# NC#48 SRCT9 SRCC9 SRCC11/CR#_G SRCT11/CR#_H SRCT10 SRCC10
63 64 13 14 17 18 21 22 24 25 27 28 38 37 41 40 44 43 47 46 51 50 54 53 56 48
SMBD_ICH 11,18 SMBC_ICH 11,18 DREFCLK_1 DREFCLK#_1 DREFSSCLK_1 DREFSSCLK#_1 CLK_PCIE_SATA_R CLK_PCIE_SATA#_R CLK_MCH_3GPLL_R CLK_MCH_3GPLL#_R CLK_PCIE_MINI1_R CLK_PCIE_MINI1#_R
SB
4 3 2 1 2 1 2 1 2 1 1 RN9 2 SRN0J-6-GP
RN39 3 4 SRN0J-6-GP
R76 10KR2J-3-GP
DREFCLK 6 DREFCLK# 6 DREFSSCLK 6 DREFSSCLK# 6 CLK_PCIE_SATA 14 CLK_PCIE_SATA# 14 CLK_MCH_3GPLL 6 CLK_MCH_3GPLL# 6 CLK_PCIE_MINI1 24 CLK_PCIE_MINI1# 24
1
1
1
1
3 4 3 4 3 4
RN13 SRN0J-6-GP RN10 SRN0J-6-GP RN11 SRN0J-6-GP
2
2
2
2
R86 10KR2J-3-GP
R77 10KR2J-3-GP
R83 10KR2J-3-GP
2
TP45 TP46
1 22R2J-2-GP PCLKCLK0 R64 PCLKCLK1 1 1
PCLKCLK2
1
1
1
1
DY
C
2 2 2
PCLK_FWH PCLK_KBC PCLK_ICH CLK48_ICH CLK_ICH14
25 16 3,6 3,6 3,6 16
CLK48_Reader CLK48_ICH CPU_SEL0 CPU_SEL1 CPU_SEL2 CLK_ICH14
R87 R89 R88 R44 R45
2 2 2 2 2
1 22R2J-2-GP PCLKCLK3 R81 1 22R2J-2-GP PCLKCLK4 R75 1 22R2J-2-GP PCLKCLK5 R84 GEN_XTAL_OUT GEN_XTAL_IN 1 33R2J-2-GP CLK48 1 33R2J-2-GP 1 2K2R2J-2-GP 1 10KR2J-3-GP 1 33R2J-2-GP
CPU_SEL2_R
PM_STPPCI# 16 PM_STPCPU# 16 CLK_PCIE_ICH_R CLK_PCIE_ICH#_R CLK_PCIE_NEW_R CLK_PCIE_NEW#_R CLK_PCIE_LAN_R CLK_PCIE_LAN#_R CLK_MCH_BCLK_R CLK_MCH_BCL#_R CLK_CPU_BCLK_R CLK_CPU_BCLK#_R
1 2 1 2 1 2 1 2 1 2
4 3
RN7 SRN0J-6-GP
CLK_PCIE_ICH 15 CLK_PCIE_ICH# 15 CLK_PCIE_NEW 24 CLK_PCIE_NEW# 24 CLK_PCIE_LAN 22 CLK_PCIE_LAN# 22 CLK_MCH_BCLK 5 CLK_MCH_BCLK# 5 CLK_CPU_BCLK 3 CLK_CPU_BCLK# 3
C
RN4 4 3 SRN0J-6-GP RN3 4 3 SRN0J-6-GP
4 3 4 3
RN5 SRN0J-6-GP RN2 SRN0J-6-GP
62 8 11 15 19 23 42 52 58 29
1
1
1
1
DY
DY
2
DY
2
DY
2
DY
2
1
EC22 SC22P50V2JN-4GP SC22P50V2JN-4GP
EC21 SC22P50V2JN-4GP SC22P50V2JN-4GP
EC23 SC22P50V2JN-4GP SC22P50V2JN-4GP
EC24 SC22P50V2JN-4GP
EC16 SC22P50V2JN-4GP
CLK_PWRGD 16
2
3D3V_S0
1
SC27P50V2JN-2-GP C47 1 2
GEN_XTAL_IN R58 1MR2F-GP
1 30 31 32 33 34 35
DY
CLK_PCIE_MINI2_R CLK_PCIE_MINI2#_R
X2 X-14D31818M-35GP
R46 2 10KR2J-3-GP 2 1
3 4
CLK_PCIE_MINI2 24 CLK_PCIE_MINI2# 24
1
2
2
RN8 SRN0J-6-GP CLK_PCIE_PEG_R CLK_PCIE_PEG#_R
1 C48
B
2
GEN_XTAL_OUT
SC27P50V2JN-2-GP
DY
ICS9LPRS365YGLFT-GP 71.09365.00W
1 1
TP130 TP131
TPAD14-GP TPAD14-GP
B
ICS9LPRS365YGLFT setting table
PIN NAME DESCRIPTION
Byte 5, bit 7 0 = PCI0 enabled (default) 1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair Byte 5, bit 6 0 = CR#_A controls SRC0 pair (default), 1= CR#_A controls SRC2 pair Byte 5, bit 5 0 = PCI1 enabled (default) 1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair Byte 5, bit 4 0 = CR#_B controls SRC1 pair (default) 1= CR#_B controls SRC4 pair
SB
PCI0/CR#_A
PCI1/CR#_B
PCI2/TME
A
0 = Overclocking of CPU and SRC Allowed 1 = Overclocking of CPU and SRC NOT allowed 0 = Pin37 as CPU_STOP# , pin 38 as PCI_STOP#. 1 = Pins37,38 as SRC-5 differential pair. 0 = Pin17 as SRC-1, Pin18 as SRC-1#, Pin13 as DOT96, Pin14 as DOT96# 1 = Pin17 as 27MHz, Pin 18 as 27MHz_SS, Pin13 as SRC-0, Pin14 as SRC-0# 0 =SRC8/SRC8# 1 = ITP/ITP#
4 3
PCI3 PCI4/27M_SEL PCI_F5/ITP_EN
5
SEL2 SEL1 SEL0 FSC FSB FSA 1 0 0 0 0 0 0 1 1 0 1 1 1 0 0
CPU
100M 133M 166M 200M 266M
FSB
X 533M 667M 800M 1067M
2
UMA
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size
Clock Generator
Document Number Rev
P08A1
Date: Thursday, August 21, 2008 Sheet
1
2
of
40
A
B
C
D
E
5
H_A#[35..3]
H_A#[35..3] H_DINV#[3..0] U38A 1 OF 4 H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_DINV#[3..0] H_DSTBN#[3..0] H_DSTBP#[3..0] H_D#[63..0] 5
4
5 5 5
1 ADS# BNR# BPRI# H1 E2 G5 H5 F21 E1 F1 D20 B3 H4 C1 F3 F4 G3 G2 G6 E4 AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6 AB3 AB5 AB6 C20
H_RS#0 H_RS#1 H_RS#2
TP34 TPAD14-GP H_ADS# H_BNR# H_BPRI# 5 5 5 1D05V_S0
H_DSTBN#[3..0] H_DSTBP#[3..0] H_D#[63..0]
CONTROL
DEFER# DRDY# DBSY# BR0# IERR# INIT# LOCK# RESET# RS0# RS1# RS2# TRDY# HIT# HITM#
H_DEFER# 5 H_DRDY# 5 H_DBSY# 5 H_BREQ#0 5 H_IERR# H_INIT# 14,26
1
4
5 5
H_ADSTB#0 H_REQ#[4..0]
J4 L5 L4 K5 M3 N2 J1 N3 P5 P2 L2 P4 P1 R1 M1
A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# ADSTB0# REQ0# REQ1# REQ2# REQ3# REQ4# A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# A32# A33# A34# A35# ADSTB1# A20M# FERR# IGNNE# STPCLK# LINT0 LINT1 SMI# RSVD#M4 RSVD#N5 RSVD#T2 RSVD#V3 RSVD#B2 RSVD#C3 RSVD#D2 RSVD#D22 RSVD#D3 RSVD#F6 KEY_NC
ADDR GROUP 0
R389 56R2J-4-GP
Place testpoint on H_IERR# with a GND 0.1" away
2
1
TP32 TPAD14-GP
H_LOCK# 5 H_CPURST# 5 H_RS#[2..0] 5 H_THERMDA H_TRDY# 5 H_HIT# H_HITM# XDP_BPM#0 1 XDP_BPM#1 1 XDP_BPM#2 1 XDP_BPM#3 1 XDP_BPM#4 1 XDP_BPM#5 1 XDP_TCK 1 XDP_TDI 1 XDP_TDO 1 XDP_TMS 1 XDP_TRST# 1 XDP_DBRESET# 1 TP9 TP8 TP12 TP13 TP15 TP11 TP4 TP17 TP16 TP14 TP6 TP36 5 5 TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP H_THERMDC H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15
U38B 2 OF 4
3
H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 5 14 14 14 14 H_STPCLK# 14 14 14 H_ADSTB#1 H_A20M# H_FERR# H_IGNNE#
Y2 U5 R3 W6 U4 Y5 U1 R4 T5 T3 W2 W5 Y4 U2 V4 W3 AA4 AB2 AA3 V1 A6 A5 C4
DY
XDP/ITP SIGNALS
BPM0# BPM1# BPM2# BPM3# PRDY# PREQ# TCK TDI TDO TMS TRST# DBR#
DATA GRP2
H_REQ#0 K3 H_REQ#1 H2 H_REQ#2 K2 H_REQ#3 J3 H_REQ#4 L1
2
C537 SC2200P50V2KX-2GP
5 H_DSTBN#0 5 H_DSTBP#0 5 H_DINV#0
E22 F24 E26 G22 F23 G25 E25 E23 K24 G24 J24 J23 H22 F26 K22 H23 J26 H26 H25
D0# D1# D2# D3# D4# D5# D6# D7# D8# D9# D10# D11# D12# D13# D14# D15# DSTBN0# DSTBP0# DINV0# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# DSTBN1# DSTBP1# DINV1# GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 BSEL0 BSEL1 BSEL2
D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# DSTBN2# DSTBP2# DINV2# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63# DSTBN3# DSTBP3# DINV3# COMP0 COMP1 COMP2 COMP3 DPRSTP# DPSLP# DPWR# PWRGOOD SLP# PSI#
Y22 AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22 AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20 R26 U26 AA1 Y1 E5 B5 D24 D6 D7 AE6
H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_DSTBN#2 5 H_DSTBP#2 5 H_DINV#2 5 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 H_DSTBN#3 5 H_DSTBP#3 5 H_DINV#3 5 COMP0 COMP1 COMP2 COMP3 R384 R381 R35 R36
3
1
DATA GRP0
THERMTRIP#
C7
2
R42 1 0R0402-PAD
PM_THRMTRIP-A# 6,14
2
H_INTR H_NMI H_SMI# TP30 TP27 TP19 TP18 TP43 TP40 TP39 TP38 TP37 TP35 TP42
R47 1 H_STPCLK#_R D5 0R2J-2-GP C6 B4 A3
HCLK
BCLK0 BCLK1
A22 A21
CLK_CPU_BCLK 2 CLK_CPU_BCLK# 2 PM_THRMTRIP# should connect to ICH9 and MCH without T-ing ( No stub) 1D05V_S0
2
R364 2KR2F-3-GP
SC1KP50V2KX-1GP 2 1
TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP
1 1 1 1 1 1 1 1 1 1 1
RSVD_CPU_1 RSVD_CPU_2 RSVD_CPU_3 RSVD_CPU_4 RSVD_CPU_5 RSVD_CPU_6 RSVD_CPU_7 RSVD_CPU_8 RSVD_CPU_9 RSVD_CPU_10 RSVD_CPU_11
M4 N5 T2 V3 B2 C3 D2 D22 D3 F6 B1
2
RESERVED
1 1
Layout Note: "CPU_GTLREF0" 0.5" max length.
R366 1KR2F-3-GP
5 5 5
H_DSTBN#1 H_DSTBP#1 H_DINV#1
CPU_GTLREF0
DATA GRP3
BGA479-SKT6-GPU7
2
62.10079.001
ADDR GROUP 1
2 D21 A24 B25
CPU_PROCHOT#_R H_THERMDA 19 H_THERMDC 19
THERMAL
PROCHOT# THRMDA THRMDC
R390 1 68R2-GP
1D05V_S0 CPU_PROCHOT#_R 33
H_D#16 N22 H_D#17 K25 H_D#18 P26 H_D#19 R23 H_D#20 L23 H_D#21 M24 H_D#22 L22 H_D#23 M23 H_D#24 P25 H_D#25 P23 H_D#26 P22 H_D#27 T24 H_D#28 R24 H_D#29 L25 H_D#30 T25 H_D#31 N25 L26 M26 N24
DATA GRP1
ICH ICH
DY C505 TPAD14-GP
TPAD14-GP TPAD14-GP 2,6 2,6 2,6
TP41 TP5 TP96
AD26 TEST1 C23 TEST2 D25 1RSVD_CPU_12C24 TEST4 AF26 1RSVD_CPU_13AF1 1RSVD_CPU_14 A26 B22 B23 C21
MISC
1 1 1 1
2 2 2 2
27D4R2F-L1-GP 54D9R2F-L1-GP 27D4R2F-L1-GP 54D9R2F-L1-GP
2
CPU_SEL0 CPU_SEL1 CPU_SEL2
H_DPRSTP# 6,14,33 H_DPSLP# 14 H_DPWR# 5 H_PWRGD 14 H_CPUSLP# 5 PSI# 33
1D05V_S0
BGA479-SKT6-GPU7
XDP_TMS XDP_TDI XDP_BPM#5 XDP_TDO H_CPURST#
R31 R37 R29 R34 R53
1 1 1 1 1
2 54D9R2F-L1-GP 2 54D9R2F-L1-GP 2 54D9R2F-L1-GP DY 2 54D9R2F-L1-GP
1 DY R399 1 R394
2 TEST1 1KR2J-1-GP
2 TEST2 DY 1KR2J-1-GP
TEST4 2 1 C501DY SCD1U10V2KX-4GP
Net "TEST4" as short as possible, make sure "TEST4" routing is reference to GND and away other noisy signals
Layout Note: Comp0, 2 connect with Zo=27.4 ohm, make trace length shorter than 0.5" . Comp1, 3 connect with Zo=55 ohm, make trace length shorter than 0.5" .
DY
2 54D9R2F-L1-GP
3D3V_S0
XDP_DBRESET# R396 1
1
DY
2 150R2F-1-GP
ZZZZ
1
XDP_TCK XDP_TRST#
R27 R28
1 1
2 54D9R2F-L1-GP 2 54D9R2F-L1-GP
Title
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
All place within 2" to CPU
CPU (1 of 2)
Size Document Number Rev
P08A1
Date: Thursday, August 21, 2008
A B C D
Sheet
E
3
of
40
A
B
C
D
E
U38D VCC_CORE
4
4 OF 4
VCC_CORE U38C 3 OF 4 VCC_CORE
3
VID0 VID1 VID2 VID3 VID4 VID5 VID6 VCCSENSE VSSSENSE
AD6 AF5 AE5 AF4 AE3 AF3 AE2 AF7 AE7
H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6
SCD01U16V2KX-3GP
2
A7 A9 A10 A12 A13 A15 A17 A18 A20 B7 B9 B10 B12 B14 B15 B17 B18 B20 C9 C10 C12 C13 C15 C17 C18 D9 D10 D12 D14 D15 D17 D18 E7 E9 E10 E12 E13 E15 E17 E18 E20 F7 F9 F10 F12 F14 F15 F17 F18 F20 AA7 AA9 AA10 AA12 AA13 AA15 AA17 AA18 AA20 AB9 AC10 AB10 AB12 AB14 AB15 AB17 AB18
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCA VCCA
2
2
2
2
2
2
2
G21 CPU_G21 CPU_V6 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21 B26 C26
1
C36 SCD1U10V2KX-4GP
R40 2 0R0402-PAD 1 2 R38 0R0402-PAD
1
1
C28 SCD1U10V2KX-4GP
1
2
2
layout note: "1D5V_VCCA_S0" as short as possible
1D5V_S0 1D5V_VCCA_S0 L36
2
TC25 ST220U6D3VDM-15GP
1
H_VID[6..0] VCC_CORE
33
C529
1
1 2 HCB1608KF121T30-GP
C526 SC10U6D3V5MX-3GP
2
AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20
DY
1 1 1 1
C24 SCD1U10V2KX-4GP C25 SCD1U10V2KX-4GP C39 SCD1U10V2KX-4GP C40 SCD1U10V2KX-4GP C517 SC22U6D3V5MX-L2GP
DY
1 1
C516 SC22U6D3V5MX-L2GP
DY
1
C518 SC22U6D3V5MX-L2GP
DY
1 1 1 1 1 1
C514 SC22U6D3V5MX-L2GP C519 SC22U6D3V5MX-L2GP C515 SC22U6D3V5MX-L2GP SC22U6D3V5MX-L2GP C38 SC22U6D3V5MX-L2GP C37 SC22U6D3V5MX-L2GP C26 SC22U6D3V5MX-L2GP SC22U6D3V5MX-L2GP
1D05V_S0
DY
1 1 1 1 1
C34 SCD1U10V2KX-4GP C35 SCD1U10V2KX-4GP C32 SCD1U10V2KX-4GP C27 SCD1U10V2KX-4GP C29
DY
1 1
C33 SCD1U10V2KX-4GP C30 SC4D7U6D3V3KX-GP
C31 SC4D7U6D3V3KX-GP
1D05V_S0
R24 100R2F-L1-GP-U
VCC_SENSE 33 VSS_SENSE 33
Layout Note: R25 100R2F-L1-GP-U VCCSENSE and VSSSENSE lines should be of equal length.
BGA479-SKT6-GPU7
1
Layout Note: Provide a test point (with no stub) to connect a differential probe between VCCSENSE and VSSSENSE at the location where the two 54.9ohm resistors terminate the 55 ohm transmission line.
A4 A8 A11 A14 A16 A19 A23 AF2 B6 B8 B11 B13 B16 B19 B21 B24 C5 C8 C11 C14 C16 C19 C2 C22 C25 D1 D4 D8 D11 D13 D16 D19 D23 D26 E3 E6 E8 E11 E14 E16 E19 E21 E24 F5 F8 F11 F13 F16 F19 F2 F22 F25 G4 G1 G23 G26 H3 H6 H21 H24 J2 J5 J22 J25 K1 K4 K23 K26 L3 L6 L21 L24 M2 M5 M22 M25 N1 N4 N23 N26 P3
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25
4
2
2
2
2
2
2
2
2
2
2
2
2
2
3
1
SCD1U10V2KX-4GP
2
2
1
2
1
TP7
TPAD14-GP
2
2
1
1 1
TP88 TPAD14-GP TP44 TPAD14-GP
1
TP97 TPAD14-GP
BGA479-SKT6-GPU7
1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
CPU (2 of 2)
Size Document Number Rev
P08A1
Date: Monday, August 25, 2008
A B C D
Sheet
E
4
of
40
5
4
3
2
1
U52A 3 H_D#[63..0] H_D#[63..0] H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
1 OF 10 H_A#[35..3]
D
H_SWING routing Trace width and Spacing use 10 / 20 mil H_SWING Resistors and Capacitors close MCH 500 mil ( MAX )
1
1D05V_S0
R481 221R2F-2-GP
H_SWING C579 SCD1U10V2KX-4GP
R470 100R2F-L1-GP-U
C
H_RCOMP routing Trace width and Spacing use 10 / 20 mil
1 R495 2 H_RCOMP 24D9R2F-L-GP
Place them near to the chip ( < 0.5")
B
F2 G8 F8 E6 G2 H6 H2 F6 D4 H3 M9 M11 J1 J2 N12 J6 P2 L2 R2 N9 L6 M5 J3 N2 R1 N5 N6 P13 N8 L7 N10 M3 Y3 AD14 Y6 Y10 Y12 Y14 Y7 W2 AA8 Y9 AA13 AA9 AA11 AD11 AD10 AD13 AE12 AE9 AA2 AD8 AA3 AD3 AD7 AE14 AF3 AC1 AE3 AC3 AE11 AE8 AG2 AD6
H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63
H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8 H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35 H_ADS# H_ADSTB#_0 H_ADSTB#_1 H_BNR# H_BPRI# H_BREQ# H_DEFER# H_DBSY# HPLL_CLK HPLL_CLK# H_DPWR# H_DRDY# H_HIT# H_HITM# H_LOCK# H_TRDY#
A14 C15 F16 H13 C18 M16 J13 P16 R16 N17 M13 E17 P17 F17 G20 B19 J16 E20 H16 J20 L17 A17 B17 L16 C21 J17 H20 B18 K17 B20 F21 K21 L20 H12 B16 G17 A9 F11 G12 E9 B10 AH7 AH6 J11 F9 H9 E12 H11 C9
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 H_ADS# 3 H_ADSTB#0 3 H_ADSTB#1 3 H_BNR# 3 H_BPRI# 3 H_BREQ#0 3 H_DEFER# 3 H_DBSY# 3 CLK_MCH_BCLK 2 CLK_MCH_BCLK# 2 H_DPWR# 3 H_DRDY# 3 H_HIT# 3 H_HITM# 3 H_LOCK# 3 H_TRDY# 3
H_A#[35..3]
3
D
2
2
1
2
1
C
HOST
H_DINV#[3..0]
H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3 H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3 H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3 H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4 H_RS#_0 H_RS#_1 H_RS#_2
J8 L3 Y13 Y1 L10 M7 AA5 AE6 L9 M8 AA6 AE5 B15 K13 F13 B13 B14 B6 F12 C8
H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3 H_DSTBN#[3..0] H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#[3..0] H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3 H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_RS#0 H_RS#1 H_RS#2
H_DINV#[3..0]
3
H_DSTBN#[3..0]
3
H_DSTBP#[3..0]
3
B
1D05V_S0
H_REQ#[4..0]
3
2
H_SWING H_RCOMP R457 1KR2F-3-GP 3 3 H_AVREF H_CPURST# H_CPUSLP#
C5 E3 C12 E11 A11 B11
H_SWING H_RCOMP H_CPURST# H_CPUSLP# H_AVREF H_DVREF
H_RS#[2..0]
3
1
1 1
R482
2
H_DVREF
SCD1U16V2ZY-2GP
2
R456 2KR2F-3-GP
DY C583
0R0402-PAD CANTIGA-GM-GP-U-NF 71.CNTIG.00U
2
1
A
ZZZZ
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number
Cantiga (1 of 6) P08A1
Sheet
1
Rev of 40
Date: Thursday, August 21, 2008
5 4 3 2
5
5
4
3
2
1
3D3V_S0 R130 1 R132 1 R131 1
DY DY DY
2 2K21R2F-GP CFG18 2 4K02R2F-GP CFG19 2 4K02R2F-GP CFG20 M36 N36 R33 T33 AH9 AH10 AH12 AH13 K12 AL34 AK34 AN35 AM35 T24 B31 B2 M1 AY21 2
U52B 2 OF 10 U52C TPAD14-GP TP139 TP140 TP145 3 OF 10
FOR Cantiga:49.9 ohm Teenah: 24.9 ohm
1D05V_S0
DDR CLK/ CONTROL/COMPENSATION
R143 1 R127 1
D
DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY
2 2K21R2F-GP CFG3 2 2K21R2F-GP CFG4 2 2K21R2F-GP CFG5 2 2K21R2F-GP CFG6 2 2K21R2F-GP CFG7 2 2K21R2F-GP CFG8 2 2K21R2F-GP CFG9 2 2K21R2F-GP CFG10 2 2K21R2F-GP CFG11 2 2K21R2F-GP CFG12 2 2K21R2F-GP CFG13 2 2K21R2F-GP CFG14 2 2K21R2F-GP CFG15 2 2K21R2F-GP CFG16 2 2K21R2F-GP CFG17
1D8V_S3 R551 80D6R2F-L-GP R552 80D6R2F-L-GP 1D8V_S3
R474 1 R128 1 R129 1 R121 1 R472 1 R473 1 R123 1 R122 1 R155 1 R148 1 R136 1 R145 1 R138 1
M_RCOMPP M_RCOMPN
RESERVED#M36 RESERVED#N36 RESERVED#R33 RESERVED#T33 RESERVED#AH9 RESERVED#AH10 RESERVED#AH12 RESERVED#AH13 RESERVED#K12 RESERVED#AL34 RESERVED#AK34 RESERVED#AN35 RESERVED#AM35 RESERVED#T24
SA_CK_0 SA_CK_1 SB_CK_0 SB_CK_1 SA_CK#_0 SA_CK#_1 SB_CK#_0 SB_CK#_1 SA_CKE_0 SA_CKE_1 SB_CKE_0 SB_CKE_1 SA_CS#_0 SA_CS#_1 SB_CS#_0 SB_CS#_1 SA_ODT_0 SA_ODT_1 SB_ODT_0 SB_ODT_1 SM_RCOMP SM_RCOMP# SM_RCOMP_VOH SM_RCOMP_VOL SM_VREF SM_PWROK SM_REXT SM_DRAMRST#
AP24 AT21 AV24 AU20 AR24 AR21 AU24 AV20 BC28 AY28 AY36 BB36 BA17 AY16 AV16 AR13 BD17 AY17 BF15 AY13 BG22 BH21 BF28 BH28 AV42 AR36 BF17 BC36 B38 A38 E41 F41 F43 E43
M_CLK_DDR0 M_CLK_DDR1 M_CLK_DDR2 M_CLK_DDR3 M_CLK_DDR#0 M_CLK_DDR#1 M_CLK_DDR#2 M_CLK_DDR#3 M_CKE0 M_CKE1 M_CKE2 M_CKE3 M_CS0# M_CS1# M_CS2# M_CS3# M_ODT0 M_ODT1 M_ODT2 M_ODT3 M_RCOMPP M_RCOMPN SM_RCOMP_VOH SM_RCOMP_VOL 11,12 11,12 11,12 11,12 11,12 11,12 11,12 11,12 11,12 11,12 11,12 11,12
11 11 11 11 11 11 11 11
TPAD14-GP TPAD14-GP
1 LBKLT_CTRL 27 GMCH_BL_ON 1 LCTLA_CLK 1 LCTLB_DATA 31 EDID_CLK 31 EDID_DATA
EDID_CLK EDID_DATA
L32 G32 M32 M33 K33 J33
L_BKLT_CTRL L_BKLT_EN L_CTRL_CLK L_CTRL_DATA L_DDC_CLK L_DDC_DATA L_VDD_EN LVDS_IBG LVDS_VBG LVDS_VREFH LVDS_VREFL LVDSA_CLK# LVDSA_CLK LVDSB_CLK# LVDSB_CLK LVDSA_DATA#_0 LVDSA_DATA#_1 LVDSA_DATA#_2 LVDSA_DATA#_3 LVDSA_DATA_0 LVDSA_DATA_1 LVDSA_DATA_2 LVDSA_DATA_3 LVDSB_DATA#_0 LVDSB_DATA#_1 LVDSB_DATA#_2 LVDSB_DATA#_3 LVDSB_DATA_0 LVDSB_DATA_1 LVDSB_DATA_2 LVDSB_DATA_3
PEG_COMPI PEG_COMPO PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8 PEG_RX#_9 PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15 PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8 PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15 PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8 PEG_TX#_9 PEG_TX#_10 PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15 PEG_TX_0 PEG_TX_1 PEG_TX_2 PEG_TX_3 PEG_TX_4 PEG_TX_5 PEG_TX_6 PEG_TX_7 PEG_TX_8 PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15
T37 T36 H44 J46 L44 L40 N41 P48 N44 T43 U43 Y43 Y48 Y36 AA43 AD37 AC47 AD39 H43 J44 L43 L41 N40 P47 N43 T42 U42 Y42 W47 Y37 AA42 AD36 AC48 AD40 J41 M46 M47 M40 M42 R48 N38 T40 U37 U40 Y40 AA46 AA37 AA40 AD43 AC46 J42 L46 M48 M39 M43 R47 N37 T39 U36 U39 Y39 Y46 AA36 AA39 AD42 AD46
PEG_CMP
2 R161
1 49D9R2F-GP
D
1
31 GMCH_LCDVDD_ON TPAD14-GP TP141
2
1
L_LVBG
RESERVED#B31 RESERVED#B2 RESERVED#M1 RESERVED#AY21
TPAD14-GP TPAD14-GP
TP132 TP133
1 1
GMCH_LCDVDD_ON M29 LIBG C44 B43 E37 E38 C41 31 GMCH_TXACLKC40 31 GMCH_TXACLK+ GMCH_TXBCLKB37 GMCH_TXBCLK+ A37
RSVD RSVD
1
LVDS LVDS
BG23 BF23 BH18 BF18
RESERVED#BG23 RESERVED#BF23 RESERVED#BH18 RESERVED#BF18
1D8V_S3
TPAD14-GP R530 1KR2F-3-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP
TP134 TP135 TP143 TP146 TP136 TP137 TP147 TP144 TP138
1 1 1 1 1 1 1 1 1
31 GMCH_TXAOUT0+ 31 GMCH_TXAOUT1+ 31 GMCH_TXAOUT2+ GMCH_TXAOUT3+ GMCH_TXBOUT0GMCH_TXBOUT1GMCH_TXBOUT2GMCH_TXBOUT3GMCH_TXBOUT0+ GMCH_TXBOUT1+ GMCH_TXBOUT2+ GMCH_TXBOUT3+
H48 D45 F40 B40 A41 H38 G37 J37 B42 G38 F37 K37
DDR_VREF_S3
DY
1 2
GRAPHICS
TPAD14-GP
TP142
1
31 GMCH_TXAOUT031 GMCH_TXAOUT131 GMCH_TXAOUT2GMCH_TXAOUT3-
H47 E46 G40 A40
1
SB
C
SM_RCOMP_VOH
DPLL_REF_CLK DPLL_REF_CLK# DPLL_REF_SSCLK DPLL_REF_SSCLK# PEG_CLK PEG_CLK#
DREFCLK 2 DREFCLK# 2 DREFSSCLK 2 DREFSSCLK# 2 CLK_MCH_3GPLL 2 CLK_MCH_3GPLL# 2
PCI-EXPRESS
R557 1KR2F-3-GP
SM_REXT 1 R553 2 499R2F-2-GP DDR3_DRAMRST# TP75 TPAD14-GP 1 DREFCLK DREFCLK# DREFSSCLK DREFSSCLK#
1
R532 1KR2F-3-GP
2
2
C
SB
2
C677 C671 SC2D2U6D3V3MX-1-GP SCD01U16V2KX-3GP R559 3K01R2F-3-GP
CLK
DY
SB
2 2 2
R648 75R2F-2-GP 75R2F-2-GP R649 75R2F-2-GP R650 75R2F-2-GP
F25 H25 K25 H24
TVA_DAC TVB_DAC TVC_DAC TV_RTN
1
1
2
2
1
TV TV
1
1
FSB setting
1 1
C676 SC2D2U6D3V3MX-1-GP C670 SCD01U16V2KX-3GP SCD01U16V2KX-3GP R556 1KR2F-3-GP
2,3 2,3 2,3
CPU_SEL0 CPU_SEL1 CPU_SEL2
3D3V_S0
RN14
GRAPHICS VID
4 3
1 2
SRN10KJ-5-GP
PM_EXTTS#0 PM_EXTTS#1
B
CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20
T25 R25 P25 P20 P24 C25 N24 M24 E21 C23 C24 N21 P21 T21 R20 M20 L21 H21 P29 R28 T28
CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8 CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15 CFG_16 CFG_17 CFG_18 CFG_19 CFG_20
DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3
2
2
AE40 AE38 AE48 AH40 AE35 AE43 AE46 AH42 AD35 AE44 AF46 AH43
DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3 DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3
DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3 DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3
15 15 15 15 15 15 15 15 15 15 15 15
1
30
GMCH_BLUE
GMCH_BLUE GMCH_GREEN GMCH_RED
1
SM_RCOMP_VOL
DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3
AE41 AE37 AE47 AH39
DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3
DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3
15 15 15 15
C31 E32
TV_DCONSEL_0 TV_DCONSEL_1
E28 G28 J28 G29
CRT_BLUE CRT_GREEN CRT_RED
2
DMI
DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3 DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3
30 GMCH_GREEN
SB
30
GMCH_RED
CFG
VGA VGA
CRT_IRTN CRT_DDC_CLK CRT_DDC_DATA CRT_HSYNC CRT_TVO_IREF CRT_VSYNC
30 GMCH_DDCCLK 30 GMCH_DDCDATA 30 GMCH_HSYNC 30 GMCH_VSYNC
GMCH_DDCCLK GMCH_DDCDATA
H32 J32 J29 E29 L29
1 R630 GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4 B33 B32 G33 F33 E33
CRT_IREF 2 1K02R2F-1-GP CANTIGA-GM-GP-U-NF
B
16 PM_SYNC# 3,14,33 H_DPRSTP# 16,33 VGATE_PWRGD 16,19 PWROK
15,24,26,27,29 PLT_RST1#
1
H_DPRSTP#_MCH 2 0R0402-PADPM_EXTTS#0 PM_EXTTS#1 PWROK_GD 2 1 0R2J-2-GP R178 RSTIN# NB_THERMTRIP# 1 2 R174 0R0402-PAD PM_DPRSLPVR 2 1 R179 100R2J-2-GP
1 R471
DY
R29 B7 N33 P32 AT40 AT11 T20 R32
PM_SYNC# PM_DPRSTP# PM_EXT_TS#_0 PM_EXT_TS#_1 PWROK RSTIN# THERMTRIP# DPRSLPVR
SB
C34
1D05V_S0
FOR Cantiga: 1.02k_1% ohm Teenah: 1.3k ohm
GFX_VR_EN
CRT_IREF routing Trace width use 20 mil
2 CL_CLK CL_DATA CL_PWROK CL_RST# CL_VREF AH37 AH36 2 AN36 CLPWROK_MCH 1 R175 0R0402-PAD AJ35 AH34 MCH_CLVREF
CL_CLK0 16 CL_DATA0 16 PWROK 16,19 CL_RST#0 16 R170 1KR2F-3-GP GMCH_BLUE
PM
ME
2
C254 SC100P50V2JN-3GP
1
DY
3,14 PM_THRMTRIP-A# 16,33 PM_DPRSLPVR
1 R156
2 0R0402-PAD
3D3V_S0
RN40
A
4 3
1 LCTLA_CLK 2 LCTLB_DATA
SRN10KJ-5-GP
HDA
BG48 BF48 BD48 BC48 BH47 BG47 BE47 BH46 BF46 BG45 BH44 BH43 BH6 BH5 BG4 BH3 BF3 BH2 BG2 BE2 BG1 BF1 BD1 BC1 F1 A47
SB
NC#BG48 NC#BF48 NC#BD48 NC#BC48 NC#BH47 NC#BG47 NC#BE47 NC#BH46 NC#BF46 NC#BG45 NC#BH44 NC#BH43 NC#BH6 NC#BH5 NC#BG4 NC#BH3 NC#BF3 NC#BH2 NC#BG2 NC#BE2 NC#BG1 NC#BF1 NC#BD1 NC#BC1 NC#F1 NC#A47
1
1 R631
2 150R2F-1-GP
GMCH_BL_ON
CL_VREF = 0.35V
R168 499R2F-2-GP
GMCH_GREEN
3D3V_S0
C227
SCD1U10V2KX-4GP 2 1
1 R633
2 150R2F-1-GP
GMCH_LCDVDD_ON LIBG
1 R632 1 R634 1 R636
2 2
100KR2J-1-GP 100KR2J-1-GP
MISC
DDPC_CTRLCLK DDPC_CTRLDATA SDVO_CTRLCLK SDVO_CTRLDATA CLKREQ# ICH_SYNC# TSATN#
N28 M28 G36 E36 K36 H36 B12
CLK_MCH_OE#
CLK_MCH_OE# 2 MCH_ICH_SYNC# 16 1D05V_S0
TSATN#
1 R480
2 56R2J-4-GP
HDA_BCLK HDA_RST# HDA_SDI HDA_SDO HDA_SYNC
B28 B30 B29 C29 A28
HDA_BCLK HDA_RST# HDA_SDI HDA_SDO HDA_SYNC
1 1 1 1 1
TP149 TP148 TP151 TP150 TP152
TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP
2
1 R134
2 10KR2J-3-GP
GMCH_RED
2
FOR Cantiga:500 ohm Teenah: 392 ohm
1 R635
2 150R2F-1-GP
2K37R2F-GP
NC NC
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
CANTIGA-GM-GP-U-NF 71.CNTIG.00U
Cantiga (2 of 6)
Size Document Number Rev
P08A1
Date: Wednesday, August 27, 2008
5 4 3 2 1
Sheet
6
of
40
5
4
3
2
1
U52D 11 M_A_DQ[63..0] M_A_DQ[63..0] M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63
4 OF 10
U52E
5 OF 10
D
C
AJ38 AJ41 AN38 AM38 AJ36 AJ40 AM44 AM42 AN43 AN44 AU40 AT38 AN41 AN39 AU44 AU42 AV39 AY44 BA40 BD43 AV41 AY43 BB41 BC40 AY37 BD38 AV37 AT36 AY38 BB38 AV36 AW36 BD13 AU11 BC11 BA12 AU13 AV13 BD12 BC12 BB9 BA9 AU10 AV9 BA11 BD9 AY8 BA6 AV5 AV7 AT9 AN8 AU5 AU6 AT5 AN10 AM11 AM5 AJ9 AJ8 AN12 AM13 AJ11 AJ12
SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63
SA_BS_0 SA_BS_1 SA_BS_2 SA_RAS# SA_CAS# SA_WE#
BD21 BG18 AT25 BB20 BD20 AY20
11 M_B_DQ[63..0] M_A_BS#0 11,12 M_A_BS#1 11,12 M_A_BS#2 11,12 M_A_RAS# 11,12 M_A_CAS# 11,12 M_A_WE# 11,12
M_A_DM[7..0]
M_A_DQS[7..0] M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7 M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14
SYSTEM
DDR
B
DDR
SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8 SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14
BA21 BC24 BG24 BH24 BG25 BA24 BD24 BG27 BF25 AW24 BC21 BG26 BH26 BH17 AY25
M_A_A[14..0] 11,12
SYSTEM
SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6 SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7
AJ44 AT44 BA43 BC37 AW12 BC8 AU8 AM7 AJ43 AT43 BA44 BD37 AY12 BD8 AU9 AM8
M_A_DQS[7..0] 11
B
SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7
A
AM37 AT41 AY41 AU39 BB12 AY6 AT7 AJ5
M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7
M_A_DM[7..0] 11
M_A_DQS#[7..0]
M_A_DQS#[7..0] 11
M_A_A[14..0]
M_B_DQ[63..0] M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
AK47 AH46 AP47 AP46 AJ46 AJ48 AM48 AP48 AU47 AU46 BA48 AY48 AT47 AR47 BA47 BC47 BC46 BC44 BG43 BF43 BE45 BC41 BF40 BF41 BG38 BF38 BH35 BG35 BH40 BG39 BG34 BH34 BH14 BG12 BH11 BG8 BH12 BF11 BF8 BG7 BC5 BC6 AY3 AY1 BF6 BF5 BA1 BD3 AV2 AU3 AR3 AN2 AY2 AV1 AP3 AR1 AL1 AL2 AJ1 AH1 AM2 AM3 AH3 AJ3
SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63
SB_BS_0 SB_BS_1 SB_BS_2 SB_RAS# SB_CAS# SB_WE#
BC16 BB17 BB33 AU17 BG16 BF14
M_B_BS#0 11,12 M_B_BS#1 11,12 M_B_BS#2 11,12 M_B_RAS# 11,12 M_B_CAS# 11,12 M_B_WE# 11,12
D
M_B_DM[7..0]
SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7 SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6 SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7 SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8 SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14
AM47 AY47 BD40 BF35 BG11 BA3 AP1 AK2 AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6 AL46 AV47 BH41 BH37 BG9 BC2 AT2 AN5 AV17 BA25 BC25 AU25 AW25 BB28 AU28 AW28 AT33 BD33 BB16 AW33 AY33 BH15 AU33
M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7 M_B_DQS[7..0] M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7 M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14
M_B_DM[7..0] 11
M_B_DQS[7..0] 11
MEMORY
MEMORY
M_B_DQS#[7..0]
M_B_DQS#[7..0] 11
M_B_A[14..0]
M_B_A[14..0] 11,12
C
CANTIGA-GM-GP-U-NF 71.CNTIG.00U
CANTIGA-GM-GP-U-NF 71.CNTIG.00U
B
A
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number
Cantiga (3 of 6) P08A1
Sheet
1
Rev of 40
Date: Thursday, August 21, 2008
5 4 3 2
7
5
4
3
2
1
7 OF 10 1D8V_S3 U52G
1D05V_S0
SB
1D05V_S0
FOR VCC CORE
AG34 AC34 AB34 AA34 Y34 V34 U34 AM33 AK33 AJ33 AG33 AF33 AE33 AC33 AA33 Y33 W33 V33 U33 AH28 AF28 AC28 AA28 AJ26 AG26 AE26 AC26 AH25 AG25 AF25 AG24 AJ23 AH23 AF23 T32
U52F
6 OF 10
2
2
2
Coupling CAP 370 mils from the Edge
2
D
Coupling CAP
POWER
AP33 AN33 BH32 BG32 BF32 BD32 BC32 BB32 BA32 AY32 AW32 AV32 AU32 AT32 AR32 AP32 AN32 BH31 BG31 BF31 BG30 BH29 BG29 BF29 BD29 BC29 BB29 BA29 AY29 AW29 AV29 AU29 AT29 AR29 AP29
VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC
C
SB
VCC GFX NCTF
C770 SC1U10V2KX-1GP
C771 SCD1U10V2KX-4GP 2 1
C768 SCD47U6D3V2KX-GP 2 1
C769 SCD22U10V2KX-1GP
1
1
1
1
1
1
C761 SC22U6D3V5MX-2GP
C762
C763 SC22U6D3V5MX-2GP
C764 SC22U6D3V5MX-2GP
C765 SC22U6D3V5MX-2GP
C766 SC22U6D3V5MX-2GP
1
1D05V_S0
TC34 ST220U2D5VBM-LGP ST220U2D5VBM-LGP
C767 SC10U6D3V5MX-3GP
1 2
SC22U6D3V5MX-2GP 2
B
VCC SM LF
Y26 AE25 AB25 AA25 AE24 AC24 AA24 Y24 AE23 AC23 AB23 AA23 AJ21 AG21 AE21 AC21 AA21 Y21 AH20 AF20 AE20 AC20 AB20 AA20 T17 T16 AM15 AL15 AE15 AJ15 AH15 AG15 AF15 AB15 AA15 Y15 V15 U15 AN14 AM14 U14 T14
VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG
Coupling CAP
Place on the Edge
C772 SCD1U10V2KX-4GP
BA36 BB24 BD16 BB21 AW16 AW13 AT13
Place CAP where LVDS and DDR2 taps
VCC NCTF
VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF
W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19 AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16
1
1
1
1
C162 SC22U6D3V5MX-L2GP
C168 SC22U6D3V5MX-L2GP
C201 SC22U6D3V5MX-L2GP
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
C213 SCD22U10V2KX-1GP 2 1
C234 SCD22U10V2KX-1GP 2 1
C202 SCD1U10V2KX-4GP 2 1
C145 SCD1U10V2KX-4GP
D
POWER
C91 SC10U6D3V5MX-3GP
SB
C180 SCD1U10V2KX-4GP
1
VCC SM
2
2
1
VCC CORE
1D05V_S0
1D05V_S0
1 R151 2VCC_GMCH_35 0R0402-PAD
FOR VCC SM
1D8V_S3 C268 SCD1U10V2KX-4GP 2 1 C259 SCD1U10V2KX-4GP C245 SCD1U10V2KX-4GP
TC10 C674 ST330U6VDM-2-GP SC22U6D3V5MX-L2GP
C680 SC22U6D3V5MX-L2GP
Place on the Edge
VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF
AM32 AL32 AK32 AJ32 AH32 AG32 AE32 AC32 AA32 Y32 W32 U32 AM30 AL30 AK30 AH30 AG30 AF30 AE30 AC30 AB30 AA30 Y30 W30 V30 U30 AL29 AK29 AJ29 AH29 AG29 AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23
C
1
1
2
2
2
2
2
2
2
2
2
1
B
1
1
1
1
2
2
2
2
VCC GFX
2
1
CANTIGA-GM-GP-U-NF 71.CNTIG.00U
C673 SCD1U10V2KX-4GP 2 1
C244 SCD1U10V2KX-4GP 2 1
VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF
AV44 SM_LF1_GMCH BA37 SM_LF2_GMCH AM40 SM_LF3_GMCH AV21 SM_LF4_GMCH AY5 SM_LF5_GMCH AM10 SM_LF6_GMCH BB13 SM_LF7_GMCH 1
SCD22U10V2KX-1GP 2 1
SCD47U16V2ZY-GP 2 1
SC1U10V2KX-1GP 2 1
2
TP68 TP67
AJ14 AH14
SCD22U10V2KX-1GP
TPAD14-GP 1VCC_AXG_SENSE 1VSS_AXG_SENSE TPAD14-GP
C651
C262
1 2
SC1U10V2KX-1GP
A
C231
C264
C652
A
VCC_AXG_SENSE VSS_AXG_SENSE
CANTIGA-GM-GP-U-NF 71.CNTIG.00U
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number
U93 close to U3
Cantiga (4 of 6) P08A1
Sheet
1
Rev of 40
Date: Thursday, August 21, 2008
5 4 3 2
8
5
4
3
2
1
5V_S0
Imax = 300 mA
U69 1 2 3 VIN GND EN/EN# VOUT NC#4 5 4
3D3V_S0_DAC
SB
SB
3D3V_S0_DAC
73mA
SCD1U10V2KX-4GP U52H 8 OF 10 C217 SC4D7U6D3V3KX-GP 2 1 C160 SC4D7U6D3V3KX-GP 2 1 1 VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT U13 T13 U12 T12 U11 T11 U10 T10 U9 T9 U8 T8 U7 T7 U6 T6 U5 T5 V3 U3 V2 U2 T2 V1 U1 C147 SC2D2U6D3V3MX-1-GP 2 1 C164 SC4D7U6D3V3KX-GP C143 SCD47U6D3V2KX-GP SCD01U16V2KX-3GP 1 2 C167 SCD1U10V2KX-4GP 1 1 1 1
1D05V_S0
L51 2 1 3D3V_CRTDAC_S0 HCB1608K-181T20GP C783 C775 SC4D7U6D3V3KX-GP SC1U16V3ZY-GP SC1U16V3ZY-GP 1 C774 C773 2 1
1
852mA
D
D
3D3V_S0_DAC 2
SCD01U16V2KX-3GP
C776 HCB1608K-181T20GP
1
1
M_VCCA_DAC_BG C777
SCD1U10V2KX-4GP
L52 1
SB
M_VCCA_DPLLA M_VCCA_DPLLB M_VCCA_HPLL M_VCCA_MPLL R637 0R2J-2-GP 1 2 F47 L48 AD1 AE1
VCCA_DAC_BG VSSA_DAC_BG
SB
1D05V_S0 1 2 L45 BLM18BB221SN1D-GP 1D05V_RUN_PEGPLL
VCCA_DPLLB VCCA_HPLL VCCA_MPLL VCCA_LVDS VSSA_LVDS
220ohm 50mA
1 C631 SCD1U10V2KX-4GP
1D8V_TXLVDS_S3 1 C778
1D8V_TXLVDS J48 J47
2
SB SB
1D05V_S0
1D5V_S0 R521 C638 SCD1U10V2KX-4GP 1 1 0R2J-2-GP 2 VCCA_PEG_BG AD48 1D05V_RUN_PEGPLL 2 AA48 VCCA_PEG_PLL VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_PEG_BG
1 R526 1D05V_S0 R642
C
2 0R3-0-U-GP
SB
65mA
1 2 1 0R3-0-U-GP C779 M_VCCA_DPLLA 1 1 C780 1 C781 SCD1U10V2KX-4GP
480mA
1 1 1 C224 C250 C243 C248
2
SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP 2 2 1 SC22U6D3V5MX-2GP SC22U6D3V5MX-2GP 2 2 1
A SM
R638 2
65mA
SCD1U10V2KX-4GP
SB
1D05V_S0
SC4D7U6D3V3KX-GP SC1U10V3KX-3GP SC22U6D3V5MX-L2GP SC1U10V3KX-3GP
AR20 AP20 AN20 AR17 AP17 AN17 AT16 AR16 AP16
A PEG
1D05V_S0
1D05V_SUS_MCH_PLL2
2
SC1KP50V2KX-1GP
A LVDS
SB
13.2mA
PLL
POWER
1D05V_VCC_AXF 1 C581 1 C564 2 R440 1 0R0603-PAD
VTT
VCCA_DPLLA
2
2
CRT
2
2
2
2
C784
C785
1
2
AXF
C233
SB
3D3V_S0_DAC M_VCCA_HPLL
SC22U6D3V5MX-L2GP 3D3VTVDAC SCD1U10V2KX-4GP SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D05V_SUS_MCH_PLL2
1
L54 2 1 HCB1608K-181T20GP
C805
SM CK
AP28 AN28 AP25 AN25 AN24 AM28 AM26 AM25 AL25 AM24 AL24 AM23 AL23
120ohm 24mA
1 1 1 L48 2 FCM1608KF-1-GP C633 SC4D7U6D3V3KX-GP
B
180ohm 100MHz
C636 SCD1U10V2KX-4GP 1D5V_S0 M_VCCA_MPLL 1 R449 2
VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF
VCC_AXF VCC_AXF VCC_AXF
C247
B22 B21 A21
322mA
SC10U6D3V5MX-3GP SC1U10V3KX-3GP 1D8V_SUS_SM_CK 1D8V_S3 2 R555 1 0R0603-PAD C672 1 R554 2 1 2 1R2F-GP SC10U6D3V5MX-3GP 1D8V_TXLVDS_S3 1D8V_S3 R639 0R3-0-U-GP 1
2
1
2
2
1
A CK
200mA
VCC_SM_CK VCC_SM_CK VCC_SM_CK VCC_SM_CK BF21 BH20 BG20 BF20
2
C669 SCD1U10V2KX-4GP
2
TV
SC1KP50V2KX-1GP
SC22U6D3V5MX-2GP
B24 A24
VCC_TX_LVDS
K47 C35 B35 A35 V48 U48 V47 U47 U46 AH48 AF48 AH47 AG47
119mA
106mA 1782mA
1 1 1 C163 C615 C625 1 C617 1 3D3V_HV_S0 2 1D05V_S0 C787 C788 1 2
2
1
HV
2
2
120ohm 139.2mA
1 1 1 L49 2 FCM1608KF-1-GP C641 SC10U6D3V5MX-3GP C642 SCD1U10V2KX-4GP 1D05V_SUS_MCH_PLL2
HDA
1
2
2
2
2
SB
VCCD_TVDAC VCCD_QDAC VCCD_HPLL VCCD_PEG_PLL VCCD_LVDS VCCD_LVDS
2
2
1D5VRUN_QDAC
L28 AF1 AA47 M38 L37
DMI
1
1
1
VTTLF
2
1D5V_S0 R493 1 2 0R0603-PAD C596
C635
C644
C648
1
C645
1D05V_RUN_PEGPLL
157.2mA 50mA
SB
VCC_DMI VCC_DMI VCC_DMI VCC_DMI
SC4D7U6D3V3KX-GP SC22U6D3V5MX-L2GP SC22U6D3V5MX-L2GP SC22U6D3V5MX-L2GP 1D05V_S0
456mA
C618 VTTLF1 VTTLF2 VTTLF3 C630 SCD47U6D3V2KX-GP C605 SCD47U6D3V2KX-GP C580 SCD47U6D3V2KX-GP
1
58.7mA
1 1
LVDS
1D5VRUN_TVDAC SCD1U10V2KX-4GP C126
SCD1U10V2KX-4GP 1D8V_S3
VTTLF VTTLF VTTLF
A8 L1 AB2
2
2
2
2
1D5VRUN_TVDAC
M25
D TV/CRT
PEG
SCD1U10V2KX-4GP SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP 1 1 2 1 2
2
2
SCD01U16V2KX-3GP
SCD1U10V2KX-4GP
CANTIGA-GM-GP-U-NF 71.CNTIG.00U 1 C760 SC10U6D3V5MX-3GP
SB
L53 1 2 HCB1608K-181T20GP
A
60.3mA
1D5VRUN_QDAC 1 1 C790 C791 1 SC4D7U6D3V3KX-GP C792 SCD01U16V2KX-3GP 2 SCD1U10V2KX-4GP
2 R640 11D8V_SUS_DLVDS 0R3-0-U-GP C789 1 SCD1U10V2KX-4GP SCD1U10V2KX-4GP 2
2
180ohm 100MHz
2
2
2
2
3 BAT54-7-F-GP
2
R488 10R2J-2-GP SCD1U10V2KX-4GP
1
SC1U16V3ZY-GP
C782 2
RT9198-33PBR-GP 74.09198.G7F
B27 A26 A25 B25
2
2
2
2
VCCA_CRT_DAC VCCA_CRT_DAC
2
2.68mA
M_VCCA_DAC_BG
TC8 ST220U6D3VDM-15GP
SB
2
C
1D05V_S0
1 0R3-0-U-GP
M_VCCA_DPLLB C786
24mA
2
VCCA_TV_DAC VCCA_TV_DAC
50mA
VCC_HV VCC_HV VCC_HV VCC_PEG VCC_PEG VCC_PEG VCC_PEG VCC_PEG
B
VCC_HDA
A32
VCC_HDA
0R2J-2-GP C570 SCD1U10V2KX-4GP
SB
ZZZZ
A
1D05V_S0 D17 1 2 1D05V_HV_S0 2
3D3V_S0 1 2 R489 1 0R0402-PAD
3D3V_HV_S0
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
C587 Size Custom
Cantiga (5 of 6)
Document Number Rev
Date: Wednesday, August 27, 2008
5 4 3 2
P08A1
Sheet
1
9
of
40
5
4
3
2
1
U52I
9 OF 10
U52J
10 OF 10
D
C
B
A
AU48 AR48 AL48 BB47 AW47 AN47 AJ47 AF47 AD47 AB47 Y47 T47 N47 L47 G47 BD46 BA46 AY46 AV46 AR46 AM46 V46 R46 P46 H46 F46 BF44 AH44 AD44 AA44 Y44 U44 T44 M44 F44 BC43 AV43 AU43 AM43 J43 C43 BG42 AY42 AT42 AN42 AJ42 AE42 N42 L42 BD41 AU41 AM41 AH41 AD41 AA41 Y41 U41 T41 M41 G41 B41 BG40 BB40 AV40 AN40 H40 E40 AT39 AM39 AJ39 AE39 N39 L39 B39 BH38 BC38 BA38 AU38 AH38 AD38 AA38 Y38 U38 T38 J38 F38 C38 BF37 BB37 AW37 AT37 AN37 AJ37 H37 C37 BG36 BD36 AK15 AU36
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AM36 AE36 P36 L36 J36 F36 B36 AH35 AA35 Y35 U35 T35 BF34 AM34 AJ34 AF34 AE34 W34 B34 A34 BG33 BC33 BA33 AV33 AR33 AL33 AH33 AB33 P33 L33 H33 N32 K32 F32 C32 A31 AN29 T29 N29 K29 H29 F29 A29 BG28 BD28 BA28 AV28 AT28 AR28 AJ28 AG28 AE28 AB28 Y28 P28 K28 H28 F28 C28 BF26 AH26 AF26 AB26 AA26 C26 B26 BH25 BD25 BB25 AV25 AR25 AJ25 AC25 Y25 N25 L25 J25 G25 E25 BF24 AD12 AY24 AT24 AJ24 AH24 AF24 AB24 R24 L24 K24 J24 G24 F24 E24 BH23 AG23 Y23 B23 A23 AJ6
BG21 L12 AW21 AU21 AP21 AN21 AH21 AF21 AB21 R21 M21 J21 G21 BC20 BA20 AW20 AT20 AJ20 AG20 Y20 N20 K20 F20 C20 A20 BG19 A18 BG17 BC17 AW17 AT17 R17 M17 H17 C17 BA16 AU16 AN16 N16 K16 G16 E16 BG15 AC15 W15 A15 BG14 AA14 C14 BG13 BC13 BA13 AN13 AJ13 AE13 N13 L13 G13 E13 BF12 AV12 AT12 AM12 AA12 J12 A12 BD11 BB11 AY11 AN11 AH11 Y11 N11 G11 C11 BG10 AV10 AT10 AJ10 AE10 AA10 M10 BF9 BC9 AN9 AM9 AD9 G9 B9 BH8 BB8 AV8 AT8
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AH8 Y8 L8 E8 B8 AY7 AU7 AN7 AJ7 AE7 AA7 N7 J7 BG6 BD6 AV6 AT6 AM6 M6 C6 BA5 AH5 AD5 Y5 L5 J5 H5 F5 BE4 BC3 AV3 AL3 R3 P3 F3 BA2 AW2 AU2 AR2 AP2 AJ2 AH2 AF2 AE2 AD2 AC2 Y2 M2 K2 AM1 AA1 P1 H1 U24 U28 U25 U29 AF32 AB32 V32 AJ30 AM29 AF29 AB29 U26 U23 AL20 V20 AC19 AL17 AJ17 AA17 U17 BH48 BH1 A48 C1 A3 E1 D2 C3 B4 A5 A6 A43 A44 B45 C46 D47 B47 A46 F48 E48 C48 B48 1 1 1 1 1
TP122 TP129 TP109 TP114 TP108 TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP
D
VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF
C
B
NCTF TEST PIN: A3,C1,A48,BH1,BH48
VSS SCB
NCTF_VSS_SCB#BH48 NCTF_VSS_SCB#BH1 NCTF_VSS_SCB#A48 NCTF_VSS_SCB#C1 NCTF_VSS_SCB#A3 NC#E1 NC#D2 NC#C3 NC#B4 NC#A5 NC#A6 NC#A43 NC#A44 NC#B45 NC#C46 NC#D47 NC#B47 NC#A46 NC#F48 NC#E48 NC#C48 NC#B48
NC
VSS NCTF
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number
CANTIGA-GM-GP-U-NF CANTIGA-GM-GP-U-NF 71.CNTIG.00U 71.CNTIG.00U
Cantiga (6 of 6) P08A1
Sheet
1
Rev of 40
Date: Monday, August 25, 2008
5 4 3 2
10
2
1
2
1
DY
DY
2 C362 SC10P50V2JN-4GP C363 SC10P50V2JN-4GP
1
2
1 M_CLK_DDR0
196 193 190 187 184 183 178 177 172 171 168 165 162 161 156 155 150 149 145 144 139 138 133 132 128 127 122 121 78 77 72 71 66 65 60 59 54 53 48 47 42 41 40 39 34 33 28 27 24 21 18 15 12 9 8 3 2 VREF ODT1 ODT0 SDA SCL WE# CAS# RAS# CKE1 CKE0 CS1# CS0# 163 120 83 69 50 109 113 108 80 79 115 110 195 197 119 114 GND 201 NP2 NC#163/TEST NC#120 NC#83 NC#69 NC#50 M_CLK_DDR2 M_CLK_DDR3 C330 SC10P50V2JN-4GP C328 SC10P50V2JN-4GP M_CLK_DDR#2 M_CLK_DDR#3
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
196 193 190 187 184 183 178 177 172 171 168 165 162 161 156 155 150 149 145 144 139 138 133 132 128 127 122 121 78 77 72 71 66 65 60 59 54 53 48 47 42 41 40 39 34 33 28 27 24 21 18 15 12 9 8 3
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
3D3V_S0
2
1 C324
R210
2 C352 SCD1U16V2ZY-2GP
1
118 117 112 111 104 103 96 95 88 87 82 81 VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD_SPD 200 198 166 164 32 30 SA1 SA0 CK1# CK1 CK0# CK0 199
2
1
2,18 SMBC_ICH 2,18 SMBD_ICH
2
1
118 117 112 111 104 103 96 95 88 87 82 81 1 2 10KR2J-3-GP
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
163 120 83 69 50 7,12 7,12 7,12 M_A_BS#2 M_A_BS#0 M_A_BS#1 200 198 199 106 107 BA1 BA0 197 195
NC#163/TEST NC#120 NC#83 NC#69 NC#50 SA1 SA0 VDDSPD SCL SDA 185 170 147 130 67 52 26 10 M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7 DM7 DM6 DM5 DM4 DM3 DM2 DM1 DM0
185 170 147 130 67 52 26 10 M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7 6 6 6 6 166 164 32 30 80 79 Title Document Number Size MH2 MH1 MH2 MH1 115 110 113 109 108
DM7 DM6 DM5 DM4 DM3 DM2 DM1 DM0 CK1# CK1 CK0# CK0 CKE1 CKE0 CS1# CS0# CAS# WE# RAS# Date: Thursday, August 21, 2008 M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 186 167 146 129 68 49 29 11 188 169 148 131 70 51 31 13 M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7 DQS7# DQS6# DQS5# DQS4# DQS3# DQS2# DQS1# DQS0# DQS7 DQS6 DQS5 DQS4 DQS3 DQS2 DQS1 DQS0 A16_BA2 A15 A14 A13 A12 A11 A10/AP A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 85 84 86 116 89 90 105 91 93 92 94 97 98 99 100 101 102
BA1 BA0 A16/BA2 A15 A14 A13 A12 A11 A10/AP A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
106 107 85 84 86 116 89 90 105 91 93 92 94 97 98 99 100 101 102
M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63
DQ63 DQ62 DQ61 DQ60 DQ59 DQ58 DQ57 DQ56 DQ55 DQ54 DQ53 DQ52 DQ51 DQ50 DQ49 DQ48 DQ47 DQ46 DQ45 DQ44 DQ43 DQ42 DQ41 DQ40 DQ39 DQ38 DQ37 DQ36 DQ35 DQ34 DQ33 DQ32 DQ31 DQ30 DQ29 DQ28 DQ27 DQ26 DQ25 DQ24 DQ23 DQ22 DQ21 DQ20 DQ19 DQ18 DQ17 DQ16 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
194 192 182 180 191 189 181 179 176 174 160 158 175 173 159 157 154 152 142 140 153 151 143 141 136 134 126 124 137 135 125 123 76 74 64 62 75 73 63 61 58 56 46 44 57 55 45 43 38 36 22 20 37 35 25 23 16 14 6 4 19 17 7 5
DQ63 DQ62 DQ61 DQ60 DQ59 DQ58 DQ57 DQ56 DQ55 DQ54 DQ53 DQ52 DQ51 DQ50 DQ49 DQ48 DQ47 DQ46 DQ45 DQ44 DQ43 DQ42 DQ41 DQ40 DQ39 DQ38 DQ37 DQ36 DQ35 DQ34 DQ33 DQ32 DQ31 DQ30 DQ29 DQ28 DQ27 DQ26 DQ25 DQ24 DQ23 DQ22 DQ21 DQ20 DQ19 DQ18 DQ17 DQ16 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
194 192 182 180 191 189 181 179 176 174 160 158 175 173 159 157 154 152 142 140 153 151 143 141 136 134 126 124 137 135 125 123 76 74 64 62 75 73 63 61 58 56 46 44 57 55 45 43 38 36 22 20 37 35 25 23 16 14 6 4 19 17 7 5
M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7
DQS7# DQS6# DQS5# DQS4# DQS3# DQS2# DQS1# DQS0#
186 167 146 129 68 49 29 11
M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7
A
DDR_VREF_S3_TP K3 1 1 TPAD79 K2 DDR_VREF_S3_1 1 1 2 TPAD79 DDR_VREF_S3_TP DDR_VREF_S3_TP K4 TPAD79 SMBC_ICH SMBD_ICH 0R0603-PAD R208
B 5
C
D
1 2 C351 SCD1U16V2ZY-2GP
6,12 6,12 6,12 6,12 7,12 7,12 7,12
1 2 C358 SC2D2U6D3V3MX-1-GP
K1 6,12 6,12 1 M_CS0# M_CS1# M_CKE0 M_CKE1 M_A_RAS# M_A_CAS# M_A_WE# M_ODT0 M_ODT1 202 GND 1 NP2 GND NP1 GND VSS VREF OTD1 OTD0 DQS7 DQS6 DQS5 DQS4 DQS3 DQS2 DQS1 DQS0 201 DDR_VREF_S3_TP NP1 202 2 1 119 114 188 169 148 131 70 51 31 13
1 2 C325 SCD1U16V2ZY-2GP
1 2 C326 SC2D2U6D3V3MX-1-GP
SKT-SODIMM200-38GP
62.10017.E31
TPAD79
DM2
6,12 6,12 M_ODT2 M_ODT3
4
Place near DM1
Place near DM2
DDR SOCKET
C349
SC2D2U6D3V3MX-1-GP
DY
M_CLK_DDR1 M_CLK_DDR#0 K5 1 TPAD79 1D8V_S3 M_CLK_DDR0 M_CLK_DDR#0 M_CLK_DDR1 M_CLK_DDR#1
DY
M_CLK_DDR#1
3
3D3V_S0 SCD1U16V2ZY-2GP 6 M_CLK_DDR#2 6 M_CLK_DDR2 M_B_RAS# M_B_WE# M_B_CAS# M_CS2# M_CS3# M_CKE2 M_CKE3 7,12 7,12 7,12 6,12 6,12 6,12 6,12 6 M_CLK_DDR#3 6 M_CLK_DDR3
3D3V_S0
1D8V_S3
C319 SC2D2U6D3V3MX-1-GP
DIM_SA1
7,12 7,12 7,12 M_B_BS#2 M_B_BS#0 M_B_BS#1
2
DM1 DDR2-200P-22-GP-U3
1
DDR2 Socket P08A1 Sheet
Sheet 11 of Rev 40
M_A_DM[7..0] 7
M_A_DQ[63..0] 7
M_A_DQS[7..0] 7
M_A_A[14..0] 7,12
M_A_DQS#[7..0] 7
M_B_DM[7..0] 7
M_B_DQ[63..0] 7
M_B_DQS[7..0] 7
M_B_A[14..0] 7,12
M_B_DQS#[7..0] 7
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
A
B
C
D
PARALLEL TERMINATION
DDR_VREF_S3
Decoupling Capacitor
Put decap near power(0.9V) and pull-up resistor
DDR_VREF_S3 DDR_VREF_S3 DDR_VREF_S3
Put decap near power(0.9V) and pull-up resistor
RN17
8 7 6 5
1 2 3 4
SRN56J-5-GP
M_B_A12 M_B_A9
M_CKE2 M_B_BS#2
6,11 7,11
1 C337
M_CS1# M_ODT3 6,11 6,11
2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP
1 C365 1 C366 1 C367 1 C371 1 C372 1 C373 1 C374 1 C375 1 C316
2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP
1 C320 1 C322 1 C323 1 C315 1 C317 1 C318 1 C321 1 C353 1 C356
2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP
R220 R207 R219 R206 R228 R211
1 1 1 1 1 1
2 2 2 2 2 2
56R2J-4-GP 56R2J-4-GP 56R2J-4-GP 56R2J-4-GP 56R2J-4-GP 56R2J-4-GP
1 C357 1 C333
M_A_A9 M_B_A10 M_A_A14
M_CKE3
6,11
M_A_A[14..0] 7,11 RN18
1 C355 1 C354 1 C334 1 C336
8 7 6 5
1 2 3 4
M_B_A8 M_B_A5 M_B_A1 M_B_A3
M_B_A[14..0] 7,11
8 7 6 5
SRN56J-5-GP RN22 1 M_B_A13 2 3 4 SRN56J-5-GP RN21 1 2 M_B_A0 3 M_B_A4 4 M_B_A2 SRN56J-5-GP RN20 1 M_B_A6 2 M_B_A7 3 M_B_A14 4 M_B_A11 SRN56J-5-GP RN19 1 2 3 4 SRN56J-5-GP RN28 1 M_A_A13 2 3 4 SRN56J-5-GP RN27 1 2 M_A_A0 3 M_A_A2 4 M_A_A4 SRN56J-5-GP RN25 1 2 3 4 SRN56J-5-GP RN23 1 2 3 M_A_A12 4 M_A_A8 SRN56J-5-GP RN26 1 M_A_A6 2 M_A_A7 3 M_A_A11 4 SRN56J-5-GP RN24 1 M_A_A5 2 M_A_A3 3 M_A_A1 4 M_A_A10 SRN56J-5-GP
M_ODT2 M_CS2# M_B_RAS#
6,11 6,11 7,11
1 C335
8 7 6 5
M_B_BS#1
7,11
8 7 6 5
8 7 6 5
M_B_BS#0 M_B_WE# M_B_CAS# M_CS3#
7,11 7,11 7,11 6,11
Place these Caps near DM1
M_ODT0 M_CS0# M_A_RAS# 6,11 6,11 7,11 1D8V_S3
Place these Caps near DM2
1D8V_S3
8 7 6 5
1 C342 1 C688 1 C343 1 C687
2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SC2D2U6D3V3MX-1-GP 2 SC2D2U6D3V3MX-1-GP 2 SC2D2U6D3V3MX-1-GP 2 SC2D2U6D3V3MX-1-GP 2 SC2D2U6D3V3MX-1-GP
1 C699 1 C700 1 C341 1 C344 1 C701 1 C705 1 C703 1 C346 1 C704
2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SCD1U16V2ZY-2GP 2 SC2D2U6D3V3MX-1-GP 2 SC2D2U6D3V3MX-1-GP 2 SC2D2U6D3V3MX-1-GP 2 SC2D2U6D3V3MX-1-GP 2 SC2D2U6D3V3MX-1-GP
8 7 6 5
M_A_BS#1
7,11
8 7 6 5
M_A_BS#0 M_A_WE# M_A_CAS# M_ODT1
7,11 7,11 7,11 6,11
1 C686 1 C690 1 C345 1 C689 1 C691
8 7 6 5
M_CKE0 M_A_BS#2
6,11 7,11
8 7 6 5
M_CKE1
6,11
8 7 6 5
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
DDR2 Termination Resistor
Size Document Number Rev
P08A1
Date: Thursday, August 21, 2008 Sheet 12 of 40
5
4
3
2
1
LED6 3D3V_S0 TPAD_LED#1 A 2 1 33R2F-3-GP R362
K
LED-W-12-GP
TPAD_LED#
27
TPAD
83.00191.D70 83.00191.D70
LED5 3D3V_S5
D
WIRELESS BUTTON & LED
PWR_LED# 27
PWR_LED#1 2 1 33R2F-3-GP R361
A
K
POWER
SB
Q28
3D3V_S0
D
LED-W-12-GP PWR_LED#2 2 1 33R2F-3-GP R644
3D3V_S5
A
K
LED-W-12-GP
WLAN
WLAN_LED WLAN_LED 27
3D3V_S0
2
R300 10KR2J-3-GP
LED7
83.00191.D70
LED4 3D3V_S0 WLAN_LED#_1 A 2 1 33R2F-3-GP R2
R1
B
1
E K
LED-W-12-GP WLAN_LED#
SW1
R2 PDTC124EU-1-GP
1 2
3 5 1
1
C
WIRELESS_BTN# 27
83.00191.D70
LED2 3D3V_S0 R80
WLAN_LED# 24
1
2 33R2F-3-GP
CAPS_LED#1 A
K
LED-W-12-GP
CAP_LED#
27
Caps Lock
83.00191.D70
C
R1 3D3V_S5
LED1
3
POWER BUTTON & LED
C
1
2
BATLOW_LED#1 A 1 LED-Y-74-GP
K2
BATLOW_LED# 27
BAT LOW & AC IN
2
WLAN_LED# 10KR2F-2-GP R645
2
SW-TACT-91-GP 62.40009.561
4
C468 SCD1U16V2ZY-2GP
3D3V_AUX_S5
75R2F-2-GP
83.00110.J70
1
R306 100KR2J-1-GP SW2 R307
1
3 5
PWR_BTN#
1 1
EC140
2 1
C475
2
KBC_PWRBTN# 27
470R2J-2-GP SCD1U16V2ZY-2GP
2
SW-TACT-91-GP 62.40009.561 R269 3D3V_S0
4 2
1
2BT_LED#1
LED3 1A
3
K2
BT_LED#
27
BLUE TOOTH
B
75R2F-2-GP
B
LED-Y-74-GP
83.00110.J70
TPAD BUTTON & LED
3D3V_S0
LED Location
BAT_LOW WLAN PWR ON TPAD NUM. R303 100KR2J-1-GP SW3
1
CAP.
3 1 5
C472
2
1
2
SCD1U16V2ZY-2GP
TPAD_BTN# 27
2
SW-TACT-91-GP 62.40009.561 BT
4 2
SCD1U16V2ZY-2GP
A
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
LED / SW
Size Document Number Rev
P08A1
Date: Thursday, August 21, 2008
5 4 3 2
Sheet
1
13
of
40
5
4
3
2
1
C575 1
SC10P50V2JN-4GP 2
RTC_X1
3
3D3V_AUX_S5
D
1
R484 10MR2J-L-GP
X6
D8
X-32D768KHZ-38GPU RTC_AUX_S5 SC1U16V3ZY-GP
2 3 1
RTC_BAT_R BAS40CW-GP
4
D
2
1
1
2
1D05V_S0
C454
2
C590 1
SC10P50V2JN-4GP 2 RTC_X2
U50A
1 OF 6
LPC_LAD[0..3]
LPC_LAD[0..3]
26,27
1
RTC1
C23 C24 A25 F20 C22 B22 A22 E25
RTC LPC
1 2 3 5
RTC_BAT
1 R291 1
2 1KR2J-1-GP
R467 1 R113 1 R112 1 19 INTRUDER#
2 20KR2J-L2-GP 2 20KR2J-L2-GP 2 1MR2J-1-GP 1
C76 SC1U16V3ZY-GP
RTC_RST# SRTC_RST# INTRUDER#
RTCRST# SRTCRST# INTRUDER# INTVRMEN LAN100_SLP GLAN_CLK LAN_RSTSYNC LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2 GLAN_DOCK#/GPIO56 GLAN_COMPI GLAN_COMPO HDA_BIT_CLK HDA_SYNC HDA_RST#
H_DPSLP# LPC_LFRAME# 26,27
FWH4/LFRAME# LDRQ0# LDRQ1#/GPIO23 A20GATE A20M#
K3 J3 J1 N7 AJ27 AJ25 AE23 AJ26 AD22 AF25 AE22 AG25 L3 AF23 AF24 AH27 AG26 AG27 AH11 AJ11 AG12 AF12 AH9 AJ9 AE10 AF10 AH18 AJ18 AJ7 AH7
SATARBIAS H_THERMTRIP_R ICH_TP8 H_SMI#_R H_DPRSTP# H_FERR#_R LDRQ0# 1 3D3V_LDRQ1_S0 1
C455 SCD1U16V2ZY-2GP
1
C569 SC1U16V3ZY-GP SC1U16V3ZY-GP
INTVRMEN LAN100_SLP
TP65 TPAD14-GP TP117 TPAD14-GP KA20GATE 27 H_A20M# 3 H_DPRSTP# 3,6,33 H_DPSLP# 3
1D05V_S0
MLX-CON3-10-GP-U
DY
2
2
2
20.F1000.003
TPAD14-GP
TP54
1LAN_RSTSYNC
C13 F14 G13 D14 D13 D12 E13
1
LAN / GLAN CPU
DPRSTP# DPSLP# FERR# CPUPWRGD IGNNE# INIT# INTR RCIN# NMI SMI# STPCLK# THRMTRIP#
R547 56R2J-4-GP
1 R546
2 56R2J-4-GP
2
H_FERR# 3 1D05V_S0 H_PWRGD 1 R176
H_PWRGD 3 H_IGNNE# 3 H_INIT# 3,26 H_INTR 3 KBRCIN# 27 H_NMI 3 1 2 R188 0R2J-2-GP H_STPCLK# 3 H_SMI# 3
C
DY
2
4
RTCX1 RTCX2
FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3
K5 K4 L6 K2
LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3
DY
R177 56R2J-4-GP
1 2 EC110 SC12P50V2JN-3GP
28 ACZ_BITCLK 28 ACZ_SYNC 28 ACZ_RST# 28 ACZ_SDIN0
3D3V_S5 1D5V_S0
1 R459 1 R492
GLAN_DOCK# 10KR2J-3-GP 2 GLAN_COMP 24D9R2F-L-GP
2
B10 B28 B27 AF6 AH4 AE7 AF4 AG4 AH3 AE5 AG5 AG7 AE8 AG8
2 200R2F-L-GP
C
2 2 2
R570 33R2J-2-GP 1 R569 33R2J-2-GP 1 R568 33R2J-2-GP 1 TPAD14-GP TPAD14-GP TP74 TP124
ACZ_BITCLK_R ACZ_SYNC_R ACZ_RST#_R ACZ_SDIN1 ACZ_SDIN2 ACZ_SDIN3 ACZ_SDOUT_R HDA_DOCK_EN# HDA_DOCK_RST#
1D05V_S0
TPAD14-GP 28 ACZ_SDOUT
2
1 TP153 R571 33R2J-2-GP 1 1
IHDA
1 1
HDA_SDIN0 HDA_SDIN1 HDA_SDIN2 HDA_SDIN3 HDA_SDOUT
PECI SATA4RXN SATA4RXP SATA4TXN SATA4TXP SATA5RXN SATA5RXP SATA5TXN SATA5TXP SATA_CLKN SATA_CLKP SATARBIAS# SATARBIAS
1
1 2 R548 54D9R2F-L1-GP TP72 TPAD14-GP
1 R549 1 R550
2 56R2J-4-GP 2 0R2J-2-GP
PM_THRMTRIP-A# 3,6
TPAD14-GP 3D3V_S0 TPAD14-GP 20 20 20 20 29 29 29 29 TP76
TP71
HDA_DOCK_EN#/GPIO33 HDA_DOCK_RST#/GPIO34 SATALED#
1
MEDIA_LED# SATA_RXN0 SATA_RXP0 SCD01U25V2KX-3GP 2 SCD01U25V2KX-3GP 2 SATA_RXN1 SATA_RXP1 SCD01U25V2KX-3GP 2 SCD01U25V2KX-3GP 2
DY
B
2 2
1 R187
HDA_DOCK_EN# 8K2R2J-3-GP
SATA-HDD PATA&SATA-ODD
C664 1 C665 1
SATA
SATA_RXN0 SATA_RXP0 SATA_TXN0 SATA_TXP0 SATA_RXN1 SATA_RXP1 SATA_TXN1 SATA_TXP1
AJ16 AH16 SATA_TXN0_C AF17 SATA_TXP0_C AG17 AH13 AJ13 SATA_TXN1_C AG14 SATA_TXP1_C AF14
SATA0RXN SATA0RXP SATA0TXN SATA0TXP SATA1RXN SATA1RXP SATA1TXN SATA1TXP
CLK_PCIE_SATA# 2 CLK_PCIE_SATA 2
MEDIA_LED# 1 R186 10KR2J-3-GP
C662 1 C661 1
2 R539
1 24D9R2F-L-GP
B
ICH9M-GP-NF 71.ICH9M.00U
Place within 500 mils to ICH9 ball
Layout note: R373 needs to placed within 2" of ICH9, R379 must be placed within 2" of R373 w/o stub
RTC_AUX_S5
RTC_AUX_S5
1
R466 330KR2F-L-GP
1
R463 330KR2F-L-GP
integrated VccSus1_05,VccSus1_5,VccCL1_5
2
A
INTVRMEN R465 0R2J-2-GP
2
LAN100_SLP R464 0R2J-2-GP
INTVRMEN LAN100_SLP
High=Enable High=Enable
Low=Disable Low=Disable
ZZZZ
A
1
1
integrated VccLan1_05VccCL1_05
DY
2
DY
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Document Number
ICH9-M (1 of 5) P08A1
Sheet
1
Rev of 40
Date: Thursday, August 21, 2008
5 4 3 2
14
5
4
3
2
1
U50D 22 22 22 22 24 24 24 24 24 24 24 24 PCIE_RXN1 PCIE_RXP1 PCIE_TXN1 PCIE_TXP1 PCIE_RXN2 PCIE_RXP2 PCIE_TXN2 PCIE_TXP2 PCIE_RXN3 PCIE_RXP3 PCIE_TXN3 PCIE_TXP3
4 OF 6
LAN
D
2 2
C183 PCIE_TXN1_C 1 C189 PCIE_TXP1_C 1 SCD1U16V2KX-3GP C159 PCIE_TXN2_C 1 C153 PCIE_TXP2_C 1 SCD1U10V2KX-5GP C136 PCIE_TXN3_C 1 C132 PCIE_TXP3_C 1 SCD1U10V2KX-5GP
Direct Media Interface
N29 N28 P27 P26 L29 L28 M27 M26 J29 J28 K27 K26 G29 G28 H27 H26
PERN1 PERP1 PETN1 PETP1 PERN2 PERP2 PETN2 PETP2
DMI0RXN DMI0RXP DMI0TXN DMI0TXP DMI1RXN DMI1RXP DMI1TXN DMI1TXP DMI2RXN DMI2RXP DMI2TXN DMI2TXP DMI3RXN DMI3RXP DMI3TXN DMI3TXP
V27 V26 U29 U28 Y27 Y26 W29 W28 AB27 AB26 AA29 AA28 AD27 AD26 AC29 AC28 T26 T25 AF29 AF28 AC5 AC4 AD3 AD2 AC1 AC2 AA5 AA4 AB2 AB3 AA1 AA2 W5 W4 Y3 Y2 W1 W2 V2 V3 U5 U4 U1 U2
DMI_RXN0 DMI_RXP0 DMI_TXN0 DMI_TXP0 DMI_RXN1 DMI_RXP1 DMI_TXN1 DMI_TXP1 DMI_RXN2 DMI_RXP2 DMI_TXN2 DMI_TXP2 DMI_RXN3 DMI_RXP3 DMI_TXN3 DMI_TXP3
6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 1D5V_S0
U50B
2 OF 6
MiniCard1 MiniCard2
2 2
PCI-Express
2 2
PERN3 PERP3 PETN3 PETP3 PERN4 PERP4 PETN4 PETP4 PERN5 PERP5 PETN5 PETP5 PERN6/GLAN_RXN PERP6/GLAN_RXP PETN6/GLAN_TXN PETP6/GLAN_TXP
New Card
24 24 24 24
PCIE_RXN5 PCIE_RXP5 PCIE_TXN5 PCIE_TXP5
C29 C28 D27 D26
TPAD14-GP TPAD14-GP TPAD14-GP TPAD14-GP 21 USB_OC#0 TP52 TP53 TP58 TP61
DMI_ZCOMP DMI_IRCOMP
DMI_IRCOMP_R USBPN0 USBPP0 USBPN1 USBPP1 USBPN2 USBPP2 USBPN4 USBPP4 USBPN5 USBPP5 USBPN6 USBPP6 USBPN7 USBPP7 USBPN8 USBPP8 USBPN10 USBPP10 USBPN11 USBPP11 21 21 21 21 21 21 21 21 31 31 25 25 31 31 24 24 24 24 24 24
1 1 1 1
SPI_CLK SPI_CS0# SPI_CS#1 SPI_MOSI SPI_MISO USB_OC#0 USB_OC#1 USB_OC#2 USB_OC#3 USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7 USB_OC#8 USB_OC#9 USB_OC#10 USB_OC#11
D23 D24 F23 D25 E23 N4 N5 N6 P6 M1 N2 M4 M3 N3 N1 P5 P3
C
21
USB_OC#4
R534
2 1 22D6R2F-L1-GP
R135 3D3V_S0
USB_RBIAS_PN AG2 AG1
USBP0N USBP0P USBP1N USBP1P SPI_CLK USBP2N SPI_CS0# USBP2P SPI_CS1#/GPIO58/CLGPIO6 USBP3N USBP3P SPI_MOSI USBP4N SPI_MISO USBP4P USBP5N OC0#/GPIO59 USBP5P OC1#/GPIO40 USBP6N OC2#/GPIO41 USBP6P OC3#/GPIO42 USBP7N OC4#/GPIO43 USBP7P OC5#/GPIO29 USBP8N OC6#/GPIO30 USBP8P OC7#/GPIO31 USBP9N OC8#/GPIO44 USBP9P OC9#/GPIO45 USBP10N OC10#/GPIO46 USBP10P OC11#/GPIO47 USBP11N USBP11P USBRBIAS USBRBIAS#
2
1 1
2 C113 PCIE_TXN5_C 2 C109 PCIE_TXP5_C SCD1U10V2KX-5GP
E29 E28 F27 F26
DMI_CLKN DMI_CLKP
CLK_PCIE_ICH# 2 CLK_PCIE_ICH 2
R533 24D9R2F-L-GP
SPI
0514 MODIFY
D11 C8 D9 E12 E9 C9 E10 B7 C7 C5 G11 F8 F11 E7 A3 D2 F10 D5 D10 B3 F7