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725X Service Manual

Chapter 1: 725X Service Characteristics
The aim of this introductory chapter is to illustrate some of the characteristics of the 725X of fundamental importance to the technical staff, in particular, where to find the equipment status and how to keep it up to date. Identifying the boards Each board of the 725X is identified: · by its Code (950..), which is always indicated on the printed circuit, and its description, which is indicated on a label affixed to the handle or the printed circuit · by the Serial Number, indicated on a label affixed to the handle or the printed circuit · by the Configuration Index (CI), also on a label affixed to the handle or the printed circuit · by its Firmware (FW) level (when applicable), displayed in the System Configuration screen, Firmware Option (see next paragraphs) The Configuration Index represents the HW level of the board and is indicated by two decimal figures: CAD-KAS PDF-Editor (http://www.cadkas.com). Changed with the DEMO VERSION ofthe label will therefore be marked CONF.NN.

Board Configuration Index and Firmware Level When the CPU is switched on, it reads these values: the results of this reading is, in fact, displayed in the Configuration screen, Boards and Firmware options (see next paragraph). The Firmware is memorised on Flash EPROMs and it is updated via Floppy disk. The Configuration index is memorised on the board on different supports. Some boards have this value memorised on the EPROMs or on a PAL, the next table details which boards use these supports.

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725X Service Manual

DESCRIPTION FE-TIMING BOARD AVERAGE BOARD MEMORY CONTROL BOARD MEMORY BOARD CPU BOARD VIDEO BOARD SVGA BOARD POWER SUPPLY BOARD KEYBOARD BOARD CARDIO BOARD AUDIO/FFT BOARD RF II BOARD MTI BOARD

SUPPORT EPROM PAL PAL PAL EPROM PAL PAL µC EPROM PAL EPROM PAL PAL

CORRELATOR BOARD PAL Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com). Other boards have the Configuration Index memorised on EEPROMs or Flash EPROMs.

Description INPUT BOARD EPTX-RX BOARD MPTX-RX BOARD RX-MUX BOARD RX-SHORT BOARD FE-MASTER BOARD RX-DIGITAL BOARD RF I BOARD DELAY CONTROL BOARD SCAN CONTROL BOARD SCAN CONVERTER BOARD RX-LONG BOARD

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725X Service Manual The up-dating of the configuration index will therefore be operationally different. If the support is a Flash EPROM or an EEPROM, the index will be updated via Floppy disk. Moreover the CI has to be set via a specific Service menu (see Chapter "Configuration and Calibration procedures") In all the other cases the support will be replaced during updating: except for the Power Supply, all the supports are on a base. As already mentioned, the Configuration Index is also given on a label (CONF:NN) attached to the board. Whichever way this index is managed you are advised to update this label every time a modification is made on the field.

Configuration Screen From the keyboard you can display the Configuration Screen. To do this, press key and select option. The unit will shows:

GENERAL SYSTEM AREA

SN NNNN BOARDS FIRMWARE RES N.NN ADV N.NN dd/mm/yyyy XXX Mb PAL/NTSC YES/NO DAM N.NN YES/NO YES/NO TEI ODS N.NN

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UNIT MEMORY VIDEO STANDARD CARDIO MODULE DAM MODULE DOPPLER MODULE: CFM MODULE: FRONT END SETUP: License:

to exit

The most important information displayed is: · the Serial Number of the device · the release resident in the CPU · the SW release installed and the licenced ones I-3

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725X Service Manual · the Output Data System release (they are the acoustic output data stored in UP4, CPU board) · the installed optional modules With the trackball, you can enter the BOARDS option and it will be displayed

GENERAL

SN NNNN BOARDS FIRMWARE

Board CI Board CI KEY [NN] RXDIG1 [NN] POWER [NN] RXDIG2 [NN] SVGA [NN] FE-MASTER [NN] VIDEO [NN] RX-LONG [NN] MEMORY [NN] RX-SHORT [NN] MEM CTRL [NN] RX-MUX1 [NN] APU [NN] RX-MUX2 [NN] DSP [NN] EPTX-RX1 [NN] CARDIO [NN] EPTX-RX2 [NN] CPU [NN] EPTX-RX3 [NN] SCAN CONV [NN] INPUT [NN] AVERAGE [NN] CORRELATOR [NN] Changed with the DEMO VERSION of CAD-KAS PDF-Editor (http://www.cadkas.com). MTI [NN] FFT [NN] SCAN CTRL [NN] RF II [NN] RF I [NN] FE-TIMING [NN] DELAY CTRL [NN] to exit

The BOARDS option has two lists: the Board column lists all the installable boards. If a board is not installed (for example a board belonging to an optional module), it is anyway displayed the CI column lists the Configuration Index (the [NN] figures) of the installed boards. When a board is not installed, the unit displays [--].

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725X Service Manual

GENERAL Board SCAN CONV SCAN CTRL DSP RF I DELAY CTRL

BOARDS Firmware UP1 UP8 UP1 UP2 UP14 UP2 UP1 UP2 UP3 UP4 UP5 UP6 UP7 UP8 UP9 UP10 UP11 UP12

SN NNNN FIRMWARE Version 7252810X 7252880X 7255220X 7251540X 7255810X 7256010X 7256020X 7256030X 7256040X 7256050X 7256060X 7256070X 7256080X 7256090X 7256100X 7256110X 7256120X Date dd/mm/yyyy dd/mm/yyyy dd/mm/yyyy dd/mm/yyyy dd/mm/yyyy dd/mm/yyyy dd/mm/yyyy dd/mm/yyyy dd/mm/yyyy dd/mm/yyyy dd/mm/yyyy dd/mm/yyyy dd/mm/yyyy dd/mm/yyyy dd/mm/yyyy dd/mm/yyyy dd/mm/yyyy

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The Firmware option shows the installed boards equipped with Flash EPROM (Board column), the Flash assembly code (UPN) and the Firmware version (when installed) with the relevant date. Remind that the ODS data, stored in the CPU and displayed in the General option, has to be considered Firmware: therefore the ODS update follows the same criteria of any other FW upgrade. On shipment from Esaote, the charts of the initial configuration are placed in a pocket on the lower cabinet of the device. The technical staff will be responsible for keeping these charts up to date with the actual configuration of the device.

Machine Self-test At power-on, the CPU executes a self-test to check: · which boards are installed on the device · their Configuration Index and their FW · which SW release is installed

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725X Service Manual The result of this self-test is displayed for a short time, before the ID Menu. However you can access to the Configuration Screen in Real Time or in Freeze by pressing the Menu key and selecting the System Info option. The initial self-test has a dual function: · "self-configuration" If new features have been added (e.g. the Doppler Module has been installed), the CPU automatically reconfigures itself to manage the new devices. The Configuration display indicates the changes made: with reference to the same example, the screen will show the DOPPLER MODULE field as ON and consequently the levels of the configuration indexes of the new boards installed can be read. N.B. For the Front End upgrades see the chapter "Upgrading the 725X" · control The CPU checks for internal conflicts and, if there are any, displays a warning message.

Configuration Conflicts If DEMO VERSION of between HW levels of boards or between Changed with the there are conflicts CAD-KAS PDF-Editor (http://www.cadkas.com). HW and SW, the system stops at the General Configuration screen and displays the following message: System Configuration Error: Board(s) not present or not compatible In the BOARDS option, all the fields that caused the conflict are displayed in red. For example, if a board has a configuration index incompatible with the HW level of the device, the Configuration Index field of that board will be red. This screen thus represents a useful diagnostic tool for technical staff. This screen may be bypassed by pressing the key and access gained to the ID Menu.

Updating the device The 725X is designed so as to minimize the number of updating procedures that require operations to be carried out directly on the system. This is possible due to the use of Flash EPROM which may be updated by means of a Floppy Disk. Each device has a Floppy Disk drive installed on the left-hand side: the Flash EPROM is updated directly without having to remove the machine's casing. The SW used on the machine is present in Flash EPROM installed physically on the CPU board: the procedure for updating the SW release does not require any boards or cassettes to be changed. As we have seen, the release installed appears on the Configuration display.

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725X Service Manual The same philosophy is used for storing all the probe control tables: all the boards involved in controlling the probes (in particular, the Scan Converter, RF I, Delay Control and Scan Control boards) have one or more Flash EPROM modules installed. Whenever the number of probes managed by the 725X is changed, the new tables must be loaded from a Floppy disk. The release installed in the Flash Eprom is controlled using the Firmware option of the Configuration screen. If there are conflicts caused by the firmware releases installed, the characters of these fields will be displayed in red.

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725X Service Manual

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725X Service Manual

Chapter 2: Precautions
A series of precautions that must be observed each time you operate on the 725X are emphasised below: à the equipment must always be switched off before carrying out any service operation. In the same way, all the probes and peripherals (external monitor, printer, video-recorder...) must also be disconnected. à all the boards must be removed when the equipment is switched off à an electrostatic discharge occurring through the contact with the operator, can irreparably damage the electronic components on 725X boards, that are sensitive to electro-static discharges: we therefore recommend that you take precautions to prevent these discharges each time a board has to be removed/installed. In operational terms, this means: the machine must rest on an electro-static mat connected to earth the service technician must also be connected to the same earth each time he removes or installs the boards the boards and components must always be moved in their special electro-static containers for the service on the field, use the specific kits including the anti-static mat The chapter entitled "725X Parts List" details the sub-assemblies that are to be considered sensitive to electro-static discharges (ESD). When the board is ESD sensitive, you can find on the PCB master the following symbol:

à Follow the instructions on how to close the 725X (Section 2 Chapter 1) carefully.

Service tools The list contains all Service tools required to access the 725X. Phillips screwdriver Allen screwdriver Allen screwdriver 3 mm 2.5, 3, 4, 8 mm 7/64" inches I-9

725X Service Manual Allen screwdriver (spherical tip) Allen wrench Slotted screwdriver Esaote spanner Pliers Little brush Medium and thin tip welders Solder removal tool EPROM extractor tool 2.5 mm 4, 8 mm 4 mm cod.810515000

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725X Service Manual

Chapter 1: How to remove/reassemble the covers of the 725X and access the trackball, the loudspeakers and the Archival group
This chapter describes how to remove/assemble the covers of the 725X and some subassemblies. In order to carry out all the removal procedures, you must disconnect all peripherals connected, disconnect the probes (see Section 1, Chapter 2 "Precautions"), remove the system from the carriage, when installed in this way, and close the LCD screen. The 725X can be divided into two groups: - the lower group contains most of the boards and the Archival group - the upper group contains the keyboard group and, if assembled, the LCD display. The trackball can be accessed directly so there is no need to access either of the groups: the trackball cap simply has to be removed

Trackball cap (code 8105800000) Tool Medium-tip Phillips screwdriver Removal Procedure · Push the keyboard forwards as far as it will go · Holding the cap, unscrew the n.1 (one) M3 x 8 Phillips head screw on the underside of the keyboard that fixes the green cap to the cover · Remove the cap Assembly procedure Carry out the inverse of the removal procedure By removing the trackball cap you gain access to the trackball itself. The screws that fix the trackball to the keyboard group are situated on the outside of it, once the cap has been removed 3mm

Trackball (code 3400000037) Tools Medium-tip Phillips screwdriver 3 mm

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725X Service Manual Removal procedure · Remove the Trackball cap · Tilt the device to make the keyboard group protrude from the edge of the work table · Remove the n.2 (two) M3 x 8 Phillips screws situated on the top of the keyboard · Disconnect the Trackball cable from P4 connector on the Keyboard board · Pull out the Trackball group · Unscrew the n.4 (four) M4 x 6 Phillips head screws that fix the trackball to its metallic support Assembly procedure Carry out the inverse of the removal procedure

Gaining Access to the upper and lower groups Tools Medium-tip Slotted screwdriver Removal procedure · Slide the keyboard towards the rear and close the LCD screen, if present · Rest the 725X on its rear · Remove screws A, B, C, D and E as shown in Fig. 1 4 mm

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725X Service Manual

Fig.1 · Return the machine to a horizontal position · Lift the upper group off the lower group · Disconnect the flat cable from connector P4 on the Connector board Assembly Procedure Carry out the inverse of the removal procedure. In closing the unit, be careful to not damage the flat cable with the rear staff: first insert the front staffs, then the rear ones controlling the cable position N.B. To secure the upper and lower groups use always the screws cod.8106153000

Upper group The parts that can be removed are: · Lower cover of the upper group · Lower cover of the keyboard group · LCD display II - 3

725X Service Manual · LCD cap · Loudspeakers · Keyboard assembly

Lower cover of upper group (code 9102133000) Tools Medium-tip Phillips screwdriver Removal procedure · Turn the upper group upside down · Remove the n.4(four) M3 x 12 Phillips head screws indicated in Fig. 2 3 mm

Fig.2 · Remove the cover slipping the flat cable off Assembly procedure Carry out the inverse of the removal procedure By removing the lower cover of the upper group, you gain access to the Keyboard group. II - 4

725X Service Manual Lower cover of the keyboard group (code 9102134000) Tools Medium-tip Phillips screwdriver Removal procedure · Turn the keyboard group upside down · Remove the trackball cap (C screw shown in Fig.3) · Remove n.13 (thirteen) M3 x 8 Phillips head screws indicated in Fig. 3 3 mm

Fig.3 · Remove the cover Assembly procedure Carry out the inverse of the removal procedure By removing the lower cover of the keyboard group you gain access to the LCD screen, the loudspeakers and the Keyboard assembly

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725X Service Manual LCD Display (code 9101935000) Tools Medium-tip Phillips screwdriver Removal procedure · Turn the keyboard group upside down · Remove the lower cover · Return the keyboard group to a horizontal position and open the LCD display · Rest the Keyboard group on its long side · Remove the n.4 (four) M3 x 8 Phillips head screws of the blocks indicated in the figure 3 mm

· Disconnect the LCD cables from P2 and P9 connectors on the Keyboard board · Remove the screen Assembly procedure Carry out the inverse of the removal procedure

LCD screen cap (code 8105347100) Tools Medium-tip Phillips screwdriver Removal procedure · Turn the keyboard group upside down · Loosen n.3 (three) M3 x 8 Phillips head screws indicated in Fig. 4 3 mm

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725X Service Manual

Fig.4 · Remove the cap Assembly procedure Carry out the inverse of the removal procedure The cap must always be removed to fit the device with an LCD screen

Loudspeaker (code 9102267000) Tools Medium-tip Phillips screwdriver Removal procedure · Remove the lower cover of the upper group · Remove the lower cover of the keyboard group · Disconnect the loudspeaker cable from: Left loudspeaker: connector P7 on the Keyboard board Right loudspeaker: connector P11 on the Keyboard board · Remove the n.4 (four) M3 x 6 Phillips head screws that fix the loudspeaker group to the cover · Remove the loudspeaker group · Unscrew the n.2 (two) M3 x 10 Phillips head screws that fix the loudspeaker to the support · Remove the n.2 (two) o-ring Assembly procedure Carry out the inverse of the removal procedure 3 mm

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725X Service Manual Keyboard assembly Tools Medium-tip Phillips screwdriver Removal procedure · Remove the lower cover of the upper group · Remove the Encoder and TGC sliders caps · Remove the lower cover of the Keyboard group · Disconnect the loudspeaker · Disconnect, if installed, the LCD cables from the Keyboard assembly · Disconnect the flat cable from P1 connector · Remove the trackball group · Loosen the n.24 (twenty four) M2.5 x 8 Phillips head self-tapping screws that fix the Keyboard assembly to the cover · Remove the Keyboard assembly Assembly procedure Carry out the inverse of the removal procedure. 3 mm

Lower group The parts that can be removed are: · Connectors cover · Floppy Disk Drive · DAM cover · Handle · Fans · Rack

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725X Service Manual Connector cover (code 8105801000 and 8106486000) · Remove the cover by pulling it up

Archival group You have to disassembly the Archival group to access to the Floppy Disk drive and to the DAM cover or to the MO drive Tools Medium-tip Phillips screwdriver Removal procedure · Remove the upper group · Disconnect the flat cable from P1 connector on the Mother board · Remove the n.2(two) M3 x 6 Phillips screws that fix the archival group to the front of the chassis 3mm

· Remove the archival group by pulling it inwards

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725X Service Manual Assembly procedure Carry out the inverse of the removal procedure

Floppy disk drive (code 9730650051) Tools Medium-tip Phillips screwdriver Removal procedure · Unscrew the n.4 (four) M2.5 x 4 Phillips head screws that fix the drive to the metallic support · Remove the drive Assembly procedure Carry out the inverse of the removal procedure N.B. To secure the Floppy Disk Drive to the metallic support always use the specified screws. Failure to follow that procedure could damage the drive itself 3mm

DAM cover (code 8105912000) Tools Medium-tip Phillips screwdriver Removal procedure · Remove the archival group · Unscrew the n.4 (two) M3 x 6 Phillips head screws that fix the cover to the metallic support · Remove the cover Assembly procedure Carry out the inverse of the removal procedure 3mm

Magneto Optical Drive (code 9730650068) Tools 7/64" Allen screwdriver II - 10

725X Service Manual Removal procedure · Remove the archival group · Unscrew the n.4 (two) 6/32 x 1/8" Allen screws that fix the MO Drive to the metallic support · Remove the MO Drive Assembly procedure Carry out the inverse of the removal procedure Warning! The use of other screws could damage the Optical Disk drive

Handle (code 9102117000) Tools Allen screwdriver · · · · · Removal procedure Remove the upper group Remove the Archival group Remove the n.4 (four) M4 x 16 Allen screws that fix the handle to the front Remove the handle 3 mm

Assembly procedure Carry out the inverse of the removal procedure

Fan (code 9102027000) There are n.7 (seven) fans assembled on the unit basket: six of them are fixed with the screws external oriented, while one is fixed with the screws internal oriented (see Fig.5, where the two fans are fixed in opposite way) Tools Medium-tip Phillips screwdriver Removal procedure · Remove the upper group II - 11 3 mm

725X Service Manual · Remove the boards installed in the rack (see next Chapter) · Unscrew the n.4(four) M4 x 10 Phillips head screws that fix the boards basket to the chassis (the screws are shown in the below figure)

· Unscrew the n.1 (one) M4x8 Phillips head screw that fixes the boards basket to the rack placed into the chassis. · Raise the boards chassis to gain better access to the fans · Unscrew the n.4 (four) M3x16 Phillips head screws that fix the fan to the boards chassis; to unscrew the lower fan shown in Fig.5 you have to access from internal part of the basket

Fig.5 · Disconnect the fan power supply cable from Mother board II - 12

725X Service Manual · Remove the fan Assembly procedure Carry out the inverse of the removal procedure being careful to properly insert the equipotential node and the main switch.

Rack (code 9102135000) Tools Medium-tip Phillips screwdriver Removal procedure · Remove the upper group · Remove the handle · Remove all the boards inserted in the rack Assembly procedure Carry out the inverse of the removal procedure 3 mm

Warning! The Mother board is an integral part of the rack. In sockets on the Mother board there are n.2 EEPROM's containing the machine Presets and the Serial Number. Whenever the rack is replaced, the n.2 EEPROM's must be removed and reinstalled on the new one. Failure to follow this procedure could create conflicts between the HW and SW configurations.

Warning! Please remember that each time you will require one rack replacement, you will have to stick the proper label (the one having the same code and model) on the rear panel. Then copy on it, in the apposite white spaces, the system Serial Number and year of production, as you must keep its traceability.

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725X Service Manual How to assemble part number 9102134000 Part Number 9102134000 is formed of two parts: Upper group lower cover Three staffs The local Service will receive the two parts apart: before using it, you must stuck the staffs to the plastic.

Procedure Tools Two component epoxy stick Assembly · Spread the stick on the three staff supports · Screw in the staffs

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725X Service Manual

Chapter 2a: How to remove/install the boards on the 7251 & 7252
This chapter describes the procedures for removing/reassembling the single boards. The following must be removed: · the lower cover of the Keyboard Group to access the Key board · the upper group to access all the boards in the rack (with the exception of the Mother board) To access to the boards installed in the rack, the metallic shields must be removed by pulling them up; the shields cover: Front End Shield: Central Shield: INPUT, EPTX-RXs, RX-MUXs, RX-SHORT, RXLONG, FE-MASTER and RX-DIGITALs boards DELAY CONTROL, FE-TIMING, RF I, RF II, SCAN CONTROL, AUDIO/FFT, MTI, CORRELATOR, AVERAGE, SCAN CONVERTER, CPU, CARDIO, DSP, APU, MEMORY CONTROL, MEMORY, VIDEO, SVGA

The Power Supply board has dedicated shields. The board position is labelled either in the Mother board slots and in the front side of the chassis Note: Esaote strongly recommends to remove/install the boards following the ESD criteria

Key board Tools Medium-tip Phillips screwdriver Removal Procedure · Remove the Keyboard assembly (See Chapter 1) · Remove the Keyboard covers by pulling them up Assembly procedure Carry out the inverse of the removal procedure 3 mm

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725X Service Manual EPTX-RX, RX-MUX, RX-Short, RX-Long, FE-Master, RX-Digital, Delay Control, RF I, RF II, Scan Control, Audio/FFT, MTI, Correlator, Average, Scan Converter, CPU, Cardio, DSP, APU, Memory Control, Memory, Video, SVGA boards Removal procedure · Remove the board simply by pulling it upwards Assembly procedure Carry out the inverse of the removal procedure N.B. The unit has to be always installed n.2 EPTX-RX boards and always installed in the slots closer to the Front End

Power Supply Board Tools Medium-tip Phillips screwdriver Removal procedure · Remove the SVGA, Video and Memory boards · Unscrew the n.2 (two) M3 x 8 Phillips head screws that fix the board to the chassis · Remove the shields by pulling it up · Remove the board by pulling it upwards · Disconnect the cable from connector P4 Assembly procedure · Connect the board to the main switch · Insert the board and let the mains cables pass under the fan and in the chassis hole · Fix the rubber ring in the hole · Insert the shields paying attention to not damage the mains cables · Fix the Power Supply board to the chassis, screwing the n.2 (two) M3 x 8 Phillips head screws · Insert the removed boards and close the unit 3 mm

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725X Service Manual N.B. Failure to follow this procedure could cause the damage of the external insulation of mains cables!

Input board Tools Medium-tip Phillips screwdriver Removal procedure · Remove the n.6 (six) 3 x 5 Phillips screws that fix the Input board to the chassis · Remove the board by pulling it upwards 3 mm

Assembly procedure Carry out the inverse of the removal procedure N.B. To secure the Input board use always the specified screws. Failure to follow this procedure could cause short circuiting!

Connector Board Tools Medium-tip Phillips screwdriver Removal procedure · Unplug the flat cable from P4 connector · Unscrew the n.3 (three) 3 x 6 Phillips screws that fix the board to the unit rear panel · Remove the board sloping inwards Assembly procedure Carry out the inverse of the removal procedure 3 mm

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725X Service Manual

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725X Service Manual

Chapter 2b: How to remove/install the boards on the 7250 Mod.0X0
Refer to Chapter 2a of this section for all disassembling procedures not expressly described in this chapter MPTX-RX board Removal procedure · Remove the board simply by pulling it upwards Assembly procedure Carry out the inverse of the removal procedure N.B. The unit has to be always installed n.2 EPTX-RX boards and always installed in the slots closer to the Front End

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725X Service Manual

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725X Service Manual

Appendix A: 725X - Parts accessing time
This evaluation refers to the 725X only: the system is considered removed from the carriage and free from all the peripherals and probes. Note: the accessing time has been qualified by multiples of 15 minutes

Part Trackball Lower and Upper groups

Parts to be removed Trackball cap -

Accessing time ¼h ¼h

Upper group

Part Lower Cover Upper group Lower Cover Keyboard group LCD Display

Parts to be removed Lower Cover Upper group Lower Cover Upper group Lower Cover Keyboard group

Accessing time ¼h ¼h ¼h

LCD cap

Lower Cover Upper group Lower Cover Keyboard group

¼h

Loudspeakers

Lower Cover Upper group Lower Cover Keyboard group

¼h

Keyboard Assembly

Lower Cover Upper group Lower Cover Keyboard group

½h

Key board

Lower Cover Upper group Lower Cover Keyboard group Keyboard Assembly

½h

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725X Service Manual

Lower cover

Part Connectors cover Archival group Floppy disk drive DAM cover Magneto Optical drive Handle Power Supply board Input board Connector board Fans

Parts to be removed Archival group Archival group Archival group Archival group All the boards Board chassis

Accessing time ¼h ¼h ¼h ¼h ¼h ¼h ¼h ¼h ¼h ¾h

Rack

Archival group Handle All the boards except the Mother board

¾h

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725X Service Manual

Chapter 3: How to Remove/Reassemble the cart Mod. 7038
This chapter describes how to remove/reassemble the cart mod. 7038. In order to complete all the phases of the procedure, the 725X, any external monitor and/or peripherals installed must be removed. The instructions refer to the free cart. The phases of the procedure describe how to gain access to: Handle Rear panel Front wheels Rear wheels Probes holder Mains switch

Handle (code 9101808000) Equipment Allen wrench 8 mm

Removal procedure · Remove the monitor supporting arms, where present

· Loosen the n.3 (three) M10 x 30 Allen screws that fix the handle to the chassis · Remove the handle

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725X Service Manual Assembly procedure Carry out the inverse of the removal procedure

Rear panel (9101797000) Removal procedure · Grip the bottom of the panel · Pull outwards Assembly procedure Carry out the inverse of the removal procedure

Front wheels (code 1000000054) Removal procedure · Rest the cart on its rear · Brake the wheel · Turn it anticlockwise to unscrew it Assembly procedure Carry out the inverse of the removal procedure

Rear wheels (code 1000000058) Equipment ESAOTE wrench code 8105150000 Removal procedure · Rest the cart on its rear · Unscrew the wheel Assembly procedure Carry out the inverse of the removal procedure

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725X Service Manual Probes holder (code 9102028000) Equipment Allen screwdriver Removal procedure · Remove all probes adaptors by pulling them up · Unscrew the n.3 (three) M4 x 8 Allen screws placed in the front internal side · Unscrew the n.1 (one) M3 x 20 Allen screw that fixes the metallic arm to the probe holder · Remove the probes holder Assembly procedure Carry out the inverse of the removal procedure 3 mm and 2.5 mm

Mains switch (code 79100000261) Equipment Slotted screwdriver Removal procedure · Insert the screwdriver just under the Mains switch · Apply a pressure until it clicks · Disconnect the cables Assembly procedure Carry out the inverse of the removal procedure

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725X Service Manual

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1

2

3

4

5

6

7

8

9

10

11

EPTX_RX

RX-MUX
64 ECH BUS 96

RX-DIGITAL
AMPL.+A/D+DELAY+ 32
BCH BUS

ORIGINALE AUTOGRAFO -- NON DISTRUGGERE MAI --

F

192

192

CER. BUS

64

EL. PROBE CON. A

64 CHANNELS TX-SEP.-PRC

M

4 RAM LOADING BUS SCAN & MODE BUS

32 32 CHANNELS

16

11

DELAY & ENABLE CONTROL RAM

MUX & MIX

GAIN CONTROL BUS

EPTX_RX
192 64

DELAY & ENABLE CONTROL RAM
64

to RFI/RFII

64 CHANNELS TX-SEP.-PRC

E

EL. PROBE CON. B

4

192 CHANNELS SWITCH

11

DELAY & ENABLE CONTROL RAM

RX-DIGITAL
MUX CONTROL PROGRAM 32 AMPL.+A/D+DELAY+ 32 CHANNELS M
16

EPTX_RX
64 192

64 CHANNELS TX-SEP.-PRC

64

D

EL. PROBE CON. C

4

DELAY & ENABLE CONTROL RAM
11 A/B C/D

DELAY & ENABLE CONTROL RAM
96

MUX & MIX

RX-SHORT
32 64 SHORT DELAY 64 CHANNEL;S
A TERMINI DI LEGGE E' VIETATO RIPRODURRE O COMUNICARE A TERZI IL CONTENUTO DEL PRESENTE DISEGNO

C
12

FOUR PHASES SWITCH & FILTER

4

MOTOR PHASES

from scan control

MUX CONTROL PROGRAM
A/B C/D

SHORT DELAY CONTROLL LATCH

RX-MUX
B

X BUS

ARCHIVIO DBTEC

A/B
ARCHIVIO CAD

C/D

INPUT CONTR. LATCH
APODIZATION PROBE CGC

LONG DELAY LINE

EFL

DSP
16 SCAN & MODE

FLASH EPROM

GAIN CONTROL
LGC

TGC

DELAY & ENABLE CONTROL RAM

A

INPUT II
FLASH LOAD TEMPERATURE CODE & CONTR. BUS

RX-LONG
DELAY CONTROL

from fe-timing

FORMATO

A2
by Visula

REVISIONE Nr. O.V.

PREPARATO:

CONTROLLATO:

APPROVATO:

DATA:

DENOMINAZIONE:

Morandini

Donnini

Andreuccetti

13/09/00
Cod. Doc.:

SCHEMATIC DIAGRAM 7251 9707251000SB
Revisione:

DISEGNATO

A

Foglio1/3

Electronic copy (C)1996-2000

1

2

3

4

5

6
A-MODE BUS

7

8

9

10

11

CK0

ORIGINALE AUTOGRAFO -- NON DISTRUGGERE MAI --

F
from rx-digital DYN FILTER COMPR. ENVELOPE CDSIN RECADV 4 SMP

from fe timing TXS

LNA STSP 8 11

PROBE FREQ. M/E

CDCOS COMPR.

TXS 40M 8

RF I

FFT
DCOS DSIN 2 DDOT DLINE 16 MEMD

E
FILTER CD FORMER 16 CSIN 10

AVERAGE
4 PH

MTI
10 16 CCOS

CORRELATOR

16

CD FREQ. M/E

MLN

4 LN 11 LNA 11 4 4 16 3 8 10 6

RF II

LNA

D

EFL

MUX

FILTER BAND PAS & NOTCH

MOTOR PHASES

4

SCL MODE PED. CW D FREQ. DOPPLER GAIN POSIT. TEMPERATURE & CODE PROCESSOR TEMPERATURE CODE CONTROL BUS to input

SCP

IPL
A TERMINI DI LEGGE E' VIETATO RIPRODURRE O COMUNICARE A TERZI IL CONTENUTO DEL PRESENTE DISEGNO

PINGPONG

SCSTOP 20M 5M 4 PH PRF

C

BAL MOD.
COS

SCAN CONVERTER

9

XY

GATING

WALL FILTER
CPU CONTROL BUS FE CONTROL SIGNAL from cpu

TCLK (fe timing)

WOFF

SCAN CONTROL

BAL MOD. SS
SIN

CONTROL LATCH

4 MLN

ESCAN

CW
B
MODE FREQ.
ARCHIVIO DBTEC

MOT

FE TIMING FPGA

80 MHZ

DIGITAL TIMING FPGA DIGITAL CLOCKS all boards

ARCHIVIO CAD

PULSER CLK

(TXS,SMP,STSP.....) (40M,20M,5M.......)

FE CLK

A

DOPPLER TIMING GENERATOR

FE-MASTER

FE-TIMING
PREPARATO: CONTROLLATO: APPROVATO: DATA: DENOMINAZIONE:

FORMATO

A2
by Visula

REVISIONE Nr. O.V.

Morandini

Donnini

Andreuccetti

13/09/00
Cod. Doc.:

SCHEMATIC DIAGRAM 7251 9707251000SB
Revisione:

DISEGNATO

A

Foglio2/3

Electronic copy (C)1996-2000

1

2

3

4

5

6

7

8

9

10

11

ORIGINALE AUTOGRAFO -- NON DISTRUGGERE MAI --

F

HDD

ODD

FDD
32LS

ENCODERS GRAPH TIMING

KEYPAD

TRACK BALL

PCSCSI PCKEYBOARD PCSERIAL PCPARALLEL
E

RA

15

2X5 SERIAL SERIAL

8

12

PCRETE

APU

CPU
2 APUGRA

PARALLEL CONTROL PARALLEL POT. TGC 7

4

CTGC

KEY TGC
TGC ESCAN A-APU 27 MOT ACPU DSPGRA 16 16 APUGRA 27 2 2 FOOTSWITCH BUZZER

CONNECTORS

EXT-INT

16

TO/FROM CPU

MEMD

16 VTR

16

24 8

VTRIN VTROUT

D

MEMORY
ADDRESS 12

16

VIDEO
16 2

TVRGB VHS-SVHS PRINTERS REC-ADV +AVCC

CONTROLL 19

XY

9 27 27 27

PCKEYBOARD

WOFF

C
TCLK

MEMORY CONTROL

PCPARALLEL A-APU PCRETE A-DSP A-CPU TIMING VHS

PCSCSI

+5T

+5A PCKEYBOARD PCPARALLEL -5A

GRAPH TIMING PCSERIAL 15 RA 4 PCRETE(AUI) PH 24 SVGA SVGA -12

POWER SUPPLY

+3V3

+12

SVGA
MONITOR

+12C

B

AECG

27

CARDIO
HEADPHONES TR

+TXV

-TXV ECG
ARCHIVIO DBTEC ARCHIVIO CAD

AC
FLOAT ECG

+MAT

AECG

u-BUS
40M

16

LCD DSP
2 DSPGRA

A

INT

27

ADSP

FORMATO

A2
by Visula

REVISIONE Nr. O.V.

PREPARATO:

CONTROLLATO:

APPROVATO:

DATA:

DENOMINAZIONE:

Morandini

Donnini

Andreuccetti

13/09/00
Cod. Doc.:

SCHEMATIC DIAGRAM 7251 9707251000SB
Revisione:

DISEGNATO

A

Foglio3/3

Electronic copy (C)1996-2000

A TERMINI DI LEGGE E' VIETATO RIPRODURRE O COMUNICARE A TERZI IL CONTENUTO DEL PRESENTE DISEGNO

PCSCSI

+5C

1

2

3

4

5

6

7

8

ORIGINALE AUTOGRAFO -- NON DISTRUGGERE MAI --

192 ELECTRONIC PROBE 4 CODE A

D

CONN. A

192 CH SWITCH

D

TA A/B 192 ELECTRONIC PROBE CONN. B CODE B

4

C
TB to fe-timing C/D 192 ELECTRONIC PROBE CONN. C 4 CODE C

TC

12

FOUR PHASES SWITCH

4

MOTOR PHASES

from scan control

B

A/B

C/D

A/B

C/D

10

INPUT CONTROL LATCH & SWITCH

A

12

CONTROL & CODE

from/to fe-timing

FORMATO

A3
by Visula
Electronic copy (C)1996-2000

REVISIONE Nr. O.V.

PREPARATO: Morandini

CONTROLLATO:

APPROVATO:

DATA:

DENOMINAZIONE:

Donnini

Andreuccetti

13/09/00
Cod. Doc.:

INPUT II 7251 9500959000 SB
Revisione:

DISEGNATO

A

Foglio1/1

A TERMINI DI LEGGE E' VIETATO RIPRODURRE O COMUNICARE A TERZI IL CONTENUTO DEL PRESENTE DISEGNO

192 CH SWITCH

192 CER

ARCHIVIO DBTEC

ARCHIVIO CAD

; 6HUYLFH 0DQXDO ,1387 %2$5' The probes are physically connected to the Input board: this board's main function is that of connecting the active connector to the Front End. Three (3) connectors are fitted to the board: they are connectors for the electronic probes (ELECTRONIC PROBE CONN. A, B & C), The connectors of the electronic probes are connected to the 192 CH SWITCH that sends signals (192 CER, bi-directional bus) coming from the active electronic probe (A/B) to the Front End. Under the control of the FE -Timing board the INPUT CONTROL LATCH & SWITCH block identifies the connected probes, and amongst these, the active one.

III - 7

1

2

3

4

5

6

7

8

D
5 LC LOAD CONTROL BUS LC2

DELAY & TX EN CER 1 IL 0:7 READ/WRITE ADDRESS IS 0:4

DELAY & ENABLE RAM

TX DELAY CONTROL
CW HLF

FPGAS

TX 1:64

TX 1

PULSER 1

SEP. 1

PREAMPL. 1

ECH 1
A TERMINI DI LEGGE E' VIETATO RIPRODURRE O COMUNICARE A TERZI IL CONTENUTO DEL PRESENTE DISEGNO

C
EN 1

TXSTRB

TX STROBE

PULSE LENGTH BUS PLS 0:7

CLOCK BUS CPH 0:7

WEN

B
CER 64 RX EN RAM LOADING DATA RLB 0:15
ARCHIVIO DBTEC ARCHIVIO CAD

BUFFER

RX ENABLE DECODER
LC2

EN 1:64

TX 64

PULSER 64

SEP. 64

PREAMPL. 64

ECH 64

EN 64

A

FORMATO

A3
by Visula
Electronic copy (C)1996-2000

REVISIONE Nr. O.V.

PREPARATO: Morandini

CONTROLLATO:

APPROVATO:

DATA:

DENOMINAZIONE:

Donnini

Andreuccetti

01/06/00
Cod. Doc.:

EPTX-RX II 7250 9500781000 SB
Revisione:

DISEGNATO

A

; 6HUYLFH 0DQXDO (37;5; %2$5'6 The EPTX-RX card controls Reception/Transmission from and to the electronic probes. Three (3) EPTX-RX (identical and interchangeable) are installed on the 7250: each individual board manages 64 elements so, at maximum configuration, the 7250 manages electronic probes with 192 elements. The transmission pulses, generated by the PULSER blocks, are sent directly to the electronic probe (CER). The Echo signals received are filtered to eliminate the transmission pulse component present (SEP) and pre-amplified (PREAMP) before being sent (ECH) to the Echo signal acquisition chain. The transmission and reception management blocks are located in the left hand part of the block diagram. The Delay Control board loads all the probe management parameters into DELAY & ENABLE RAM, RAM that contains all the information concerning the delays for the transmission and the reception. The appropriate delays are then sent: to the TX DELAY CONTROL block that generates the signal to activate the individual transmitters upon the activation of the TX STROBE signal to the RX ENABLE DECODER block which generates the signals to switch off the individual receivers. The Delay Control board sends the electronic probes management parameters to the various internal blocks via the BUFFER block.

III - 9

1

2

3

4

5

6

7

8

ECH(N)

D

ECH(N+64)

ECH(N+128) MCH(N)

MUX 4:2
DELAY

BCH(N) ACOUSTIC LINE from delay control

8

MODE

MUX CONTROL PROGRAM
DELAY

MODE DELAY CONTROL

PROBE

DELAY

C

CH-MUX 2

CH-MUX 3

CH-MUX 4

CH-MUX 5

CH-MUX 6

CH-MUX 7

CH-MUX 8

CH-MUX 9

CH-MUX 10

CH-MUX 11

CH-MUX 12

CH-MUX 13

CH-MUX 14

CH-MUX 15

CH-MUX 16

B

CH-MUX 17

CH-MUX 18

CH-MUX 19

CH-MUX 20

CH-MUX 21

CH-MUX 22

CH-MUX 23

CH-MUX 24

CH-MUX 25

CH-MUX 26

CH-MUX 27

CH-MUX 28

CH-MUX 29

CH-MUX 30

CH-MUX 31

CH-MUX 32

A

FORMATO

A3
by Visula
Electronic copy (C)1996-2000

REVISIONE Nr. O.V.

B
3277
Morandini

PREPARATO: Morandini

CONTROLLATO:

APPROVATO:

DATA:

DENOMINAZIONE:

Donnini

Cerofolini

08/09/99
Cod. Doc.:

RX-MUX 7250 9500753000SB
Revisione:

DISEGNATO

B

Foglio1

A TERMINI DI LEGGE E' VIETATO RIPRODURRE O COMUNICARE A TERZI IL CONTENUTO DEL PRESENTE DISEGNO

CH-MUX 1

ARCHIVIO DBTEC

ARCHIVIO CAD

; 6HUYLFH 0DQXDO 5; 08; %2$5'6 The task of the RX-MUX boards is to transfer the Echo information coming from the probes (both electronic and mechanical) to the 64 channels internal bus. Each individual RX-MUX board transfers its inputs onto a 32 channel bus: the 7250 will therefore be installed with two RX-MUX boards (identical and interchangeable) in order to transfer all the echo information onto the internal bus. The individual board is comprised of an elementary CH - MUX block (shown in the picture) which is repeated 32 times and by an EPROM (MUX CONTROL PROGRAM). Therefore the echo signals entering the CH-MUX block are as follows: a total of 96 ECH input signals to the board itself (3 ECH signals for each individual CH-MUX block) and MCH signal. The input channels are divided into two groups: even channels enter one RX-MUX board and uneven channels enter the other. Therefore, for example, we have ECH1, ECH 65 and ECH 129 entering the first uneven CH-MUX block, while ECH 3, ECH 67 and ECH 131 enter the second uneven block. Gradually, as the scan proceeds, the CH MUX will shift. The MUX blocks, according to the method shown, passes the appropriate channel to the output. In the case of the Phased Array probes, the delay between individual elements due to band steering must be taken into consideration: the DELAY block takes into account such a delay before the output echo signal is sent out. The EPROM MUX CONTROL PROGRAM generates the appropriate delay on the basis of the connected probe and the acoustic line being acquired. Reconstruction of the band and its re-focalizing are carried out by the RX-Digital board. The BCH outputs of the RX-MUX boards are sent to the 2D/Colour chain and to the Doppler chain.

III - 11

1

2

3

4

5

6

7

8

D

ANALOG INP. CHANEL 1 (BCH 1)

A/D CONVERTER

DELAY CELL
16 8 RLB AL XFOCUS 2 XMOD 3 XSEL
A TERMINI DI LEGGE E' VIETATO RIPRODURRE O COMUNICARE A TERZI IL CONTENUTO DEL PRESENTE DISEGNO Revisione:

from delay contr.

DELAY RAM
GAIN CONTROL

5

from delay contr.

C
ANALOG INP. CHANEL 2 (BCH 2)

A/D CONVERTER

from RX-MUX

DELAY CELL

from delay contr.

GAIN CONTROL

B

ARCHIVIO DBTEC

ARCHIVIO CAD

(BCH 32)

A/D CONVERTER

DELAY CELL

A

ADIG BDIG from delay contr. GAIN CONTROL

to RF I/RF II

FORMATO

A3
by Visula
Electronic copy (C)1996-2000

REVISIONE Nr. O.V.

B
3277
Morandini

PREPARATO: Galardi

CONTROLLATO:

APPROVATO:

DATA:

DENOMINAZIONE:

Donnini

Cerofolini

08/09/99
Cod. Doc.:

RX-DIGITAL 7250 9500756000 SB

DISEGNATO

B

Foglio1

; 6HUYLFH 0DQXDO 5; ',*,7$/ %2$5'6 The RX DIGITAL boards receive incoming BCH analogue echo signals coming from the RX MUX boards, convert them and send them to the digital processing chain. Each individual RX DIGITAL board processes 32 channels. Therefore two boards are installed on the machine. The incoming BCH channels are individually sent to a variable gain amplifier chain that depends on the TGC curve set by the user; they then enter the A/D CONVERTER blocks where the digital conversion of each individual echo channel takes place. The sampled signal enters the DELAY CELL, where it is delayed in order to dynamically focalize it for reception. The introduced delay is managed by the Delay Control board according to the acquisition line, to the focus, to the modality (DELAY RAM block). Once the digital signals have been delayed they are summed and sent to 2D and Colour chains.

III - 13

1

2

3

4

5

6

7

8

TADIG to RF II

D
16 ADIG

TBDIG

DAC

TPRF

from rx digital

RF PRE FIR
BDIG 16 16 RFDATA AVERAGE MULTIPLIER

12
12 MULTIPLIER 24

DYNAMIC FIR
C
from master

TDOPP

ADC

10

MEAN SEL

GAIN

FILTER TIMING GEN.

12

24 MULTIPLIER

IMAG

I2

CH SEL

LS1F LS2F 2 2 7

B

LS3F from cpu LC BUS 16

CPU INTERFACE

RWC RWC
ARCHIVIO DBTEC

TMSDB 16 to fe-timing 8 BAMODE

ROM

16 TMSAB

TMS
to average 8 AMODE COMPRESSION LUT

A

FORMATO

A3
by Visula
Electronic copy (C)1996-2000

REVISIONE Nr. O.V.

B
3277
Morandini

PREPARATO: Bigagli

CONTROLLATO:

APPROVATO:

DATA:

DENOMINAZIONE:

Donnini

Cerofolini

08/09/99
Cod. Doc.:

RFI 7250 9500757000 SB
Revisione:

DISEGNATO

B

Foglio1

A TERMINI DI LEGGE E' VIETATO RIPRODURRE O COMUNICARE A TERZI IL CONTENUTO DEL PRESENTE DISEGNO

M U X

REAL

R2

ARCHIVIO CAD

; 6HUYLFH 0DQXDO 5) , %2$5' The RF I board receives incoming radio frequency echo data, filters it dynamically and calculates its envelope. The ADIG and BDIG data coming from the RX DIGITAL boards is input to the board. This data is sent to the colour chain (TADIG and TBDIG sent to RF II), to a summing point and individually to a multiplexer. Under the control of the CPU, the MUX passes either individual bus data or the sum of the two. Outgoing radio frequency data from the MUX enters AVERAGE, where an average is calculated under the control of the CPU in order to improve the Signal/Noise ratio. The outgoing bus data enters MULTIPLIER where it is amplified according to the 2D gain selected by the user (Encoder 2D key-board GAIN). Dynamic filtering of the radio frequency datum is carried out by DYNAMIC FIR, varying the band according to the depth. Filter timing control is carried out by the Xilinx FILTER TIMING GEN. When leaving the dynamic filter the signal is divided into a real part and an imaginary part. These are sent to the MULTIPLIER blocks for calculating the square. They are then summed and the square root is extracted in order to calculate the envelope. A compression is then carried out (COMPRESSION LUT) before sending the signal to the echo signal processing. The TMS block is the board manager and sets the dynamic filter coefficients according to frequency and the connected probe.

III - 15

1

2

3

4

5

6

7

8

BCH2

DL

MUX

D

6 SD

8

SD1

X16

SD BUFFER
SD2

from rx-long

SD LATCH

BCH32

DL

MUX

X31

C
A0:A4

LOAD CONTROL BUS

32

DECODER
SD64 LCC BCH33

DL

MUX

X32

from rx-mux

SD33

BCH1

DL

MUX

X0

BCH63

DL

MUX

X47

B

SD1

SD63

ARCHIVIO DBTEC

BCH3
ARCHIVIO CAD

DL

MUX

X1 BCH34

from rx-mux

DL

MUX

X48

SD3 SD34

A
BCH31

DL

MUX

X15

BCH64

DL

MUX

X63

SD31
FORMATO REVISIONE Nr. O.V.

SD64
PREPARATO: Morandini CONTROLLATO: APPROVATO: DATA: DENOMINAZIONE:

A3
by Visula
Electronic copy (C)1996-2000

B
3277
Morandini

Donnini

Cerofolini

08/09/99
Cod. Doc.:

RX-SHORT 7250 9500754000 SB
Revisione:

DISEGNATO

B

Foglio1

A TERMINI DI LEGGE E' VIETATO RIPRODURRE O COMUNICARE A TERZI IL CONTENUTO DEL PRESENTE DISEGNO

SD32

; 6HUYLFH 0DQXDO 'RSSOHU $QDORJXH &KDLQ The Doppler analogue chain physically consists of two boards (RX-SHORT and RXLONG) that carry out the same function: they re-focalize the beam inserting a finer (RX SHORT) or less fine (RX LONG) delay in the 64 BCH channels. Each individual BCH channel is independently delayed, in a manner that can be programmed externally. The Delay Control board manages programming of the delays by loading the various parameters into the RAM physically resident in the RX LONG board. 5; 6+257 %2$5' The board is composed of an elementary macro-block that is repeated 64 times: each BCH leaving the RX-MUX board enters this macro-block and leaves it appropriately delayed. The BCH signal enters the DL delay line and adds to it a variable delay in multiples of 20nsec. The minimum delay is equal to the rate of the DL block (20 nsec) and the maximum delay is 160 nsec. The eight outputs of the DL block correspond to the delayed BCH signals in multiples of 20 nsec. The various delayed BCH enter the MUX block, which, according to the SDN value, will send only one of the inputs to the outgoing pre-amplifier. The XN board outputs enter the RX LONG board. The SDNs are generated by blocks located on the left side of the Block Diagram. The SD signals (6-row buses corresponding to 2 channels) come from the RX LONG board RAM, and are loaded into SD BUFFER. The SD signals are transferred to SD LATCH with a timing regulated by the DECODER block.

III - 17

1

2

3

4

5

6

7

8

D

to RX-SHORT

A 0:4

LOAD CONTR. BUS LC

DELAY BUS SL 0:7 READ/WRITE ADDRESS DF 0:3

LONG DELAY

X0 X1

YA63 YB63 YA62

MAXDELAY

C

from DELAY CONTROL

YB62 WEN

SWITCH MATRIX 64 X 64
from RX-SHORT 16 RLD 0:15 RAM LOADING BUS

DELAY LINE

OUT

BUFFER

EFL

to MASTER

B

to RX-SHORT

SD 1:8

SHORT DELAY YA0 X63 YB0 MINDELAY

A

FORMATO

A3
by Visula
Electronic copy (C)1996-2000

REVISIONE Nr. O.V.

B
3277
Morandini

PREPARATO: Morandini

CONTROLLATO:

APPROVATO:

DATA:

DENOMINAZIONE:

Donnini

Cerofolini

08/09/99
Cod. Doc.:

RX-LONG 9500778000 SB
Revisione:

DISEGNATO

B

Foglio1

A TERMINI DI LEGGE E' VIETATO RIPRODURRE O COMUNICARE A TERZI IL CONTENUTO DEL PRESENTE DISEGNO

DELAY & ENABLE RAM

ARCHIVIO DBTEC

ARCHIVIO CAD

; 6HUYLFH 0DQXDO 5; /21* %2$5' The heart of the board is the DELAY LINE that receives incoming XN signals, addressed to the different inputs from the SWITCH MATRIX matrix. The DELAY LINE block adds a different delay (multiple of 160 nsec) to the 64 incoming signals, reaching an overall maximum delay of 10 µsec. The appropriately delayed signals are added up at the output and sent (EFL signals) to the FE MASTER board. The job of the SWITCH MATRIX is to send XN incoming signals to any one of the DELAY LINE block inputs, according, naturally, to the delay that you wish to add on to each signal. This sorting is indirectly managed by the Delay Control board. This board, in fact loads all the parameters necessary for managing the delays chain onto the DELAY AND ENABLE RAM (in the case of both the RX-SHORT and RX-LONG boards).

III - 19

1

2

3

4

5

6

7

8

CLK BUS

CPH 0:7

40MHZ REF CLK

BCLK-D40M-D20MH CONTROL CLK

BUFFER
D

BUFFER

BUFFER

80MHZ SIN SIN

BALANCE MODULATOR

MUX

HIGH PASS FILTER

C

LOW PASS 33KHZ

DSIN

TIMING FPGA
EMISSION FREQ. GATE

PW INTEGRATOR

COS COS

CW SS

HIGH PASS FREQ.

MODE CONTROL

BALANCE MODULATOR

MUX

HIGH PASS FILTER

LOW PASS 33KHZ

DCOS

B

ARCHIVIO DBTEC

ARCHIVIO CAD

from rx long

EFL

MUX
from mptx-rx PCH

BAND PASS FILTER

NOTCH FILTER

A

DPSEL

FREQ.

NOTCH FREQ.

FDGAIN

TEST

DTGC RF
FORMATO

A3
by Visula
Electronic copy (C)1996-2000

REVISIONE Nr. O.V.

B
3277
Morandini

PREPARATO: Morandini

CONTROLLATO:

APPROVATO:

DATA:

DENOMINAZIONE:

Donnini

Cerofolini

08/09/99
Cod. Doc.:

FE-MASTER 7250 9500755000 SB
Revisione:

DISEGNATO

B

Foglio1

A TERMINI DI LEGGE E' VIETATO RIPRODURRE O COMUNICARE A TERZI IL CONTENUTO DEL PRESENTE DISEGNO

; 6HUYLFH 0DQXDO )( 0$67(5 %2$5' The FE MASTER board has a dual function: · generation of basic timings · de-modulation of the Doppler signal The main input of the TIMING FPGA block is the signal coming from the 80 MHz oscillator. According to the EMISSION FREQ value, the block generates the submultiples of the basic oscillation that are then sent to the upper three BUFFER blocks. The first BUFFER sends the CPH transmission clocks to the Front End, the second sends the Front End reference clocks and the third sends the main clocks for boards not belonging to the Front End. The inputs to the de-modulation Doppler chain are: EFL, coming from the RX LONG board, and PCH, coming from the MPTX-RX board, relating to the Doppler probe. The MUX block sends one of the two inputs to the de-modulation chain, according to the DPSEL signal coming from the micro. The relative output is sent to the bandpass filter centred on the Doppler frequency (FREQ from the CPU). It is then sent to the NOTCH FILTER to eliminate the Doppler frequency emitted in the event of CW. The transformer makes the signal differential and this is then amplified (operator Doppler Gain) before being sent to the BALANCED MODULATOR. In the case of the PW Doppler, the BALANCED MODULATOR outputs enter the PW INTEGRATOR block (for integration of the signal on the Gate) and are then sent to the MUX; the CW modulated Doppler signals enter the MUX directly. Under micro control (CW signal from CPU), the MUX send either the CW or the PW to the two outgoing filters (HIGH PASS FILTER). The DSIN and DCOS outputs are sent to the AUDIO/FFT board for extraction of the Audio component and for application of the Fourier transform.

III - 21

1

2

3

4

5

6

7

8

ADDRESS BUS from fe master from fe timing DCOS DSIN SMP

DATA BUS

DATA BUS

ADDRESS BUS 16

D

ADC

14

CPU PORT

16 LB

to/from cpu

32

DSP PORT

32

TXS DL 40M

DSP FFT I (AUDIO)

24 8 32

DATA OUT

8

DD

to average

DAC CONTROL

C

24

32

RAM
32

DPS FFT II (FFT)

TXS 40M STSP DL DDOT DLINE

from fe timing from scan contr.
to average

RAM
32

PROG EPROM

16

B

PROG EPROM
to/from cpu 16 LB

CPU PORT

16 16

REC to connectors ADV

A

DAC CONTROL

BUFF DAC MUX
from connectors RECIN ADVIN

HPADV HPREC

to head phone

VOLUME CONTROL

DEMUX
SPKA SPKB to speaker

A

FORMATO

A3
by Visula
Electronic copy (C)1996-2000

REVISIONE Nr. O.V.

B
3277
Morandini

PREPARATO: Moglia

CONTROLLATO:

APPROVATO:

DATA:

DENOMINAZIONE:

Donnini

Cerofolini

08/09/99
Cod. Doc.:

AUDIO/FFT 7250 9500763000 SB
Revisione:

DISEGNATO

B

Foglio1

A TERMINI DI LEGGE E' VIETATO RIPRODURRE O COMUNICARE A TERZI IL CONTENUTO DEL PRESENTE DISEGNO

ARCHIVIO DBTEC

ARCHIVIO CAD

; 6HUYLFH 0DQXDO $8',2))7 %2$5' The AUDIO/FFT board receives the de-modulated Doppler signal, extracts its audio component and calculates the Fourier transform. The de-modulated DSIN and DCOS signals enter the ADC converter under DSP FFT I control. After filtering according to the PRF and Vertical Range, this block sends the Doppler datum both to the DSP PORT and to the Audio chain (DAC CONTROL). All the DSP PORT does is to transfer the filtered Doppler datum to the DSP FT II which extracts the Fourier transform. The DSP FFT II are alongside the RAM and PROG EPROM blocks where the FFT processing program is housed. The data is then sent to the Average board via the DATA OUT port. The audio chain has a DAC converter in input. The converted signal is sent to the Connectors board (REC and ADV), where it is recorded, and to VOLUME CONTROL, which, under the control of the CPU, adjusts the volume. Then the signal is sent via DEMUX to the loud-speakers or to the head phones.

III - 23

1

2

3

4

5

6

7

8

CHAIN 1
D
16 TADIG

I

16

I FIR

from rfI

DECIMATION

MUX

DEMOD

16

MUX

CCOS

to mti

Q
16 TBDIG

16

Q FIR DAC
TPCOS
A TERMINI DI LEGGE E' VIETATO RIPRODURRE O COMUNICARE A TERZI IL CONTENUTO DEL PRESENTE DISEGNO

C

CHAIN 2 I
16

I FIR

MUX
B

DECIMATION

DEMOD MUX Q
16

16 CSIN

to mti

Q FIR DAC
TPSIN

ARCHIVIO DBTEC

ARCHIVIO CAD

MODE LS0F 2 CPU INTERFACE

FREQ 4

from cpu

LC BUS RWC

16

MULTI

MULTI MODE TIMING

A

RWC

FORMATO

A3
by Visula
Electronic copy (C)1996-2000

REVISIONE Nr. O.V.

B
3277
Morandini

PREPARATO: Bigagli

CONTROLLATO:

APPROVATO:

DATA:

DENOMINAZIONE:

Donnini

Cerofolini

08/09/99
Cod. Doc.:

RFII 9500758000 SB

7250

Revisione:

DISEGNATO

B

Foglio1

; 6HUYLFH 0DQXDO &RORXU &KDLQ

5) ,, %2$5' The RF II receives the incoming radio frequency signal from the RF I board, filters it and de-modulates it to extract the phase and quadrature components (CCOS and CSIN). The incoming signals are sent to a summing point and individually to a multiplexer. The MUX, under control of the CPU, passes on either the individual data buses or the sum of the two. The radio frequency data coming out of MUX enters DECIMATION, where a frequency translation takes place according to the colour frequency in question. This translation is required by the DEMOD block that demodulates and calculates the real and imaginary part of the signal. The real and imaginary parts enter respectively the I FIR and Q FIR where filtering is carried out to improve the signal/noise ratio. The CSIN and CCOS outputs are sent to the MTI board via MUX.

III - 25

1

2

3

4

5

6

7

8

ORIGINALE AUTOGRAFO -- NON DISTRUGGERE MAI --

D
FILTER SELECTION 4 16 C SIN

AVG

16

12

CFI

from rf II

SEL

16

MUX

DIGITAL HIGH-PASS FILTER

27

GAIN

12

DEMUX

to correlator
A TERMINI DI LEGGE E' VIETATO RIPRODURRE O COMUNICARE A TERZI IL CONTENUTO DEL PRESENTE DISEGNO Revisione:

12
C
16 C COS

AVG

16

CFQ

7X16
SEL SIN/COS

MEMORY

from average

LNA 2:9

8

4

B

LN 0:3

from fe timing

TXS CKO

SEL SIN/COS

ARCHIVIO DBTEC

ARCHIVIO CAD

from average

LNA0 LNA1

TIMING & CONTROL 4

CONTROL

FILTER SELECTION

from scan control
A

MLN 0:3

4

4 LN 0:3

to correlator

FORMATO

A3
by Visula
Electronic copy (C)1996-2000

REVISIONE Nr. O.V.

PREPARATO: Andreuccetti

CONTROLLATO:

APPROVATO:

DATA:

DENOMINAZIONE:

Donnini

Cerofolini

23/03/99
Cod. Doc.:

MTI II 7250 9500782000SB

DISEGNATO

A

Foglio1/1

; 6HUYLFH 0DQXDO 07, %2$5' The MTI card extracts the high frequency components of the signal that is connected to the moving targets. The CSIN and CCOS digital signals coming from the RF II board enter AVG where an average is calculated to improve the signal/noise ratio and they are then multiplexed (MUX) so as to have one single 16 bit bus. The data bus enters the DIGITAL HIGH PASS FILTER where high pass filtering is carried out to eliminate spurious echoes coming from still structures. The filtering carried out depends both on the type of colour processing set (MEMORY) and on the settings selected (FILTER SELECTION); in cascade the GAIN block that selects the information to be sent to the Correlator board on the basis of the filters used; in cascade DEMUX Block to de-multiplex the signals before sending to the Correlator board. The TIMING & CONTROL block manages all the internal control signals, according to the acquisition line and the number of lines being acquired.

III - 27

1

2

3

4

5

6

7

8

ORIGINALE AUTOGRAFO -- NON DISTRUGGERE MAI --

3
AVG LINE NUMBER

3

D

TP1

19

RX

LINE

17

6 VELOCITY

AVG
SIGN 12 CFI 5 POWER from mti AUT0 CORRELATION & POWER ESTIMATOR 19 RY LINE 17 PARAMETERS EXTRACTOR CFM 0:15 to avg

3

AVG

C
CFQ

12

TP2

3

4 VARIANCE

18

R0 COMPR.

11

9 LINE

AVG
2X16 2X12 2X19 1X11 VP POWCOL TH 1:2 2 2

B

2X24 1X16 VEL 1:2

MEMORY
2

MEMORY
8
ARCHIVIO DBTEC ARCHIVIO CAD

MEMORY
8 5 DD 0:4

MEMORY
8

15

from mti II

LN 0:3

4

from fe timing

TXS CKO

from average

LNA 2:9

from average

LNA0 LNA1

TIMING & CONTROL 2

CONTROL

A

VP,POWCOL 2 TH 1:2 5 DD 0:4

FORMATO

A3
by Visula
Electronic copy (C)1996-2000

REVISIONE Nr. O.V.

PREPARATO: Andreuccetti

CONTROLLATO:

APPROVATO:

DATA:

DENOMINAZIONE:

Donnini

Cerofolini

22/03/99
Cod. Doc.:

CORRELATOR II 7250 9500783000SB
Revisione:

DISEGNATO

A

Foglio1/1

A TERMINI DI LEGGE E' VIETATO RIPRODURRE O COMUNICARE A TERZI IL CONTENUTO DEL PRESENTE DISEGNO

; 6HUYLFH 0DQXDO &255(/$725 %2$5' The Correlator extracts information concerning the speed, variance and power of the colour signal. The CFI and CFQ signals leaving the MTI enter the AUTOCORRELATION & POWER ESTIMATOR for calculation of the auto correlation function, so as to assess how the signal has varied with respect to the previous one (MEMORY). The outgoing signals, divided into real (RX) and imaginary (RY) parts enter the respective LINE AVG blocks where an average is calculated among several colour lines (AVG LINE NUMBER). The RO COMPR block reduces the signal dynamic for the calculation of the power component. The PARAMETERS EXTRACTOR block extracts from the averaged functions, speed, variance and power, which are sent to the Average board. The TIMING & CONTROL block manages all the internal control functions, according to the acquisition line and the number of lines being acquired ( multi-line).

III - 29

1

2

3

4

5

6

7

8

PBS 0:4 INT

to RX MUX to FE MASTER

D

FDGAIN

CPU HANDLER INT

LS12 LS13 LS14 ILC 0:4

GAIN RAM

DAC 64

RAM

TMS

FLASH

LS15 RWC from CPU

BLC 0:15

GC 0:63 AMPLIGC
16 ATGC CTGC

to RX DIGITAL

C
16 DATA BUS 17 32 24 32 22 16

BACPU 0:19

from KEY BOARD

BCLK BRSC 15 ADDRESS BUS 8 24 24 8 LING

from FE TIMING

MEMLOAD ILCC

B
ULINE 0:7 MRS 0:7 ILC 0:4 from scan control IACFM
ARCHIVIO CAD

to MPTX-RX

XILINX2
ILC 0:4 ILCC IS 0:4 to EPTX-RX to RX-LONG

AUX 0:7 XFOCUS O:4 XILINX1
UFOC 0:4

ILC 0:4 ILCC

XMOD 0:1 XSEL 0:2

to RX-DIGITAL

A

REG.

ACOUSTIC LINE (AL 0:7) ACOUSTIC LINE (IL 0:)7 DOPPLER LINE (SL 0:)7 to MPTX-RX/RX-MUX to RX-LONG

FORMATO

A3
by Visula
Electronic copy (C)1996-2000

REVISIONE Nr. O.V.

B
3277
Morandini

PREPARATO: Galardi

CONTROLLATO:

APPROVATO:

DATA:

DENOMINAZIONE:

Donnini

Cerofolini

08/09/99
Cod. Doc.:

DELAY CONTROL 7250 9500759000 SB
Revisione:

DISEGNATO

B

Foglio1

A TERMINI DI LEGGE E' VIETATO RIPRODURRE O COMUNICARE A TERZI IL CONTENUTO DEL PRESENTE DISEGNO

ARCHIVIO DBTEC

; 6HUYLFH 0DQXDO '(/$< &21752/ %2$5' The task of the Delay Control is to program all the RAMs on the Front End boards involved in the signal transmission and reception. The TMS block is the heart of the board. When the unit is switched on and each time a probe is changed, the TMS loads a series of values from the FLASH block, processes them and sends them to the RAMs of the Front End boards. Once the RAMS are programmed, the TMS stops. The contents of the FLASH block is updated, gradually, by the CPU via the CPU HANDLER block. The task of the XILINX blocks is to supply addresses concerning the actual scanning line inputs (from Scan Control board) to the Rams of the Front End.

III - 31

1

2
CONTROL PADDR B/W

3

4

5

6

7

8

ORIGINALE AUTOGRAFO -- NON DISTRUGGERE MAI --

PING PONG MEMORY FRAME MEMORY
8 8 BNAD 2X17 8 B/W 2 X FRAME MEMORY

8 7 7 MUX 7
B/W INTERPOLATOR DELAY 3 BIPL 0:2 7

17

D

from rf1

8 A_MODE

8

AVG
CK

8

B/W PERSISTENCE
3

8
8 B/W 2 X LINE MEMORY 2X9 BNTRAD

7

BPER 0:2 from audio/fft 8

MUX

DD 0:7 CK

8

AVG CPER 0:2
3

I/TR

from scan conv. BNCF

16

MUX
B/W CFM SELECTION 32 3 5

MEMD 0:15

to memory

AVG
CK

C
PADDR CRM

24

24 CFAD

2X17

16 MUX 16

BOX INF CONTROL

17

FRAME MEMORY
16 CFM 2 X LINE MEMORY 2X9 CFTRAD

10 CFM INTERPOLATOR 4

CONTROL

16
DELAY 3 BIPL 0:2 DIRECT STATIC INFORM from scan conv.

PPCONTROL 8 8 17 PADDR B/W

BNLN 0:7

B

from scan control

CFLN 0:7 IL DL ML ACFM TXS

CFMON

17 PADDR CFM TXS

TIMING CONTROL READ & WRITE ADDRESS FORMER
10

CONTROL

CK0 DDOT DLINE

2X17 BNAD 2X9 BNTRAD CFAD

ARCHIVIO DBTEC

from fe timing
ARCHIVIO CAD

CK0 from audio/fft DDOT DLINE

LNA 0:9 CK0 8 BN 0:7

to mti correlator

BN 0:7 CF 0:7 SCP 0:9 from scan conv. SCL 0:9 IPL 0:5

8 8 10 8 6 BIPL 0:2 2X17 2X9

from scan conv.

IPP IRPP I/TR

8 CF 0:7 BW/DOP PPCONTROL

ADDRESS CONTROL

CFTRAD

A
from memory control

VMTC 0:4

5

PH 0:3

4 CLOCK CLOK

FORMATO

A3
by Visula
Electronic copy (C)1996-2000

REVISIONE Nr. O.V.

PREPARATO: Andreuccetti

CONTROLLATO:

APPROVATO:

DATA:

DENOMINAZIONE:

Donnini

Cerofolini

24/03/99
Cod. Doc.:

AVERAGE 7250 9500764000 SB
Revisione:

DISEGNATO

A

Foglio1

A TERMINI DI LEGGE E' VIETATO RIPRODURRE O COMUNICARE A TERZI IL CONTENUTO DEL PRESENTE DISEGNO

from correlator

16 CFM 0:15

18

CFM PERSISTENCE

16

CFM 2 X FRAME MEMORY

16

CFMON

; 6HUYLFH 0DQXDO $9(5$*( %2$5' The Average acquires the echo signals (image, Doppler and colour) and send them to the memory board. The board inputs are: · the A-Mode signal code, coming from the RF I board · the Doppler signal code (DD) coming from the AUDIO/FFT · the colour signal code in Speed, Power, Variance, coming from the Correlator board The signals enter the AVG blocks for a first processing to improve the signal/noise ratio. The various outputs enter the persistence blocks (B/W PERSISTENCE and CFM PERSISTENCE) together with the previously averaged images (FRAME MEMORY). The colour data enters CFM PING PONG FRAME MEMORY while the B/W PING PONG FRAME MEMORY block receives the processed black/white data and the Doppler datum directly. Both these memories contain information concerning the whole page. The scanning itself manages the ping pong between writing and reading. The writing address of the ping pong memories is generated by the TIMING CONTROL READ & WRITE ADDRESS FORMER block. The reading address is, on the other hand, given by the Scan Converter (SCP, SCL and IPL) via the ADDRESS CONTROL block. The memorised B/W and CFM data is interpolated into B/W INTERPOLATOR and CFM INTERPOLATOR and sent to the Memory board according to the selection made by the B/W CFM SELECTION block.

III - 33

1

2

3

4

5

6

7

8

ORIGINALE AUTOGRAFO -- NON DISTRUGGERE MAI --

12 XY CONTROL

X&Y COUNTER

XA 12 16 YA 12 16 RHO CALCULATOR 12 DRO XA RHO SHIFT 12 12 10 PLIN 4 RHOOUT RHO DENSITY ADJUST

D
from memory control PH0:3 4 LIN DIRECT

YA

LIN 3 THLIN 4 4 PANG 12 DRO XSH 9 8 XA YA YSH LSH LIN THLIN THLIN 6 from scan control MOT1 MOT2 U/D POS ESCAN to cpu to scan control to mem. contr. average to avg 9 9 XSHIFT 9 DIRECT 6 L/R 3 LIN 12 16 THETA CALCULATOR 13 PANG THETA DENSITY ADJUST LSH 8 8 LINE SHIFT 8 4 PLIN DIRECT

MUX YA
LSB 12

SCP 0:9

C

SCAN CONVERTER CONTROL

9

to average

MUX XA
LSB 8

8

SCL 0:7

DIRECT

MUX

6

IPL 0:5

B

from fe timing

TCLK

SCSTOP I/TR IPP TRPP STRES

to mem. contr.

XA

ARCHIVIO DBTEC

ARCHIVIO CAD

from memory control

SPRES RHOOUT

LEFT/RIGHT

WOFF BNCF BWCF to avg XSH to mem. contr. memory L/R

9

MUX

9

XY 0:8

to memory control

A
YA

9

YSHIFT

9

9

UP/DOWN

CPU HANDSHAKE
YSH

9 U/D

FORMATO

A3
by Visula
Electronic copy (C)1996-2000

REVISIONE Nr. O.V.

PREPARATO: Andreuccetti

CONTROLLATO:

APPROVATO:

DATA:

DENOMINAZIONE:

Donnini

Cerofolini

23/03/99
Cod. Doc.:

SCAN CONVERTER 7250 9500766000 SB
Revisione:

DISEGNATO

A

Foglio1/1

A TERMINI DI LEGGE E' VIETATO RIPRODURRE O COMUNICARE A TERZI IL CONTENUTO DEL PRESENTE DISEGNO

; 6HUYLFH 0DQXDO 6&$1 &219(57(5 %2$5' The Scan Converter transforms the co-ordinates from Cartesian to Polar to properly address both the Average and the Memory Control boards. The X&Y COUNTER generates Cartesian addresses XY of the point to be acquired and these are then sent to the RHO CALCULATOR and THETA CALCULATOR blocks to calculate the angle and the distance of the pixel