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A B C D E
COMPAL CONFIDENTIAL
MODEL NAME : HAL31(Discrete) & HAL30(UMA)
1 1
PCB NO : LA-3001P
COMPAL P/N : 45140031L11 (For Discrete)
45140031L01 (For UMA)
Bali (DIS&UMA) Schematics Document
2
uFCPGA Mobile Yonah 2
Intel Calistoga + ICH7M
2006-04-14
REV : 0.5 (DELL: X03)
3 @ : Nopop Component 3
1@ : UMA Used Only
2@ : Bali with descrete Used Only
4 4
MB PCB
DELL CONFIDENTIAL/PROPRIETARY
45140031L11 (For Discrete)
Part Number Description
BOM NO: 45140031L01 (For UMA) Compal Electronics, Inc.
DA800004W0L PCB LA-3001P PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
REV0.4 MB
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Cover Sheet
PCB P/N: DA800004W0L NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Size Document Number Rev
0.4
LA-3001P
Date: Monday, April 17, 2006 Sheet 1 of 73
A B C D E
A B C D E
Compal confidential
Model : Bali Block Diagram
FAN Thermal Pentium-M CPU ITP Port Clock Generator
+FAN1_VOUT GUARDIAN II Yonah-2M (Merom Support) CK410M+
+VCCP page 7 +3V_RUN page6
1
EMC4000 uFCPGA CPU 1
page 16 +3V_SUS page 16 +VCCP (1.05V)
+VCC_CORE 478pin page 7,8,9
8X32M GDDR3 x2 H_A#(3..31) H_D#(0..63)
VGA CONN System Bus
+5VRUN page 20 FSB 533/667 MHz
Memory BUS DDRII-DIMM X2
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7 ,8
LVDS CONN G72M INTEL (DDR2) +1.8V_SUS 400/533 / 667MHz
page 17,18
+INV_PWR_SRC +1.22V_GFX_PCIE
+LCDVDD page 19 +VCC_GFX_CORE PCI-E 16X +0.9V_DDR_VTT
Calistoga +1.8V_SUS
page 44,45,46,47,48,49,50
TV CONN +1.5V_RUN PCI BUS
+3V_RUN 33MHz
+5VRUN page 20 +1.8V_SUS 1466pin BGA
SPDIF +VCCP (1.05V) IDSEL:AD17 IDSEL:AD16
For Integrity UMA Graphic (PIRQC,D#,GNT#1,REQ#1) (PIRQC#,GNT#4,REQ#4)
+3V_RUN
+2.5V_RUN page 10,11,12,13,14,15
PCI Express BUS R5C832 BCM4401KQL
+3V_RUN/ +1.5V_RUN 100MHz
+3V_SUS page 28 +3V_LAN page 26
On LCD Panel
2
DMI 2
+1.5V_RUN
Camera Mini Card 2 Mini Card 1 100MHz 5 in 1 Card 1394 RJ45
+5V_RUN
WLAN WWAN Reader CONN
page 28 page 29 page 27
+3V_RUN +3V_RUN
+1.5V_RUN page 29 +1.5V_RUN page 29
INTEL PCI Express BUS
USB[4]
+3V_RUN/ +1.5V_RUN 100MHz
USB[5] 48MHz
+3V_RUN ICH7-M
Azalia I/F
48MHz +3V_SUS
652pin BGA S-ATA 0/2 ATA100
ExpressCard CONN
+1.5V_RUN
ATA100
+VCCP
page 21,22,23,24 +3V_RUN
+3V_SUS
+1.5V_RUN IO/B
SPI
USB[3] AMP & INT.
Speaker
USB[6] USB[0] +5V_SUS IO/B
USB[2] LPC BUS Azalia Codec
Left USB[7] Right USB[1] +3V_RUN
3
33MHz
STAC9220 3
+3V_RUN
USB Ports X2 USB Ports X2 Bluetooth HeadPhone &
+VDDA IO/B
+5V_SUS page 25 +5V_SUS page 25 +3V_RUN page 25
MIC Jack
+3V_RUN IO/B
SMSC SIO SMSC KBC
SPI
BC BUS
ECE5011 MEC5004
+3.3V_ALW +RTC_CELL
+3.3V_ALW page 30
page 31
CD-ROM S-HDD M DC
Touch Pad Int.KBD
+5V_MOD +5V_HDD +3V_SUS
page 34 page 34 IO/B IO/B IO/B
1.8V/0.9V +VDD_CORE DC IN On I/O daughter Card
4
page 41 page 50 page 37 4
Power Sequence
VCORE (IMVP-6) 1.5V/1.05V BATT IN ST M25P80 RJ11
page 33 +3V_SUS
page 30 page 27 DELL CONFIDENTIAL/PROPRIETARY
page 42 page 40 page 38
Compal Electronics, Inc.
Power On/Off PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
Title
CHARGER 3V/5V/15V DC/DC Interface SW & LED BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Block Diagram
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 0.4
page 43 page 39 page 37 page 35 LA-3001P
Date: Monday, April 17, 2006 Sheet 2 of 73
A B C D E
5 4 3 2 1
PM TABLE USB PORT# DESTINATION
+5V_RUN 0
D JUSB1 (Ext Back Right Side) D
+3.3V_RUN
+2.5V_RUN
power 1 JUSB1 (Ext Back Right Side)
plane +1.8V_RUN
+5V_ALW +15V_SUS +1.5V_RUN 2 Blue Tooth
+3.3V_ALW +5V_SUS +1.22V_GFX_PCIE
+3.3V_SRC +0.9V_DDR_VTT 3 EXPRESS CARD
+3.3V_SUS +VCC_GFX_CORE
State
+1.8V_SUS +VCC_CORE
ICH7-M
4 CCD Camera
+1.05V_VCCP
S0 ON ON ON 5 WWAN
S1 ON ON ON 6 JUSB2 (Ext Back Left Side)
S3 ON ON OFF 7 JUSB2 (Ext Back Left Side)
C
S5 S4/AC ON OFF OFF 0 None C
S5 S4/AC don't exist OFF OFF OFF 1 None
SIO ECE5011 2 None
3 None
4 None
PCI TABLE
PCI DEVICE IDSEL REQ#/GNT# PIRQ
PCI EXPRESS DESTINATION
B
LAN AD16 REQ#3/GNT#3 IRQB B
Lane 1 MINI CARD-1 WWAN
R5C832 AD17 REQ#2/GNT#2 IRQC
IRQD Lane 2 MINI CARD-2 WLAN
Lane 3 None
Lane 4 EXPRESS CARD
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT Index and Config.
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 0.4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-3001P
Date: Monday, April 17, 2006 Sheet 3 of 73
5 4 3 2 1
5 4 3 2 1
ALWON
+5V_ALW
D
ADAPTER D
ALWON
+3.3V_ALW
ENAB_3VLAN
+3.3V_LAN
AUX_EN
BATTERY +PWR_SRC +3.3V_SRC SUS_ON
+3.3V_SUS
RUN_ON GUARDIAN II
+3.3V_RUN +2.5V_RUN
GFX_RUN_ON MAX8632/ +VCC_GFX_CORE
ISL88550
C C
(PU13) +1.22V_GFX_PCIE
Charger
SUS_ON
ADP3207 ISL6227 MAX8632
(PU7) (PU4) (PU5)
SUSPWROK_5V
RUNPWROK
RUN_ON
RUN_ON
RUN_ON
+5V_SUS
+VCC_CORE +1.5V_RUN +1.05V_VCCP +1.8V_SUS +0.9V_DDR_VTT
B B
AUDIO_AVDD_ON
HDDC_EN#
MODC_EN#
RUN_ON
SI3456 SI3456 SI4810 793475
RUN_ON
PL8 & PD8 SI4800
(IO/B) (IO/B) (Q28) (IO/B) (Q35)
+1.8V_RUN
+5V_HDD +5V_MOD +5V_RUN +VDDA +15V_SUS
A L57 A
(Option)
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
Power Rail
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
0.4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-3001P
Date: Monday, April 17, 2006 Sheet 4 of 73
5 4 3 2 1
5 4 3 2 1
+3.3V_SUS +3.3V_RUN
2.2K 2.2K 2.2K 2.2K
D C22 ICH_SMBCLK CLK_SCLK 16 D
2N7002
ICH7-M ICH_SMBDATA +3.3V_SUS CLK GEN.
B22 CLK_SDATA 17
2N7002
8 7 32 30 32 30 SMBUS Address [D2]
+3.3V_ALW
Express Card MINI WLAN Card MINI WWAN Card 197
DIMMA
10K 10K SMBUS Address [TBD] SMBUS Address [TBD] SMBUS Address [TBD] 195
SMBUS Address [A0]
10 CLK_SMB 8
DAT_SMB +3.3V_ALW GUARDIAN II 197
9 7 SMBUS Address [2F]
195 DIMMB
C C
SMBUS Address [A2]
+3.3V_ALW
8.2K 8.2K
SIO 112 SBAT_SMBCLK 6
111 SBAT_SMBDAT +3.3V_ALW 5 LVDS connector Inverter
SMBUS Address [58]
+3.3V_ALW
8.2K 8.2K
Macallan IV
B B
PBAT_SMBCLK 100
8 3
BATTERY
PBAT_SMBDAT +3.3V_ALW SMBUS Address [16]
7 4 CONN
100
9
10 CHARGER SMBUS Address [12]
A A
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
SMBUS TOPOLOGY
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
0.4
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-3001P
Date: Monday, April 17, 2006 Sheet 5 of 73
5 4 3 2 1
5 4 3 2 1
2 CLK_CPU_ITP 1
+3.3V_RUN R169 49.9_0402_1%~D
D Change to ECJCV50J106M 6.3V10UF 0805 X5R M H:0.85mm, wait CIS symbol.
2.2K_0402_5%~D
2.2K_0402_5%~D
2 CLK_CPU_ITP# 1
1
1
1 R174 49.9_0402_1%~D
2N7002
R589
R575
CLK_MCH_BCLK 2 1
G 2 3 S +3.3V_RUN +CK_VDD_MAIN place Decoupling as closed physically possible to each VDD oins R159 49.9_0402_1%~D
L48 CLK_MCH_BCLK# 2 1
1 2 R163 49.9_0402_1%~D
2
2
1 1 1 1 1 1 CLK_CPU_BCLK 2 1
ICH_SMBDATA 1 CLK_SDATA BLM21PG600SN1D_0805~D C579 C554 C200 C575 C570 C574 R147 49.9_0402_1%~D
D
S
<23,29,36> ICH_SMBDATA 3 CLK_SDATA <17,18> 1
C530 CLK_CPU_BCLK# 2 1
Q51 10U_0805_10V4Z~D 0.1U_0402_16V4Z~D 0.1U_0402_16V4Z~D 0.1U_0402_16V4Z~D 0.1U_0402_16V4Z~D 0.1U_0402_16V4Z~D R155 49.9_0402_1%~D
2N7002_SOT23~D 2 2 2 2 2 2 CLK_MCH_3GPLL 1 2
G
2
0.1U_0402_16V4Z~D 2 +CK_VDD_MAIN2 R208 49.9_0402_1%~D
+3.3V_RUN L44 CLK_MCH_3GPLL# 1 2
D R218 49.9_0402_1%~D D
1 2
1 1 1 CLK_PCIE_SATA 1 2
2
BLM21PG600SN1D_0805~D C542 C541 C540 R221 49.9_0402_1%~D
G
CLK_PCIE_SATA# 1 2
ICH_SMBCLK 1 3 CLK_SCLK 10U_0805_10V4Z~D 0.1U_0402_16V4Z~D 0.1U_0402_16V4Z~D R222 49.9_0402_1%~D
<23,29,36> ICH_SMBCLK CLK_SCLK <17,18> 2 2 2 CLK_PCIE_ICH 1 2
D
S
Q50 R223 49.9_0402_1%~D
2N7002_SOT23~D R470 CLK_PCIE_ICH# 1 Place near each pin 2
2.2_0603_5%~D R224 49.9_0402_1%~D
Placec these caps closed to CK410M 1 2 +CK_VDD_A CLK_PCIE_MINI2 1 W>40 mil 2
R164 49.9_0402_1%~D
+CK_VDD_A +CK_VDD_48 +CK_VDD_REF CLK_PCIE_MINI2# 1