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5 4 3 2 1




D
ZRS REV : A01
D




@ : Nopop Component
[email protected] : ZUMA Used Only
[email protected] : Riker Used Only
[email protected] : ZRS with discrete Used Only
[email protected] : ZUMA & Zanzibar Used Only
C
with BCM4401E w/o Docking and Smart card C




[email protected] : Rikers & Suva Used Only
with BCM5752/Docking/Smart Card
[email protected] : Suva Used Only
[email protected] : Rikers/Zanzibar/ZUMA Used Only
Config. TABLE

Project Config.
B B


ZUMA [email protected] + [email protected] [email protected]

Zanzibar [email protected] + [email protected] + [email protected]

Suva [email protected] + [email protected] + [email protected]

Rikers [email protected] + [email protected] + [email protected] + [email protected]



Yonah Schematics with Capture CIS and Function Field

A
uFCPGA Yonah A


12/13/2005
REV : 2.0 DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
Cover Sheet
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
2.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-2881P
Date: Tuesday, December 13, 2005 Sheet 1 of 62
5 4 3 2 1
5 4 3 2 1




Compal confidential Clock Generator Block Diagram
CK410M+
Yonah page 6

Thermal
D
GUARDIAN II SMBus uFCPGA CPU Fan Control
D



EMC4000 page 7,8,9 page 16
+3.3V_SUS page 16


CRT CONN. HA#(3..31) System Bus HD#(0..63)
& TV-OUT 533 / 667 MHz
page 20 Memory
VGA Calistoga BUS(DDRII)
Board GMCH-M 1.8V 533 / 667 MHz
DDRII-SODIMM X2
PCI-E 16X BANK 0, 1, 2, 3 page 17,18
VGA CONN. 1466 FC-BGA
page 19
Intel 945PM/945GM
page 10,11,12,13,14,15

C DC IN C


page 43

Docking Docking LOM DMI
1.5V MDC
Port Buffer 4401E 100MHz page 29
page 36 page 35 page 31 BATT IN/+2.5V
page 44
PCI BUS Azalia
3.3V 33MHz

PCIe BUS ICH7-M
IDSEL:AD17
(PIRQA/B#,GNT#2,REQ#2) 652 BGA 3.3V or 5V SATA SATA 3.3V/5V/15V
Express MINI LOM Intel 82801GBM page 45
Memory Card & ATA100 Azalia CODEC
Card Card BCM5752
1394 Controller page 22,23,24,25
HDD STAC9200
page 34 page 34 page 31 page 26 page 27
RICOH R5C832 1.5V/1.05V(+VCCP)
USB5
page 33
CDROM page 46
B
page 26 B
USB3
USB1 RJ45 with LPC BUS
5 in 1 CONN. 1394 CONN. Giga 3.3V 33MHz AMP &
Phone Jack Subwoofer 1.8V / 0.9V
page33 page33 Magnetic
page 32 page 28 page 29 page 47
48MHz / 480Mb

USBPORT 0 Ext. USB
USB0
GPIO IMVP6 VCORE
USBPORT 1 Ext. USB
MEC5004 ECE5018 3 Phase page 48
SPI USB2.0 USBPORT 2
LPC to X-BUS Super I/O Ext. USB
SMBus page 38 page 37 USBPORT 3 Ext. USB
Media/Touch Pad IO PORT CHARGER
USBPORT 4
ST M25P80 PS2 USB2 Ext. USB
CONN. page39 +3.3V_ALW page 37
USBPORT 5 page 49
SIO ECE5018
Touch Pad Int.KBD Smart Card
OZ77C6 USBPORT 6 Ext. USB
page 39 page 39
A Multi-media page 34
page 30 USBPORT 7 Dock
A


Board LED Controller
USB4
PAC9532 41 Bluetooth DELL CONFIDENTIAL/PROPRIETARY
page
page 28
Slot
Rikers Used Only Compal Electronics, Inc.
Title
USB PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT Block Diagram
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
2.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-2881P
Date: Tuesday, December 13, 2005 Sheet 2 of 62
5 4 3 2 1
5 4 3 2 1




D
PM TABLE USB PORT# Description D




+5V_RUN
0 SUPER I/O ECE5018
power +3.3V_RUN
plane +15V_SUS +2.5V_RUN 1 JUSB_R (Ext Back Right Bottom)
+5V_SUS +1.8V_RUN
+5V_ALW +3.3V_SUS +0.9V_DDR_VTT
State 2 JUSB_S (Ext Side Bottom)
+3.3V_ALW +1.8V_SUS +VCC_CORE
+3.3V_SRC +1.05V_VCCP 3 JUSB_R (Ext Back Right Top)
S0 ON ON ON
ICH7-M 4 JUSB_L (Ext Back Left Top)
S1 ON ON ON
5 JUSB_S (Ext Side Top)
S3 ON ON OFF
6 JUSB_L (Ext Back Left Bottom)
S5 S4/AC ON OFF OFF
C 7 DOCKING C


S5 S4/AC don't exist OFF OFF OFF
0 ICH7-M

1 MINI CARD WLAN
SIO
2 SMART CARD
ECE5018
3 EXPRESS CARD

4 BLUE TOOTH




B
PCI TABLE B



PCI EXPRESS DESTINATION
PCI DEVICE IDSEL REQ#/GNT# PIRQ
Lane 1 No
LAN AD16 REQ#3/GNT#3 IRQB Lane 2 MINI CARD WLAN

Dock AD24 REQ#0/GNT#0 IRQA Lane 3 GIGA LAN

Lane 4 EXPRESS CARD
R5C832 AD17 REQ#2/GNT#2 IRQC,D




A A




DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
Index and Config.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
2.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-2881P
Date: Tuesday, December 13, 2005 Sheet 3 of 62
5 4 3 2 1
5 4 3 2 1




ALWON
+5V_ALW 5752 Only
D
ADAPTER REGCTL_PNP12
D

ALWON
+3.3V_ALW MMJT9435T1G +1.2V_1.8V_LAN
( Q102 )
+PWR_SRC
REGCTL_PNP25
ENAB_3VLAN
+3.3V_LAN BCP69
+2.5V_LAN
+3.3V_ALW ( Q103 )
BATTERY +3.3V_SRC SUS_ON
+3.3V_SUS

RUN_ON Guardian II
+3.3V_RUN +2.5V_RUN



C C



Charger


SUS_ON ISL6220 MAX8632
ISL6227
(PU8) (PU5) (PU6)




SUSPWROK_5V
RUN_ON




RUNPWROK




RUN_ON




RUN_ON
+5V_SUS

+VCC_CORE +1.5V_RUN +1.05V_VCCP +1.8V_SUS +0.9V_DDR_VTT

B B
AUDIO_AVDD_ON
HDDC_EN#




MODC_EN#




RUN_ON




SI3456 SI3456 SI4810 793475
(Q22) (Q24) (Q61) (U12) PL8 & PD8




+5V_HDD +5V_MOD +5V_RUN +VDDA +15V_SUS



A
PJP20 L31 A

( Option ) (Option)

DELL CONFIDENTIAL/PROPRIETARY
PJP19
( Option ) Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
Power Rail
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
2.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-2881P
Date: Tuesday, December 13, 2005 Sheet 4 of 62
5 4 3 2 1
5 4 3 2 1


+3.3V_SUS +3.3V_RUN


2.2K 2.2K 2.2K 2.2K


C22 ICH_SMBCLK CLK_SCLK 16
2N7002
D
ICH7-M ICH_SMBDATA +3.3V_SUS CLK GEN. D

B22 CLK_SDATA 17
2N7002
8 7 C7 C8 32 30 SMBUS Address [D2]
+3.3V_ALW
Express Card 5752M MINI WLAN Card 197
LOM
SMBUS Address [TBD] SMBUS Address [C8] SMBUS Address [TBD]
DIMMA
2.2K 2.2K 195
SMBUS Address [A0]
10 CLK_SMB 8

DAT_SMB +3.3V_ALW GUARDIAN 197
9 7 SMBUS Address [5E]
+5V_ALW 195 DIMMB
SMBUS Address [A4]
C 10K 10K C




6 DOCK_SMB_CLK 39

DOCK_SMB_DAT +5V_ALW DOCK SMBUS Address [C4, 72, 70, 48]
5 40
SIO
+3.3V_ALW


2.2K 2.2K


112 SBAT_SMBCLK 6

Macallan IV 111 SBAT_SMBDAT +3.3V_ALW 5 LVDS connector Inverter
SMBUS Address [58]

B +3.3V_ALW B
10
Discrete
8 SMBUS Address [98]
2.2K 2.2K Graphic

PBAT_SMBCLK 100
8 3
BATTERY
PBAT_SMBDAT +3V_ALW SMBUS Address [16]
7 4 CONN
100
9
10 CHARGER SMBUS Address [12]



A 23 A


22
LED PWM SMBUS Address [C0]

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
SMBUS TOPOLOGY
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
2.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-2881P
Date: Tuesday, December 13, 2005 Sheet 5 of 62
5 4 3 2 1
5 4 3 2 1


+3.3V_RUN
D




2.2K_0402_5%~D




2.2K_0402_5%~D
1




1
1 2N7002




R232




R233
CLK_CPU_ITP 2 1
G 2 3 S +3.3V_RUN +CK_VDD_MAIN R254 49.9_0402_1%~D
L48 CLK_CPU_ITP# 2 1
1 2 R259 49.9_0402_1%~D




2




2
1 1 1 1 1 1 CLK_MCH_BCLK 2 1
ICH_SMBDATA CLK_SDATA BLM21PG600SN1D_0805~D C499 C504 C506 C512 C520 R238 49.9_0402_1%~D




D


S
<23,30,34> ICH_SMBDATA 1 3 CLK_SDATA <17,18> 1
C509 C699 CLK_MCH_BCLK# 2 1
Q51 10U_0805_10V4Z~D 0.1U_0402_16V4Z~D 0.1U_0402_16V4Z~D 0.1U_0402_16V4Z~D 0.1U_0402_16V4Z~D 0.1U_0402_16V4Z~D R247 49.9_0402_1%~D
2N7002_SOT23~D 2 2 2 2 2 2 CLK_CPU_BCLK 2 1




G
2
0.1U_0402_16V4Z~D 2 +CK_VDD_MAIN2 R223 49.9_0402_1%~D
+3.3V_RUN L51 CLK_CPU_BCLK# 2 1
D R230 49.9_0402_1%~D D
1 2
1 1 CLK_MCH_3GPLL 1 2




2
BLM21PG600SN1D_0805~D C534 C530 C531 R292 49.9_0402_1%~D




G
CLK_MCH_3GPLL# 1 2
ICH_SMBCLK 1 3 CLK_SCLK 10U_0805_10V4Z~D 0.1U_0402_16V4Z~D 0.1U_0402_16V4Z~D R291 49.9_0402_1%~D
<23,30,34> ICH_SMBCLK CLK_SCLK <17,18> 2 2 CLK_PCIE_SATA 1 2




D


S
Q52 R287 49.9_0402_1%~D
2N7002_SOT23~D R556 Place near each pin CLK_PCIE_SATA# 1 2
2.2_0603_5%~D R288 49.9_0402_1%~D
1 2 +CK_VDD_A W>40 mil CLK_PCIE_ICH 1 2
R290 49.9_0402_1%~D
+CK_VDD_A +CK_VDD_48 +CK_VDD_REF CLK_PCIE_ICH# 1 2
R289 49.9_0402_1%~D
1 1 1 1 1
Place near CK410+




4.7U_0805_10V4Z~D
C508




0.047U_0402_10V7K~D
C511



4.7U_0805_10V4Z~D
C532




0.047U_0402_10V7K~D
C525