Text preview for : Compal_LA-5661P.pdf part of Compal Compal_LA-5661P Compal Compal_LA-5661P.pdf
Back to : Compal_LA-5661P.pdf | Home
A B C D E
1 1
Compal Confidential
2
NTV00 2
LA-5661 Rev 1.0 Schematics
3 Intel PineView Processor/ Tiger point 3
2010-01-07 REV : 1.0
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/11/10 Deciphered Date 2010/11/10 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NTV00 LA5661P M/B
Date: Thursday, January 07, 2010 Sheet 1 of 35
A B C D E
A B C D E
Compal Confidential
Model Name : NTV00
File Name : LA-5661P
1
Fan Control Thermal Sensor Clock Generator 1
page 23
EMC1402 SLG8SP556VTR
Intel Pineview-M page 5 page 8
CRT Conn.
page 10
(22x22mm) Memory BUS(DDRII) 200pin DDRII-SO-DIMM
page 7
LCD Conn. LVDS
page 9 ONE CHANNEL 1.8V DDRII 667
page 4,5,6
2
DMI x 2 USB Conn X3 2
PCIeMini Card USB port 0,1,4
WiMax page 16
USB port 6 PCIeMini Card USB USB
page 15
3G 5V 480MHz 5V 480MHz BT conn
PCIeMini Card USB port 5
USB port 2
PCIe 1x [2,4]
WLAN
PCIe port 2
page 15
1.5V 2.5GHz(250MB/s)
Tiger Pointer page 17
page 15
PCIe 1x
(17x17mm)
RJ45 RTL8103EL 10/100M 1.5V 2.5GHz(250MB/s)
page 20
SATA port 0 SATA HDD
PCIe port 3 page 20 5V 1.5GHz(150MB/s)
page 17
USB page 11,12,13,14
3
Card Reader 3
RTS5159 2IN1 5V 480MHz
RTC CKT.
page 13 USB port 3 page 21 3.3V 24.576MHz/48Mhz
HD Audio
3.3V 33 MHz
LPC BUS
DC/DC Interface CKT. HDA Codec
page 25 ALC272-GR
page 18
Debug Port ENE KB926 D3
Power Circuit DC/DC page 23 page 22
AMP.
page 27~34
MIC CONN HP CONN TPA6017
page 18 page 18 page 19
Touch Pad Int.KBD SPI ROM
page 24 page 23 page 23
4 SPK CONN 4
page 19
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/11/10 Deciphered Date 2010/11/10 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagrams
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NTV00 LA5661P M/B
Date: Thursday, January 07, 2010 Sheet 2 of 35
A B C D E
A B C D E
Voltage Rails
1 SIGNAL 1
STATE SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Power Plane Description S1 S3 S5 G3
Full ON HIGH HIGH HIGH ON ON ON ON
VIN Adapter power supply (19V) ON ON ON OFF
B+ AC or battery power rail for power circuit. ON ON ON ON S1(Power On Suspend) HIGH HIGH HIGH ON ON ON LOW
+CPU_CORE Core voltage for CPU ON OFF OFF OFF
S3 (Suspend to RAM) LOW HIGH HIGH ON ON OFF OFF
+0.89VS 0.89VS GFX support voltage ON OFF OFF OFF
+0.9VS 0.9V switched power rail for DDR terminator ON OFF OFF OFF S4 (Suspend to Disk) LOW LOW HIGH ON OFF OFF OFF
+1.05VS VCCP switched power rail ON OFF OFF OFF
S5 (Soft OFF) LOW LOW LOW ON OFF OFF OFF
+1.5VS 1.5V switched power rail ON OFF OFF OFF
+1.8V 1.8V power rail for DDR ON ON OFF OFF
+1.8VS 1.8VS switched power rail ON OFF OFF OFF
+3VALW 3.3V always on power rail ON ON ON OFF
+3V_SB 3.3V power rail for LAN ON ON OFF OFF
BTO Option Table
+3V_LAN 3.3V power rail for LAN ON ON OFF OFF
2 2
+RTCVCC RTC power ON ON ON ON
+3VS 3.3V switched power rail ON OFF OFF OFF Function Mini PCI-E SLOT STAR
+5VALW 5V always on power rail ON ON ON OFF
+5V_SB 5V power rail for SB ON ON OFF OFF
description
+5VS 5V switched power rail ON OFF OFF OFF explain Wi-Fi WiMax 3G POWER SAVING
+VSB VSB always on power rail ON ON ON OFF
BTO WLAN@ WIMAX@ 3G@ STAR@
Function
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
description
explain
BTO
3 3
EC SM Bus1 address EC SM Bus2 address
Device Address Device Address
Smart Battery 0001 011X b EMC1402 1001 010X b
Tiger point SM Bus address
Device Address
Clock Generator 1101 001Xb
(SLG8SP556VTR)
DDR DIMMA 1010 000Xb
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/11/10 Deciphered Date 2010/11/10 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NTV00 LA5661P M/B
Date: Thursday, January 07, 2010 Sheet 3 of 35
A B C D E
5 4 3 2 1
7 DDR_A_DQS#[0..7]
PINEVIEW_M
7 DDR_A_D[0..63]
U71B
REV = 1.1
7 DDR_A_DM[0..7]
DDR_A_MA0 AH19 AD3 DDR_A_DQS0
7 DDR_A_DQS[0..7] DDR_A_MA1 DDR_A_MA_0 DDR_A_DQS_0 DDR_A_DQS#0
AJ18 DDR_A_MA_1 DDR_A_DQS#_0 AD2
DDR_A_MA2 AK18 AD4 DDR_A_DM0
7 DDR_A_MA[0..14] DDR_A_MA3 DDR_A_MA_2 DDR_A_DM_0
AK16 DDR_A_MA_3
DDR_A_MA4 AJ14 AC4 DDR_A_D0
DDR_A_MA5 DDR_A_MA_4 DDR_A_DQ_0 DDR_A_D1
AH14 DDR_A_MA_5 DDR_A_DQ_1 AC1
PINEVIEW_M DDR_A_MA6 AK14 AF4 DDR_A_D2
U71A DDR_A_MA7 DDR_A_MA_6 DDR_A_DQ_2 DDR_A_D3
AJ12 DDR_A_MA_7 DDR_A_DQ_3 AG2
DDR_A_MA8 AH13 AB2 DDR_A_D4
D DDR_A_MA9 DDR_A_MA_8 DDR_A_DQ_4 DDR_A_D5 D
REV = 1.1 AK12
DDR_A_MA_9 DDR_A_DQ_5
AB3
DMI_RXP0_C F3 G2 DDR_A_MA10 AK20 AE2 DDR_A_D6
DMI_RXP_0 DMI_TXP_0 DMI_TXP0 12 DDR_A_MA_10 DDR_A_DQ_6
DMI_RXN0_C F2 G1 DDR_A_MA11 AH12 AE3 DDR_A_D7
DMI_RXN_0 DMI_TXN_0 DMI_TXN0 12 DDR_A_MA_11 DDR_A_DQ_7
DMI_RXP1_C H4 H3 DMI_TXP1 12 DDR_A_MA12 AJ11
DMI_RXN1_C DMI_RXP_1 DMI_TXP_1 DDR_A_MA13 DDR_A_MA_12 DDR_A_DQS1
G3 DMI_RXN_1 DMI_TXN_1 J2 DMI_TXN1 12 AJ24 DDR_A_MA_13 DDR_A_DQS_1 AB8
DDR_A_MA14 AJ10 AD7 DDR_A_DQS#1
DMI DDR_A_MA_14 DDR_A_DQS#_1 DDR_A_DM1
DDR_A_DM_1 AA9
DDR_A_WE# AK22 AB6 DDR_A_D8
7 DDR_A_WE# DDR_A_WE# DDR_A_DQ_8
DDR_A_CAS# AJ22 AB7 DDR_A_D9
7 DDR_A_CAS# DDR_A_RAS# DDR_A_CAS# DDR_A_DQ_9 DDR_A_D10
8 CLK_CPU_EXP# N7 EXP_CLKINN EXP_RCOMPO L10 7 DDR_A_RAS# AK21 DDR_A_RAS# DDR_A_DQ_10 AE5
N6 L9 DMI_IRCOMP R162 AG5 DDR_A_D11
8 CLK_CPU_EXP EXP_CLKINP EXP_ICOMPI DDR_A_DQ_11
L8 R378 49.9_0402_1% DDR_A_BS0 AJ20 AA5 DDR_A_D12
EXP_RBIAS 7 DDR_A_BS0 DDR_A_BS_0 DDR_A_DQ_12
R10 750_0402_1% DDR_A_BS1 AH20 AB5 DDR_A_D13
EXP_TCLKINN 7 DDR_A_BS1 DDR_A_BS2 DDR_A_BS_1 DDR_A_DQ_13 DDR_A_D14
R9 EXP_TCLKINP RSVD_TP N11 T38 7 DDR_A_BS2 AK11 DDR_A_BS_2 DDR_A_DQ_14 AB9
N10 P11 Pull-down must be placed AD6 DDR_A_D15
RSVD RSVD_TP T39 DDR_A_DQ_15
N9
RSVD within 500 mils from Pineview-M AD8 DDR_A_DQS2
DDR_CS0# DDR_A_DQS_2 DDR_A_DQS#2
7 DDR_CS0# AH22 DDR_A_CS#_0 DDR_A_DQS#_2 AD10
DDR_CS1# AK25 AE8 DDR_A_DM2
7 DDR_CS1# DDR_A_CS#_1 DDR_A_DM_2
K2 RSVD RSVD K3 AJ21 DDR_A_CS#_2
J1 L2 AJ25 AG8 DDR_A_D16
RSVD RSVD DDR_A_CS#_3 DDR_A_DQ_16 DDR_A_D17
M4 RSVD RSVD M2 DDR_A_DQ_17 AG7
L3 N2 DDR_CKE0 AH10 AF10 DDR_A_D18
RSVD RSVD 7 DDR_CKE0 DDR_A_CKE_0 DDR_A_DQ_18
DDR_CKE1 AH9 AG11 DDR_A_D19
7 DDR_CKE1 DDR_A_CKE_1 DDR_A_DQ_19 DDR_A_D20
AK10 DDR_A_CKE_2 DDR_A_DQ_20 AF7
1 OF 6 DDR_A_D21
AJ8 AF8
PINEVIEW-M_FCBGA8559 DDR_A_CKE_3 DDR_A_DQ_21
AD11 DDR_A_D22
M_ODT0 DDR_A_DQ_22 DDR_A_D23
7 M_ODT0 AK24 AE10
M_ODT1 DDR_A_ODT_0 DDR_A_DQ_23
7 M_ODT1 AH26 DDR_A_ODT_1
AH24 AK5 DDR_A_DQS3
DDR_A_ODT_2 DDR_A_DQS_3 DDR_A_DQS#3
AK27 DDR_A_ODT_3 DDR_A_DQS#_3 AK3
C DDR_A_DM3 C
AJ3
DDR_A_DM_3
C253 DMI_RXP0_C DDR_A_D24
12 DMI_RXP0 1 2 DDR_A_DQ_24 AH1
0.1U_0402_10V7K M_CLK_DDR0 AG15 AJ2 DDR_A_D25
7 M_CLK_DDR0 M_CLK_DDR#0 DDR_A_CK_0 DDR_A_DQ_25 DDR_A_D26
7 M_CLK_DDR#0 AF15 DDR_A_CK_0# DDR_A_DQ_26 AK6
C254 DMI_RXN0_C M_CLK_DDR1 DDR_A_D27
12 DMI_RXN0 1 2 7 M_CLK_DDR1 AD13 AJ7
M_CLK_DDR#1 DDR_A_CK_1 DDR_A_DQ_27 DDR_A_D28
0.1U_0402_10V7K 7 M_CLK_DDR#1 AC13 DDR_A_CK_1# DDR_A_DQ_28 AF3
AH2 DDR_A_D29
C255 DMI_RXP1_C DDR_A_DQ_29 DDR_A_D30
12 DMI_RXP1 1 2 DDR_A_DQ_30 AL5
0.1U_0402_10V7K AC15 AJ6 DDR_A_D31
DDR_A_CK_3 DDR_A_DQ_31
C256 AD15 DDR_A_CK_3#
1 2 DMI_RXN1_C AF13 AG22 DDR_A_DQS4
12 DMI_RXN1 DDR_A_CK_4 DDR_A_DQS_4
0.1U_0402_10V7K AG13 AG21 DDR_A_DQS#4
DDR_A_CK_4# DDR_A_DQS#_4 DDR_A_DM4
AD19
DDR_A_DM_4
Middle at CPU and SB +1.8V AE19 DDR_A_D32
DDR_A_DQ_32 DDR_A_D33
AD17 RSVD DDR_A_DQ_33 AG19
AC17 AF22 DDR_A_D34
RSVD DDR_A_DQ_34
1
AB15 AD22 DDR_A_D35
+1.8V R369 RSVD DDR_A_DQ_35 DDR_A_D36
AB17 RSVD DDR_A_DQ_36 AG17
D15 10K_0402_5% AF19 DDR_A_D37
XDP_TDI XDP_TDO DDR_A_DQ_37 DDR_A_D38
1 6 AE21
I/O1 I/O4 DDR_A_DQ_38 DDR_A_D39
AD21
2
DDR_A_DQ_39
2 REF1 REF2 5 +3VS
AE26 DDR_A_DQS5
DDR_A_DQS_5