Text preview for : Compal_LA-3262P.pdf part of Compal Compal_LA-3262P Compal Compal_LA-3262P.pdf



Back to : Compal_LA-3262P.pdf | Home

A B C D E




1 1




2



Compal confidential 2




Schematics Document
Mobile Merom uFCPGA with Intel
3
Crestline + ICH8-M core logic 3




IBT00 LA-3262P Discrete VGA (M64)
2007-08-02 REV:1A




4 4




Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/09/25 Deciphered Date 2006/09/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA3262P_DIS__M64 1A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, August 21, 2007 Sheet 1 of 57
A B C D E
A B C D E




Compal confidential
File Name : LA-3262P
Chimay Discrete
Thermal Sensor Mobile Merom
1 1
ADM1032ARMZ
uFCPGA-478 CPU
P4

P4, 5, 6 CK505
Fan conn Clock Generator
P4 H_A#(3..35)
CRT & TV OUT FSB ICS 9LPRS355
H_D#(0..63) 667/800MHz 1.05V
P16
DDR2 667MHz 1.8V DDR2-SO-DIMM X2 P15
BANK 0, 1, 2, 3 P13, 14

LVDS Panel Interface Intel Crestline MCH
P17 Dual Channel
ATI M64S PCIE (PM) FCBGA 1299
USB conn x2
P33
DVI (Docking) P18, 19, 20, 21, 22, 23 P7, 8, 9, 10, 11, 12 (Docking)
P33
2 2
FingerPrinter AES1610
DMI X4 C-Link USBx1 P34 daughter board

USB conn x3
USB2.0
PCI-E BUS P34

Intel ICH8-M Azalia
BT Conn
P28
CardBus Controller & PCMCIA conn PCI mBGA-676 SATA Master
10/100/1000 LAN Mini-Card PATA Slave
Mini-Card WWAN
P24, 25, 26, 27
Intel 82566MM P25 Ricoh R5C853 P25
P29 P31 MDC
P38
SPI Audio CKT
AD1981HD P32 AMP & Audio Jack
Slot 0/Smart Card MAX9710
RJ45/11 CONN P33
3 P30 3

SPI ROM & Debug port SATA HDD Connector
1394 port 6in1 Slot
P28 P33
P34 16Mb*2 or 32Mb*1 Docking CONN.
LED P36
P30
*RJ-45(LED*2)
Multi-bay II Connector *RJ-11(Pass Through)
daughter board P28 *CRT
LPC BUS *COMPOSITE Video Out
RTC CKT. *TVOUT
P19 *DVI
*LINE IN
*LINE OUT
TPM1.2 SMSC Super I/O *PCI-E x2
Power OK CKT. SMSC KBC 1070 *Serial Port
P35
SLB9635TT LPC47N217 P35 *Parallel Port
P36 P37 *PS/2 x2
*USB x2
4 Int.KBD COM1 LPT *DC JACK 4
Power On/Off CKT. Touch Pad CONN. ( Docking ) ( Docking )
P33 P33
P32 P38 P38


TrackPoint CONN. Security Classification Compal Secret Data Compal Electronics, Inc.
P38 2006/09/25 2006/09/25 Title
DC/DC Interface CKT. Issued Date Deciphered Date
Block Diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P34 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA3262P_DIS__M64 1A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, August 21, 2007 Sheet 2 of 57
A B C D E
A




O MEANS ON X MEANS OFF
Voltage Rails IRQ Device

+5VS 0 System Timer
+3VS
power 1 Keyboard
plane +2.5VS
+1.8VS 2 N/A
+B
+1.5VS
LDO3 +5VALW +1.8V +3VM
CLOCK 3 Serial port (COM2),LAN/Modem
+1.25VS
LDO5 +3VALW +5V +1.05VM
+VGA_CORE 4 Serial port (COM1)
+0.9V
+CPU_CORE +1.25VM
State 5 Audio/VGA
+VCCP
6 Floppy

7 Parallel port
S0 O O O O O O
8 System CMOS/Real-time clock

S3/M1
O O O O O 9 Microsoft ACPI
X
10 N/A,Momem,LAN
S3
O O O X O O
11 Mass strorage control/ PCI simple communication control
S5 S4/AC
O O X X O O 12 synactic PS2 port GlidePAD

S5 S4/ Battery only
O 13 Numeric Data Process
X X X X X
14 Primary IDE interface,HDD
S5 S4/AC & Battery
don't exist X X X X X X
15 Secondary IDE innterface,CD-ROM

16 Mobile Intel Crestline Express Chipset Family
Microsoft UAA Bus Driver for High Definition Audio
Intel 82801H (ICH8 Family) PCI Express Root Port -27D0
PCI Devices
1
Broadcom NetXtreme Gigabit Ethernet 1




EXTERNAL IDSEL# REQ/GNT# PIRQ
17 Intel 82801H (ICH8 Family)PCI Express Root Port - 27D2
CARD BUS & 1394 AD22 2 C,D,E,G Broadcom 802.11b/g WLAN
Intel 82801H (ICH8 Family)USB Universal Host Controll
Intel 82801H (ICH8 Family)USB Universal Host Controll
DMA Channel Device 18
Ricoh R5C853 Cardbus Control
DMA0 MODEM / LAN Ricoh R5C853 Integrates FlashMedia Control
DMA1 ECP Ricoh R5C853 Gemcore based SmartCard Control
DMA2 FLOPPY DISK 19 Intel 82801H (ICH8 Family)PCI Express Root Port - 27D6
DMA3 AUDIO Intel 82801H (ICH8 Family)USB Universal Host Controll
DMA4 (Cascade)
DMA5 Unused 20 Intel 82801H (ICH8 Family)USB Universal Host Controll

DMA6 Unused Intel 82801H (ICH8 Family)USB2 Enhanced Host Controll

DMA7 Unused 21 Intel 82801H (ICH8 Family)USB Universal Host Controll
22
SDA Standard Compliant SD Host Controller
USB PORT# Destination
23 HP Mobile Data Protection Sensor
0 Walk-up0 (Right side)

1 Fingerprint

2 Reserve

3 WWAN

4 Walk-up1 (Left Side)

5 Walk-up2 (Left Side)

6 Bluetooth

7 Reserve Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/09/25 Deciphered Date 2006/09/25 Title

8 Docking THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA3262P_DIS__M64 1A
9 Docking MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, August 21, 2007 Sheet 3 of 57
A
5 4 3 2 1



layout note: Change R237 to 649 ohm if using XTP to ITP adapter
XDP Connector +3VS

R243
XDP_DBRESET#_R 1 2 @ 1K_0402_5%
+VCCP


JP51 XDP_TDI R143 1 2 54.9_0402_1%
1 GND0 GND1 2
XDP_BPM#5 3 4 XDP_TMS R236 1 2 54.9_0402_1%
XDP_BPM#4 OBSFN_A0 OBSFN_C0
5 OBSFN_A1 OBSFN_C1 6
7 8 XDP_TDO R1670 1 2 54.9_0402_1%
D XDP_BPM#3 GND2 GND3 D
9 OBSDATA_A0 OBSDATA_C0 10
XDP_BPM#2 11 12 XDP_BPM#5 R241 1 2 54.9_0402_1%
OBSDATA_A1 OBSDATA_C1
13 GND4 GND5 14
XDP_BPM#1 15 16 XDP_HOOK1 R1430 1 2 @ 54.9_0402_1%
XDP_BPM#0 OBSDATA_A2 OBSDATA_C2
17 OBSDATA_A3 OBSDATA_C3 18
19 GND6 GND7 20
21 22 XDP_TRST# R237 1 2 51_0402_1%
OBSFN_B0 OBSFN_D0
<7> H_A#[3..16] 23 OBSFN_B1 OBSFN_D1 24
JP12A 25 26 XDP_TCK R239 1 2 54.9_0402_1%
H_A#3 H_ADS# GND8 GND9
J4 A[3]# ADS# H1 H_ADS# <7> 27 OBSDATA_B0 OBSDATA_D0 28




ADDR GROUP 0
H_A#4 L5 E2 H_BNR# 29 30
A[4]# BNR# H_BNR# <7> OBSDATA_B1 OBSDATA_D1
H_A#5 L4 G5 H_BPRI# 31 32
A[5]# BPRI# H_BPRI# <7> GND10 GND11
H_A#6 K5 33 34
H_A#7 A[6]# H_DEFER# OBSDATA_B2 OBSDATA_D2
M3 A[7]# DEFER# H5 H_DEFER# <7> 35 OBSDATA_B3 OBSDATA_D3 36
H_A#8 N2 F21 H_DRDY# 37 38
A[8]# DRDY# H_DRDY# <7> GND12 GND13
H_A#9 J1 E1 H_DBSY# <5> H_PWRGOOD_R H_PWRGOOD_R 39 40 CLK_CPU_XDP CLK_CPU_XDP <15>
A[9]# DBSY# H_DBSY# <7> PWRGOOD/HOOK0 ITPCLK/HOOK4
H_A#10 N3 XDP_HOOK1 41 42 CLK_CPU_XDP# CLK_CPU_XDP# <15>
H_A#11 A[10]# H_BR0# R172 HOOK1 ITPCLK#/HOOK5 1K_0402_1%
P5 A[11]# BR0# F1 H_BR0# <7> +VCCP 43 VCC_OBS_AB VCC_OBS_CD 44 +VCCP
H_A#12 P2 56_0402_5% 45 46 H_RESET#_R 1 R1431 2 H_RESET#
A[12]# HOOK2 RESET#/HOOK6




CONTROL
H_A#13 L2 D20 H_IERR# 2 1 1 47 48 XDP_DBRESET#_R 2 1 XDP_DBRESET#
H_A#14 A[13]# IERR# H_INIT# +VCCP HOOK3 DBR#/HOOK7 200_0402_1%
P4 A[14]# INIT# B3 H_INIT# <25> 49 GND14 GND15 50
H_A#15 P1 C1099 51 52 XDP_TDO R1432
H_A#16 A[15]# H_LOCK# SDA TD0 XDP_TRST#
R1 A[16]# LOCK# H4 H_LOCK# <7> 53 SCL TRST# 54
H_ADSTB#0 2 XDP_TDI
<7> H_ADSTB#0 M1 ADSTB[0]# 55 TCK1 TDI 56
C1 H_RESET# XDP_TCK 57 58 XDP_TMS
RESET# H_RESET# <7> TCK0 TMS
H_REQ#0 K3 F3 H_RS#0 59 60 XDP_PRE 1 R1433 2 0_0402_5%
<7> H_REQ#0 REQ[0]# RS[0]# H_RS#0 <7> GND16 GND17
H_REQ#1 H2 F4 H_RS#1 0.1U_0402_16V4Z
<7> H_REQ#1 REQ[1]# RS[1]# H_RS#1 <7>
H_REQ#2 K2 G3 H_RS#2 conn@ SAMTE_BSH-030-01-L-D-A
<7> H_REQ#2 REQ[2]# RS[2]# H_RS#2 <7>
H_REQ#3 J3 G2 H_TRDY# Place R1431 within 200ps (~1") to CPU
<7> H_REQ#3 REQ[3]# TRDY# H_TRDY# <7>
H_REQ#4 L1
<7> H_REQ#4 REQ[4]#
G6 H_HIT#
<7> H_A#[17..35] HIT# H_HIT# <7>
H_A#17 Y2 E4 H_HITM#
C A[17]# HITM# H_HITM# <7> C
H_A#18 U5
H_A#19 A[18]# XDP_BPM#0
R3 A[19]# BPM[0]# AD4
ADDR GROUP 1




H_A#20 W6 AD3 XDP_BPM#1
H_A#21 A[20]# BPM[1]# XDP_BPM#2
U4 AD1
XDP/ITP SIGNALS




H_A#22 A[21]# BPM[2]# XDP_BPM#3
Y5 A[22]# BPM[3]# AC4
H_A#23 U1 AC2 XDP_BPM#4
H_A#24 A[23]# PRDY# XDP_BPM#5
R4 A[24]# PREQ# AC1
H_A#25 T5 AC5 XDP_TCK For Merom, R23 and R34 are 0ohm
H_A#26 A[25]# TCK XDP_TDI
T3 AA6
H_A#27
H_A#28
W2
W5
A[26]#
A[27]#
TDI
TDO AB3
AB5
XDP_TDO
XDP_TMS
For Penryn, R23 and R34 are 100ohm. Thermal Sensor ADM1032ARMZ
H_A#29 A[28]# TMS XDP_TRST# +3VS
Y4 A[29]# TRST# AB6
H_A#30 U2 C20 XDP_DBRESET#
A[30]# DBR# XDP_DBRESET# <26>
H_A#31 V4 A[31]# H_PROCHOT# <49>
H_A#32 W3 R410 2
H_A#33 A[32]# H_PROCHOT# C273
AA4 A[33]# THERMAL 2 1 +VCCP




2
H_A#34 AB2 68_0402_5%
H_A#35 A[34]# 0.1U_0402_16V4Z R227
AA3 A[35]# PROCHOT# D21
H_ADSTB#1 1
<7> H_ADSTB#1 V1 ADSTB[1]# THERMDA A24 H_THERMDA_R R23 1 2 0_0402_5% H_THERMDA 10K_0402_5%
THERMDC B25 H_THERMDC_R R34 1 2 0_0402_5% H_THERMDC U16
H_A20M# A6 1 8 ICH_SM_CLK
<25> H_A20M#




1
A20M# VDD SCLK
ICH
ICH




H_FERR# A5 C7 H_THERMTRIP#
<25> H_FERR# FERR# THERMTRIP# H_THERMTRIP# <7,23,25>
H_IGNNE# C4 H_THERMDA 2 7 ICH_SM_DA
<25> H_IGNNE# IGNNE# D+ SDATA
11/20 Penryn support to add R23,R34 C264
H_STPCLK# D5 1 2 H_THERMDC 3 6 THERM_SCI#
<25> H_STPCLK# STPCLK# D- ALERT# THERM_SCI# <23,26>
H_INTR C6 H CLK
<25> H_INTR LINT0
H_NMI B4 A22 CLK_CPU_BCLK