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PROCESSOR (SOS5A-2) MODULE
Manual Part 10. 13255-~ 292
PRllITED q I :J.4f?
HEWLETT ltJ PACKARD
Printed in U.S.A.
Memory Controller Rev JUH-23-81
1.0.1 The Memory Controller Module has been designed to be used in the 2647F
terminal. It is used to provide all randoll access aemory space
required for the terminal environment; this includes variable space as
well as basic procram and work space. It is accessed by the processor
through the terminal bus.
1.0.2 The Memory Controller consists of control and timing circuitry and up
to tour banks ot eight 64K socketed MOS RAM chips each for a total
possible capacity ot 256K bytes.
1.0.3 The memory mapping ot the Memory Controller is as follows: there are
two optional Ilapping possibilities. Which is selected depends on the
presence or absence of jumper Wl. It Wl is absent, the board i.
strapped as a 128K byte board which answers to the addresses tor
variable space and basic space. It W1 is present, then the Memory
Controller is strapped to be used in a RAM based terminal environment,
answering to the terminal code addresses as well as the above mentioned
variable and basic spaces. These addresses are determined by the state
ot the three Ilost significant address bits, ADDR16, ADDR17, and ADDR18
as described below.
2.0 OPERATING PARAMETERS