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5 4 3 2 1




Project Name : I4XIXX
D

Platform : Montevina Merom(CPU)+Cantiga(NB)+ICH9M(SB) D




PAGE CONTENT Schematic Version Change History
1. INDEX
2. SYSTEM BLOCK DIAGRAM M/B Schematic Version Change List
3. POWER DIAGRAM & SEQUENCE
Release Date Version PCB P/N PCBA P/N Note
4. GPIO & Power Consumption
5. CPU Penryn 1/2 2008/09/15 Rev.A 37GI41000-A0 82GI41100-A0 Initial
6. CPU Penryn 2/2
2008/10/03 Rev.B 37GI41000-B0 82GI41100-B0
7. CLOCK GEN (ICS9LPR365)
C C

8. NB HOST/VSS 1/5 2008/12/17 Rev.C 37GI41000-C0 82GI41100-C0
9. NB DDR BUS / GPU / PCIE 2/5 2009/01/21 Rev.01 37GI41000-10 82GI41100-10
10. NB DDR INTERFACE/VSS 3/5
2009/12/02 Rev.02 37GI41000-20 82GI41100-20
11. NB I/O POWER 4/5
12. NB GFX/VCC/NCTF POWER 5/5
13. DDR3 SODIMM
14. NB HDMI LEVEL SHIFT(CH7318B)
15. CRT/ HDMI/ LCD CONN
16. ICH9M RTC/SATA/HDA/LPC 1/3
17. ICH9M SYS/GPIO/PCIE/USB 2/3
18. ICH9M Power 3/3
19. PWR SW/IO/WEBCAM/LID
B 20. SATA HDD&ODD / e-SATA CON B



21. Mini Card / New Card CON
22. LAN RTL8103EL/RTL8111DL
23. CARD READER(RTS5158E)
24. CPU FAN/HSCRP CAP/VCORE SENS
25. EC IT8512 / BIOS / TP CON
26. DC IN
27. CPU CORE (MAX8770)
28. +3.3VA/+5VA/+1.8VS (OZ815)
29. +1.5VS/+1.05VS (OZ8116)
30. VCC SW/ VIN_SW
31. BATT IN / CHARGER (OZ8602)
SMT Process Identify Mark
32. CODEC & AMP/INT_MIC/SPK
A
* DIP component A

33. EXT_MIC / HEADPHONE / MDC
34. RA to RB Ver. History
35. RB to RC Ver. History
36. RC to R01 Ver. History
Title

37. R01 to R02 Ver. History I4xIxx
Size Document Number Rev
Custom
I4XIXX
INDEX 02

Date: Friday, December 04, 2009 Sheet 1 of 37
5 4 3 2 1
5 4 3 2 1




CPU
Merom THERMAL SENSOR SMBUS EC
EMC1402 5 ITE8512 25
SOCKET 478
M-FCPGA 5,6




FSB
667/800 MHZ
D D



LVDS LCD 15
SO-DIMM0 RAM BUS
204 Pin 13 667/800 MHZ RGB
(DDR2/DDR3) North Bridge CRT 15
SO-DIMM1
204 Pin 13 Cantiga
GL40
TMDS LEVEL SHIFT
1329 Pin FCBGA HDMI
CH7318B 14 15
SMBUS
8,9,10,11,12
SPI HDCP ROM
17

AMic Interl Mic In(Array) DMI Controll Link
32
X2/X4
Headphone Out x 1
External JACK Mic In x 1 33 Codec
ALC662
Amplifier AZALIZA
Internal SPK 48 Pin LQFP
32
4 1.5W x 2 32 TPA6017 RTC
16 Pin SOP 32 32.768KHZ 16
C C



RJ11 Modem
DB DB PCIE1 New Card x 1 21
USB x 2 USB0,2
DB DB

CRYSTAL PCIE2 Mini Card x 1 21
12MHZ 23
Cardreader
RTS5158E USB1
Card CON 48 Pin LQFP 23 South Bridge LAN CRYSTAL
23
PCIE4 RTL8111DL(Giga Lan) 25MHZ 22
WEBCAM USB3 ICH9M
64 Pin QFN 22
19 676 Pin mBGA RJ45 22

USB or BT USB4
19
SATA0 HDD x 1
DB
2.5" SATAI/II 20


Mini Card USB5 SATA1
21 ODD x 1 20
3G x 1 USB6
21
SATA4 e-SATA CON
20

New Card USB7
B 21 B




USB x 1 USB8 16,17,18

w/ e-SATA 20




Mini Card Debug Port LPC Debug Port
21
12 Pin 25




Flash Rom CRYSTAL
SPI 32.768KHZ 25
8 Pin M-SOP 25

Embedded Controller (EC)
GPIO PS/2 T/P
Charger 12 Pin 25
31 ITE8512
128 Pin LQFP K/B Matrix Internal K/B
FAN 25 26 Pin 25
3 Pin 24




A SMBUS 2 SMBUS 1 SMBUS 0 A




MMB CPU Thermal Sensor Clock Gen Battery
6 Pin 19 EMC1402 5 7 7 Pin 31




Title
CRYSTAL I4xIxx
14.318MHZ 7 Size Document Number Rev
Custom 02
I4XIXX SYSTEM BLOCK DIAGRAM
Date: Friday, December 04, 2009 Sheet 2 of 37
5 4 3 2 1
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POWER BLOCK DIAGRAM
I4xIxx Power On Sequence B phase
Adaptor or Battery

+3VA / +5VA
VID0 PWRSW

D VID1 VIN D


VID2 * +3.3VS_ON 720us

VID3 STD60N3LH5 x 2 VINSW +3.3VS_ON
OZ8291 STD85N3LH5 x 2 +CPU_CORE
VID4 +5VS 3.3VS_ON_HV 500us

1.84ms
VID5 +3.3VS 3.3VS_ON_HV

VID6 7.6ms
* +1.5V_DDR_ON
VIN +5VA +1.5VS 2ms


+0.75V_DDR 80us


ME4410A P2003BVG +5VS * +1.8VS_ON 1.1ms

ME4410A 1.5ms
+1.8VS

* +1.05VS_ON 440us


+1.05VS/+1.05V 1.2ms


P2003BVG +5V
* RSMRST# 16.4ms



* PWRBTN# 322ms

20ms
C C

+3.3VA 3A +3.3VS 1.8s
** PM_SLP_S4#
60us
LDO P2003BVG ** PM_SLP_S3#
APL1084 * +5V_ON 76ms


OZ815 +3.3V 700us
+5V / +5VREF

5V_ON_HV 150us
+3.3V

P2003BVG +1.5V 5V_ON_HV 5ms



* VCORE_ON 98ms


+CPU_CORE 1.2ms
VIN +1.5VS 10A
APL5930 +1.8VS 1A * PWROK 680ms



ME4410A H_PWRGD
ME4410A x 2 1.16ms
PCIRST# / PLTRST#

CPURST#
P2003BVG +1.5V 32mA
B * EC Control Pin (O/P)
B


** EC Control Pin(I/P)

VL APL5336 +0.75VS1A




VIN +1.05V 10A


OZ8116 ME4410A
ME4410A x 2

A A




Title
I4xIxx
Size Document Number Rev
Custom POWER DIAGRAM & SEQUENCE 02
I4XIXX
Date: Friday, December 04, 2009 Sheet 3 of 37
5 4 3 2 1
5 4 3 2 1




ICH9M ITE8512E ITE8512E Penryn CPU ITE8512E
GPIO GPIO GPIO CPU CORE(V) ICC(A) W TEMP()
VCC ICC(mA) mW TEMP()
GPIO0 PM_BM_BUSY# GPA0 PM_RSMRST# GPI0 BATT_TEMP IMVP-6+ 1.25 44.0 46.2
+3.3V 100 330 70
GPIO1 EC_EXTSMI# GPA1 SUSPEND_LED GPI1 ADAPTOR_I
GPIO2 INT_PIRQE# GPA2 SILENT_LED GPI2 ADAP_IN
D
GPIO3 INT_PIRQF# GPA3 RF_LED GPI3 BAT_CHG_I D


GPIO4 INT_PIRQG# GPA4 CAPS_LED GPI4 BAT_I
GPIO5 INT_PIRQH# GPA5 NUM_LED GPI5
CLOCK GENERATOR ICS9LPR365
CPU_PWR VCC ICC(mA) mW TEMP()
GPIO6 BIOS_REC GPA6 SCROLL/3G_LED GPI6 DDR2_TEMP
+3.3V 250 825 70
GPIO7 N.C (TACH3) GPA7 EXTTS#0 GPI7 VGA_TEMP
GPIO8 N.C GPB0 PM_SLP_S4# GPJ0 EC_BRGHT
GPIO9 N.C (WOL_EN) GPB1 PM_SLP_S3# GPJ1 CHG_I
GPIO10 N.C (ALERT#) GPB2 CMI_TX GPJ2 FAN_CTRL0 ALC662
GPIO11 SMB_ALERT# GPB3 SMB_CLK0 GPJ3 BROWSER#
VCC ICC(mA) mW TEMP()
GPIO12 LAN_PHYPC GPB4 SMB_DAT0 GPJ4 MAIL#
+3.3V(DVDD) 40 132
GPIO13 N.C (GLAN_DOCK#) GPB5 H_A20GATE GPJ5 PM_THROTTING# Cantiga +5V(AVDD) 51 255
70
GPIO14 N.C (NETDETECT) GPB6 H_RCIN# VCC ICC(mA) W TEMP()
GPIO15 PM_STPPCI# GPB7 QRT_STATE +3.3V 262 0.87
GPIO17 N.C (TACH0) GPC0 CMI_RX +1.8VS 3178 5.73
105
GPIO18 N.C GPC1 SMB_CLK1 +1.5V 86 0.129 APA2068
GPIO19 SATA1GP GPC2 SMB_DAT1 +1.05 14688.52 15.43
VCC ICC(mA) mW TEMP()
GPIO21 SATA0GP GPC3 KEY_OUT16
+5V 20 100 85
C GPIO22 N.C (SCLOCK) GPC4 RF_SW# C

GPIO23 LDRQ1# GPC5 KEY_OUT17
GPIO24 CRB_SV_DET GPC6 BTL_BEEP ICH9M
GPIO25 PM_STPCPU# GPC7 SILENT# VCC ICC(mA) mW TEMP()
GPIO26 PM_SLP_S4_STATE# GPD0 EC_PREST# +5V 2 10
EMC1402
VCC ICC mW TEMP()
GPIO27 QRT_STATE0 GPD1 PWRBTN# +5VS 2 10
+3.3V 170uA 0.56 150
GPIO28 QRT_STATE1 GPD2 MUTE +3.3V 347 1145.1
70
GPIO29 USB_OC#5 GPD3 EC_EXTSMI# +3.3VS 212 699.6
GPIO30 USB_OC#6 GPD4 N.C +1.5V 1988 2982
GPIO31 USB_OC#7 GPD5 SMP1_EN# +1.05V 1634 1715.7 RTL8102E
GPIO32 PM_CLKRUN# GPD6 CHG_ON
VCC ICC(mA) mW TEMP()
GPIO33 HDA_DOCK_EN GPD7 LCDSW
+3.3VS 103 339.9
GPIO34 N.C (HDA_DOCK_RST) GPE0 PWRSW
+1.8VS 198 356.4 70
GPIO35 CLK_SATA_OE# GPE1 SET_V
+1.5VS 367 550.5
GPIO36 SATA2GP GPE2 PWROK
GPIO37 SATA3GP GPE3 BT_ON
GPIO38 ODD_DET GPE4 LID#
B
GPIO39 ICH_GPIO39 GPE5 CPPE# B
GPIO40 USB_OC#1 GPE6 FAN_SPD#
GPIO41 USB_OC#2 GPE7 PCI_RST#
GPIO42 USB_OC#3 GPF0 EC_CPU_200MHz
GPIO43 USB_OC#4 GPF1 N.C
GPIO48 MFG_MODE GPF2 CHG_G_LED
GPIO49 H_PWRGD GPF3 CHG_R_LED
GPIO50 PCI_REQ#1 GPF4 TP_CLK
GPIO51 PCI_GNT#1 GPF5 TP_DATA
GPIO52 PCI_REQ#2 GPF6 N.C
GPIO53 PCI_GNT#2 GPF7 N.C
GPIO54 PCI_REQ#3 GPG0 SB_RTCRST
GPIO55 PCI_GNT#3 GPG1 EC_WDOG OK
GPG2 FLFRAME#
GPG6 MPWORK
GPH0 +1.8V_ON
GPH1 +1.8V_DDR_ON
GPH2 VCORE_ON
A A
GPH3 +3.3VS_ON
GPH4 +5V_ON
GPH5 +1.05VS_ON
GPH6 +1.5VS_ON

Title
I4xIxx
Size Document Number Rev
Custom 02
I4XIXX GPIO & Power Consumption
Date: Friday, December 04, 2009 Sheet 4 of 37
5 4 3 2 1
5 4 3 2 1




8 H_A#[31:3]
U1A
8 H_D#[63:0] H_D#[63:0] 8
H_A#3 J4 H1 U1B
A[3]# ADS# H_ADS# 8




ADDR GROUP_0
H_A#4 L5 E2 H_D#0 E22 Y22 H_D#32
H_A#5 L4
A[4]# BNR#
G5
H_BNR# 8
H_D#1 F24
D[0]# D[32]#
AB24 H_D#33 Close to CPU within 20mil
A[5]# BPRI# H_BPRI# 8 D[1]# D[33]#
H_A#6 K5 H_D#2 E26 V24 H_D#34
A[6]# D[2]# D[34]#




DATA GRP 0
H_A#7 M3 H5 H_D#3 G22 V26 H_D#35 +1.05V
A[7]# DEFER# H_DEFER# 8 D[3]# D[35]#




DATA GRP 2
H_A#8 N2 F21 H_D#4 F23 V23 H_D#36
A[8]# DRDY# H_DRDY# 8 D[4]# D[36]#
H_A#9 J1 E1 H_D#5 G25 T22 H_D#37
A[9]# DBSY# H_DBSY# 8 D[5]# D[37]#
H_A#10 N3 H_D#6 E25 U25 H_D#38
H_A#11 A[10]# H_D#7 D[6]# D[38]# H_D#39 H_IERR# R1 1
P5 F1 H_BREQ#0 8 E23 U23 2 56-1-04
H_A#12 A[11]# BR0# H_D#8 D[7]# D[39]# H_D#40
P2 K24 Y25
A[12]# D[8]# D[40]#




CONTROL
D H_A#13 L2 D20 H_IERR# H_D#9 G24 W22 H_D#41 H_CPURST# R2 1 2 56.2-1-04 D
H_A#14 A[13]# IERR# H_D#10 D[9]# D[41]# H_D#42
P4 B3 H_INIT# 16 J24 Y23
H_A#15 A[14]# INIT# H_D#11 D[10]# D[42]# H_D#43 H_PROCHOT# R3 1
P1 J23 W24 2 750-1-04
H_A#16 A[15]# H_RS#[2:0] H_D#12 D[11]# D[43]# H_D#44
R1 H4 H_LOCK# 8 H_RS#[2:0] 8 H22 W25
A[16]# LOCK# H_D#13 D[12]# D[44]# H_D#45 H_STPCLK# R4 1
8 H_ADSTB#0 M1 F26 AA23 2 @150-1-04
ADSTB[0]# H_CPURST# H_D#14 D[13]# D[45]# H_D#46
8 H_REQ#[4:0] C1 H_CPURST# 8 K22 AA24
H_REQ#0 RESET# H_RS#0 H_D#15 D[14]# D[46]# H_D#47
K3 F3 H23 AB25
H_REQ#1 REQ[0]# RS[0]# H_RS#1 D[15]# D[47]#
H2 F4 8 H_DSTBN#0 J26 Y26 H_DSTBN#2 8
H_REQ#2 REQ[1]# RS[1]# H_RS#2 DSTBN[0]# DSTBN[2]# TDI R6 1
K2 G3 8 H_DSTBP#0 H26 AA26 H_DSTBP#2 8 2 54.9-1-04
H_REQ#3 REQ[2]# RS[2]# DSTBP[0]# DSTBP[2]#
J3 G2 H_TRDY# 8 8 H_DINV#0 H25 U22 H_DINV#2 8
H_REQ#4 REQ[3]# TRDY# DINV[0]# DINV[2]# TDO R7 1
8 H_A#[35:3] L1 8 H_D#[63:0] H_D#[63:0] 8 2 @56-1-04
REQ[4]#
G6 H_HIT# 8
H_A#17 HIT# H_D#16 H_D#48 TMS R8 1
Y2 E4 H_HITM# 8 N22 AE24 2 54.9-1-04
H_A#18 A[17]# HITM# H_D#17 D[16]# D[48]# H_D#49
U5 K25 AD24
H_A#19 A[18]# H_D#18 D[17]# D[49]# H_D#50 PREQ# R9 1
R3 AD4 P26 AA21 2 54.9-1-04 FOLLOW P53
A[19]# BPM[0]# D[18]# D[50]#


ADDR GROUP_1
H_A#20 W6 AD3 H_D#19 R23 AB22 H_D#51
H_A#21 A[20]# BPM[1]# H_D#20 D[19]# D[51]# H_D#52
U4 AD1 L23 AB21
A[21]# BPM[2]# D[20]# D[52]#




DATA GRP 1