Text preview for : Compal_LA-2392.pdf part of Compal Compal LA-2392 Compal Compal_LA-2392.pdf



Back to : Compal_LA-2392.pdf | Home

A B C D E




1 1




2



Compal confidential 2




Schematics Document
ClawHammer AMD K8 with
3
nVIDIA Chrush K8 3




2004-04-16
REV: 0.1



4 4




Compal Electronics, Inc.
Title
Cover Sheet
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
LA-2392 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 16, 2004 Sheet 1 of 53
A B C D E
A B C D E




Compal confidential
File Name : LA-1811 Fan Control
page 4
Thermal Sensor
ADM1032
1
page 4 1


AMD K8
Claw Hammer Processor Memory BUS(DDR)
DDR-SO-DIMM X2
page 4, 5, 6, 7 BANK 0, 1, 2, 3 page 8, 9,10
CRT Connector
2.5V DDR- 200/266
page 18

HT 16x16 800 MHZ

TFT/HPA Panel
Interface USB2.0
USB conn
page 17 nVIDIA
page 27
MAP17
TV OUT
page 14, 15, 16
Connector nVIDIA MDC & BT Conn
page 18
2
page 27 2

Crush K8 Audio CKT AMP & Audio Jack
AD1981B
IDSEL:AD18 page 26
(PIRQC#,GNT#3,REQ#3) 3.3V 33 MHz PCI BUS 708 BGA page 25

IDSEL:AD16 IDSEL:AD17 IDSEL:AD20 AC-LINK
(PIRQA#,GNT#0,REQ#0) (PIRQB#,GNT#1,REQ#1) (PIRQA#/B#,GNT#2,REQ#2)
ATA-100
Primary IDE
IEEE 1394 Mini PCI LAN CardBus Controller page 11, 12, 13
Secondary IDE
TSB43AB21A socket RTL 8101L HDD
page 21 page 28 page 20
TI PCI1620 page 22
ATA-100
Connector
page 19

CDROM
RJ45/11 CONN Connector SPR CONN.
page 20
Slot 0/1 page 34
page 23 page 19
3 *RJ45 CONN 3


RTC CKT. LPC BUS *PS2 x2 CONN
*CRT CONN
*LINE IN JACK
*LINE OUT JACK
EC NS VIA 1211 *1394 CONN
Power OK CKT. *SPDIF CONN
page 36 97551 page 30
Super I/O
page 29
*DVI CONN
*DC JACK
*TVOUT CONN
*PRINTER PORT
Power On/Off CKT. Touch Pad Int.KBD PARALLEL FIR *COM PORT
page 33 page 33 page 33 page 32 page 33 *USB CONN x2

EC I/O Buffer BIOS FDD
page 31 page 32
DC/DC Interface CKT. page 31
page 37
4 4




Power Circuit DC/DC
page 38, 39, 40, 41, 42, 43, 44 Compal Electronics, Inc.
Title
Block Diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-2392
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Friday, April 16, 2004 Sheet 2 of 53
A B C D E
A




Voltage Rails

+1.2V_HT
power
plane +1.2VS
+1.2VALW +1.25V
+1.5VS
+3VALW +2.5V
+2.5VS
+5VALW +3V
+3VS
State 12VALW +5V
+5VS




S0 O O O

S1
O O O
S3
O O X
S5 S4/AC
O X X
S5 S4/AC don't exist
X X X
O MEANS ON
X MEANS OFF




PCI Devices

1
DEVICE PCI Device ID IDSEL # REQ/GNT # PIRQ 1




INTERNAL

USB 2.0 2 AD13 N /A G
AC97 MODEM 6 AD17 N /A M
AC97 6 AD17 N /A L
ATA 100 8 AD20 N /A
ETH ERNET 5 AD16 N /A K
LPC I/F 1 AD12 N /A
SMBUS 1 AD12 N /A F

EXTERNAL
VGA 0 AD16 N /A E
1394 0 AD16 0 A
L AN 1 AD17 1 B
CARD BUS 4 AD20 2 A, B
Wireless LAN 2 AD18 3 C
Mini-PCI (no use) 3 AD19 4 D




Compal Electronics, Inc.
Title
Notes List
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-2392 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 16, 2004 Sheet 3 of 53
A
A B C D E




H_CADIP[0..15] H_CADOP[0..15]
<11> H_CADIP[0..15] H_CADIN[0..15] H_CADON[0..15] H_CADOP[0..15] <11>
<11> H_CADIN[0..15] H_CADON[0..15] <11>

LA-1851
U1A

4 BDW00
L A - 1 4 5 2 REV 0
Claw Hammer-DTR Fan Control Circuit 1 +5VS
4

H_CADIP15 T25 N26 H_CADOP15
H_CADIN15 L0_CADIN_H15 L0_CADOUT_H15 H_CADON15
R25 L0_CADIN_L15 L0_CADOUT_L15 N27
H_CADIP14 U27 L25 H_CADOP14
L0_CADIN_H14 L0_CADOUT_H14




1
H_CADIN14 U26 M25 H_CADON14 Q1
H_CADIP13 L0_CADIN_L14 L0_CADOUT_L14 H_CADOP13 +12VALW FMMT619_SOT23
V25 L26




C
L0_CADIN_H13 L0_CADOUT_H13




1
H_CADIN13 U25 L27 H_CADON13 1
H_CADIP12 L0_CADIN_L13 L0_CADOUT_L13 H_CADOP12 D1 C1
W27 L0_CADIN_H12 L0_CADOUT_H12 J25




8
H_CADIN12 W26 K25 H_CADON12
L0_CADIN_L12 L0_CADOUT_L12




HTT Interface
H_CADIP11 AA27 G25 H_CADOP11 @1SS355_SOD323 10U_0805_10V4Z




P
L0_CADIN_H11 L0_CADOUT_H11 2




B



E
H_CADIN11 AA26 H25 H_CADON11 EN_FAN1 3 R1
<30> EN_FAN1




2
H_CADIP10 L0_CADIN_L11 L0_CADOUT_L11 H_CADOP10 +IN
AB25 G26 1FAN1_ON 1 2




2



3
H_CADIN10 L0_CADIN_H10 L0_CADOUT_H10 H_CADON10 OUT
AA25 L0_CADIN_L10 L0_CADOUT_L10 G27 2 1 2 -IN 2
H_CADIP9 AC27 E25 H_CADOP9 U2A 100_0402_5% C2
L0_CADIN_H9 L0_CADOUT_H9




G
H_CADIN9 AC26 F25 H_CADON9 R2 LM358A_SO8
H_CADIP8 L0_CADIN_L9 L0_CADOUT_L9 H_CADOP8 10K_0402_5% 0.1U_0402_16V4Z FAN1
AD25 E26




4
H_CADIN8 L0_CADIN_H8 L0_CADOUT_H8 H_CADON8 1
AC25 L0_CADIN_L8 L0_CADOUT_L8 E27




1
H_CADIP7 T27 N29 H_CADOP7 1 1 JP1
H_CADIN7 L0_CADIN_H7 L0_CADOUT_H7 H_CADON7 D2 C3 C612
T28 L0_CADIN_L7 L0_CADOUT_L7 P29 1 2 1
H_CADIP6 V29 M28 H_CADOP6 R3 8.2K_0402_5%
H_CADIN6 L0_CADIN_H6 L0_CADOUT_H6 H_CADON6 1N4148_SOT23 100P_0402_50V8K 2
U29 L0_CADIN_L6 L0_CADOUT_L6 M27 3
H_CADIP5 H_CADOP5 2 2
V27 L29




2
H_CADIN5 L0_CADIN_H5 L0_CADOUT_H5 H_CADON5 +12VALW ACES_85205-0300
V28 L0_CADIN_L5 L0_CADOUT_L5 M29
H_CADIP4 Y29 K28 H_CADOP4 R4 0.1U_0402_16V4Z
H_CADIN4 L0_CADIN_H4 L0_CADOUT_H4 H_CADON4
W29 L0_CADIN_L4 L0_CADOUT_L4 K27 +3VS 1 2
H_CADIP3 AB29 H28 H_CADOP3 C775
H_CADIN3 L0_CADIN_H3 L0_CADOUT_H3 H_CADON3 10K_0402_5%
AA29 L0_CADIN_L3 L0_CADOUT_L3 H27
H_CADIP2 AB27 G29 H_CADOP2 0.1U_0402_25V4K
L0_CADIN_H2 L0_CADOUT_H2 <30> FAN_SPEED1
3 H_CADIN2 AB28 H29 H_CADON2 1 3
H_CADIP1 L0_CADIN_L2 L0_CADOUT_L2 H_CADOP1 C613
AD29 L0_CADIN_H1 L0_CADOUT_H1 F28
H_CADIN1 AC29 F27 H_CADON1
H_CADIP0 L0_CADIN_L1 L0_CADOUT_L1 H_CADOP0 1000P_0402_50V7K
AD27 L0_CADIN_H0 L0_CADOUT_H0 E29
H_CADIN0 H_CADON0 2
AD28 L0_CADIN_L0 L0_CADOUT_L0 F29



H_CLKIP1 Y25 J26 H_CLKOP1
+1.2V_HT <11> H_CLKIP1 L0_CLKIN_H1 L0_CLKOUT_H1 H_CLKOP1 <11>
H_CLKIN1 W25 J27 H_CLKON1
<11> H_CLKIN1 L0_CLKIN_L1 L0_CLKOUT_L1 H_CLKON1 <11>
H_CLKIP0 Y27 J29 H_CLKOP0
<11> H_CLKIP0 L0_CLKIN_H0 L0_CLKOUT_H0 H_CLKOP0 <11>
H_CLKIN0 Y28 K29 H_CLKON0
<11> H_CLKIN0 L0_CLKIN_L0 L0_CLKOUT_L0 H_CLKON0 <11>
R5 1 2 49.9_0402_1% H_CTLIP1 R27 N25
R6 1 L0_CTLIN_H1 L0_CTLOUT_H1
2 49.9_0402_1% H_CTLIN1 R26 P25
<11> H_CTLIP0
H_CTLIP0
H_CTLIN0
T29
R29
L0_CTLIN_L1
L0_CTLIN_H0
L0_CTLOUT_L1
L0_CTLOUT_H0 P28
P27
H_CTLOP0
H_CTLON0
H_CTLOP0 <11> Fan Control Circuit 2 +5VS
<11> H_CTLIN0 L0_CTLIN_L0 L0_CTLOUT_L0 H_CTLON0 <11>
AF27 AJ27 LDTSTOP#
L0_REF1 LDTSTOP_L LDTSTOP# <11>
AE26 L0_REF0




1
+1.2V_HT 1 2 +2.5VS Q2
FOX_PZ75403-2941-42 R7 1K_0402_5% FMMT619_SOT23




C
R8 44.2_0603_1%




1
2 1 LVREF1 1
U2B D3 C4
LVREF0




B



E
1 EN_FAN2 5 R9 @1SS355_SOD323 10U_0805_10V4Z
<30> EN_FAN2 +IN
1




C5 2
1 7FAN2_ON 1 2




2



3




2
R10 C6 OUT
2 1 6 -IN 2
2 1000P_0402_50V7K 100_0402_5% C7 2
2 44.2_0603_1% 1000P_0402_50V7K R11
2 10K_0402_5% LM358A_SO8 0.1U_0402_16V4Z FAN2
2




1




1
1 1 JP2
1 2 D4 C8 C614
R12 8.2K_0402_5% 1
1N4148_SOT23 0.1U_0402_16V4Z 2
2 2 3




2
ACES_85205-0300
R13 10U_0805_10V4Z
1 2
Thermal Sensor +3VS
10K_0402_5%
+3VS

W=1 5mil
ADM1032 <30> FAN_SPEED2
1
C615
2
C610 1000P_0402_50V7K
THERMDA_CPU 2
THERMDA_CPU <6>
0.1U_0402_16V4Z
1




1 THERMDC_CPU
THERMDC_CPU <6>
R454
U3 1
@10K_0402_5% 1 2 THERMDA_CPU C611
VDD1 D+
2




6 3 THERMDC_CPU 2200P_0402_25V7K
ALERT# D- 2
1 4 THERM# SCLK 8 EC_SMC_2 <30> 1

5 GND SDATA 7 EC_SMD_2 <30>


ADM1032AR_SOP8
Compal Electronics, Inc.
Title
Claw Harmmer CPU (Host Bu