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BOM MARK


ZH3
SA@ SATA
VCC_CORE CPU VR
PA@ PATA PG 30
ZH3 ASSY P/N :31ZH3MB0008
3@ 3G ZH3 MB C/S ASSY P/N: 41ZH3CS0001
ZH3 MB S/S ASSY P/N: 51ZH3SS0003 +1.2V
+1.2V
+VCCP +VCCP
A AMD S1 PG 31 A
DDRII-SODIMM1
PG 7,8 533/ 667 MHZ DDR II Turion 64 Rev.F Dual-Core/ CPU THERMAL
Sempron Rev.F Single-Core SENSOR +1.8VSUS +1.8VSUS
Page 5
+1.8V SMDDR
DDRII-SODIMM2 Dual-Core 35W / Single-Core 25W
SMDDR_VTERM VTERM
PG 7,8 (638 S1g1 socket) DVI DVI PG 32
PG 3,4,5,6 TI TFP513PAP
+3VPCU
HT_LINK Page : 29 Docking 3V/5V
+3V_S5
EXT_CRT Page : 30 +3VSUS
PCIE3 & USB4 PCI-E, 1X
DVO
Mini Card (WLAN) +5VSUS
PCI Express Mini Card PG 19 +5V
RS485 TVOUT
+12V
CRT PG 33
PCI-E, 1X RGB CRT Switch INT_CRT
465 FCBGA SN74CBTLV3257PWR Page : 16 VIN
PCIE2 & USB5
Express Card Page : 16 CHARGER
B
NEW CARD
USB 2.0 * 1(USB5) B

PG 31 LVDS LVDS PG 34
Page : 16
PG 9,10,11,12
A_LINK
USB2.0 (P0~P7) HOST 133/166MHz
Bluetooth PCIE 100MHz
USB7
PG 20 CLOCK GENERATOR
SATA - HDD VGA 96MHz
SATA0 SB460 ICS951462
USB 48MHz
PG 23
USB2.0 I/O Port X3
USB0 & USB1& USB2 REF 14MHz
PG 20
PATA - HDD PG 2
PATA 100 549 BGA
PG 23 DSC USB I/F
USB6
PG 16
C PCI Bus 33MHz BROADCOM C

Azalia 10/100/1G LAN
PCI DEVICE IDSEL# REQ# / GNT# Interrupts
5788M PG 17
PG 14,15,16,17
PCI7412 AD25 REQ0# / GNT0# INT E/F/G# AD25

REQ0# / GNT0# TI BOTHHAND
Azalia Audio 5788M AD20 REQ2# / GNT2# INT G# INT E/F/G#
LPC PCMCIA+1394
PG 24 TRANSFORMER RJ45
+6 IN 1 PG 18
PG 18
PCI7412
OSC Page :21~22
Amplifier Amplifier Azalia MDC 48MHZ
NS
MAX4411 MAX9755A G-SENSOR KBC
PG 25 PG 25 PG 24 SIO (87383)
KXP84-0200 NS97551 Page : 26 1394 5 IN 1 PCMCIA
INT. MODEM Page : 23 PG 27 Page: 21 Page: 22 Page: 22
D
MIC. H.P/SPDIF D
S.P. RJ 11
X-Bus
PG 25 PG 25 PG 25 PG 18
K/B Touch Flash PROJECT :ZH3
CONN. Pad ROM FIR Quanta Computer Inc.
PG 28 PG 28 PG 27 Page : 26
Size Document Number Rev
BLOCK DIAGRAM D

Date: Wednesday, June 28, 2006 Sheet 1 of 36
1 2 3 4 5 6 7 8
5 4 3 2 1




+3V
L68 CLK_VDD L66 +3V
SBK160808T-301Y-S SBK160808T-301Y-S
CLK_VDDA


C560 C558 C128 C112 C118 C102 C554 C534 C542 C544 C547
22U/10V_8 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 22U/10V_8


D D




1- PLACE ALL SERIAL TERMINATION +3V L64
RESISTORS CLOSE TO U800 SBK160808T-301Y-S CLK_VDD
CLK_VDD_USB U19
2- PUT DECOUPLING CAPS CLOSE TO
Clock Gen.POWER PIN 300ohm/200mA 54 50 CLK_VDDA
C86 C530 VDDCPU VDDA R340 261/F_4
14 VDD_SRC1 GNDA 49
1U/10V_4 .1U_4 23 VDD_SRC2 CPUCLK_EXT_R R337 47/F_4
28 VDD_SRC3 CPUCLK8T0 56 CPUCLK 5
44 55 CPUCLK#_EXT_R R346 47/F_4
+3V VDD_SRC4 CPUCLK8C0 CPUCLK# 5
L63 5 52
SBK160808T-301Y-S VDD_48 CPUCLK8T1
39 VDD_ATIG CPUCLK8C1 51
CLK_VDD_REF 2 VDD_REF NBSRC_CLKP_R R384 33/F_4
60 VDDHTT ATIGCLKT0 41 NBSRC_CLKP 10
300ohm/200mA 40 NBSRC_CLKN_R R388 33/F_4 NB
ATIGCLKC0 NBSRC_CLKN 10
C528 C529 53 37
1U/10V_4 .1U_4 GND_CPU ATIGCLKT1
15 GND_SRC1 ATIGCLKC1 36
22 GND_SRC2 ATIGCLKT2 35
29 GND_SRC3 ATIGCLKC2 34
Parallel Resonance Crystal 45
8
GND_SRC4 ATIGCLKT3 30
31
C531 33P_4 GND_48 ATIGCLKC3 GPP_CLK2P_R R359 33/F_4
38 GND_ATIG SRCCLKT0 47 CLK_PCIE_EZ1 30
CLK_VDD 1 46 GPP_CLK2N_R R363 33/F_4
GND_REF SRCCLKC0 CLK_PCIE_EZ1# 30
58 43 GPP_CLK3P_R R372 33/F_4 DOCKING
GNDHTT SRCCLKT1 CLK_PCIE_EZ2 30
Y4 42 GPP_CLK3N_R R377 33/F_4
C SRCCLKC1 CLK_PCIE_EZ2# 30 C
R352 14.318MHz CLK_XIN 3 26 SBLINK_CLKP_R R387 33/F_4
XIN SRCCLKT2 SBLINK_CLKP 10
27 SBLINK_CLKN_R R392 33/F_4
SRCCLKC2 SBLINK_CLKN 10
10K_4 C536 33P_4 CLK_XOUT 4 24 SBSRC_CLKP_R R375 33/F_4
XOUT SRCCLKT3 SBSRCCLK 12
25 SBSRC_CLKN_R R380 33/F_4 SB
SRCCLKC3 SBSRCCLK# 12
20 GPP_CLK0P_R R366 33/F_4
SRCCLKT4 CLK_PCIE_MINI_A 19
GPP_CLK0N_R R370 33/F_4
SRCCLKC4 21 CLK_PCIE_MINI_A# 19 MINI
*0_4 R351 11 18
13 SYS_RST# RESET_IN# SRCCLKT5
61 NC SRCCLKC5 19
SRCCLKT6 16
SRCCLKC6 17




R369

R365
R365

R379

R374

R391
R391

R386

R378

R373

R364

R360

R389

R385
R385
SRCCLKT7 12
SRCCLKC7 13

7,13,17,19,30 PCLK_SMB 9 SMBCLK CLKREQA# 57
10 32 CLKREQB#
7,13,17,19,30 PDAT_SMB SMBDAT CLKREQB# T93




49.9/F_4

49.9/F_4
49.9/F_4

49.9/F_4

49.9/F_4

49.9/F_4
49.9/F_4

49.9/F_4

49.9/F_4

49.9/F_4

49.9/F_4

49.9/F_4

49.9/F_4

49.9/F_4
49.9/F_4
33 R396 0_4 EZ_CLKREQ#
CLKREQC# EZ_CLKREQ# 27,30
48 7 CLK_48M_1_R
IREF 48MHz_1 CLK_48M_2_R T92
Ioh = 5 * Iref 48MHz_0 6
(2.32mA) R355
Voh = 0.71V @ 60 ohm 475/F_4 63 R315 33/F_4
FS1/REF1 USBCLK 13
FS0/REF0 64
FS2/REF2 62
HTTCLK0 59


ICS951462


B B
CLK_VDD
EXT CLK FREQUENCY SELECT TABLE(MHZ)
CLKREQA# Controls SRC5,6,7 R313 R314 R326
FS2 FS1 FS0 CPU SRCCLK HTT PCI USB COMMENT CLKREQB# Controls SRC2,3,4,ATIG3 2.2K_4 2.2K_4 2.2K_4
[2:1] CLKREQC# Controls SRC0,1,ATIG0,1,2
R324 8.2K_4 R320 *0_4
0 0 0 Hi-Z 100.00 Hi-Z Hi-Z 48.00 Reserved R319 8.2K_4 R310 *0_4
R328 8.2K_4 R330 *0_4
0 0 1 X 100.00 X/3 X/6 48.00 Reserved
SB_OSCIN_R R325 33/F_4
SB_OSCIN 13
0 1 0 180.00 100.00 60.00 30.00 48.00 Reserved +3V R316 33/F_4
SIO_14M 26
0 1 1 220.00 100.00 36.56 73.12 48.00 Reserved
NB_OSCIN_R R329 33/F_4
NB_OSC 10
1 0 0 100.00 100.00 66.66 33.33 48.00 Reserved
CLKREQB# R394 *10K_4 HTREFCLK_R R333 33/F_4
HTREFCLK 10
1 0 1 133.33 100.00 66.66 33.33 48.00 Reserved EZ_CLKREQ# R395 10K_4

1 1 1 200.00 100.00 66.66 33.33 48.00 Normal ATHLON64 operation B1A R342 not stuff for New card
R334
Check AMD clock 49.9/F_4




A A






PROJECT :ZH3



Quanta Computer Inc.
Size Document Number Rev
CLOCK GENERATOR D
Date: Thursday, July 06, 2006 Sheet 2 of 36
5 4 3 2 1
5 4 3 2 1




PROCESSOR HYPERTRANSPORT INTERFACE
D D
VLDT_Ax AND VLDT_Bx ARE CONNECTED TO THE LDT_RUN POWER
SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE


VLDT_RUN U20A

D4 VLDT_A3 VLDT_B3 AE5
D3 VLDT_A2 VLDT_B2 AE4
D2 AE3 C69 4.7U/6.3V_6
VLDT_A1 VLDT_B1
D1 VLDT_A0 VLDT_B0 AE2


8 HT_CADIN15_P N5 L0_CADIN_H15 L0_CADOUT_H15 T4 HT_CADOUT15_P 8
8 HT_CADIN15_N P5 L0_CADIN_L15 L0_CADOUT_L15 T3 HT_CADOUT15_N 8
8 HT_CADIN14_P M3 L0_CADIN_H14 L0_CADOUT_H14 V5 HT_CADOUT14_P 8
8 HT_CADIN14_N M4 L0_CADIN_L14 L0_CADOUT_L14 U5 HT_CADOUT14_N 8
8 HT_CADIN13_P L5 L0_CADIN_H13 L0_CADOUT_H13 V4 HT_CADOUT13_P 8
8 HT_CADIN13_N M5 L0_CADIN_L13 L0_CADOUT_L13 V3 HT_CADOUT13_N 8
8 HT_CADIN12_P K3 L0_CADIN_H12 L0_CADOUT_H12 Y5 HT_CADOUT12_P 8
8 HT_CADIN12_N K4 L0_CADIN_L12 L0_CADOUT_L12 W5 HT_CADOUT12_N 8
8 HT_CADIN11_P H3 L0_CADIN_H11 L0_CADOUT_H11 AB5 HT_CADOUT11_P 8
8 HT_CADIN11_N H4 L0_CADIN_L11 L0_CADOUT_L11 AA5 HT_CADOUT11_N 8
8 HT_CADIN10_P G5 L0_CADIN_H10 L0_CADOUT_H10 AB4 HT_CADOUT10_P 8
8 HT_CADIN10_N H5 L0_CADIN_L10 L0_CADOUT_L10 AB3 HT_CADOUT10_N 8
8 HT_CADIN9_P F3 L0_CADIN_H9 L0_CADOUT_H9 AD5 HT_CADOUT9_P 8
8 HT_CADIN9_N F4 L0_CADIN_L9 L0_CADOUT_L9 AC5 HT_CADOUT9_N 8
8 HT_CADIN8_P E5 L0_CADIN_H8 L0_CADOUT_H8 AD4 HT_CADOUT8_P 8
8 HT_CADIN8_N F5 L0_CADIN_L8 L0_CADOUT_L8 AD3 HT_CADOUT8_N 8
C N3 T1 C
8 HT_CADIN7_P L0_CADIN_H7 L0_CADOUT_H7 HT_CADOUT7_P 8
8 HT_CADIN7_N N2 L0_CADIN_L7 L0_CADOUT_L7 R1 HT_CADOUT7_N 8
8 HT_CADIN6_P L1 L0_CADIN_H6 L0_CADOUT_H6 U2 HT_CADOUT6_P 8
8 HT_CADIN6_N M1 L0_CADIN_L6 L0_CADOUT_L6 U3 HT_CADOUT6_N 8
8 HT_CADIN5_P L3 L0_CADIN_H5 L0_CADOUT_H5 V1 HT_CADOUT5_P 8
8 HT_CADIN5_N L2 L0_CADIN_L5 L0_CADOUT_L5 U1 HT_CADOUT5_N 8
8 HT_CADIN4_P J1 L0_CADIN_H4 L0_CADOUT_H4 W2 HT_CADOUT4_P 8
8 HT_CADIN4_N K1 L0_CADIN_L4 L0_CADOUT_L4 W3 HT_CADOUT4_N 8
8 HT_CADIN3_P G1 L0_CADIN_H3 L0_CADOUT_H3 AA2 HT_CADOUT3_P 8
8 HT_CADIN3_N H1 L0_CADIN_L3 L0_CADOUT_L3 AA3 HT_CADOUT3_N 8
8 HT_CADIN2_P G3 L0_CADIN_H2 L0_CADOUT_H2 AB1 HT_CADOUT2_P 8
8 HT_CADIN2_