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1 2 3 4 5 6 7 8

PCB STACK UP
OP8 SYSTEM DIAGRAM 01
DDRII-SODIMM1 DDRII 667/800 MHz
LAYER 1 : TOP AMD Lion CPU THERMAL
LAYER 2 : IN1 PAGE 6,7 Sabie SENSOR
A LAYER 3 : IN2 Tigris 14.318MHz A
S1G2 Processor PAGE 5
DDRII-SODIMM2 DDRII 667/800 MHz
LAYER 4 : VCC
638P (uPGA)/35W
LAYER 5 : IN3 PAGE 6,7 PAGE 3,4,5 CPU_CLK
LAYER 6 : BOT NBGFX_CLK CLOCK GEN
NBGPP_CLK ICS9LPRS476AKLFT-->HP
SBLINK_CLK SLG8SP628VTR-->HP
HT3 RTM880N-796 -->HP
PAGE 2
PCI-Express 16X
PCI-E HDMI
PAGE 25 ATI M92-S
X1 X1 NORTH BRIDGE for
Discrete
Mini PCI-E
CRT
LAN RS880 PAGE 24 only
Realtek Card
64 Bit,DDR2*4
PCIE-LAN
RTL8103E
A12
(Wireless LAN) LVDS
B
(10/100)
21mm X 21mm, 528pin BGA M92-S2 B
PAGE 23
Side port
PAGE 30 PAGE 33 PAGE 17,18,19
PAGE 8,9,10,11 20,21,22
10 PCI-E WLAN Card x1
256mb RAM
PAGE 33
for UMA only
RJ45 PAGE 8
ALINK X4 SBSRC_CLK
PAGE 30
SYSTEM CHARGER(ISL6251) USB2.0
PAGE 40 1,8,9 5 2 3
SATA - HDD
SATA0 150MB
SOUTH BRIDGE USB2.0 Ports Blueflame Webcam Flash Media
PAGE 29 PAGE 29 PAGE 29 RTS5159
SYSTEM POWER ISL6237 X2 X1 PAGE 23
PAGE 34 SB710 A14 PAGE 26
SATA - CD-ROM
SATA4 150MB
21mm X 21mm, 528pin BGA
DDR II SMDDR_VTERM PAGE 29
1.8V/1.8VSUS(RT8207) 4.5W(Ext)
C PAGE 37 SATA1 150MB 4.3W(Int) C
E-SATA Azalia
PAGE 29 PAGE 12,13.14.15.16
VCCP +1.1V AND +1.2V(RT8204)

PAGE 35
IDT
LPC 92HD75B2
VGACORE(1.1V~1.2V)Oz8118 MDC CONN PAGE 27
PAGE 38
PAGE 28
Keyboard PAGE 32 ENE KBC
Touch Pad PAGE 32
CPU CORE ISL6265HRTZ-T KB3926 Dx AUDIO
PAGE 36 Amplifier
TPA6017A2

PAGE 28
SMBUS TABLE PAGE 32
Clock gen/Robson/TV tuner
SB--SCL0/SD0 /DDR2/DDR2 thermal/Accelerometer +3V
D D
Ang MIC AUDIO CONN Audio
epress card (Phone/ MIC) Conn
Wlan Card +3VS5 PAGE 28 PAGE 28 PAGE 27
FAN SPI PROJECT : OP8
EC --SCL/SD Battery charge/discharge +3VPCU Quanta Computer Inc.
VGA thermal/system thermal +3V
PAGE 28 PAGE 35 Size Document Number Rev
EC--SCL2/SD2 Custom
Block Diagram 1A
NB5/RD2
Date: Friday, March 20, 2009 Sheet 1 of 42
1 2 3 4 5 6 7 8
5 4 3 2 1

+1.2V L45
600 ohm, 0.5A

BLM18PG181SN1D(180,1.5A)_6

C492
22U/6.3V_8
C489
0.1U/10V_4
C468
0.1U/10V_4
C494
0.1U/10V_4
+1.2V_CLKVDDIO

C490
0.1U/10V_4
C428
0.1U/10V_4
C485
0.1U/10V_4
CLOCKS name

NBGFX_CLKP
NBGFX_CLKN
RX780

RP48 STUFF
RS780

RP48 STUFF
Clock pin function

to NB for VGA reference clock 02
EXT_GFX_CLKP RP47 STUFF RP47 NC to M92-S external reference clock -RX780 only
EXT_GFX_CLKN

D
SBLINK_CLKP to NB for AC-LINK reference clock D
600 ohm, 0.5A +3V_CLKVDD SBLINK_CLKN RP43 STUFF RP43 STUFF

+3V L46 +3V_CLKVDD
BLM18PG181SN1D(180,1.5A)_6
C430 CLK_VGA_27M_SS R213,R215 R213,R215
C511 C434 C481 C491 C479 C446 C423 C412 C424 CLK_VGA_27M_NSS STUFF NC To M92-S 27Mhz - RX780 only
22U/6.3V_8 2.2U/6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4

Need check the net name for the short pad

Place within 0.5" R178 *261_4
U11
of CLKGEN
+3V_CLKVDD 4 50 CPUCLKP RP42 4 3 *0_4P2R_4 CPUCLKP
VDDDOT CPUK8_0T CPUCLKP 3
16 49 CPUCLKN 2 1 CPUCLKN
VDDSRC CPUK8_0C CPUCLKN 3
26 VDDATIG
Place very 35 VDDSB
40 30 NBGFX_CLKP RP48 4 3 *0_4P2R_4 NBGFX_CLKP to NB for external Graphics
close to 48
VDD_SATA ATIG0T
29 NBGFX_CLKN 2 1 NBGFX_CLKN
NBGFX_CLKP 10
VDDCPU ATIG0C NBGFX_CLKN 10 reference clock
C/G 55 VDDHTT ATIG1T 28 EXT_GFX_CLKP_L RP47 4 3 0_4P2R_4 EXT_GFX_CLKP EXT_GFX_CLKP 17
+3V_CLKVDD EXT_GFX_CLKN_L EXT_GFX_CLKN
56 VDDREF ATIG1C 27 2 1 EXT_GFX_CLKN 17 to M92-S -RX780 only
L35 +3V_CLK_VDDA 63 Clock for Dis only
BLM18PG181SN1D(180,1.5A)_6 VDD48
C411 37 SBLINK_CLKP RP43 4 3 *0_4P2R_4 SBLINK_CLKP
SB_SRC0T SBLINK_CLKP 10
C396 11 36 SBLINK_CLKN 2 1 SBLINK_CLKN to NB for AC-LINK reference clock
VDDSRC_IO SB_SRC0C SBLINK_CLKN 10
C 2.2U/6.3V_6 0.1U/10V_4 17 32 SBSRC_CLKP RP46 4 3 *0_4P2R_4 SBSRC_CLKP C
VDDSRC_IO SB_SRC1T SBSRC_CLKP 12
25 31 SBSRC_CLKN 2 1 SBSRC_CLKN to SB
VDDATIG_IO SB_SRC1C SBSRC_CLKN 12
34 VDDSB_IO
+1.2V_CLKVDDIO 47 VDDCPU_IO PCIE_MINI1_CLKP RP45
SRC0T 22 4 3 *0_4P2R_4 PCIE_MINI1_CLKP PCIE_MINI1_CLKP 33
21 PCIE_MINI1_CLKN 2 1 PCIE_MINI1_CLKN to WLAN
SRC0C PCIE_MINI1_CLKN 33
1 GND48 SRC1T 20
C406 33P/50V_4 CG_XIN 7 19
GNDDOT SRC1C
10 GNDSRC SRC2T 15
2

18 GNDSRC SRC2C 14
Y1 PCIE_LAN_CLKP RP44 3 *0_4P2R_4 PCIE_LAN_CLKP
14.318MHZ
24
33
GNDATIG QFN64 SRC3T 13
12 PCIE_LAN_CLKN
4
2 1 PCIE_LAN_CLKN
PCIE_LAN_CLKP 30
GNDSB SRC3C PCIE_LAN_CLKN 30
43 9
1

C405 33P/50V_4 CG_XOUT GNDSATA SRC4T
46 GNDCPU SRC4C 8
52 6 CLK_VGA_27M_SS R217 33_4 OSC_SPREAD
GNDHTT SRC7T/27M_SS OSC_SPREAD 18
60 5 CLK_VGA_27M_NSS R213 75/F_4
GNDREF SRC7C/27M EVGA-XTALI 18
42 R215 100/F_4
SRC6T/SATAT
SRC6C/SATAC 41 27Mhz for Dis only SSIN - for M82 - 3.3V level input
CG_XIN 61 X_TALIN --for M92 -1.8V level input
CG_XOUT X1
62 X2
54 NBHTREFCLK0P R188 *0_4/S NBHT_REFCLKP
HTT0T/66M NBHT_REFCLKP 10
can remove MOSFET level shift 53 NBHTREFCLK0N R189 *0_4/S NBHT_REFCLKN
HTT0C/66M NBHT_REFCLKN 10
SB/clock gen / DDR2 is 3.3V/S0 PCLK_SMB 2
6,7,13,33 PCLK_SMB SMBCLK
PDAT_SMB 3
power level 6,7,13,33 PDAT_SMB SMBDAT
64 CLK48MUSB R174 22_4 CLK_48M_USB
48MHz_0 CLK_48M_USB 13
R191 22_4 CLK_48M_CR
CLK_48M_CR 26
CLK_PD# 51 Ra
PD# SEL_HT66 R171 158/F_4
REF0/SEL_HTT66 59
58 SEL_SATA R186 33_4
REF1/SEL_SATA EXT_SB_OSC 12
CLKREQ0# 23 57 SEL_27 R169 90.9/F_4
B *CLKREQ0# REF2/SEL_27 T25 EXT_NB_OSC 10 B
CLKREQ4# 38
CLKREQ3# *CLKREQ4#
39 *CLKREQ3# Rb
CLKREQ2# 44
CLKREQ1# *CLKREQ2#
45 *CLKREQ1#
+3V RX880 RS880
TGND

SI change 1.2V to 3.3V from AMD request
1.8V 1.1V
R207 *8.2K_4 CLKREQ1#
RTM880N-796_QFN64
65

R190 8.2K_4 CLK_PD# Ra 82.5R 158R
For EMI
Rb 130R 90.9R
+3V

C399 *10P/50V_4 EXT_NB_OSC R247 *8.2K_4 CLKREQ0# RES CHIP 130 1/16W +-1%(0402)L-F -->CS11302FB15
R212 *8.2K_4 CLKREQ2# +3V_CLKVDD RES CHIP 158 1/16W +-1%(0402) -->CS11582FB00
C404 *10P/50V_4 CLK_48M_USB R222 *8.2K_4 CLKREQ3# RES CHIP 90.9 1/16W +-1%(0402) -->CS09092FB15
R231 *8.2K_4 CLKREQ4# RES CHIP 82.5 1/16W +-1%(0402) -->CS08252FB11

if use clock SLG SLG8SP628VTR--AL8SP628000
C440 *10P/50V_4 EVGA-XTALI request pin , need
to pull Hi for
RTL RTM880N-796-- AL000880001
C456 *10P/50V_4 OSC_SPREAD
default sttting * default R173 R176 Clock chip has internal serial
*8.2K_4 8.2K_4
66 MHz 3.3V single ended HTT clock terminations
1 SEL_27 for differencial pairs, external resistors
SEL_HTT66 SEL_SATA
0* 100 MHz differential HTT clock SEL_HT66
are
A A
reserved for debug purpose.
100 MHz non-spreading differential SRC clock not need to
SEL_SATA 1 R192
8.2K_4 R185 stuff ,
0* 100 MHz spreading differential SRC clock *8.2K_4 R169 have
SEL_27 1* 27MHz non-spreading singled clock
pull LOW PROJECT : OP8
0 100 MHz spreading differential SRC clock
Quanta Computer Inc.
RS780M/RX780M
Size Document Number Rev
Custom 1A
Clock Generator
NB5/RD2
Date: Friday, March 20, 2009 Sheet 2 of 42
5 4 3 2 1
5 4 3 2 1

BLM21PG221SN1D(220,100M,2A)_8 CPU_THERMDC

03
+CPUVDDA
W/S= 15 mil/20mil CPU_THERMDA
H_THRMDC 5
+2.5V H_THRMDA 5
L32 CPU CLK
VLDT use 1.5A Max current CPU_LDT_RST# 300_4 R128
+1.2V +1.2V_VLDT C340 LS0805-100M-N C313 C294 C292 CPUCLKP CPU_PWRGD 300_4 R136
2 CPUCLKP
4.7U/6.3V_6 4.7U/6.3V_6 0.22U/6.3V_4 3300P/50V_4 CPUCLKN CPU_LDT_STOP# 300_4 R132
2 CPUCLKN
R384 *0_6/S CPU_LDT_REQ# 300/F_4 R458 +1.8V
Keep trace from resisor to CPU within 0.6"
R383 *0_6/S +1.2V_VLDT +CPUVDDA 250mA
keep trace from caps to CPU within 1.2" U24D
U24A W/S= 15 mil/20mil
SI Change from AMD request SI Change from AMD request
+CPUVDDA F8 M11
C645 10U/6.3V_8 +1.2V_VLDT +1.2V_VLDT 10U/6.3V_8 C766 CPUCLKIN R125 169/F_4 CPUCLKIN# +CPUVDDA VDDA1 KEY1
D1 VLDT_A0 HT LINK VLDT_B0 AE2 F9 VDDA2 KEY2 W18
C662 10U/6.3V_8 +1.2V_VLDT D2 AE3 +1.2V_VLDT 0.22U/6.3V_4 C745
D C676 0.22U/6.3V_4 +1.2V_VLDT VLDT_A1 VLDT_B1 +1.2V_VLDT 180P/50V_4 C757 CPUCLKP C326 3900P/25V_4 CPUCLKIN CPU_SVC_R D
D3 VLDT_A2 VLDT_B2 AE4 A9 CLKIN_H SVC A6
C671 180P/50V_4 +1.2V_VLDT D4 AE5 +1.2V_VLDT CPUCLKN C327 3900P/25V_4 CPUCLKIN# A8