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ZZZ1



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PCB




2
Compal Confidential 2




KAWG0 Schematics Document
AMD S1g1 / RS690MC / SB600
2009 / 04 / 09
3

Rev:1.0 3




4 4




Security Classification
2005/05/09
Compal Secret Data
2009/06/11 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401650
Date: Friday, April 10, 2009 Sheet 1 of 46
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Compal confidential
Project Code: KAWG0 AMD S1g1 CPU
Thermal Sensor Clock Generator DDRII 533/667 DDRII-SO-DIMM X2
File Name : LA-4861P
ADM1032ARM ICS951462 638P PGA page 10,11
page 6,7,8,9
D
page 8 page 17 Dual Channel D

H_A#(3..31) H_D#(0..63)
HT 16x16 1000MHZ

SIG1 : 35mm x 35mm x (2.20mm+2.11mm) 638pin
CRT AM2 : 40mm x 40mm x (4.56mm+2.11mm) 940pin
page 24 ATI-RS690MC
465 BGA RS485 : 21mm x 21mm (19.2mm x 19.2mm) x2.33mm 465pin
RS690 : 21mm x 21mm (19.2mm x 19.2mm) x2.33mm 465pin
LCD CONN
page 12,13,14,15,16
page 25 SB460 : 27mm x 27mm (21.6mm x 21.6mm) x2.33mm 549pin
SB600 : 23mm x 23mm (21.6mm x 21.6mm) x2.33mm 549pin
A-Link Express
4 x PCIE
PCIE X1

USB 2.0
C C



BT Conn Camera USB conn
Mini card 10/100 LAN ATI-SB600 page 38 X2
CardReader
RT5159
WLAN AR8114 549 BGA
page 31 page 26 HDA Codec
HD Audio AMP & Audio Jack
ALC272 page 40
page 18,19,20,21,22 page 39 TPA6017
MDC Conn.
page 41
RJ45 CONN HeadPhone
page 27
Out
SATA0 HDD Conn.
page 23
LPC BUS MIC In
B B

SATA2
ODD Conn.
page 23
ENE KB926
Power On/Off CKT / LID switch / Power OK CKT Ver:D2 page 28
page 37

Second HDD/ODD
DC/DC Interface CKT. CIR/LED RTC CKT. Int. KBD
page 41 page 38 page 18 page 29 SATA1 HDD Conn.
Touch Pad
CONN. page 29 SATA3 ODD Conn.
Power Circuit DC/DC SPI BIOS
page 30
page 42~48


A A




Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/03/08 Deciphered Date 2009/06/11 Title
SCHEMATIC,MB A4861
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401650
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 14, 2009 Sheet 2 of 46
5 4 3 2 1
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SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Voltage Rails
Full ON HIGH HIGH HIGH HIGH ON ON ON ON

Power Plane Description S1 S3 S5 S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW

VIN Adapter power supply (19V) N/A N/A N/A S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
D D
B+ AC or battery power rail for power circuit. N/A N/A N/A
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF
+CPU_CORE Core voltage for CPU ON OFF OFF
+0.9V 0.9V switched power rail for DDR terminator ON ON OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+1.2V_HT 1.2V switched power rail ON OFF OFF
+1.5VS 1.5V switched power rail ON OFF OFF
+1.8VALW 1.8V always on power rail ON ON ON* Board ID / SKU ID Table for AD channel
+1.8V 1.8V power rail for DDR ON ON OFF Vcc 3.3V +/- 5%
+1.8VS 1.8V switched power rail ON OFF OFF Ra/Rc/Re 100K +/- 5%
+2.5VS 2.5V switched power rail ON OFF OFF Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
+3VALW 3.3V always on power rail ON ON ON* 0 0 0 V 0 V 0 V
+3VS 3.3V switched power rail ON OFF OFF 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
+5VALW 5V always on power rail ON ON ON* 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+5VS 5V switched power rail ON OFF OFF 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
+VSB VSB always on power rail ON ON ON* 4 56K +/- 5% 1.036 V 1.185 V 1.264 V
+RTCVCC RTC power ON ON ON 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
C C
6 200K +/- 5% 1.935 V 2.200 V 2.341 V
7 NC 2.500 V 3.300 V 3.300 V


BOARD ID Table
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

External PCI Devices Board ID PCB Revision BTO Option Table
Device IDSEL# REQ#/GNT# Interrupts
0 0.1
BTO Item BOM Structure
1 0.2
NC Function NC@
2 0.3
10/100 Lan 8114@
3 1.0
GIGA Lan 8132@
4
17" ID 17@
5
15" ID 15@
6
7
B B



EC SM Bus1 address EC SM Bus2 address SKU ID Table
Device Address Device Address SKU ID SKU
Smart Battery 0001 011X b ADM1032 1001 100X b 0
1
2
3
4
5
SB600 SM Bus 1 address SB600 SM Bus 2 address 6
7
Device Address Device Address

Clock Generator 1101 001Xb New Card
(ICS951462)
A DDR DIMM0 A
1001 000Xb
DDR DIMM2 1001 010Xb
Wireless Lan

Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/03/08 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401650
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 14, 2009 Sheet 3 of 46
5 4 3 2 1
5 4 3 2 1




DIMMA
DDR_A_CLK[1..2]



D D
CPU CLK CPU




DIMMB
DDR_B_CLK[1..2]
200MHZ S1G1 SOCKET




H_CLKI[1:0] Host Bus H_CLKO[1:0]




C C
SBLINK_CLK
100MHZ

NBSRC_CLK
14.31818MHz ATI NB
100MHZ
EXTERNAL RS690
CLK GEN. HTREFCLK
ICS951462
66MHZ

NB_OSC
14.318MHZ




B B


SB_OSCIN
CLK_PCIE_MINI




14.318MHZ
CLK_PCIE_LAN
100MHZ




100MHZ




SBSRC_CLKP
100MHZ
ATI SB
SB600
CLK_48M_USB CLK_PCI_LPC EC
48MHZ 33MHZ ENE
KB926D2


Mini PCI Socket LAN
32.768K Hz
Mini card Atheros 25M Hz
AR8114 32.768K Hz
A A




Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/10/10 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401650
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 14, 2009 Sheet 4 of 46
5 4 3 2 1
5 4 3 2 1




AMD S1G1 socket
LDO Regulator
CM8562IS +2.5VS VDDA 2.5V 250mA
BATTERY CPU core +CPU_CORE
BATTERY CHARGER B+ CPU_B+ PWM 0.9V
+CPU_CORE VDD
11.1V MAX1908ETI MAX8774GTL 0.95V 18.89A
2.2Ah/6-cell
+1.8V VDDIO 1.8V 3A CPU
D D

+1.2VALW +0.9V VTT 0.9V 750mA
MOSFET +1.2V_HT +1.2V_HT
SI4856ADY +1.2V_HT VLDT 1.2V 0.5A
AC ADAPTOR
19V 65W
+1.2VALW
+1.2VALW
+1.8VALW DDRII SODIMMX2
B+ PWM +1.8V +1.8V
ISL6227CAZ-T +1.8VALW VDD_MEM 1.8V 6.08A
MOSFET +1.8V SYSTEM
SI4856ADY VTT_MEM MEMORY
0.9V 0.5A
+0.9V

MOSFET +1.8VS +1.8VS
SI4856ADY RS690MC
VDD_CORE 5A
VDDA_12 2.5A
LDO Regulator +0.9V
APL5331KAC VDD_HT 800mA 1.2V
+1.8VALW VDD_PLL 50mA
C C
PLLVDD12 70mA
AVDDQ 150mA
AVDDDI 150mA
+3VALW VDD_18 200mA
+5VALW +3VALW NB
MOSFET +3VS VDDR 100mA
B+ PWM SI4800BDY 1.8V
MAX8734AEEI LPVDD 20mA
LVDDR18D 150mA
+3VALW
PLLVDD18 150mA
HTPVDD 200mA
+5VALW +5VS AVDD 100mA
SWITCH
SI4800BDY VDDR3 70mA 3.3V
LVDDR33 180mA
+5VALW

SB600
B
VDD 500mA B

S5_1.2V 80mA
FAN Control
LDO Regulator AVDDCK_1.2V 40mA
+4.75V APL5605
G9191 PCIE_PVDD 35mA
LDO Regulator +5VS 500mA USB Power PCIE_VDDR 450mA 1.2V
CM8562IS +1.5V Switch AVDD_SATA 300mA
G528
PLLVDD_SATA 65mA
+5V USB_PHY_1.2V 90mA
+3VS SB
VDDQ 150mA
S5_3.3V 15mA
+3VALW
AVDDCK_3.3V 10mA
XTLVDD_SATA 5mA 3.3V
AVDDC 15mA
LCD panel Realtek EC Audio Codec Audio AMP LAN CLOCK GEN AVDD TX/RX 0.5A
15.6" Mini Card RTS5159 ENE KB926 ALC272 TPA6017A2 Atheros AR8114 ICS951462 USB X2 SATA
CPU_PWR 10mA 1.8V

A
+5V 2.5~ A
B+ 300mA +1.5VS 500mA +3.3VS 300mA +3.3VS 3mA +4.75V 45mA +5V 25mA +3.3V 201mA +3.3V 400mA Dual +5V 3A RTC VBAT 3.3V
+3.3VS 1A Bettary
+3.3 350mA +3.3VALW 330mA +3.3VALW 30mA +3.3VS 25mA 1.5A +3.3V


Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/10/10 Deciphered Date 2009/06/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A4861
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401650
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 14, 2009 Sheet 5 of 46
5 4 3 2 1
5 4 3 2 1




D H_CADIP[0..15] H_CADOP[0..15] D
12 H_CADIP[0..15] H_CADOP[0..15] 12
H_CADIN[0..15] H_CADON[0..15]
12 H_CADIN[0..15] H_CADON[0..15] 12




+1.2V_HT
JCPU1A
D4 VLDT_A3 VLDT_B3 AE5 1 2
VLDT=500mA D3 AE4 C84 4.7U_0805_10V4Z
VLDT_A2 VLDT_B2
D2 VLDT_A1 VLDT_B1 AE3
D1 VLDT_A0 VLDT_B0 AE2


H_CADIP15 H_CADOP15
H_CADIN15
N5
P5
L0_CADIN_H15 L0_CADOUT_H15 T4
T3 H_CADON15 Reserve when PVT
H_CADIP14
H_CADIN14
M3
L0_CADIN_L15
L0_CADIN_H14
L0_CADOUT_L15
L0_CADOUT_H14 V5 H_CADOP14
H_CADON14 +5VS
FAN1 Conn +5VS
for cos down
M4 L0_CADIN_L14 L0_CADOUT_L14 U5
H_CADIP13 L5 V4 H_CADOP13 C92 10U_0805_10V4Z
L0_CADIN_H13 L0_CADOUT_H13




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