Text preview for : quadra.centris_660av.pdf part of apple quadra.centris 660av apple quadra.centris_660av.pdf

Back to : quadra.centris_660av.pdf | Home

K Service Source

Centris 660AV/Quadra
K Service Source

Centris 660AV/Quadra 660AV
Basics Overview - 2

This manual includes
complete repair procedures
for the Centris 660AV and
Quadra 660AV shown at left.

Figure: Centris 660AV and Quadra 660AV
K Service Source

Centris 660AV/Quadra 660AV
Specifications Processors - 1


Processor Motorola 68040
25 MHz
Built-in paged memory management unit (PMMU), floating point
unit (FPU), and 8K memory cache

Addressing 32-bit registers
32-bit address/data bus

Direct Memory A Peripheral Subsystem Controller (PSC) provides direct
Access (DMA) memory access (DMA) between the 68040 buses and
peripheral devices
Specifications Processors - 2

Digital Signal AT&T DSP3210 32-bit floating-point digital signal processor
Processor (DSP) Supports real-time tasks such as speech recognition, audio
compression, and analog modem signal processing.
Specifications Memory - 3


RAM 8 MB (4 MB soldered DRAM plus 4 MB SIMM) standard,
expandable to 68 MB
72-pin SIMMs
70 ns access time

ROM 1 MB soldered on logic board

PRAM 256 bytes of parameter memory
Specifications Memory - 4

VRAM 1 MB (two banks of 512K VRAM soldered on board)

Clock/Calendar Maximum pixel depths for graphics: