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8 7 6 5 4 3 2 1




MS-6541 Micro-ATX
INTEL (R) Brookdale-G Chipset
D
Cover Sheet 1 D

Willamette/Northwood 478pin mPGA-B Processor Schematics
Block Diagram 2
CPU:
Clock CY28323 & ATA100 IDE CONNECTORS 3
Willamette/Northwood mPGA-478B Processor
mPGA478-B INTEL CPU Sockets 4-5
INTEL Brookdale-G GMCH -- North Bridge 6-8 System Brookdale-G Chipset:
INTEL GMCH (North Bridge) +
INTEL ICH4 -- South Bridge 9-10
INTEL ICH4 (South Bridge)
LPC I/O -- LPC47B367 11
On Board Chipset:
C AC'97 Codec AD1981 & Internal Speaker 12 C


BIOS -- FWH
FWH -- BIOS & SMBus Isolation 13
AC'97 Codec -- AD1981
DDR DIMM1&2 and DDR Terminator Resistor 14-15 LPC Super I/O -- LPC47B367
AGP Slot 16 Clock Generation -- CY28323 / ICS950219
PCI SLOT 1 & 2 & 3
LAN -- Intel KINNERITH controller
17

IO Connectors 18 Expansion Slots:
USB Connectors 19 PCI2.2 SLOT * 3
B Front Panel & ATX Connectors 20 PCI Extender Connector * 1 B




Votlage Regulator 21
DDR REGULATOR 22

Intersil HIP6301V+HIP6601A/02A-- CPU Power 23
PCI Extender & Front Audio Connector 24
LAN KINNERITH 10/100/Mbit Controller 25
VGA Connector 26

A
FAN CONTROL 27 A




Manual Part 28 MICRO-STAR
MSI
GPIO SETTTING 29-30 Title
COVER SHEET
Size Document Number Rev
0B
MS-6541I1
Date: Monday, April 08, 2002 Sheet 1 of 32
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1




D D




ITP Port

(100/133MHz)

VCC12 Power VRM 9.2 Willamette/Northwood CK408 Clock
Supply CONN Socket (mPGA478-B) (100/133MHz)
Scalable Bus

AGP 4X (1.5V) 4X (66MHz) AGP
VGA CONN
GMCH: Graphic &
Memory
Controller HUB (200/266 MHz)
DDR DIMM1,2


C HUB Interface C



(14.318MHz)
SM Bus
Hardware
Monitor ICH4: I/O PCI (33MHz)
PCI Slots 1:3
ATA33/ATA66/ATA100 Controller HUB
IDE CONN 1&2 PCI (33MHz)
(48MHz) LAN Controller




(33MHz)
(33MHz)
USB Port 0:1
USB Back Panel
LPC Bus
AC Link AC '97 Audio
USB Port 2:3 Codec
USB Back Panel
MIC In
FWH: Firmware HUB
B SMC I/O Line In B

USB Port 4:5 LPC47B367 Brookdale -G Chipset Line Out
USB Front Panel CD-ROM (Option)


PS2 Mouse & Parallel (1) Floppy Disk
Keyboard Serial (2) Drive




A A




MICRO-STAR
MSI
Title
BLOCK DIAGRAM
Size Document Number Rev
0B
MS-6541I1
Date: Monday, April 08, 2002 Sheet 2 of 32
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1


CLOCK GENERATORBLOCK
Shut Source Termination Resistors Pull-Down Capacitors
U1 CPUCLK R1 49.9_1%
FB1 80S_0805 CLK_VCC3 39 41 CPU0 R2 27.4_1% CPUCLK CPUCLK# R3 49.9_1% CPUCLK C1 X_10p
VCC3 CPU_VDD CPU0 CPUCLK (4)
40 CPU0# R4 27.4_1% CPUCLK# MCHCLK R5 49.9_1% CPUCLK# C2 X_10p
CPU0# CPUCLK# (4)
CB7 CB273 CB2 MCHCLK# R7 49.9_1% MCHCLK C3 X_10p
0.1u 10u_1206 0.1u 36 38 CPU1 R10 27.4_1% MCHCLK ITP_CLK R763 49.9_1% MCHCLK# C4 X_10p
CPU_GND CPU1 MCHCLK (6)
37 CPU1# R12 27.4_1% MCHCLK# ITP_CLK# R764 49.9_1% ITP_CLK C324 X_10p
CPU1# MCHCLK# (6)
ITP_CLK# C325 X_10p
46 MCH_66 C7 X_10p
D MREF_VDD 45 CPU2 R765 27.4_1% ITP_CLK ICH_66 C8 X_10p D
CB3 CPU2/CPU_STP# 44 CPU2# R766 27.4_1% ITP_CLK#
ITP_CLK (4) Trace less 0.2" AGPCLK C9 X_10p
CPU2#/PCI_STP# ITP_CLK# (4)
0.1u 43 ICH_PCLK C10 X_10p
MREF_GND 49.9ohm for 50ohm M/B impedance FWH_PCLK C11 X_10p
32 31 3V66_0 R13 33 MCH_66 PCICLK0 C13 X_10p
3V66_VDD 3V66_0 MCH_66 (6)
30 3V66_1 R508 33 ICH_66 PCICLK1 C14 X_10p
CB4 3V66_1 28 3V66_2 R588 33 AGPCLK
ICH_66 (10) CLOCK STRAPPIN R SS O S
G E I T R PCICLK2 C15 X_10p
3V66_2 AGPCLK (16)
0.1u 29 27 PCICLK3 C12 X_10p
3V66_GND 3V66_3 PCICLK4 C309 X_10p
6 FS2 R20 33 ICH_PCLK FS4 R639 10K VCC3V SIO_PCLK C16 X_10p
FS2/PCI_F0 ICH_PCLK (9)
FB2 80S_0805 VCC3V 9 7 FS3 R15 33 SIO_PCLK FS3 R640 10K VCC3V ICH_14 C18 10p
VCC3 PCI_VDD FS3/PCI_F1 8 SIO_PCLK (11)
PCI_F2 R16 33 FWH_PCLK FWH_PCLK (13) FS2 R641 10K VCC3V SIO_14 C19 10p
CB1 CB275 CB6 MODE/PCI_F2 FS1 R767 10K R18 1.5K VCC3V ICH_48 C20 X_10p
0.1u 10u_1206 0.1u 5 10 FS4 DOT_CLK C21 X_10p
PCI_GND FS4/PCI0 BSEL0 (4)
11 PCI1 7 8 PCICLK0 CODEC_14 C327 10p
PCI1 PCICLK0 (17)
18 12 PCI2 RN2 5 6 PCICLK1 FS0 R768 10K R642 1.5K VCC3V BITCLK_14 C328 X_10p
PCI_VDD PCI2 PCICLK1 (17)
14 PCI3 33 3 4 PCICLK2
PCI3 PCICLK2 (17)
CB5 15 PCI4 1 2 PCICLK3 Q66_C
PCI4 PCICLK3 (24)
0.1u 13 16 PCI5 R643 33 PCICLK4
PCI_GND PCI5 17
PCICLK4 (24)
Q66_B R644 X_1K BSEL0
used only for EMI issue
PCI6 Q66
R757 10 VCC3VA VCC3VA 24 X_2N3904S
VCC3
C24 48_VDD 22 FS0 R26 33 ICH_48 BSEL0="0" FOR 100 PSB, "1" FOR 133 PSB Trace less 0.2"
FS0/48MHz ICH_48 (10)
0.01u 23 FS1 R27 33 DOT_CLK
FS1/24_48MHz DOT_CLK (6)
CB311 21 SMBCLK_ISO R29 4.7K
10u_0805 48_GND SMBDATA_ISO R32 4.7K VCC3
2 R808 X_33 BITCLK_14
REF_VDD BITCLK_14 (10)
C27 48 MUL0 R24 33 SIO_14
MUL0/REF0 SIO_14 (11)
C 0.01u
MUL1/REF1
1 MUL1 R25 33 ICH_14
ICH_14 (10) FS4 FS3 FS2 FS1 FS0 CPU (MHz) MUL0 R31 X_1K C
47 R799 33 CODEC_14 R727 10K VCC3V
REF_GND CODEC_14 (12) MUL 1:0 0 0 4X
34 3
1 1 1 0 1 100 MHz 0 1 5X
CLK_X1 C23 22p
CORE_VDD X1 1 0 6X
C26 1 1 1 1 1 133 MHz MUL1 R509 X_1K
0.01u X1 14M-32pf-HC49S-D R36 10K VCC3V 1 1 7X
33 4 CLK_X2 32pF C25 22p
CORE_GND X2
SMBCLK_ISO 26 35 IREF R28 475_1%
(13) SMBCLK_ISO SCLK IREF
SMBDATA_ISO 25
(13) SMBDATA_ISO SDATA SDD[0..15] (10)
20 Iref = 2.32mA
19 RST# 42 PWR_DN# R37 1K VCC3V SDRD11 7 8 SDD11 SDRD15 7 8 SDD15
VCC3V R30 2.2K VTT_GD# PWR_DN# C335 X_1u-0603 SDRD4 RN82 5 6 SDD4 SDRD0 RN83 5 6 SDD0
VTT_GD# CYPRESS CY28323/ICS 950219 SDRD10 3 4 SDD10 SDRD14 3 4 SDD14
(11) -PWRGD_30MS
R9 1K SDRD5 33 1 2 SDD5 SDRD1 33 1 2 SDD1
R39 SDRD9 7 8 SDD9 SDRD13 7 8 SDD13
X_1K SDRD6 RN86 5 6 SDD6 SDRD2 RN87 5 6 SDD2
SDRD7 3 4 SDD7 SDRD12 3 4 SDD12
SDRD8 33 1 2 SDD8 SDRD3 33 1 2 SDD3



PRIMARY IDEBLOCK SECONDARY IDEBLOCK * Trace Width : 5mils
ATA100 IDE CONNECTORS *
*
*
Trace Spacing : 7mils
Length(longest)-Length(shortest)<0.5"
Trace Length less than 5"
PRIMAR1 PDRD15 7 8 PDD15 SECON1
PDD[0..15] (10)
YJ220-CB-1 PDRD0 RN81 5 6 PDD0 YJ220-CW-1
HD1_RST# R43 33 PRIMAR1_1 1 2 PDRD14 3 4 PDD14 HD2_RST# R44 33 SECON_1 1 2
B
PDRD7 3 4 PDRD8 PDRD1 33 1 2 PDD1 SDRD7 3 4 SDRD8 B
PDRD6 5 6 PDRD9 PDRD13 7 8 PDD13 SDRD6 5 6 SDRD9
PDRD5 7 8 PDRD10 PDRD2 RN85 5 6 PDD2 SDRD5 7 8 SDRD10
PDRD4 9 10 PDRD11 PDRD12 3 4 PDD12 SDRD4 9 10 SDRD11
PDRD3 11 12 PDRD12 PDRD3 33 1 2 PDD3 SDRD3 11 12 SDRD12
PDRD2 13 14 PDRD13 PDRD11 7 8 PDD11 SDRD2 13 14 SDRD13
PDRD1 15 16 PDRD14 PDRD4 RN80 5 6 PDD4 SDRD1 15 16 SDRD14
PDRD0 17 18 PDRD15 PDRD10 3 4 PDD10 SDRD0 17 18 SDRD15
19 PDRD5 33 1 2 PDD5 19
21 22 VCC5 PDRD9 7 8 PDD9 21 22 VCC5
(10) PD_DREQ (10) SD_DREQ
23 24 PDRD6 RN84 5 6 PDD6 23 24
(10) PD_IOW# (10) SD_IOW#
25 26 PDRD7 3 4 PDD7 25 26
(10) PD_IOR# (10) SD_IOR#
27 28 R645 PDRD8 33 1 2 PDD8 27 28 R646
(10) PD_IORDY (10) SD_IORDY
29 30 20K 29 30 20K
(10) PD_DACK# (10) SD_DACK#
31 32 31 32
(9) IRQ14 33 34 (9) IRQ15 33 34
(10) PD_A1 ATADET0 (11) (10) SD_A1 ATADET1 (11)
35 36 35 36
(10) PD_A0 PD_A2 (10) (10) SD_A0 SD_A2 (10)
37 38 37 38
(10) PD_CS#1 PD_CS#3 (10) (10) SD_CS#1 SD_CS#3 (10)
39 40 39 40
(20) PD_LED (20) SD_LED
VCC3
R47 C29 R48 C30 R49 C31 R50 C32
4.7K 220p 10K X_4700p PD_IORDY R861 4.7K PDD7 R837 10K 4.7K 220p 10K X_4700p
SD_IORDY R862 4.7K SDD7 R838 10K
VCC5 VCC3 VCC5 VCC3




A RESET BLOCK A




MICRO-STAR
R51 330 R52 330 R53 330 MSI
VCC3 VCC5 U2E VCC5
U2A U2B
PCIRST# 1 2 PCIRST# 3 4 HD2_RST# PCIRST# 11 10 HD1_RST# Title
(9) PCIRST# PCIRST#1 (6,11,13)
DM7407-SOIC14 DM7407-SOIC14 DM7407-SOIC14
Clock CY28323 & ATA100 IDE CONNECTORS
(VCC5_SB) (VCC5_SB) (VCC5_SB) Size Document Number Rev
0B
MS-6541I1
Date: Monday, April 08, 2002 Sheet 3 of 32
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1




CPU SIGNAL BLOCK CPU GTL REFERNCE VOLTAGE BLOCK




NC_VSS_SENSE
NC_VCC_S N E
(6) HA#[3..31]




ES
VID[0..4] (11,23)




HA#31
HA#30




HA#21
HA#20




HA#11
HA#10
HA#27
HA#26
HA#25




HA#17
HA#16
HA#15
HA#29
HA#28



HA#24
HA#23
HA#22


HA#19
HA#18



HA#14
HA#13
HA#12




HA#7
HA#6
HA#5
HA#9
HA#8



HA#4
HA#3
VCCP




VID4
VID3
VID2
VID1
VID0
AD26
AC26
AE25
D R54 D




AB1




AE1
AE2
AE3
AE4
AE5
W2



W1




M1

M4
M3

M6
U4


R6


U3

U1

R3


R2

N5
N4
N2

N1
T5



T4



T2




T1




L2

L3

L6