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VCC_CORE BL5M Block Diagram
CLOCK GENERATOR
+1.5V
HDMI CEC HDMI Level Shift Intel CK505
Page 19 Page 21
PENRYN ICS9LPR363
Page 2
A
+1.05V uFCPGA A
CRT
Page 20
Page 3,4
+1.25V
INT MIC LCD PANEL FSB(667/800MHZ) CRT
Page 19 Page 19 VGA CONNECTOR
HDMI
SDVO (FOX)
+1.8VSUS LCD/LED
+1.8V PCI-E 16X Lan Page 18
CRT NB
+3VPCU CANTIGA
+3V_S5 LVDS DDRII-SODIMM1
533/ 667 MHZ DDR II
+3VSUS SATA
DDRII-SODIMM2
+3V SATA - HDD Page 5,7,8,9,10,11 Page 16, 17
+5VPCU Page 22
+5V_S5 SATA
+5V SATA - ODD DMI(x2/x4) MINI CARD-3 MINI CARD-4
+SMDDR_VTERM Page 22 UMA HD-DVD ROBSON
+SMDDR_VREF Page 25 (FTB) Page 25
B B
USB-0
DAUGHTER PCIE-2 PCIE-4
BOARD
LAN/B USB PCI-Express
Page 26
PCIE-6 PCIE-3 PCIE-1 PCIE-5
USB-3
Camera
Page 19 MINI CARD-1 MINI CARD-2 LAN
NEW CARD
WLAN UMA TV/ROBSON Connector
USB-5 USB 2.0 SB Page 25 Page 25 Page 27 Page 26
WLAN
Page 25 ICH9M LAN/RJ11/RJ45/USB/RF DAUGHTER BOARD
USB-1
DAUGHTER
Finger Printer
BOARD
(FTB) Page 26
Marvell LAN
PCI Bus
10/100/Giga
Azalia
USB-2 88E8040T/88E8055
Bluetooth Page 12, 13, 14, 15
Page 26
PCMCIA Card
USB-9
New Card LPC 32.768KHz
Controller Reader/1394
Page 27 (CB 1410) (OZ129T) Transformer
Page 23 Page 24
C USB-7 C
M/B USB2
Page 27
RJ45 RJ11 USB RF
PCMCIA 5 IN 1 1394
USB-4 WPC8763LDG Page 23 Page 24 Page 24
DAUGHTER
BOARD
Felica
(FTB) Page 26 LED Board
Page 28 Page 26
USB-6
M/B USB
Page 27
Low Cost Board
USB-8
TV/ROBSON Page 26
Page 25
DAUGHTER
Port-A
HP Key FLASH MMB Board BOARD
Port-B VR FAN Kill SW CIR G-Sensor
Page 30 Board ROM Page 26
AUDIO CODEC Page 30 Page 3 Page 27 Page 26 Page 28 Page 28 Page 22
(CX20561)
MIC JACK Page 29 Power Board
Page 30 Page 26
Port-C
D D
INT SPK SPK AMP
Page 29 Page 29 FM TUNER Touch Pad
Reserve FM
& MDC Page 29
Board Page 26
Page 29
Reserve MIC
Page 29
Quanta Computer Inc.
MDC Board RJ11 PROJECT : BL5M Montevina
Reserve MIC Size Document Number Rev
1A
Page 29 Block Diagram
Date: Tuesday, March 04, 2008 Sheet 1 of 37
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Clock +1.05V_VDD
BOM Option Table
Generator
Reference Description
PBY160808T-301Y-N_6 L18 +1.05V IV@ INT VGA
L19 PBY160808T-301Y-N_6 VDD_CK_VDD_48 C265 0.1u/10V_4 C257 C268 C276 C238 C274 C227 C278 C242
EV@ EXT VGA
+3V
*10u/10V_8 10u/10V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
C286
C279 0.1u/10V_4
10u/10V_8
C275 10u/10V_8
+3V
D D
C240 0.1u/10V_4 11/01 Modify U12
2 48 PM_STPPCI# R247 2.2K_4
C277 0.1u/10V_4 VDD_PCI IO_VOUT
9
VDD_48 CGCLK_SMB
16 64
VDD_PLL3 SCLK CGDAT_SMB PM_STPCPU# R248 2.2K_4
61 63
VDD_REF SDA
C241 0.1u/10V_4 VDD_CK_VDD_48
CK505 PM_STPPCI#
39 38 PM_STPPCI# (16)
VDD_SRC SRC5/PCI_STOP# PM_STPCPU# NEW_CLKREQ#_R R305
55
VDD_CPU SRC5#/CPU_STOP#
37 PM_STPCPU# (16) To SB 10K_4
12 54 CLK_CPU_BCLK_R RP34 1 2 0X2
+1.05V_VDD VDD_96_IO CPU0 CLK_CPU_BCLK (3)
C239 0.1u/10V_4 20 53 CLK_CPU_BCLK#_R 3 4 To CPU
VDD_PLL3_IO CPU0# CLK_CPU_BCLK# (3)
26
VDD_SRC_IO_1 CLK_MCH_BCLK_R RP35
45 51 1 2 0X2 CLK_MCH_BCLK (5)
VDD_SRC_IO_3 CPU1 CLK_MCH_BCLK#_R
36
VDD_SRC_IO_2 CPU1#
50 3 4 CLK_MCH_BCLK# (5) To NB
49
VDD_CPU_IO CLK_PCIE_MINI3_R RP36
47 1 2 IV@0X2 CLK_PCIE_MINI3 (25)
SRC8/ITP CLK_PCIE_MINI3#_R
SRC8#/ITP#
46 3 4 CLK_PCIE_MINI3# (25) To MINI3
PCLK_DEBUG R294 33_4 PCLK_DEBUG_R 1 35 CLK_PCIE_3GPLL#_R RP39 1 2 0X2
(25) PCLK_DEBUG PCI0/CR#_A SRC10# CLK_PCIE_3GPLL_R CLK_PCIE_3GPLL# (6)
SRC10
34 3 4 CLK_PCIE_3GPLL (6) To NB
R306 *33_4 PCLK_PCM_R 3
T84 PCI1/CR#_B CLK_MCH_OE#_R
33 R261 475/F_4 CLK_MCH_OE# (6)
PCLK_OZ129 R307 33_4 PCLK_OZ129_R SRC11/CR#_H NEW_CLKREQ#_R R300 475/F_4
(23) PCLK_OZ129 4 32 NEW_CLKREQ# (28)
PCI2/TME SRC11#/CR#_G
C234 27p_4 CG_XIN R308 10K_4 PCI_CLK_SIO_R 5 30 CLK_PCIE_NEW_R RP41 3 4 0X2
PCI3 SRC9 CLK_PCIE_NEW_R# CLK_PCIE_NEW (28)
SRC9#
31 1 2 CLK_PCIE_NEW# (28) To New Card
2
Y3 PCLK_591 R309 33_4 PCLK_591_R 6
(29) PCLK_591 PCI4/SRC5_EN CLK_PCIE_MINI2_R
CL=20p SRC7/CR#_F
44 RP37 1 2 0X2 CLK_PCIE_MINI2 (25)
14.318MHZ PCLK_ICH R310 33_4 PCLK_ICH_R 7 43 CLK_PCIE_MINI2#_R 3 4 To MINI2
(15) PCLK_ICH PCIF5/ITP_EN SRC7#/CR#_E CLK_PCIE_MINI2# (25)
1
C258 27p_4 CG_XOUT CG_XIN 60 41 CLK_PCIE_MINI_R RP38 1 2 0X2
XTAL_IN SRC6 CLK_PCIE_MINI#_R CLK_PCIE_MINI (25)
SRC6#
40 3 4 CLK_PCIE_MINI# (25) To WLAN
CG_XOUT 59
XTAL_OUT CLK_PCIE_LAN_R RP40
27 3 4 0X2 CLK_PCIE_LAN (24)
FSA SRC4 CLK_PCIE_LAN#_R
(16) CLKUSB_48
R316 33_4 10
USB_48/FSA SRC4#
28 1 2 CLK_PCIE_LAN# (24) To LAN
C
10/30 Change Value and need change PN C
CLK_BSEL0 R311 2.2K_4 FSB 57 24 CLK_PCIE_ICH_R RP42 3 4 0X2
FSB/TEST/MODE SRC3/CR#_C CLK_PCIE_ICH#_R CLK_PCIE_ICH (15)
SRC3#/CR#_D
25 1 2 CLK_PCIE_ICH# (15) To SB
FSC 62
CLK_BSEL1 REF0/FSC/TESTSEL CLK_PCIE_SATA_R RP45
21 3 4 0X2 CLK_PCIE_SATA (14)
SRC2/SATA CLK_PCIE_SATA#_R
8
VSS_PCI SRC2#/SATA#
22 1 2 CLK_PCIE_SATA# (14) To SB
11
CLK_BSEL2 R245 10K_4 VSS_48 DREFSSCLK_R
15 17
VSS_IO SRC1/SE1 DREFSSCLK#_R
19 18
R246 33_4 VSS_PLL3 SRC1#/SE2
(16) 14M_ICH 52
VSS_CPU DREFCLK_R RP43
23 13 3 4 IV@0X2 DREFCLK (6)
VSS_SRC1 SRC0/DOT96 DREFCLK#_R
29
VSS_SRC2 SRC0#/DOT96#
14 1 2 DREFCLK# (6) To NB
42
VSS_SRC3
58 56 CK_PWRGD (16)
VSS_REF CKPWRGD/PWRDWN#
ICS9LPRS365BGLFT
ICS9LPRS365 RTM875T-606 R318 10K_4 PCLK_OZ129 :ICS9LPRS365BGLFT QCI:ALPRS365K13
+3V
(ALPRS365K13) (AL000875K06) PULL HIGH PULL DOWN
:SLG8SP512TTR: QCI:AL8SP512K05
PCI2/TME R319 *10K_4
Pin 4 PCI2/TME internal PD NO OVERCLOCKING (default) NORMAL RUN
PCI-3/SRC5_EN PIN37/38 IS
Pin 5 PCI-3 internal PD PIN37/38 IS SRC5 PCI_STOP/CPU_STOP (default) R325 *10K_4 PCLK_591 DREFSSCLK_R RP44 1 2 IV@0X2
+3V DREFSSCLK (6)
HIGH 27MHz DREFSSCLK#_R 3 4 To NB
PCI-4/27M_SEL PIN 17/18 LOW SRC DREFSSCLK# (6)
Pin 6 PCI-4/27M_SEL internal PD PIN 17/18 IS 27MHz IS SRC/DOT (default) R321 10K_4
3 4 CLK_MXM (19)
PCIF-5/ITP_EN 1 2 To VGA Card
Pin 7 PCIF-5/ITP_EN internal PD PIN 46/47 IS CPUITP PIN 46/47 IS SRC8 (default) PCLK_ICH RP47 EV@0X2 CLK_MXM# (19)
+3V R326 *10K_4
R317 10K_4
B B
+3V
FREQ. SEL
TABLE Clock Gen Q19 R254
I2C 11/01 Del C3195
2
R331 0_4 CLK_BSEL0 RHU002N06 10K_4
(3) CPU_BSEL0 MCH_BSEL0 (6)
3 1 CGDAT_SMB
(16,21,25,28) SDATA CGDAT_SMB (13)
+1.05V R327 *56_4
PCLK_591 C291 *33p/50V_4
BSEL Frequency Select Table R322 1K_4 +3V
FSC FSB FSA Frequency CLKUSB_48 C293 *33p/50V_4
0 0 0 266Mhz Q21 R253 14M_ICH C231 *33p/50V_4
R241 0_4 CLK_BSEL1
(3) CPU_BSEL1 MCH_BSEL1 (6)
2
RHU002N06 10K_4
0 0 1 133Mhz PCLK_ICH C300 *33p/50V_4
R255 *0_4 3 1 CGCLK_SMB
(16,21,25,28) SCLK CGCLK_SMB (13)
A PCLK_DEBUG C269 *33p/50V_4 A
0 1 1 166Mhz
+1.05V R240 1K_4
0 1 0 200Mhz
1 1 0 400Mhz R242 0_4 CLK_BSEL2
(3) CPU_BSEL2 MCH_BSEL2 (6)
1 1 1 Reserved R244 *0_4
Quanta Computer Inc.
1 0 1 100Mhz R243 1K_4
+1.05V PROJECT : BL5M Montevina