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Digitally signed by
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DN: cn=fdsf,
A901 SCHEMATICS o=fsdfsd, ou=ffsdf,
D 01.THIS PAGE email=fdfsd@fsdff, D
02.FCPGA370-1 c=US
03.FCPGA370-2 Date: 2010.01.06
04.CLOCK GENERATOR 06:11:39 +07'00'
05.SIS630S-1 HOST/MEMORY
06.SIS630S-2 PCI/IDE
07.SIS630S-3 VGA/AGP
08.SIS630S-4 SOUTH BRIDGE
09.SIS630S-5 POWER
10.DIMM
C C
11.LVDS TRANSMITTER & LCD CONN.
12.VIDEO BRIDGE(SIS301DH)
www.kythuatvitinh.com
13.CRT & S-VIDEO
14.HDD & CDROM CONN.
15.AC'97 CODEC
16.OP AMPLIFIER & AUDIO JACK
17.RJ11/RJ45 JACKS & MODEM CARD
18.REALTEK RTL8100 ETHERNET LAN
19.W83L517D LPC SUPER IO
B
20.COM & LPT PORTS B
21.KEYBOARD CONTROLLER
22.ROM & POWER GOOD
23.RTC BATTERY & POWER SW
PCB NO. : KK0A901011020
24.USB PORTS
25.CPU VCORE/VTT/VCC2.5V REV. : 2.0
26.VCC3/VCC5
27.VCC1.8V/AUX POWERS P.leader Appr.by Check by Design by
28.VCC3_DIMM & VTTPWGD
29.REVISION HISTORY
A A
PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
VER 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0
DATE 2/8 2/8 2/8 2/8 2/8 2/8 2/8 2/8 2/8 2/8 2/8 2/8 2/8 2/8 2/8 2/8 2/8 2/8 2/8 2/8 ALPHA-TOP CORP.
PAGE 21 22 23 24 25 26 27 28 29 Title
A901 MAIN BOARD
VER 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0
Size Document Number Rev
DATE 2/8 2/8 2/8 2/8 2/8 2/8 2/8 2/8 2/8 B A901-1-4-01 2.0
Date: Tuesday, May 28, 2002 Sheet 1 of 29
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8 7 6 5 4 3 2 1
VTT
CPUVREF Use 0603 Packages and
VTT distribute within 500
C700 C701 C702 C703 C770 R700 mils of CPUVREF inputs
R745 (1 cap for every 1 inputs)
0 0.1UF 0.1UF 0.1UF 0.1UF 1000PF 75 1%
VCORE
HD[0..63] CPUVREF
5 HD[0..63]
R701 C704 C705 C706 C771 C772
AM12
AM16
AM20
AM24
AM28
AM32
AD32
AH24
AH32
AH36
AA37
AB34
AK34
AF34
AJ13
AJ17
AJ21
AJ25
AJ29
AM4
AM8
M32
AA5
AB2
AE5
AK2
AF2
D20
D24
D28
D32
D36
H32
H36
R32
R36
B10
B14
B18
B22
B26
B30
B34
E13
E17
K32
K34
P34
V32
V36
X34
Y35
AJ5
AJ9
F14
F22
F26
F30
F34
T34
Z32
W5
1000PF 1000PF
C3
D6
N5
150 1% 0.1UF 0.1UF 0.1UF
B6
E5
E9
K2
P2
S5
F2
F4
T2
PGA1
J5
VCCCORE1
VCCCORE2
VCCCORE3
VCCCORE4
VCCCORE5
VCCCORE6
VCCCORE7
VCCCORE8
VCCCORE9
VCCCORE10
VCCCORE11
VCCCORE12
VCCCORE13
VCCCORE14
VCCCORE15
VCCCORE16
VCCCORE17
VCCCORE18
VCCCORE19
VCCCORE20
VCCCORE21
VCCCORE22
VCCCORE23
VCCCORE24
VCCCORE25
VCCCORE26
VCCCORE27
VCCCORE28
VCCCORE29
VCCCORE30
VCCCORE31
VCCCORE32
VCCCORE33
VCCCORE34
VCCCORE35
VCCCORE36
VCCCORE37
VCCCORE38
VCCCORE39
VCCCORE40
VCCCORE41
VCCCORE42
VCCCORE43
VCCCORE44
VCCCORE45
VCCCORE46
VCCCORE47
VCCCORE48
VCCCORE49
VCCCORE50
VCCCORE51
VCCCORE52
VCCCORE53
VCCCORE54
VCCCORE55
VCCCORE56
VCCCORE57
VCCCORE58
VCCCORE59
VCCCORE60
VCCCORE61
VCCCORE62
VCCCORE63
VCCCORE64
VCCCORE65
VCCCORE66
VCCCORE67
VCCCORE68
VCCCORE69
VCCCORE70
VCCCORE71
VCCCORE72
VCCCORE73/VTT
VCCCORE74
VCCCORE75
D HD0 W1 E33 CPUVREF D
HD1 D#0 VREF0 VCMOS1.5V
T4 F18
HD2 D#1 VREF1
N1 K4
HD3 D#2 VREF2
M6 R6
HD4 D#3 VREF3
U1 V6
HD5 D#4 VREF4
S3 AD6
HD6 D#5 VREF5 R702
T6 AK12
HD7 D#6 VREF6
J1 AK22 75 1%
HD8 D#7 VREF7/CMOSREF
S1
HD9 D#8
P6
HD10 D#9 PIN_AK22
Q3 G33
HD11 D#10 BP#[2]
M4 E37
HD12 Q1
D#11
D#12
VRM 8.5 BP#[3]
HD13 L1 C35 R703
HD14 D#13 BPM#[0] C707 150 1%
N3 E35
HD15 D#14 VID4 BPM#[1] 0.1uF
U3
HD16 D#15 VID25 VID3 VID2 VID1 VID0 VCC_CORE
H4
HD17 D#16
R4
HD18 D#17 0/1 0 1 0 0 1.05/1.075 [V]
P4
HD19 D#18 RS-2
H6 AK28 RS-2 5
HD20 D#19 0/1 0 0 1 1 1.10/1.125 [V] RS#[2] RS-1
L3 AH22 RS-1 5
HD21 D#20 RS#[1] RS-0
G1 AH26 RS-0 5
HD22 D#21 0/1 0 0 1 0 1.15/1.175 [V] RS#[0]
F8
HD23 D#22
G3
HD24 D#23 0/1 0 0 0 1 1.20/1/275 [V] HREQ-4
K6 AL17 HREQ-4 5
HD25 D#24 REQ#[4] HREQ-3
E3 AL19 HREQ-3 5
HD26 D#25 0/1 0 0 0 0 1.25/1.275 [V] REQ#[3] HREQ-2
E1 AH18 HREQ-2 5
HD27 D#26 REQ#[2] HREQ-1
F12 AH16 HREQ-1 5
HD28 D#27 0/1 1 1 1 1 1.30/1.325 [V] REQ#[1] HREQ-0
C A5 AK18 HREQ-0 5 C
HD29 D#28 REQ#[0]
A3
HD30 D#29 0/1 1 1 1 0 1.35/1.375 [V]
J3
HD31 D#30
C5 AF4
HD32 D#31 0/1 1 1 0 1 1.40/1.475 [V] A#[35]/RSVD
F6 D#32 A#[34]/RSVD W3
HD33 C1 AC1 HA[3..31]
HA[3..31] 5
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HD34 D#33 0/1 1 1 0 0 1.45/1.475 [V] A#[33]/RSVD
C7 X6
HD35 D#34 A#[32]/RSVD HA31
B2 D#35 A#[31] AD4
HD36 C9 0/1 1 0 1 1 1.50/1.575 [V] AA3 HA30
HD37 D#36 A#[30] HA29
A9 D#37 A#[29] Z4
HD38 D8 0/1 1 0 1 0 1.55/1.575 [V] AK6 HA28
HD39 D#38 A#[28] HA27
D10 D#39 A#[27] AA1
HD40 C15 0/1 1 0 0 1 * 1.60/1.675 [V] Y3 HA26
HD41 D#40 A#[26] HA25
D14 D#41 A#[25] AF6
HD42 D12 0/1 1 0 0 0 * 1.65/1.675 [V] AB4 HA24
HD43 D#42 A#[24] HA23
A7 D#43 A#[23] AB6
HD44 A11 0/1 0 1 1 1 * 1.70/1.775 [V] AE3 HA22
HD45 D#44 A#[22] HA21
C11 D#45 A#[21] AJ1
HD46 A21 0/1 0 1 1 0 * 1.75/1.775 [V] AC3 HA20
HD47 D#46 A#[20] HA19
A15 D#47 A#[19] AG3
HD48 A17 0/1 0 1 0 1 * 1.80/1.875 [V] Z6 HA18
HD49 D#48 A#[18] HA17
C13 D#49 A#[17] AE1
HD50 C25 * Joshua AN7 HA16
HD51 D#50 A#[16] HA15
A13 D#51 A#[15] AL5
HD52 D16 AK14 HA14
HD53 D#52 A#[14] HA13
A23 D#53 A#[13] AL7
HD54 C21 AN5 HA12
HD55 D#54 A#[12] HA11
C19 D#55 A#[11] AK10
B
HD56 C27 AH6 HA10 B
D#56 A#[10]
AK4 GND19/VTT|PWRGD
HD57 A19 AL9 HA9
HD58 D#57 A#[9] HA8
C23 D#58 A#[8] AH10
AN3 GND30/DYN|OE
HD59 C17 AL15 HA7
HD60 D#59 A#[7] HA6
A25 AN9
AJ3 GND17/RSV
AL1 GND20/RSV
HD61 D#60 A#[6] HA5
A27 AH8
AG5 GND9/NC
HD62 D#61 A#[5] HA4
E25 AH12
AH2 GND10
AH34GND11
AJ11 GND12
AJ15 GND13
AJ19 GND14
AJ23 GND15
AJ27 GND16
AJ7 GND18
AL3 GND21
AM10GND22
AM14GND23
AM18GND24
AM22GND25
AM26GND26
AM30GND27
AM34GND28
AM6 GND29
B12 GND31
B16 GND32
B20 GND33
B24 GND34
B28 GND35
B32 GND36
B4 GND37
B8 GND38
D18 GND39
D2 GND40
D22 GND41
D26 GND42
D30 GND43
D34 GND44
D4 GND45
E11 GND46
E15 GND47
E19 GND48
E7 GND49
F20 GND50
F24 GND51
F28 GND52
F32 GND53
F36 GND54
G5 GND55
H2 GND56
H34 GND57
K36 GND58
L5 GND59
M2 GND60
M34 GND61
P32 GND62
P36 GND63
Q5 GND64
R34 GND65
T32 GND66
T36 GND67
U5 GND68
V2 GND69
Z34 GND70
Z2 GND71
X32 GND72
V34 GND73
Y5 GND74
Y37 GND75
X36 GND76
D#62 A#[4]
A37 GND1
AB32 GND2
AC33GND3
AC5 GND4
AD2 GND5
AD34GND6
AF32 GND7
AF36 GND8
HD63 F16 AK8 HA3
D#63 A#[3]
PGA370-1_TU
PIN_AF36 C444
R704
R746 VTT
VCC5