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A B C D E
1 1
Compal Confidential
2 2
PEW52 M/B Schematics Document
Intel Penryn Processor with Cantiga + DDRII + ICH9M
3
2010-08-06 3
REV:0.1
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/04/22 Deciphered Date 2011/04/22 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PEW52 M/B LA-6634P Schematic
Date: Friday, August 06, 2010 Sheet 1 of 44
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Compal Confidential
Intel Penryn Processor Thermal Sensor Clock Generator
Fan Control
Model Name : PEW52 DDRII page 4
EMC 1402 ICS9LPRS387
uPGA-478 Package page 4 page 16
File Name : LA6634P
(Socket P) page 4,5,6
1 1
FSB
H_A#(3..35) 667/800/1066MHz H_D#(0..63)
HDMI Conn. LCD Conn. CRT Conn.
page 19 page 17 page 18
Memory BUS(DDRII) 204pin DDRII-SO-DIMM X2
Intel Cantiga
Dual Channel BANK 0, 1, 2, 3 page 14,15
1.8V DDRIII 667/800
HDMI LVDS uFCBGA-1329
Level Shift TMDS page 7,8,9,10,11,12,13
page 19
DMI C-Link USB conn x1 Bluetooth CMOS Card Reader
USB port 0 Conn Camera Realtek RTS5137
page 28 page 28 page 17 page 25
PCI-Express
2
Intel ICH9-M 3.3V 48MHz USB
2
3.3V 24.576MHz/48Mhz HD Audio
S-ATA
BGA-676
MINI Card x1 LAN Broadcom page 20,21,22,23
WLAN BCM57780 port 0
page 27 page 26 HDA Codec Audio AMP
ALC272X
SATA HDD page 32 page 33
Conn.
page 24
RJ45
Phone Jack x2
page 26
page 33
LPC BUS
3 3
ENE KB926 D3
RTC CKT. Small Board page 29
page 20
LS-6581P
USB/B Conn.
Power On/Off CKT. page 28 Touch Pad Int.KBD
page 30 page 30
page 31 LS-6631P
POWER/B Conn.
page 30
DC/DC Interface CKT. BIOS
LS-6583P
page 34 page 30
ODD/B Conn.
page 24
Power Circuit DC/DC
4
page 35,36,37,38 4
39,40,41,42
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/04/22 Deciphered Date 2011/04/22 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagrams
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
B 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PEW52 M/B LA-6634P Schematic
Date: Friday, August 06, 2010 Sheet 2 of 44
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SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Voltage Rails
Full ON HIGH HIGH HIGH HIGH ON ON ON ON
Power Plane Description S1 S3 S5 S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
VIN Adapter power supply (19V) N/A N/A N/A S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
B+ AC or battery power rail for power circuit. N/A N/A N/A
1
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF 1
+CPU_CORE Core voltage for CPU ON OFF OFF
+0.75VS 0.75V power rail for DDR ON OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+1.05VS 1.05V switched power rail ON OFF OFF
+1.5V 1.5V power rail for DDR ON ON OFF
+1.5VS 1.5V switched power rail ON OFF OFF Board ID / SKU ID Table for AD channel
+1.8V 1.8V power rail for LVDS ON ON OFF Vcc 3.3V +/- 5%
+3VALW 3.3V always on power rail ON ON ON* Ra/Rc/Re 100K +/- 5%
+3V 3.3V power rail for SB ON ON OFF Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
+3V_LAN 3.3V power rail for LAN ON ON ON 0 0 0 V 0 V 0 V
+3VS 3.3V switched power rail ON OFF OFF 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
+5VALW 5V always on power rail ON ON ON* 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+5VS 5V switched power rail ON OFF OFF 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
+VSB VSB always on power rail ON ON ON* 4 56K +/- 5% 1.036 V 1.185 V 1.264 V
+RTCVCC RTC power ON ON ON 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
6 200K +/- 5% 1.935 V 2.200 V 2.341 V
7 NC 2.500 V 3.300 V 3.300 V
2 2
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
BOARD ID Table BTO Option Table
External PCI Devices Board ID PCB Revision BTO Item BOM Structure
0 0.1 GM45 B3 GM@
Device IDSEL# REQ#/GNT# Interrupts
1 0.2 GM40 A1 GLA1@
2 0.3 Bluetooth BT@
3 1.0
4
5
6
7 PCIE table
PCIE port1
EC SM Bus1 address EC SM Bus2 address USB table
PCIE port2 Wireless Card
3
Port0 MB USB Conn. 3
Device Address Device Address UHCI1
Port1 USB/B Conn. PCIE port3 PCIE LAN
Smart Battery 0001 011X b SMSC EMC1402 100 1100 b
Port2
EHCI1 UHCI2 PCIE port4
Port3 CMOS Camera
Port4 Card Reader PCIE port5
UHCI3
Port5
PCIE port6
Port6 USB/B Conn.
UHCI4
Port7 SATA table
ICH9M SM Bus address EHCI2 Port8 Blue Tooth
UHCI5
Port9 SATA port0 HDD
Device Address
Port10 Wireless Card
Clock Generator
UHCI6 SATA port1 ODD
1101 001Xb Port11
(ICS9LVRS387, RTM890N)
DDR DIMM1 1001 000Xb
SATA port2
DDR DIMM2 1001 010Xb SATA port3
SATA port4
4 4
SATA port5
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/04/22 Deciphered Date 2011/04/22 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
B 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PEW52 M/B LA-6634P Schematic
Date: Friday, August 06, 2010 Sheet 3 of 44
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5 4 3 2 1
H_A#[3..35]
7 H_A#[3..35]
H_REQ#[0..4]
7 H_REQ#[0..4]
H_RS#[0..2]
FAN1 Conn
7 H_RS#[0..2]
JCPU1A +5VS
H_A#3 J4 H1 C114 10U_0805_10V6K +5VS
A[3]# ADS# H_ADS# 7
ADDR GROUP_0
ADDR GROUP_0
H_A#4 L5 E2 H_BNR# 7 1 2
H_A#5 A[4]# BNR#
D L4 A[5]# BPRI# G5 H_BPRI# 7 D
1
H_A#6 K5
H_A#7 A[6]# U5 D6 @
M3 A[7]# DEFER# H5 H_DEFER# 7
H_A#8 N2 F21 1 8 1SS355_SOD323-2
A[8]# DRDY# H_DRDY# 7 EN GND
H_A#9 J1 E1 2 7
A[9]# DBSY# H_DBSY# 7 VIN GND
H_A#10 N3 +VCC_FAN1 3 6 D7 @
2
H_A#11 A[10]# VSET VOUT GND BAS16_SOT23-3
P5 A[11]# BR0# F1 H_BR0# 7 29 EN_DFAN1 1 2 4 VSET GND 5
H_A#12 P2 R51 1 2
A[12]#
CONTROL
H_A#13 L2 D20 H_IERR# 330_0402_5% 1 APL5607KI-TRG_SO8
H_A#14 A[13]# IERR# C106
P4 A[14]# INIT# B3 H_INIT# 21
H_A#15 P1 0.01U_0402_16V7K C122
H_A#16 A[15]# 10U_0805_10V6K
R1 A[16]# LOCK# H4 H_LOCK# 7 2
7 H_ADSTB#0 M1 ADSTB[0]# 1 2
C1 H_RESET# H_RESET# 7 20080430
H_REQ#0 RESET# H_RS#0 +3VS C121
K3 REQ[0]# RS[0]# F3 Add soft-start for +5VS drop issue
H_REQ#1 H2 F4 H_RS#1 1000P_0402_50V7K
H_REQ#2 REQ[1]# RS[1]# H_RS#2
K2 REQ[2]# RS[2]# G3 1 2
1
H_REQ#3 J3 G2 H_TRDY# 7
H_REQ#4 REQ[3]# TRDY# R55
L1 REQ[4]#
G6 10K_0402_5%
HIT# H_HIT# 7
H_A#17 Y2 E4 40mil
A[17]# HITM# H_HITM# 7
H_A#18 U5 JFAN1
2
H_A#19 A[18]# +VCC_FAN1
R3 A[19]# BPM[0]# AD4 1 1
ADDR GROUP_1
H_A#20 W6 AD3 2 4
A[20]# BPM[1]# 29 FAN_SPEED1 2 G1
H_A#21 U4 AD1 3 5
H_A#22 A[21]# BPM[2]# 3 G2
Y5 A[22]# BPM[3]# AC4 1
XDP/ITP SIGNALS
H_A#23 U1 AC2 C115 CONN@
H_A#24 A[23]# PRDY# XDP_BPM#5 1000P_0402_50V7K ACES_85204-03001
R4 A[24]# PREQ# AC1
H_A#25 T5 AC5 XDP_TCK
C H_A#26 A[25]# TCK XDP_TDI 2 C
T3 A[26]# TDI AA6
H_A#27 W2 AB3 XDP_TDO @ PAD
A[27]# TDO T25
H_A#28 W5 AB5 XDP_TMS
H_A#29 A[28]# TMS XDP_TRST#
Y4 A[29]# TRST# AB6
H_A#30 U2 C20 XDP_DBRESET# XDP_DBRESET# 22
H_A#31 A[30]# DBR#
V4 A[31]#
H_A#32 W3
H_A#33 A[32]#
AA4 A[33]# THERMAL
H_A#34 AB2 +1.05VS
H_A#35 A[34]# H_PROCHOT#
AA3 A[35]# PROCHOT# D21
V1 A24 H_THERMDA
7 H_ADSTB#1 ADSTB[1]# THERMDA
B25 H_THERMDC
THERMDC
21 H_A20M# A6 A20M#
ICH
A5 C7 H_THERMTRIP# 8,21 XDP_TDI R43 1 2 54.9_0402_1%
21 H_FERR# FERR# THERMTRIP#
21 H_IGNNE# C4 IGNNE#
left NC if no ITP
21 H_STPCLK# D5 STPCLK#
C6 H CLK XDP_TMS R42 1 2 54.9_0402_1% 39Ohm
21 H_INTR LINT0
21 H_NMI B4 LINT1 BCLK[0] A22 CLK_CPU_BCLK 16
A3 A21 XDP_BPM#5 R16 1 @ 2 54.9_0402_1%
21 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 16
M4 RSVD[01]
N5 RSVD[02]
T2 H_PROCHOT# R70 2 1 56_0402_5%
RSVD[03]
V3 RSVD[04]
RESERVED
B2 Layout Note: H_IERR# R54 2 1 56_0402_5%
RSVD[05]
D2 RSVD[06]
D22 H_THERMDA&H_THERMDC Trace / Space = 10 / 10 mil
RSVD[07]
D3 RSVD[08]
B B
F6 RSVD[09]
XDP_TRST# R41 2 1 54.9_0402_1%
XDP_TCK R17 1 2 54.9_0402_1%
Penryn
CONN@
+3VS
+1.05VS C159
0.1U_0402_16V4Z
1 2
1
R12 U9
BSEL2 BSEL1 BSEL0 BCLK 56_0402_5% H_THERMDA
@
0 0 0 266 1 8
2
VDD SMCLK EC_SMB_CK2 29
1
C158 2 7 EC_SMB_DA2 29
2
DP SMDATA
B
0 1 0 200 2200P_0402_50V7K 3 DN ALERT# 6 1 2 +3VS
2
E
H_PROCHOT# 3 1 OCP# 22 R109
C
0 1 1 166 4 5 10K_0402_5%
Q2 H_THERMDC THERM# GND
MMBT3904_SOT23-3
@
A
EMC1402-1-ACZL-TR_MSOP8 A
PCB
LA-6634P MB Rev0: DA60000JS00
ZZZ
LA-6634P MB Rev1: DA60000JS10
Security Classification Compal Secret Data Compal Electronics, Inc.
LA-6634P MB with Small Board Rev1: Issued Date 2010/04/22 Deciphered Date 2011/04/22 Title
LA-6634P MB Rev0 PCB PEW72 LA-6631P LS-6631P/6581P/6583P THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Penryn (1/3) & FAN
DA60000JS00 Size Document Number Rev
AND