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5 4 3 2 1




CPU Clock
D
VRM 9.X Socket 478 D




Command



Address BUS



Data BUS
DDR DIMM 01-Block drigrame & Cover sheet
Terminator 02-Power Delivery & GP I/O
Clock Gen 03-Willamette 478 CPU part 1
CPU Clock 04-Willamette 478 CPU part 2
CPU Clock
05-Main Clock & DDR Clock buffer
NB Clock
NB Clock 06-VRM 9.X
NB Clock66 07-P4X266 part 1 & 4
Data BUS NB Clock66
NB Clock 08-P4X266 part 2
SB Clock66
SB Clock66 09-P4X266 part 3
NB Clock66
Address BUS 2 DDR AGP Clock66 10-AGP slot & Pull-UP/DN resistor
AGP Clock66
C P4X266 Modules 11-DIMM 1 & 2 C
PCI Clock
PCI Clock 12-DDR terminator & regulator
AGP BUS Command
USB Clock 13-VT8233 PART 1 & USB PORT
AGP 4X USB Clock
14-VT8233 part 2
I/O Clock
I/O Clock 15-VT8233 PART 3 & MS1
SB 14MHz 16-PCI slot 1 & 2 & 3
V-Link BUS SB 14MHz
17-CM8738 H/W Audio controller
18-Audio Channel Selector & Connector
19-ATA66/100 CONNECTOR & KEYBOARD / MOUSE
20-Windbond W83697HF LPC I/O & Flash ROM.
DDR DIMM
21-Com/Parallel port
PCI Clock Buffer
22-ATX POWER COM & FRONT PANEL
SB 14MHz 23-Main Power
USB Port 0
24-Decouplibg capacitor
USB Port 1 VIA 8233 SB Clock66
25-REALTEK 8100L LAN
PCI BUS
USB BUS 26-PCB OTHER COMPONEMT
B USB Port 2 B
USB Clock 27-MAINAL
USB Port 3
LPC Interface




REALTEK
PCI Clock CM8738
8100L
H/W Audio
LAN
PCI Conn 1

PCI Conn 2


PCI Conn 3




UltraDMA
33/66/100
Keyboard
Mouse
W83697HF SPDIF
Floopy IDE connector 1
LPC I/O SPEAK OUT
Parallel
IDE connector 2 Line in
Serial
A Game Conn I/O Clock A




ISA BUS
FLASH ROM
Title
{Title}

Size Document Number Rev
MS-6505 0B

Date: Wednesday, August 01, 2001 Sheet 1 of 27
5 4 3 2 1
5 4 3 2 1




ATX 12V POWER Supply

VCC3
(+3.3V)
-5V VCC
(+5V)
5VSB 12V -12V Power Delivery Map
1A



D D


VRM 9.X Center Processer Unit
IRQ# Routing Table
AGP Slot PIRQ#A PIRQ#B
PCI Slot 1 PIRQ#A PIRQ#B PIRQ#C PIRQ#D ID select= AD16
5VDU VREG
PCI Slot 2 PIRQ#B PIRQ#C PIRQ#D PIRQ#A ID select= AD17
PCI Slot 3 PIRQ#C PIRQ#D PIRQ#A PIRQ#B ID select= AD18
NB-P4X266 H/W Audio PIRQ#D ID select= AD23
3VDU VREG
REK-RTL8100 PIRQ#B ID select= AD25
Core Power

2.5V VREG V-Link BUS

Memory Interface
VDIMM VREG GPIO Table on SB-VT8233
AGP Interface GPO_0 Flash Rom protection Hi: Disable, Low: Enable
C GPI_2 Sleep button C

VDDQ VREG GPIO_8 IDE_1 mode detection
GPIO_9 IDE_2 mode detection
GPIO_10 LPC_PME#
1.25V VREG DDR Memory GPIO_24 Diag-LED_1
GPIO_25 Diag-LED_2
GPIO_26 PCB version control
SB-VT8233 GPIO_27 PCB version control
GPIO_30 Diag-LED_3
Core Power
GPIO_31 Diag-LED_4

V-Link BUS




Clock Generator
GPIO Table on LPC I/O W83697
B B




Clock Buffer



AGP slot AUDIO : Hardware Audio controller installed

Chipset: VIA P4X266 + VT8233

PCI slot LPC I/O: Winbond W83697EF

Flashrom: ISA Flashrom

CMI8738 H/W Audio




A A




Title
{Title}

Size Document Number Rev
MS-6505 0B

Date: Wednesday, August 01, 2001 Sheet 2 of 27
5 4 3 2 1
5 4 3 2 1




R411 X_0



VCORE
D D
VCC_SENS (6)
HA#[3..31]
(7) HA#[3..31] VSS_SENS (6)
VID[0..4] (6) R59 49.9




HA#31
HA#30
HA#29
HA#28
HA#27
HA#26
HA#25
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#18
HA#17
HA#16
HA#15
HA#14
HA#13
HA#12
HA#11
HA#10
HA#9
HA#8
HA#7
HA#6
HA#5
HA#4
HA#3




AE2 VID3

AE4 VID1
AE5 VID0
AE1 VID4

AE3 VID2
C148 C122 C123 R60 R12




AD26
AC26
1u 220p 220p 100




AE25
AB1

W2



W1




M1

M4
M3

M6
U4


R6


U3

U1

R3


R2

N5
N4
N2

N1
U7A X_49.9




T5



T4



T2




T1




L2

L3

L6
Y1

V3




V2


P6



P4
P3




K1

K4
K2




A5
A4
DBR


VSS_SENSE

ITP_CLK1
ITP_CLK0
VCC_SENSE
A9#
A8#
A7#
A6#
A5#
A4#
A3#




VID4#
VID3#
VID2#
VID1#
VID0#
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
A26#
A25#
A24#
A23#
A22#
A21#
A20#
A19#
A18#
A17#
A16#
A15#
A14#
A13#
A12#
A11#
A10#
HDBI#0 E21 C72 C73 C16
(7) HDBI#0 HDBI#1 G25 DBI0# AA21 R11
(7) HDBI#1 HDBI#2 P26 DBI1# GTLREF3 AA6 X_220p X_220p X_1u
(7) HDBI#2 DBI2# GTLREF2
HDBI#3 V21 F20 X_100
(7) HDBI#3 DBI3# GTLREF1 F6
HIERR# AC3 GTLREF0
V6 IERR# AB4 BPM#5
FERR# B6 MCERR# BPM5# AA5 BPM#4
(15) FERR# FERR# BPM4#
STPCLK# Y4 Y6 BPM#3
(15) STPCLK# AA3 STPCLK# BPM3# AC4 BPM#2
HINIT# W5 BINIT# BPM2# AB5 BPM#1
(15) HINIT# INIT# BPM1#
AB2 AC6 BPM#0 BPM#[0..5]
RSP# BPM0# BPM#[0..5]
BPM#[0..5]
BPM#[0..5]
HDBSY# H5 H3 HREQ#4
(7) HDBSY# H2 DBSY# REQ4# J3
HDRDY# HREQ#3
(7) HDRDY# HTRDY# J6 DRDY# REQ3# J4 HREQ#2 VCORE
(7) HTRDY# TRDY# REQ2# K5 HREQ#1
HADS# G1 REQ1# J1 HREQ#0 HIERR# R409 150
C (7) HADS# ADS# REQ0# C
HLOCK# G4 AD25 HREQ#[0..4] R47 150
(7) HLOCK# G2 LOCK# TESTHI12 A6 HREQ#[0..4] (7) (4) THERMTRIP#
HBNR# R58 4.7K R46 150
(7) HBNR# HIT# F3 BNR# TESTHI11 Y3 R21 4.7K TDI_CPU R22 62
(7) HIT# HIT# TESTHI10 (15) FERR#
HITM# E3 W4 R9 62
(7) HITM# HITM# TESTHI9 (15) PROCHOT#
HBPRI# D2 U6 R45 49.9
(7) HBPRI# BPRI# TESTHI8 (7) BREQ#0
HDEFER# E2 AB22 R62 4.7K R63 49.9
(7) HDEFER# DEFER# TESTHI7 AA20 (7) CPURST#
BPM#5 R19 49.9
TDI_CPU C1 TESTHI6 AC23 BPM#4 R20 49.9
TDI_CPU TDI TESTHI5 AC24
TESTHI4 AC20
TDO_CPU D5 TESTHI3 AC21 BPM#0 R17 49.9
TDO_CPU TDO TESTHI2 AA2 R57 4.7K BPM#2
TESTHI1 AD24 VCORE BPM#1 R18 49.9
TMS_CPU F7 TESTHI0 BPM#3
TMS_CPU TMS AF23 CPUCLK#
BCLK1# CPUCLK# (5)
TRST#_CPU E6 AF22 CPUCLK RA1 1K
TRST#_CPU TRST# BCLK0# CPUCLK (5) 1 5
STPCLK#
TCK_CPU D4 F4 HRS#2 (15) STPCLK# SMI# 2 1 5
TCK_CPU TCK RS2# (15) SMI#
G5 HRS#1 SLP# 3 2
VTIN2 B3 RS1# F1 HRS#0 (15) SLP# HINIT# 4 3
(20) VTIN2 THERMDA RS0# (15) HINIT#
VAGND C4 HRS#[0..2] LINT0 6 4
(20) VAGND A2 THERMDC V5 HRS#[0..2] (7) (15) LINT0 7 6
LINT1
(4) THERMTRIP# THERMTRIP# AP1# AC1 (15) LINT1 A20M# 8 7
A5 AP0# H6 BREQ#0 (15) A20M# IGNNE# 9 8 10
SKTOCC# BR0# BREQ#0 (7) (15) IGNNE# 9 10
PROCHOT# C3
(15) PROCHOT# PROCHOT#
IGNNE# B2 P1 R32 49.9 R26 75
(15) IGNNE# B5 IGNNE# COMP1 L24 TDO_CPU
SMI# R64 49.9 R25 39
(15) SMI# A20M# C6 SMI# COMP0 TMS_CPU
(15) A20M# A20M
SLP# AB26 L25 R28 150
(15) SLP# SLP# DP3# TCK_CPU
A22 K26 R27 680
RESERVED DP2# TRST#_CPU
A7 K25
B AD2 RESERVED DP1# J26 B
AD3 RESERVED DP0#
AE21 RESERVED R5 HADSTB#1
RESERVED ADSTB1# HADSTB#1 (7)
AF24
AF25 RESERVED ADSTB0#
L5
W23
HADSTB#0
HDSTB3
HADSTB#0 (7) CPU Pull-up/down resistor
AB23 RESERVED DSTBP3# P23 HDSTB3 (7)
PWRGOOD HDSTB2
(22) PWRGOOD CPURST# AB25 PWRGOOD DSTBP2# J23 HDSTB1 HDSTB2 (7)
(7) CPURST# RESET# DSTBP1# HDSTB1 (7)
HD#63 AA24 F21 HDSTB0
D63# DSTBP0# HDSTB0 (7)
HD#62 AA22 W22 HDSTB#3
D62# DSTBN3# HDSTB#3 (7)
HD#61 AA25 R22 HDSTB#2
Y21 D61# DSTBN2# K22 HDSTB#2 (7)
HD#60 HDSTB#1
HD#59 Y24 D60# DSTBN1# E22 HDSTB#0 HDSTB#1 (7)
D59# DSTBN0# HDSTB#0 (7)
HD#58 Y23 E5 LINT1
D58# LINT1 LINT1 (15)
HD#57 W25 D1 LINT0
D57# LINT0 LINT0 (15)
HD#56 Y26




BSEL0
BSEL1
W26 D56#
D53#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D41#
D40#
D39#
D38#
D37#
D36#
D35#
D34#
D33#
D32#
D31#
D30#
D29#
D28#
D27#
D26#
D25#
D24#
D23#
D22#
D21#
D20#
D19#
D18#
D17#
D16#
D15#
D14#
D13#
D12#
D11#
D10#




HD#55
D9#
D8#
D7#
D6#
D5#
D4#
D3#
D2#
D1#
D0#
HD#54 V24 D55#
D54# VCORE
M26

M24


M23




M21




AD6
AD5
G26




G23




G22
U21

U23
U24
U26




R24
R25

R21
N25
N26

N23


N22