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A B C D E

1 1

Compal Confidential
2 2

NEW50/70/80/90 M/B Schematics Document
Intel Arrandale Processor with DDRIII + Ibex Peak-M
ATI Madision/Park

3 2010-01-07 3

REV:1.0

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/08/01 Deciphered Date 2010/08/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NEW70 M/B LA-5891P Schematic
Date: Friday, January 08, 2010 Sheet 1 of 59
A B C D E
A B C D E

Clock Generator
Compal Confidential IDT: 9LVS3199AKLFT
Model Name : NEW50/70/80/90 Realtek: RTM890N-631-VB-GRT
133/120/100/96/14.318MHZ to PCH
File Name : LA5891P Fan Control
page 38 page 12
1 1

100MHz PCI-E 2.0x16 5GT/s PER LANE
PEG(DIS) Intel Memory BUS(DDRIII)
133MHz Dual Channel 204pin DDRIII-SO-DIMM X2
BANK 0, 1, 2, 3 page 10,11
Madision/Park
page
Arrandale (UMA/DIS) 1.5V DDRIII 800/1066
22,23,24,25,26,27,28

LVDS(DIS) Processor
rPGA988A
page 4,5,6,7,8,9
HDMI(DIS) CRT(DIS)
FDI x8 DMI x4 USB conn x3 Bluetooth CMOS Camera Card Reader
(UMA) USB port 1 Conn RTS5160
USB port 0, 2 on USB port 11 USB port 8 USB port 9
HDMI Conn. CRT Conn. LVDS Conn. 100MHz 100MHz USB/B page 36 page 36 page 29 page 36
page 31 page 30 page 29 2.7GT/s 1GB/s x4
2 USBx14 3.3V 48MHz 2
HDMI(UMA) LVDS(UMA)
CRT(UMA) Intel 3.3V 24MHz
HDMI HD Audio
Level Shift TMDS(UMA) Ibex Peak-M
page 31
PCI-Express x 8 (ARD PCIE2.0 2.5GT/s) 100MHz PCH HDA Codec
SATA x 6 (GEN1 1.5GT/S ,GEN2 3GT/S) 100MHz page 13,14,15,16 ALC272X
port 2 port 1 17,18,19,20,21
SPI page 40

MINI Card x2 LAN(GbE)
WLAN, WWAN
USB port 12,13
BCM57780
page 35 page 33 SPI ROM x1 Audio AMP
port 0 port 1 TI TPS6017 41
page 13 page
SATA HDD SATA CDROM
Conn. page 32
Conn. page 32
3
RJ45 LPC BUS 3

page 34
33MHz
Int. Speaker Phone Jack x 2
Sub-board ENE KB926 page 41 page 41
page 37
LS-5891P
USB/B 2Port
RTC CKT. USB Port0,2 page 36
page 15
Touch Pad Int.KBD
page 38 page 38
LS-5892P
Power On/Off CKT. Card Reader CPU XDP
page 34 USB Port9 page 36 page 5
BIOS ROM
page 38
DC/DC Interface CKT. LS-5893P LS-5894P PCH XDP
4
page 38 Power/B LID_SW/B 4

page 38 page 21

Power Circuit DC/DC LS-5895P
3G Security Classification Compal Secret Data Compal Electronics, Inc.
USB Port10,13 Issued Date 2009/08/01 Deciphered Date 2010/08/01 Title
page 40~48 page 35 Block Diagrams
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NEW70 M/B LA-5891P Schematic
Date: Tuesday, December 29, 2009 Sheet 2 of 59
A B C D E
A B C D E

SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

Full ON HIGH HIGH HIGH HIGH ON ON ON ON
Voltage Rails
S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
Power Plane Description S1 S3 S5
VIN Adapter power supply (19V) N/A N/A N/A S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
BATT+ Battery power supply (12.6V) N/A N/A N/A
1
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF 1
B+ AC or battery power rail for power circuit. N/A N/A N/A
+CPU_CORE Core voltage for CPU ON OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+VGA_CORE Core voltage for GPU ON OFF OFF
+VGFX_CORE Core voltage for Arrandale GPU (only for arrandaleCPU) ON OFF OFF
+0.75VS +0.75VP to +0.75VS switched power rail for DDR terminator ON OFF OFF Board ID / SKU ID Table for AD channel
+1.0VSDGPU +1.0VSPDGPU to +1.0VSDGPU switched power rail for GPU ON OFF OFF Vcc 3.3V +/- 5%
+1.05VS_VTT +1.05VS_VTTP to +1.05VS_VTT switched power rail for ARD CPU ON OFF OFF Ra/Rc/Re 100K +/- 5%
+1.05VS_PCH +1.05VS_VTT to +1.05VS_PCH power for PCH ON OFF OFF Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
+1.5V +1.5VP to +1.5V power rail for DDRIII ON ON OFF 0 0 0 V 0 V 0 V
+1.5VS +1.5V to +1.5VS switched power rail ON OFF OFF 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
+1.5VSDGPU +1.5VS to +1.5VSDGPU switched power rail for GPU ON OFF OFF 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+1.8VS (+5VALW or +3VALW) to 1.8V switched power rail to PCH & GPU ON OFF OFF 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
+3VALW +3VALW always on power rail ON ON ON* 4 56K +/- 5% 1.036 V 1.185 V 1.264 V
+3VALW_EC +3VALW always to KBC ON ON ON* 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
+3V_LAN +3VALW to +3V_LAN power rail for LAN ON ON ON* 6 200K +/- 5% 1.935 V 2.200 V 2.341 V
+3V +3VALW to +3V power rail for PCH (Short Jumper) ON ON ON* 7 NC 2.500 V 3.300 V 3.300 V
2 2
+3VS +3VALW to +3VS power rail ON OFF OFF
+5VALW +5VALWP to +5VALW power rail ON ON ON*
BOARD ID Table BTO Option Table
+5V +5VALW to +5V switched power rail for PCH (Short resister) ON ON ON*
BTO Item BOM Structure
+5VS +5VALW to +5VS switched power rail ON OFF OFF Board ID PCB Revision
UMA UMA@
+VSB +VSBP to +VSB always on power rail for sequence control ON ON ON* 0 0.1
UMA Only UMAO@
+RTCVCC RTC power ON ON ON 1 0.2
Discrete DIS@
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF. 2 0.3
Discrete Only DISO@
3 1.0
GPU ALL Components VGA@
4
VRAM X76@
EC SM Bus1 address EC SM Bus2 address 5
Switchable SG@
6
Connector CONN@
Device Address Device Address 7
Smart Battery 0001 011X b
3G 3G@
Blue Tooth BT@
USB Port Table Unpop @
UMA HDMI UMAHD@
PCH SM Bus address 3 External
3 USB 2.0 USB 1.1 Port USB Port Discrete HDMI VGAHD@ 3

UMA & DIS POP HDMI HDMI@
Device Address 0 USB/B (Right Side)
UHCI0 GPU Madision MADI@
Clock Generator (9LVS3199AKLFT,
3G & BT Config 1 USB Port (Left Side)
1101 0010b GPU Park PARK@
RTM890N-631-VB-GRT) 3G SKU: 3G@ 2 USB/B (Right Side)
DDR DIMM0
UHCI1 NEW70,80 LED 7080@
1001 000Xb BT SKU: BT@ 3
DDR DIMM2
EHCI1 NEW50,90 LED 5090@
1001 010Xb 4
GPU BOM Config UHCI2
5 X76@
Madision SKU: MADI@
Option UMAHD@ VGAHD@ HDMI@ @ SG@ 6 ID3 , ID1 : VRAM Vender ID2: VRAM Size
Park SKU: PARK@ UHCI3
UMA V X V X X 7 Location
VRAM_ID3 VRAM_ID1
Location
VRAM_ID2
VGA X V V X X VRAM BOM Config 8 Camera VRAM VRAM
UHCI4
SG X V V X V X761@: X76198BOL01 Park Samsung 512MB 9 Card Reader Samsung 0 R492 0 R474 8PCS 64Mx16 0 R482
NO HDMI X X X X X X762@: X76198BOL02 Park Hynix 512MB 10 SIM Card HYNIX 1 R491 0 R474 4PCS 64Mx16 1 R483
EHCI2 UHCI5
X763@: X76198BOL03 Madision Samsung 1024MB 11 Blue Tooth AMD 1 R491 1 R473
LED BOM config
X764@: X76198BOL04 Madision Hynix 1024MB 12 Mini Card(WLAN)
NEW70,80 SKU: 7080@ UHCI6
X765@: X76198BOL05 Park AMD 512MB 13 Mini Card(GPS) VRAM P/N :
NEW50,90 SKU: 5090@ Samsung : SA000035700 (S IC D3 64MX16 K4W1G1646E-HC12 FBGA 96P)
X766@: X76198BOL06 Madision AMD 1024MB
4 Hynix : SA000032400 (S IC D3 64MX16 H5TQ1G63BFR-12C FBGA 1.5V ) 4

BOM Config AMD: SA00003PF20 (S IC D3 23EY2387MB-12)
UMA W/O HDMI SKU: BT@/3G@/UMA@/UMAO@
UMA W/ HDMI SKU: BT@/3G@/UMA@/UMAO@/HDMI@/UMAHD@
Discrete W/O HDMI SKU: BT@/3G@/DIS@/DISO@/VGA@
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/08/01 Deciphered Date 2010/08/01 Title
Discrete W/ HDMI SKU: BT@/3G@/DIS@/DISO@/VGA@/HDMI@/VGAHD@ Notes List
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Switchable W/O HDMI SKU: BT@/3G@/DIS@/UMA@/VGA@/SG@ Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
B 1.0
Switchable W HDMI SKU: BT@/3G@/DIS@/UMA@/VGA@/SG@/HDMI@/VGAHD@
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NEW70 M/B LA-5891P Schematic
Date: Tuesday, December 29, 2009 Sheet 3 of 59

A B C D E
5 4 3 2 1

JCPU1E

JCPU1A R485 AJ13
PEG_IRCOMP RSVD32
PEG_ICOMPI B26 1 2 49.9_0402_1% RSVD33 AJ12

DMI_PTX_HRX_N0
10mil PEG_ICOMPO A26
R493
A24 DMI_RX#[0] PEG_RCOMPO B27 AP25 RSVD1
DMI_PTX_HRX_N1 C23 A25 EXP_RBIAS 1 2 750_0402_1% AL25 AH25
DMI_PTX_HRX_N2 DMI_RX#[1] PEG_RBIAS RSVD2 RSVD34
DMI_PTX_HRX_N3
B22 DMI_RX#[2] 15mil PEG_GTX_C_HRX_N15 C69 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_N15
AL24 RSVD3 RSVD35 AK26
A21 DMI_RX#[3] PEG_RX#[0] K35 1 2 AL22 RSVD4
J34 PEG_GTX_C_HRX_N14 C72 1 2 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_N14 AJ33 AL26
DMI_PTX_HRX_P0 PEG_RX#[1] PEG_GTX_C_HRX_N13 C76 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_N13 RSVD5 RSVD36
B24 DMI_RX[0] PEG_RX#[2] J33 1 2 AG9 RSVD6 RSVD_NCTF_37 AR2
DMI_PTX_HRX_P1 D23 G35 PEG_GTX_C_HRX_N12 C84 1 2 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_N12 M27
DMI_RX[1] PEG_RX#[3] RSVD7

DMI
DMI_PTX_HRX_P2 B23 G32 PEG_GTX_C_HRX_N11 C87 1 2 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_N11 L28 AJ26
DMI_PTX_HRX_P3 DMI_RX[2] PEG_RX#[4] PEG_GTX_C_HRX_N10 C96 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_N10 RSVD8 RSVD38
D A22 DMI_RX[3] PEG_RX#[5] F34 1 2 J17 SA_DIMM_VREF (CFD Only) RSVD39 AJ27 D
F31 PEG_GTX_C_HRX_N9 C105 1 2 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_N9 H17
DMI_HTX_PRX_N0 PEG_RX#[6] PEG_GTX_C_HRX_N8 C106 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_N8 SB_DIMM_VREF (CFD Only)
D24 DMI_TX#[0] PEG_RX#[7] D35 1 2 G25 RSVD11
DMI_HTX_PRX_N1 G24 E33 PEG_GTX_C_HRX_N7 C121 1 2 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_N7 G17
DMI_HTX_PRX_N2 DMI_TX#[1] PEG_RX#[8] PEG_GTX_C_HRX_N6 C123 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_N6 RSVD12
F23 DMI_TX#[2] PEG_RX#[9] C33 1 2 E31 RSVD13 RSVD_NCTF_40 AP1
DMI_HTX_PRX_N3 H23 D32 PEG_GTX_C_HRX_N5 C129 1 2 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_N5 E30 AT2
DMI_TX#[3] PEG_RX#[10] PEG_GTX_C_HRX_N4 C141 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_N4 RSVD14 RSVD_NCTF_41
PEG_RX#[11] B32 1 2
DMI_HTX_PRX_P0 D25 C31 PEG_GTX_C_HRX_N3 C149 1 2 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_N3 AT3
DMI_HTX_PRX_P1 DMI_TX[0] PEG_RX#[12] PEG_GTX_C_HRX_N2 C160 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_N2 RSVD_NCTF_42
F24 DMI_TX[1] PEG_RX#[13] B28 1 2 RSVD_NCTF_43 AR1
DMI_HTX_PRX_P2 E23 B30 PEG_GTX_C_HRX_N1 C161 1 2 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_N1
DMI_HTX_PRX_P3 DMI_TX[2] PEG_RX#[14] PEG_GTX_C_HRX_N0 C167 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_N0
G23 DMI_TX[3] PEG_RX#[15] A31 1 2

J35 PEG_GTX_C_HRX_P15 C71 1 2 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_P15 R58 AL28
PEG_RX[0] PEG_GTX_C_HRX_P14 C75 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_P14 3.01K_0402_1% @ CFG0 RSVD45
PEG_RX[1] H34 1 2 1 2 AM30 CFG[0] RSVD46 AL29
H33 PEG_GTX_C_HRX_P13 C81 1 2 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_P13 CFG1 AM28 AP30
H_FDI_TXN0 PEG_RX[2] PEG_GTX_C_HRX_P12 C86 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_P12 R61 CFG2 CFG[1] RSVD47
E22 FDI_TX#[0] PEG_RX[3] F35 1 2 AP31 CFG[2] RSVD48 AP32
H_FDI_TXN1 D21 G33 PEG_GTX_C_HRX_P11 C95 1 2 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_P11 3.01K_0402_1% 1 DIS@ 2 CFG3 AL32 AL27
H_FDI_TXN2 FDI_TX#[1] PEG_RX[4] PEG_GTX_C_HRX_P10 C98 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_P10 R60 @ CFG4 CFG[3] RSVD49
D19 FDI_TX#[2] PEG_RX[5] E34 1 2 1 2 AL30 CFG[4] RSVD50 AT31
H_FDI_TXN3 D18 F32 PEG_GTX_C_HRX_P9 C99 1 2 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_P9 3.01K_0402_1% CFG5 AM31 AT32
H_FDI_TXN4 FDI_TX#[3] PEG_RX[6] PEG_GTX_C_HRX_P8 C113 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_P8 CFG6 CFG[5] RSVD51
G21 FDI_TX#[4] PEG_RX[7] D34 1 2 AN29 CFG[6] RSVD52 AP33
H_FDI_TXN5 PEG_GTX_C_HRX_P7 C115 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_P7 R59 @ CFG7
H_FDI_TXN6
E19
F21
FDI_TX#[5]
FDI_TX#[6]
PCI EXPRESS -- GRAPHICS PEG_RX[8]
PEG_RX[9]
F33
B33 PEG_GTX_C_HRX_P6 C128
1
1
2
2 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_P6 3.01K_0402_1%
1 2
CFG8
AM32
AK32
CFG[7]
CFG[8]
RSVD53
RSVD_NCTF_54
AR33
AT33
Intel(R) FDI

H_FDI_TXN7 G18 D31 PEG_GTX_C_HRX_P5 C140 1 2 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_P5 CFG9 AK31 AT34

RESERVED
FDI_TX#[7] PEG_RX[10] PEG_GTX_C_HRX_P4 C142 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_P4 CFG10 CFG[9] RSVD_NCTF_55
PEG_RX[11] A32 1 2 AK28 CFG[10] RSVD_NCTF_56 AP35
C30 PEG_GTX_C_HRX_P3 C151 1 2 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_P3 WW41 Recommend not pull down CFG11 AJ28 AR35
H_FDI_TXP0 PEG_RX[12] PEG_GTX_C_HRX_P2 C153 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_P2 CFG12 CFG[11] RSVD_NCTF_57
D22 FDI_TX[0] PEG_RX[13] A28 1 2 PCIE2.0 Jitter is over on ES1 AN30 CFG[12] RSVD58 AR32
H_FDI_TXP1 C21 B29 PEG_GTX_C_HRX_P1 C165 1 2 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_P1 CFG13 AN32
H_FDI_TXP2 FDI_TX[1] PEG_RX[14] PEG_GTX_C_HRX_P0 C174 DIS@ 0.1U_0402_16V7K PEG_GTX_HRX_P0 CFG14 CFG[13]
D20 FDI_TX[2] PEG_RX[15] A30 1 2 AJ32 CFG[14]
H_FDI_TXP3 C18 CFG15 AJ29 E15
C H_FDI_TXP4 FDI_TX[3] PEG_HTX_GRX_N15 C586 DIS@ 0.1U_0402_16V7K PEG_HTX_C_GRX_N15 CFG16 CFG[15] RSVD_TP_59 C
G22 FDI_TX[4] PEG_TX#[0] L33 1 2 AJ30 CFG[16] RSVD_TP_60 F15
H_FDI_TXP5 E20 M35 PEG_HTX_GRX_N14 C561 1 2 DIS@ 0.1U_0402_16V7K PEG_HTX_C_GRX_N14 CFG17 AK30 A2
H_FDI_TXP6 FDI_TX[5] PEG_TX#[1] PEG_HTX_GRX_N13 C584 DIS@ 0.1U_0402_16V7K PEG_HTX_C_GRX_N13 CFG18 CFG[17] KEY R146
F20 FDI_TX[6] PEG_TX#[2] M33 1 2 H16 RSVD_TP_86 RSVD62 D15
H_FDI_TXP7 G19