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AMD GeodeTM GX2 Processor/
CS5535 Companion Device Thin Client
CRT Reference Schematic Specification

1.0 Scope
The reference schematic incorporates the AMD GeodeTM Note: This is revision 1.3 of this document. The changes
GX2 x86 integrated processor and the AMD GeodeTM from revision 1.2 (dated February 2003) are the
CS5535 companion device into a design targeted at provid- updates to reflect revision 1.6 of the reference
ing the basic features of a thin client CRT platform. schematic, specifically Section 3.1.1, updates to
Table 3-1, added note and changed 0 NL to 10K
This document describes the features and options included
NL for 66 MHz in Figure 3-1, edited Section 3.2.2.1
in the reference schematic. Refer to Section A.1 "Related
and Section 3.2.8, and changed 1.4V to 1.5V in the
Documents" on page 13 for additional device information.
last sentence of Section 3.7.3.
Figure 1-1 shows a high-level block diagram of the refer-
ence schematic.




AMD GeodeTM
DDR DIMM
CRT Monitor GX2
Modules
Processor



33/66 MHz PCI Slot FS2

IDE
National Semiconductor Interface
DP83816 MacPHYTERTM
(33 MHz only)
AMD GeodeTM
CS5535 SanDisk
Companion CompactFlash
Device Interface

4 USB
Ports (2x2) Floppy Drive I/F
CD_IN National Serial I/F
LINE_IN LM4550 PC87364
AC97 SuperI/O Parallel I/F
MIC_IN
Codec
Headphone_OUT
PS2 Keyboard I/F

BootROM PS2 Mouse I/F
(FWH)
LPCCLK[3:0]
PCICLK[3:0] VCORE
OSCCLK[1:0] VMEM
Clocks Switching Linear VTT
USBCLK Regulators 5.0V
Regulator
VIO /3.3V
AC97CLK



Figure 1-1. Thin Client CRT Block Diagram


Revision 1.3 - April 2003 - Confidential 1
Applicaiton Note

Revision 1.3 - April 2003 - Confidential




2.0 System Overview 3.0 Hardware Description
The following subsections describe the GX2/CS5535 refer-
System Features ence schematic hardware components.
AMD GeodeTM GX2 integrated processor

GX2 die temperature thermal sensor (National Semicon- 3.1 GX2 Integrated Processor
ductor LM82)
GX2 Integrated Processor Features
AMD GeodeTM CS5535 companion device
32-bit x86 compatible CPU core:
ACPI (Advanced Configuration Power Interface) control -- 16 KB instruction/16 KB data L1 caches
and RTC (Real-Time Clock) -- Fully pipelined FPU (Floating Point Unit) with AMD
National Semiconductor LM4550 AC97 v2.1 codec: 3DNow!TM SIMD instruction set
-- MIC_IN Intel MMXTM compatible instruction set extensions
-- CD_IN
-- LINE _IN High performance and low power:
-- Headphone_OUT -- Target: 4W @366 MHz
-- Target: Core voltage of 1.4V
One 3.3V PCI 2.2 slot (66 MHz is available if National
Semiconductor MacPHYTER is not used in the design) UMA (Unified Memory Architecture) SDRAM memory
controller:
LPC ROM -- 64 MB to 1 GB system memory
CRT interface
-- PC2100 DDR operation