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1 1




2



Compal confidential 2




ISKAA LA-3481P Schematics Document
Mobile Merom uFCPGA with Intel
3
Crestline_PM+ICH8-M core logic 3




2007-06-23
REV:2.0A




4 4




Security Classification
2006/08/05
Compal Secret Data
2007/08/05 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-3481P 2.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Saturday, June 23, 2007 Sheet 1 of 47
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A B C D E




ISKAA Sub-board
Compal confidential ATI VGA/B LS-3481P Rev 1.0
Model : ISKAA ATI VGA/B LS-3486P Rev 1.0
File Name : LA-3481P SW/B LS-3482P Rev 1.0
Mobile Merom Thermal Sensor
1
Santa Rosa Platform Fan Control uFCPGA-478 CPU ADM1032ARMZ Clock Generator CRT/B LS-3483P Rev 1.0
1

page 4 ICS 9LPR365 USB/B LS-3484P Rev 1.0
page 4 page 16 Robson/B LS-3445P Rev 1.0
page 4,5,6
Finger Print/B LS-3401P Rev 1.0

H_A#(3..35) FSB
H_D#(0..63)
667/800MHz 1.05V


HDMI Conn LCD Conn. CRT & TV-out
page 18 page 19 page 17 Intel Crestline MCH DDR2 667MHz 1.8V
DDR2-SO-DIMM X2
BANK 0, 1, 2, 3 page 14,15
FCBGA 1299 Dual Channel
ATI M72/76 VGA/B Conn.
page 7,8,9,10,11,12,13
with 256/512 page 19 PCI-Express x 16
Int. Camera USB x 2 USB/B conn USB2.0
VRAM
2
Mini-Card USB port 7 USB x 1 page 33
conn page 33 page 33
Bluetooth Conn 2

page 33
3.3V 48MHz
New Card socket DMI X4
3G page 31 page 30 USB port 2 USB port 4, 5 USB port 0, 1 USB port 8
USB port 9 USB 3.3V 480MHz
PCI-E BUS 2.5GHz

Azalia
Intel ICH8-M




3.3V 24.576MHz/48Mhz
SATA1.5GHz Tweeter/HP Amplifier
PCI BUS 3.3V 33 MHz mBGA-676 PATA USB1.1
Mini-Card Mini-Card Finger Printer & Int-Mic
page 20,21,22,23 USB port 6 page 28
10/100/1000 LAN page 33 APA2056




3.3V ATA-100
RTL8111B/RTL8101E Robson WLAN
page 26 page 31 page 31

MDC V1.5
page 30
3
RJ45/11 CONN 3
page 26
LPC BUS HD Audio Codec
3.3V 33 MHz ALC268 page 27
CardBus Controller
TI PCI8412 SATA 0 SATA HDD Connector
page 24,25 page 32

LED
SATA 1
page 34 SATA HDD Connector
Slot 0 1394 port 5in1 Slot ENE KB926 Audio Jack
page 32
page 25 page 24 page 24 page 28
RTC CKT.
page 29
page 21
PATA Slave
PATA ODD Connector
Power On/Off CKT. page 32
page 34
4 4
Touch Pad Int.KBD SPI BIOS CIR
DC/DC Interface CKT. page 34 page 34 page 34 page 33
page 35
Security Classification
2006/08/05
Compal Secret Data
2007/08/05 Title
Compal Electronics, Inc.
Power Circuit DC/DC Issued Date Deciphered Date
Block Diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Page 36~43 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-3481P 2.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, May 22, 2007 Sheet 2 of 47
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5 4 3 2 1




Voltage Rails Board ID / SKU ID Table for AD channel
Vcc 3.3V +/- 5%
Power Plane Description S0-S1 S3 S5 Ra/Rc/Re 100K +/- 1%
Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
VIN Adapter power supply (18.5V) N/A N/A N/A
B+ AC or battery power rail for power circuit N/A N/A N/A
0 0 0 V 0 V 0.100 V
D D

+VCC_CORE Core voltage for CPU ON OFF OFF
1 8.2K +/- 1% 0.216 V 0.250 V 0.289 V
+0.9VS 0.9V switched power rail for DDRII Vtt ON OFF OFF
2 18K +/- 1% 0.436 V 0.503 V 0.538 V
+1.05VS 1.05V power rail for Processor I/O and MCH/ICH core power
ON OFF OFF
3 33K +/- 1% 0.712 V 0.819 V 0.875 V
+1.25VS 1.25V power rail for MCH/ICH core power ON OFF OFF
4 56K +/- 1% 1.036 V 1.185 V 1.264 V
+1.5VS 1.5V switched power rail for PCI-E interface ON OFF OFF
5 100K +/- 1% 1.453 V 1.650 V 1.759 V
+1.8V 1.8V power rail for DDRII ON ON OFF
6 200K +/- 1% 1.935 V 2.200 V 2.341 V
+1.8VS 1.8V switched power rail ON OFF OFF
7 NC 2.500 V 3.300 V 3.300 V
+2.5VS 2.5V switched power rail for MCH video PLL ON OFF OFF
+3VALW 3.3V always on power rail ON ON ON*
+3VS 3.3V switched power rail ON OFF OFF
+5VALW 5V always on power rail ON ON ON*
+5VS 5V switched power rail ON OFF OFF
+RTC_VCC RTC power ON ON ON BOARD ID Table BTO Option Table
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Board ID PCB Revision BTO Item BOM Structure
0 0.1 2nd HDD [email protected]
C C
1 0.2 [email protected]
LAN [email protected]
2 0.3
WLAN [email protected]
3 0.4
[email protected]
External PCI Devices 4 1.0 NB [email protected]
5 2.0 BT [email protected]
DEVICE PCI Device ID IDSEL # REQ/GNT # PIRQ
6 2A MIC [email protected]
1394 D0 AD20 2 A,B,C,D 7 CIR [email protected]
CARD BUS D4 AD20 2 A,B,C,D FINGER PRINT [email protected]
5IN1 D4 AD20 2 A,B,C,D HDMI [email protected]
SKU ID Table
Camera [email protected]
SKU ID SKU
0 10 Robson [email protected]
1 10G
KB926 I2C / SMBUS ADDRESSING Express Card [email protected]
2
DEVICE HEX ADDRESS 3 HD-DVD [email protected]
4
B
SM1 24C16 A0H 1010000Xb B
5
SM1 SMART BATTERY 16H 0001011Xb
6
SM2 ADM0132 98H 1001100Xb
CPU THERMAL MONITOR 7
USB PORT LIST
PORT DEVICE
0 RIGHT USB Port (Samll Board)
ICH8-M SM Bus address 1 RIGHT USB Port (Samll Board)
2 3G Card
DEVICE HEX ADDRESS N.C.
3
DDR SO-DIMM 0 A0 10100000 4 LEFT USB Port
DDR SO-DIMM 1 A4 10100100 5 LEFT USB Port
CLOCK GENERATOR (EXT.) D2 11010010 6 Fingerprint or Felica
7 Blue Tooth
8 Internal Camera
9 New Card
A A




Security Classification
2006/08/05
Compal Secret Data
2007/08/05 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-3481P 2.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, May 22, 2007 Sheet 3 of 47
5 4 3 2 1
5 4 3 2 1

+5VS
VS
+1.05VS
C926
Place close to CPU within 500mil
1 2
@




8
@ LM358DT_SO8




1SS355_SOD323
PU5B 10U_0805_10V4Z H_IERR# R14 2 1 56_0402_5%




1
5 C Q53 Please add the 10uf capacitor if the




P
<29> EN_DFAN1 +




1
7 R629 2 FMMT619_SOT23
0 100_0402_5% B D1
+5VS power source not stable.
6 -




G
E ITP_PREQ R604 2 1 54.9_0402_1%




3
4
1 ITP_TDI R11 2 1 150_0402_1%




2
C925 JP2
@ +FAN1_VOUT 1 ITP_TDO @R605 2
@ R605 1 54.9_0402_1%
D 1 D




0.1U_0402_16V4Z
2 2




1
2




1N4148_SOT23
1 2 1 R20 2 3 3
ITP_TMS R10 2 1 39_0402_1%
R19 10K_0402_5% 8.2K_0402_5% D2
4 GND
5 H_PROCHOT# R310 2 1 56_0402_5%
GND




2
1 ACES_85205-03001

C13 ITP_TCK R22 2 1 27_0402_1%
@
R23 1 2 1000P_0402_50V7K ITP_TRST# R21
+3VS 2 2 1 649_0402_5%
10K_0402_5% H_A#[3..35]
<7> H_A#[3..35]
<29> FAN_SPEED1
1
C14
1000P_0402_50V7K
2 JP1A
H_A#3 J4 H1 H_ADS#
A[3]# ADS# H_ADS# <7>




ADDR GROUP 0
ADDR GROUP 0
H_A#4 L5 E2 H_BNR#
A[4]# BNR# H_BNR# <7>
H_A#5 L4 G5 H_BPRI#
A[5]# BPRI# H_BPRI# <7>
H_A#6 K5
H_A#7 A[6]# H_DEFER# +1.05VS
M3 A[7]# DEFER# H5 H_DEFER# <7>
H_A#8 N2 F21 H_DRDY#
A[8]# DRDY# H_DRDY# <7>
H_A#9 J1 E1 H_DBSY#
A[9]# DBSY# H_DBSY# <7>
H_A#10 N3 A[10]#




1
H_A#11 P5 F1 H_BR0#
A[11]# BR0# H_BR0# <7>
H_A#12 P2 A[12]#




CONTROL
H_A#13 L2 D20 H_IERR# R16
H_A#14 A[13]# IERR# H_INIT# @ 56_0402_5%
P4 A[14]# INIT# B3 H_INIT# <21>
H_A#15 P1




2 2
H_A#16 A[15]# H_LOCK#
R1 A[16]# LOCK# H4 H_LOCK# <7>




B
C H_ADSTB#0 C
<7> H_ADSTB#0 M1 ADSTB[0]#
C1 H_RESET# H_RESET# <7>
RESET#




E
E
H_REQ#0 K3 F3 H_RS#0 H_RS#0 <7> H_PROCHOT# 3 1 OCP#
<7> H_REQ#0 REQ[0]# RS[0]# OCP# <22>




C
H_REQ#1 H2 F4 H_RS#1 H_RS#1 <7> Q1
<7> H_REQ#1 REQ[1]# RS[1]#
H_REQ#2 K2 G3 H_RS#2 H_RS#2 <7> @ MMBT3904_SOT23
<7> H_REQ#2 REQ[2]# RS[2]#
H_REQ#3 J3 G2 H_TRDY# H_TRDY# <7>
<7> H_REQ#3 REQ[3]# TRDY# +1.05VS
H_REQ#4 L1
<7> H_REQ#4 REQ[4]#
G6 H_HIT# H_HIT# <7>