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5 4 3 2 1




CPU:
MS-6585 Ver:5.0 Pentium4 socket-478 Processor
System Chipset:
SIS648FX(NB) + SIS963L(SB)
D
On Board Function Chip: D




LPC I/O-W83697HF
VRM 10 Socket 478 CPU Clock

FSB400/533/800
LAN-Broadcom BCM4401/5705
Audio Codec-Realtek ALC650
Sreial-ATA SIS180 or PDC20736



Command



Address BUS



Data BUS
DDR DIMM
Terminator Expansion Slot:
AGP3.0 Slot*1
PCI2.2 Slot*6

NB Clock
cfg6585-std:Non-Lan
Data BUS cfg6585-optA:Gigabit Lan,SATA
NB ZCLK cfg6585-optB:10/100 Lan
C Clock Gen C
3 DDR CPU Clock CONTENT
AGP Clock
Address BUS Modules CPU Clock 01-Block drigrame & Cover sheet
SIS648FX/648 B0 NB Clock
NB Clock 02-Power Div & Specification
NB ZCLK 03-Willamette 478 CPU part 1
Command
AGP 4X/8X AGP BUS NB ZCLK 04-Willamette 478 CPU part 2
SB ZCLK
SB ZCLK 05-Main Clock Gen.
AGP Clock 06-Clock Buffer
HyperZip




AGP Clock 07-VRM 10
PCI Clock
PCI Clock 08-SIS648-1 Host & AGP
USB Clock 09-SIS648-2 Memory
USB Clock 10-SIS648-3/4 Power & HyperZip
USB PC to PC DDR DIMM I/O Clock
PCI Clock Buffer I/O Clock 11-AGP slot & Pull-UP/DN resistor
SB 14MHz 12-DIMM 1 & 2
SB 14MHz SB 14MHz 13-DIMM 3
USB
Port SB ZCLK 14-DDR Terminator
B
1-6 SIS963L 15-SIS961-1 PCI & IDE & HyperZip
B

USB 1.1/2.0 BUS
PCI BUS 16-SIS963-2 MISC.
USB Clock 17-SIS963-3/4 USN & Power
18-USB port & VID Adj. & MS1
19-VID Adjust & DELD
20-PCI slot 1 & 2 & 3
LPC Interface




Broadcom S-ATA Host 21-PCI slot 4 & 5
PCI Clock BCM4401/5705 Controller 22-AC97 Codec
PCI Conn 1-5




AC97 Codec AC97 Link BUS GIGA-BIT LAN (SIS180 or 23-LAN BCM4401/5702
PDC20736)
24-IDE1/2 & PS2
I/O Clock 25-W83697HF I/O & BIOS
UltraDMA
33/66/100/133 26-Com/Parallel port
Keyboard IDE 2 SATA 27-ATX & F-Panel & Audio-port
connector connector
Mouse W83697HF 28-MS5 ACPI Controller
Floopy LPC I/O IDE connector 1 29-SATA SIS180
A Parallel 30-Decoupling Capacitor A
IDE connector 2
Serial 31-Manual part & GPIO define
32-Revision History
MICRO-STAR INT'L LO.,LTD.
ISA Flash ROM
Title
Cover Sheet & Block Diagram
Size Document Number Rev
MS-6585 5.0
Custom
Date: Friday, February 21, 2003 Sheet 1 of 32
5 4 3 2 1
5 4 3 2 1




ATX 12V POWER Supply

3.3V 5V 5VSB 12V Power Delivery Map
1A



D D

VRM 9.0 Center Processer Unit



5VDU VREG


NB-SIS648
3VSB VREG
Core Power


1.8V VREG Z-Link BUS


Memory Interface
VDIMM VREG
AGP Interface

C C
VDDQ VREG



2.5V VREG DDR Memory



SB-SIS963

Core Power


Z-Link BUS




Clock Generator
B B




Clock Buffer



AGP slot



PCI slot



RT8100BL H/W LAN



IDE Raid

A A




MICRO-STAR INT'L LO.,LTD.
Title
Power Delivery
Size Document Number Rev
MS-6585 5.0
Custom
Date: Friday, February 21, 2003 Sheet 2 of 32
5 4 3 2 1
5 4 3 2 1




VCC_SENSE 7 CPU GTL REFERNCE VOLTAGE BLOCK
VSS_SENSE 7

CPUVID_GD 28 VCCP
VID5 19
VID4 19
VID3 19 Length < 1.5inch.
HA#[3..31] R63
8 HA#[3..31] VID2 19 2/3*Vccp 49.9RST
VID1 19 GTLREF1
VID0 19




HA#31
HA#30
HA#29
HA#28
HA#27
HA#26
HA#25
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#18
HA#17
HA#16
HA#15
HA#14
HA#13
HA#12
HA#11
HA#10
HA#9
HA#8
HA#7
HA#6
HA#5
HA#4
HA#3
C34 C35 C42 R64




VID4
VID3

VID1
VID0
VID5


VID2
D 220p 220p 1u 100RST D
Open-D




AD26
AC26
AE25




AD2
AD3
AB1




AE1
AE2
AE3
AE4
AE5
W2



W1




M1

M4
M3

M6
U4


R6


U3

U1

R3


R2

N5
N4
N2

N1
U3A




Y1

V3




V2


P6



P4
P3




K1

K4
K2



A5
A4
T5



T4



T2




T1




L2

L3

L6
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
A26#
A25#
A24#
A23#
A22#
A21#
A20#
A19#
A18#
A17#
A16#
A15#
A14#
A13#
A12#
A11#
A10#
A9#
A8#
A7#
A6#
A5#
A4#
A3#




ITP_CLK1
ITP_CLK0


VID5#
VID4#
VID3#
VID2#
VID1#
VCC_SENSE
VSS_SENSE




VID0#
DBR




VIDPWRGD
VCCP
HDBI#0 E21
8 HDBI#0 HDBI#1 DBI0# GTLREF1
8 HDBI#1 G25 DBI1# GTLREF3 AA21
GTLREF2
Length < 1.5inch.
HDBI#2 P26 AA6 R10
8 HDBI#2 HDBI#3 DBI2# GTLREF2 2/3*Vccp X_49.9RST
8 HDBI#3 V21 DBI3# GTLREF1 F20
F6 GTLREF2
GTLREF0
AC3 IERR#
V6 AB4 BPM#5 C26 C27 R9
FERR# MCERR# BPM5# BPM#4 220p 220p X_100RST
16 FERR# B6 FERR# BPM4# AA5
STPCLK# Y4 Y6
16 STPCLK# STPCLK# BPM3#
AA3 BINIT# BPM2# AC4
INIT# W5 AB5 BPM#1
16 INIT# INIT# BPM1#
AB2 AC6 BPM#0
RSP# BPM0#
HDBSY# H5 H3 HREQ#4 Every pin put one 220pF cap near it.
8 HDBSY# DBSY# REQ4# HREQ#4 8
HDRDY# H2 J3 HREQ#3
8 HDRDY# DRDY# REQ3# HREQ#3 8
HTRDY# J6 J4 HREQ#2 Trace Width 15mils, Space 15mils.
8 HTRDY# TRDY# REQ2# HREQ#2 8
K5 HREQ#1
REQ1# HREQ#1 8
HADS# G1 J1 HREQ#0 Keep the voltage dividers within 1.5 inches of the
8 HADS# ADS# REQ0# HREQ#0 8
HLOCK# G4 AD25
8 HLOCK# LOCK# TESTHI12
HBNR# G2 A6 R62 56 first GTLREF Pin
8 HBNR# BNR# TESTHI11
HIT# F3 Y3
8 HIT# HIT# TESTHI10
HITM# E3 W4 R25 56
8 HITM# HITM# TESTHI9
HBPRI# D2 U6
8 HBPRI# BPRI# TESTHI8
HDEFER# E2 AB22
C
8 HDEFER# DEFER# TESTHI7 C
TESTHI6 AA20
TDI_CPU C1 AC23 R61 56
TDI TESTHI5
TDO_CPU
TMS_CPU
D5
F7
TDO TESTHI4 AC24
AC20
CPU STRAPPING RESISTORS
TMS TESTHI3
TRST#_CPU E6 TRST# TESTHI2 AC21 CLOSED TO SOCKET478
TCK_CPU D4 AA2 R60 56
TCK TESTHI1 VCCP
AD24

Socket478-1 TESTHI0

BCLK1#
BCLK0#
AF23
AF22
CPUCLK-0
CPUCLK0
5
5
VCCP


BOOTSEL AD1 THERMTRIP# R44 X_62
7 BOOTSEL BOOTSEL
R577 AE26 F4 HRS#2 TDI_CPU R43 150
OPTIMIZED/COMPAT# RS2# HRS#2 8
X_0 G5 HRS#1 FERR# R26 X_62
RS1# HRS#1 8
CPU_TMPA B3 F1 HRS#0 PROCHOT# R12 X_62
25 CPU_TMPA THERMDA RS0# HRS#0 8
VTIN_GND C4 BREQ#0 R41 49.9RST
25 VTIN_GND THERMDC
THERMTRIP# A2 V5 CPURST# R68 49.9RST
16 THERMTRIP# THERMTRIP# AP1#
AC1 PWRGD_CPU R67 49.9RST
AP0# BREQ#0
19 SKTOCC# AF26 SKTOCC# BR0# H6 BREQ#0 8
PROCHOT# C3 BPM#0 R21 49.9RST
16 PROCHOT# PROCHOT#
IGNNE# B2 P1 R33 49.9RST BPM#1 R22 49.9RST
16 IGNNE# IGNNE# COMP1
SMI# B5 L24 R70 49.9RST * Short trace BPM#4 R24 49.9RST
16 SMI# SMI# COMP0
A20M# C6 BPM#5 R23 49.9RST
16 A20M# A20M
CPUSLP# AB26 L25
16 CPUSLP# SLP# DP3#
A22 K26 STPCLK# R11 X_56
RESERVED DP2#
A7 RESERVED DP1# K25
J26 INIT# R13 X_56
DP0#
AE21 R5 HADSTB#1 SMI# R8 X_56
RESERVED ADSTB1# HADSTB#1 8
AF24 L5 HADSTB#0
RESERVED ADSTB0# HADSTB#0 8
AF25 W23 HDSTB3 CPUSLP# R14 X_56
RESERVED DSTBP3# HDSTB3 8
PWRGD_CPU AB23 P23 HDSTB2
B 8 PWRGD_CPU PWRGOOD DSTBP2# HDSTB2 8 B
CPURST# AB25 J23 HDSTB1 A20M# R472 X_56
8 CPURST# RESET# DSTBP1# HDSTB1 8
HD#63 AA24 F21 HDSTB0
D63# DSTBP0# HDSTB0 8
HD#62 AA22 W22 HDSTB#3 INTR R473 X_56
D62# DSTBN3# HDSTB#3 8
HD#61 AA25 R22 HDSTB#2
D61# DSTBN2# HDSTB#2 8
HD#60 Y21 K22 HDSTB#1 NMI R474 X_56
D60# DSTBN1# HDSTB#1 8
HD#59 Y24 E22 HDSTB#0
D59# DSTBN0# HDSTB#0 8
HD#58 Y23 E5 NMI IGNNE# R475 X_56
D58# LINT1 NMI 16
HD#57 W25 D1 INTR
D57# LINT0 INTR 16
HD#56 Y26
BSEL0
BSEL1
HD#55 D56#
D53#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D41#
D40#
D39#
D38#
D37#
D36#
D35#
D34#
D33#
D32#
D31#
D30#
D29#
D28#
D27#
D26#
D25#
D24#
D23#
D22#
D21#
D20#
D19#
D18#
D17#
D16#
D15#
D14#
D13#
D12#
D11#
D10#




W26 D55#
D9#
D8#
D7#
D6#
D5#
D4#
D3#
D2#
D1#
D0#
HD#54 V24 D54# PWRGD_CPU C46 X_150p
M26

M24


M23




M21




AD6