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5 4 3 2 1




DC/DC & Charger
< NAPA > CPU VR ADI3207
P:36
Switching
1.5V,+VCCP OZ813 P:34

TAURUS2 BLOCK DIAGRAM
D D

3V,5V MAX8734 P:33
AC/BATT
Connector P:37 LDO

Yonah/Calistoga BATT
Charger
OZ8602G_N
P:37
2.5V
VTT_MEM(0.9V)
VDIMM(1.8V)
MAX8887EZK25
MAX8632
MAX8632
P:35
P:35
P:35
VCORE_CPU
+3V

Clocks RTC Battery
Yonah +3V
P:15
CPU Thermal CK410
479 Pins Silego: SLG8LP453B
(Micro-FCBGA) Sensor
GMT P:4
G792 P:6
+VCCP P:6,7

FSB
4X133MHZ

VTT_MEM VDIMM +VCCP(1.05V)
DDRII SDRAM 1.8V, 667MHz
P:14
LVDS LCD Panel
C
DDR-SODIMM1 945GM P:22
C




VDIMM(1.8V) +1.5V
Calistoga R.G,B CRT port
P:14 DDR-SODIMM2 1.05V 1466 FCBGA P:21
+2.5V
P:8,9,10,11,12,13


DMI
33MHZ, 3.3V PCI
+VCCP(1.05V)
SATA 1.0 +1.5VSUS
+3V SATA HDD P:19 AD23 AD18
ICH7-M +3V 3G CARD -->0 PIRQB# REQ2 PIRQA# REQ0
+2.5V
3V,1.5V P:20 +3VAUX
Azalia-LINK +VCCP 652 BGA PCI-Express x1 CardBus LAN
Headphone +3VSUS 10/100/1G
P:29 P:15,16,17,18 OZ711 BCM4401
+5VA +3V +3VAUX
MINI PCIe WLAN -->1 P:26 P:24
AUDIO MDC RJ11 3V,1.5V P:20
B

External P:20 P:25
USB 2.0 B



Azalia ALC260(Codec)
MIC P:29
TPA0312(Amp) CARD 1394 CARD
P:28 BUS CONN READER
RJ45
P:25
Internal SLOT
MIC P:28 USB PORT -->0 P:26 P:27 P:27
+5VSUS P:19

InternalSpeaker +3VALW
P:28
BlueTooth --> 4
IT8511E 3V P:30
176 Pins LQFP
P:31


+3VALW +5V +5V +3VALW +5V USB PORT -->1,2
APS Touchpad Keyboard FLASH FAN 1 +5VSUS P:19
P:39 P:30 P:30 P:31 P:6
Dauther Board
A A




LENOVO.NOD
HuZW LiXINP LiYJK LvXDA
Title
PVT Schematics Release BLOCK DIAGRAM
Size Document Number
C Rev s0.1
Taurus2
Date: Thursday, June 29, 2006 Sheet 1 of 40
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."


5 4 3 2 1
5 4 3 2 1




D D




C C




B B




A A




LENOVO.NOD
HuZW LiXINP LiYJK LvXDA
Title
Power Sequence Block
Size Document Number
C Rev s0.1
Taurus2
Date: Thursday, June 29, 2006 Sheet 2 of 40
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."


5 4 3 2 1
5 4 3 2 1


ATI VGA PCIE
power




INDEX Power & Ground

Pg# Description DNI LIST Label Pg# Description Control Signal
D D




ADIN ADIN AC ADAPTER (19V)
ADIN 37
1 Block Diagram
MAIN BATTERY + (10~17V)
2 Power Sequence Block
VIN MAIN POWER (10~20V)
VIN 22,33,34,35,36,37
3 Frontpage
VCCRTC RTC & PCL POWER (3_3V)
VCCRTC 15,18,31
4 Clock Generator
+3VALW EC 3V always power
+3VALW 15,17,22,23,30,31,33,37,39
6,7 Yonah CPU
+5VALW 5V always power
+5VALW 32,33
8-13 Calistoga
3VAUX LAN power 3VAUXEN
3VAUX 20,24,25,33,34
14 DDR SO-DIMM
ICH7-M 1.5V SUS power SUSON
15-18 ICH7-M

19 USB & SATA VDIMM DDRII RAM 1.8V power SUSON
VDIMM 8,10,14,32,35

+3VSUS 3V SUSON
+3VSUS 16,17,18,23,31,32,33,35
20 MINI PCIE, WWAN & MDC
+5VSUS 5V SUSON
+5VSUS 18,19,32,33
21 CRT
+1.5V AGP I/O power MAINON
+1.5V 10,11,12,17,18,20,32,34
22 LCD CONN
C C




23 SWITCH & LED

24 BCM4401/5702 LAN

25 RJ11&RJ45
+3V +3V MAINON
+3V 4,6,8,11,12,14,15,16,17,18,19,20,21,22,23,24,26,27,28,30,31,32,33,36
26 Cardbus OZ711
+5V +5V MAINON
+5V 6,18,19,21,26,28,30,31,32,33,36
27 CARDREADER & 1394
+5VA AUDIO analog 5V power MAINON
+5VA 28
28 AUDIO
+5V_FAN FAN 5V power VFAN
+5V_FAN 6
29 AUDIO JACK
RBAYON#
30 KB & TP & BT
MOSVCC High Voltage to control MOS MAINON
MOSVCC 22,26,27,30,32,33

31 IT8511E & FLASH
VCORE_CPU CPU power VRON
VCORE_CPU 7,32,36

32 DISCHARGE
+VCCP CPUIO powers(1.05V) MAINON
+VCCP 4,6,7,8,10,11,15,18,32,34

33 SYSTEM POWER

34 VCCP & GMCH CORE
REF3V EC analog 3V power REFON
B
REF3V 37 B


35 DDR CORE


36 CPU CORE

37 BATTERY CHARGER GND ALL PAGES DIGITAL GROUND

38 EMI PADs& Screws AUDGND 28,29
AUDIO GND
39 APS

40 CHANGE LIST




A A




LENOVO.NOD
HuZW LiXINP LiYJK LvXDA
Title
Frontpage
Size Document Number
C Rev s0.1
Taurus2
Date: Thursday, June 29, 2006 Sheet 3 of 40
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."


5 4 3 2 1
5 4 3 2 1




+VCCP

+3V

D R534 D


1.2K +-1%
NS VCC3_CLK




1




1
1
R594 FB22 FB23
R535 R_0402 0 +-5% R_0402 BSEL0
6 CPU_BSEL0 600 OHM/1.5A 600 OHM/1.5A
8.2K +-5% C366 C313 C363 C315 C345
R532 1K +-1%
R533 0.047UF/16V 0.047UF/16V 0.1UF/10V 0.1UF/10V 10uF/6.3V R473 C365 C414
8 MCH_BSEL0 2 +-5%
C_0402 C_0402 C_0402 C_0402 C_0805
1.2K +-1% 0.047UF/16V 10uF/6.3V
R_0603 C_0402 C_0805
R_0603 R354
NS For SLG8LP453 buildin Pulldown res.
2 +-5%
+VCCP R_0603
+V3.3S_CLKVDD1
NS R_0402
C350 C513 CLK_CPU_BCLK R316 54.9 +-1%
R496 C413 NS R_0402
Y4 R337 0.1UF/10V 10uF/6.3V CLK_CPU_BCLK# R317 54.9 +-1%
1.2K +-1% 0.047UF/16V C_0402
NS 1 +-5% C_0805 NS R_0402
U19 C_0402




7

1
1
R595 R_0603 CLK_MCH_BCLK R318 54.9 +-1%
R500 R_0402 0 +-5% R_0402 BSEL1 21 11 NS R_0402




VDD_PCI1

VDD_PCI0
6 CPU_BSEL1 VDD_SRC0 VDD_48 C312
14.31818MHZ VDD_A_CR 28 CLK_MCH_BCLK# R319 54.9 +-1%
0 +-5% VDD_SRC1 VDD_REF_CR 0.047UF/16V NS R_0402
C311 C310 34 VDD_SRC2 VDD_REF 48
R463 1K +-1% C_0402 DREFSSCLK R497 54.9 +-1%
R482 33PF/50V 33PF/50V 55 NS R_0402
8 MCH_BSEL1 C314 C324 PCI_STOP# STP_PCI# 17
C_0603 C_0603 42 54 DREFSSCLK# R530 54.9 +-1%
1.2K +-1% 0.047UF/16V 10uF/6.3V VDD_CPU CPU_STOP# STP_CPU# 17
RN4 0X2 NS R_0402
R_0603 C_0402 C_0805 CPU1 DREFCLK R389 54.9 +-1%
NS 37 VDD_A CPU1 41 1 2 CLK_MCH_BCLK 8
40 CPU#1 3 4 NS R_0402
CPU1# CLK_MCH_BCLK# 8
38 RN3 0X2 DREFCLK# R465 54.9 +-1%
VSS_A CPU0 R_SMT4_0402 NS R_0402
CPU0 44 1 2 CLK_CPU_BCLK 6
43 CPU#0 3 4 CLK_PCIE_ICH# R505 54.9 +-1%
C
XTAL_IN CPU0# R_SMT4_0402 CLK_CPU_BCLK# 6 NS R_0402 C
50 XTAL_IN
+VCCP RN5 0X2 CLK_PCIE_ICH R495 54.9 +-1%
XTAL_OUT 49 36 ITP 1 2 CLK_ITP 6 NS R_0402
R381 33 +-5% XTAL_OUT CPU_2_ITP/SRC_7 ITP# NS CLK_PCIE_SATA# R456 54.9 +-1%
17 CLK48_USB CPU2_ITP/SRC7# 35 3 4 CLK_ITP# 6
BSEL0 12 R_SMT4_0402 NS R_0402
R352 FSA/USB_48 R338 10K +-5% CLK_PCIE_SATA R531 54.9 +-1%
SRC6/CLKREQA# 33
BSEL1 16 32 NS
1.2K +-1% FSB/TEST_MODE SRC6#/CLKREQB# R364 10K +-5% RN19 0X2
R_0603 R378 33 +-5% BSEL2 PCIE5 NS PCIE5 1
NS 31 PCLK_591 53 REF1/FSC/TEST_SEL SRC5 31 2 PCIECLK_3G 20
R593 30 PCIE#5 PCIE#5 3 4 PCIECLK_3G# 20
R345 R_0402 0 +-5% 8.2K +-5% BSEL2 SRC5#
6 CPU_BSEL2 5 RN30 0X2
R_SMT4_0402
PCI5 PCIE4 PCIE#4 1
SRC4 26 2 PCIECLK_WLAN# 20
R_0402 4 27 PCIE#4 PCIE4 3 4 PCIECLK_WLAN 20
R363 1K +-1% R362 PCI4 SRC4#
RN18 0X2
R_SMT4_0402
3 24 PCIE3 PCIE#3 1 2 NS R_0402
8 MCH_BSEL2 1.2K +-1% PCI3 SRC3 CLK_PCIE_MCH# 8
R353 10K +-5% 25 PCIE#3 PCIE3 3 4 CLK_PCIE_MCH R501 54.9 +-1%
R_0603 +3V SRC3# CLK_PCIE_MCH 8
NS R346 33 +-5% PCI2 56 0X2
RN17 R_SMT4_0402 NS R_0402
NS 24 PCLK_LAN PCI2/REQ_SEL
22 PCIE2 PCIE#2 1 2 CLK_PCIE_SATA# CLK_PCIE_SATA# 15 CLK_PCIE_MCH# R502 54.9 +-1%
SRC2 PCIE#2 PCIE2 3
26 PCLK_OZ711
R380 33 +-5% 9 PCIF1/DREF_SEL SRC2# 23 4 CLK_PCIE_SATA CLK_PCIE_SATA 15
R498 10K +-5% R_0603 RN16 0X2
+3V
R379 33 +-5% PCIF0 8 19 PCIE1 PCIE1# 1 2R_SMT4_0402
16 PCLK_ICH7 PCIF0/ITP_EN SRC1 CLK_PCIE_ICH# 17
20 PCIE1# PCIE1 3 4
R326 0 +-5% CGCLK_SMB SRC1# RN15 0X2 R_SMT4_0402 CLK_PCIE_ICH 17
14,16 SMB_CLK_ICH7 46 SCLOCK change from 49.9 to 54.9
DREF_SSCLK 17 3 4 R_SMT4_0402
DREFSSCLK DREFSSCLK 8
R325 0 +-5% CGDAT_SMB 47 18 1 2 DREFSSCLK# DREFSSCLK# 8
14,16 SMB_DATA_ICH7 SDATA DREF_SSCLK#
IREF 39 RN14 0X2 Note:Pls confirm need BIOS modify?
IR