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BONDI II
A A
AC/BATT
CONNECTOR PG 49
CPU VR CLOCKS RESET CKT
RUN POWER
Banias DC/DC
SW BATT
SELECTOR PG 41
PG 46 PG 43 PG 14 PG 40
PG 47 (Micro-FCPGA)
BATT PG 4,5
CHARGER PG 42
Panel Connector
PG 18
4X100MHZ
LVDS
B
DVI B
ODEM Video
266/200 MHZ DDR
Controller S-Video
MCH-M AGP PG 31(IO)
DDR-SODIMM1 PG 15,16,17
593 Micro-FCBGA
266/200 MHZ DDR VGA
PG 6,7, 8 PG 31
DDR-SODIMM2
2 Rear Ports PG 31(IO)
66(266)MHZ, 1.8V
HUB I/F 1 Port for Bluetooth. PG 30(Bluetooth)
1 Port
IDE1 - HDD ATA 66/100
33MHZ, 3.3V PCI DOCKING
PG 20 Q-SWITCH CONNECTOR
ICH4-M PG 38
Internal Media Bay ATA 66/100
C
CD-ROM 421 BGA PG 39 C
PG 20
USB2.0 1 port BroadCom MINI-PCI CARDBUS
AC97 PG 9,10,11
Lan(5702) Wireless LAN
OZ711EC1
Bluetooth
PG 35 PG 23 PG 22
LPC
Magnetics RJ45
PG 36 PG 36
AUDIO MDC
PG 33,34 PG 24 SIO(Macallen)
256 Pins LBGA DOCK LPC
S/PDIF to Audio RJ11 to Tip
DOCK Jacks DOCK X-Bus
D
Ring PG 25,26 D
PG 39 PG 34 PG 39 PG 24
QUANTA
PS/2
COMPUTER
Title
Touchpad/ Flash Schematic Block Diagram1
IrDA Keyboard Serial Parallel Stick point Size Document Number Rev
PG 37 PG 26 PG 27 PG 28 PG 30 PG 29 JM2 2E
Date: Monday, January 06, 2003 Sheet 1 of 49
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A A
Memory
Embed 16MB Interface Integrated DOCK DVI Connector
Spread Video RAM Connector in DOCK
Spectrum
TMDS
Interface
PG 39
PG 18
DAC1 External
VGA
(CRT) ATI Mobility TMDS
Interface
B
Connector M7D/M9CSP32 Core Logic Interface B
PG 19
PG 4, 5
DAC2 PCI/AGP
(TV/CRT2)) Power & LCD Connector
S-Video LVDS
Interface Ground
GPIOs
Interface PG 18
PG 31
Voltage
C
Regulation C
PG 48
D D
QUANTA
COMPUTER
Title
Schematic Block Diagram2
Size Document Number Rev
JM2 1A
Date: Monday, January 06, 2003 Sheet 2 of 49
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INDEX Power & Ground
Pg# Description DNI LIST Label Pg# Description Control Signal
DC_IN+ AC ADAPTER (20V)
1 Schematic Block Diagram 1
PBATT+ MAIN BATTERY + (10~17V)
2 Schematic Block Diagram 2
A A
PWR_SRC MAIN POWER (10~20V)
3 FRONTPAGE
RTC_PWR3_3V RTC & PCL POWER (3_3V)
4-5 Banias
+12V +12V DRUNPWROK
6-8 Odem MCH-M
VHCORE CPU CORE POWER (1.25/1.15V) RUNPWROK
9-11 ICH4
V1_2RUN AGTL+ POWER (1.2V) RUNPWROK
12-13 DDR SO-DIMM(200P)
14 CLOCK GENERATOR
+3VRUN SLP_S3# CTRLD POWER RUN_ON
15-17 M7/M9 Graphics
+3VSUS SLP_S5# CTRLD POWER SUS_ON
18-19 LCD CONN,CY25245 & CRT CONN +5VALW 8051 POWER (5V)
20 IDE (HDD&CD_ROM) +5VRUN SLP_S3# CTRLD POWER RUN_ON
B B
21 PAD& SCREW +5VSUS SLP_S5# CTRLD POWER SUS_ON
22 O2_OZ711E1&CONN
+5VHDD HDD POWER (5V) HDDC_EN#
23-24 MINI-PCI & MDC CONN +5VMOD MODULE POWER (5V) MODC_EN#
25-26 SIO
STRB#/5V EXTERNAL FDD POWER (5V) FDD/LPT#
27-28 SERIAL & PARALLEL
+5VFAN1, +5VFAN2 FAN POWER (5V) FAN_OFF/ON#
29 FLASH
VDDA AUDIO ANALOG POWER (5V) RUN_ON
30-31 TOUCH PAD & SWITCH&LED 1_8VSUS RESUME WELL IN ICH
32 FAN & THERMAL 1_8VRUN SLP_S3# CTRLD POWER
33-34 AC97 CODEC & connector +3VALW 8051 POWER (3V)
35-36 LAN(KENAI32-LAVON) & JACK
C V1_5RUN AGP I/O POWER C
37 FIR
38-39 DOCKING Buffer and connector GND ALL PAGES DIGITAL GROUND
40 Reset circuit
AGND AUDIO GND
41 RTC BATTERY
GNDP CPU POWER GND
42-43 Battery Selector & Charger
CGNDP CHARGER GND
44 CPU Power
45 1.2V,1.5V,1.8VS.2.5VS DGNDP DC/DC POWER GND
46 D/D Power LANGND COMBO CONN GND
47 RUN POWER SW
D D
48 VGA DC/DC
49
QUANTA
DCIN,Batt
COMPUTER
50 Title
CPU I/O Power Index, DNI, Power & Ground
Size Document Number Rev
JM2 1A
Date: Monday, January 06, 2003 Sheet 3 of 49
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R867 schould be close to ICH4
HD#[0..63] VTT
U79A HD#[0..63] 6
HA#[3..31]
6 HA#[3..31]
HA#3 P4 A19 HD#0 THERMTRIP# R867 56
HA#4 A3# D0# HD#1
U4 A25
HA#5
HA#6
V3
A4#
A5#
Banias D1#
D2#
A22 HD#2 IERR# R538 56
R3 B21 HD#3 CPUPWRGD R539 332/F
HA#7 A6# D3# HD#4
V2 A24
HA#8 A7# D4# HD#5 TCK R544 27
A W1 1 OF 3 B26 A
HA#9 A8# D5# HD#6 TRST# R546 680
T4 A21
HA#10 A9# D6# HD#7
W2 B20
HA#11 A10# D7# HD#8
Y4 C20
HA#12 A11# D8# HD#9
Y1 B24
HA#13 A12# D9# HD#10
U1 D24
HA#14 A13# D10# HD#11
AA3 E24
HA#15 A14# D11# HD#12
Y3 C26
HA#16 A15# D12# HD#13
AA2 B23
HA#17 A16# D13# HD#14
AF4 E23
HA#18 A17# D14# HD#15
AC4 C25
HA#19 A18# D15# HD#16
AC7 H23
HA#20 AC3
A19#
A20#
D16#
D17#
G25 HD#17 R546 should be place within 2" of the processor ; others place near ITP
HA#21 AD3 L23 HD#18
HA#22 A21# D18# HD#19
AE4 M26
HA#23 A22# D19# HD#20
AD2 H24
HA#24 A23# D20# HD#21
AB4 F25
HA#25 A24# REQUEST DATA D21# HD#22
AC6 G24
HA#26 A25# D22# HD#23
AD5 PHASE PHASE J23
HA#27 A26# D23# HD#24
AE2 SIGNALS SIGNALS M23
HA#28 A27# D24# HD#25
AD6 J25
HA#29 A28# D25# HD#26 +3VRUN +3VALW
AF3 L26
HA#30 A29# D26# HD#27
AE1 N24
HA#31 A30# D27# HD#28
AF1 M25
A31# D28# HD#29
H26
2
2
D29# HD#30
N25
D30# HD#31 R559 R560
K25
D31# HD#32
6 HADSTB0# U3 Y26
AE5 ADSTB0# D32# AA24 HD#33 VTT 1.5K 330
6 HADSTB1# ADSTB1# D33#
B T25 HD#34 B
D34# HD#35
1
1
U23 PROCHOT# 26
D35# HD#36
6 HREQ#0 R2 V23
3
REQ0# D36# HD#37 R561
6 HREQ#1 P3 R24
T2 REQ1# D37# R26 HD#38 2
6 HREQ#2 REQ2# D38#
P1 R23 HD#39 56
6 HREQ#3 REQ3# D39#
T1 AA23 HD#40 R562 3 Q181
6 HREQ#4 REQ4# D40# HD#41 CPU_PROCHOT# Q182
1
U26 2 1 2
D41# HD#42 RHU002N06
V24 3904 1
N2 ERROR D42# U25 HD#43 330
6 ADS# ADS# D43#
SIGNALS V26 HD#44
D44# HD#45
Y23
D45# HD#46
AA26
IERR# D46# HD#47
A4 Y25
IERR# D47# AB25 HD#48
D48# HD#49
6 HBREQ0# N4 AC23
BREQ0# ARBITRATION D49# HD#50
6 BPRI# J3 AB24
BPRI# D50# HD#51
6 BNR# L1 PHASE AC20
BNR# D51# HD#52
6 HLOCK# J2 SIGNALS AC22
LOCK# D52# AC25 HD#53
D53# HD#54
6 HIT# K3 AD23
HIT# SNOOP PHASE D54# HD#55 VTT VTT
6 HITM# K4 AE22
HITM# D55# HD#56
6 DEFER# L4 SIGNALS AF23
DEFER# D56# HD#57
AD24
BPM0# C8 D57# AF20 HD#58
BPM1# BPM0# RESPONSE D58# HD#59
B8 AE21
BPM2# BPM1# D59# HD#60 R564 R565 R566 R567
A9 PHASE AD21
BPM3# BPM2# D60# HD#61
C9 SIGNALS AF25
BPM3# D61# HD#62 54.9/F 54.9/F 39.2/F 150
6 HTRDY# M3 AF22
H1 TRDY# D62# AF26 HD#63 JITP1 VTT +3VSUS
C 6 RS#0 RS0# D63# C
6 RS#1 K1
RS1#
6 RS#2 L2
RS2# TDI 1 27
A20M# TMS TDI VTT0
9 A20M# C2 C23 HDSTBN0# 6 2 28
FERR# D3 A20M# PC DSTBN0# C22 TCK 5 TMS VTT1 26 C1499 R571
9 FERR# FERR# DSTBP0# HDSTBP0# 6 TCK VTAP
IGNNE# A3 COMPATIBILITY K24 TDO R885 22.6/F 7
9 IGNNE# IGNNE# DSTBN1# HDSTBN1# 6 TDO
CPUPWRGD E4 SIGNALS L24 TRST# 3 .1U 150
10 CPUPWRGD PWRGOOD DSTBP1# HDSTBP1# 6 TRST#
SMI# B4 W25
9 SMI# SMI# DSTBN2# HDSTBN2# 6
W24 HDSTBP2# 6
TCK A13 DSTBP2# AE24 CPURST# R573 22.6/F 12 25 DBR#
TCK DSTBN3# HDSTBN3# 6 RESET# DBR#
TDO A12 DIAGNOSTIC AE25 24
TDO DSTBP3# HDSTBP3# 6 DBA#
TDI C12 & TEST
TMS TDI TCK
C11 SIGNALS 11
TRST# TMS FBO
B13 D25 HDBI0# 6
A16 TRST# DBI0# J26
T195 PAD ITP_CLK0 DBI1# HDBI1# 6
T196 PAD A15 T24 8 23 BPM0#
ITP_CLK1 DBI2# HDBI2# 6 14 HCLK_ITP# BCLKN BPM0#
PREQ# B10 AD20 9 21 BPM1#
PREQ# DBI3# HDBI3# 6 14 HCLK_ITP BCLKP BPM1#
PRDY# A10 19 BPM2#
DBR# PRDY# BPM2# BPM3#
40 DBR# A7 M2 DBSY# 6 10 17
DBR# DBSY# H2 14 GND0 BPM3# 15 PRDY#
DRDY# DRDY# 6 GND1 BPM4#
D1 16 13 PREQ#
9 INTR LINT0 GND2 BPM5#
D4 EXECUTION 18
9 NMI LINT1 GND3
STPCLK# C6 CONTROL B14 20 4
9 STPCLK# STPCLK# BCLK1 HCLK_CPU# 14 GND4 NC0
CPU_SLP# A6 SIGNALS B15 22 6
9 CPUSLP# SLP# BCLK0 HCLK_CPU 14 GND5 NC1
DPSLP# B7
7,9 DPSLP# DPSLP#
THERMDA B18 B5 CPUINIT# ITP700_NC
32 THERMDA THERMDA INIT# CPUINIT# 9
D THERMDC A18 D
32 THERMDC THERMDC B11 CPURST#
RESET# CPURST# 6
THERMTRIP# C17
10 THERMTRIP# THERMTRIP# THERMAL DIODE C19
CPU_PROCHOT# B17
PROCHOT#
DPWR# DPWR# 7
QUANTA
Banias Processor
COMPUTER
Title
Banias Processor (HOST)
Size Document Number Rev
JM2 1A
Date: Monday, January 06, 2003 Sheet 4 of 49
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VTT
VTT U79C
U79B
W23
VSS
D10 W26
COMP0 COMP0 VCCP0 VSS
P25 A2 D12 Y2
COMP1 COMP1 COMP0 VSS VCCP1 VSS
P26 A5 D14 Y5
COMP2 R574 COMP2 COMP1 VSS VCCP2 VSS
AB2 A8 D16 Y21
COMP3 COMP3 COMP2 VSS VCCP3 VSS
AB1 A11 E11 Y24
1K/F COMP3
Banias
VSS
VSS
A14 E13
VCCP4
VCCP5
Banias VSS
VSS
AA1
A A17 E15 AA4 A