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5 4 3 2 1




8SQ800 Schematics Revision 1.0

SHEET TITLE SHEET TITLE
D D


1 COVER SHEET 34 DDR POWER

2 BOM & PCB MODIFY HISTORY 35 ATX CONN, GPIO LIST

3 BLOCK DIAGRAM 36 RTL8101L

4,5,6 INTEL CPU_WMT_478 37, 38 IT8212 IDE RAID

7-11 SIS655 (NORTH BRIDGE) HOST; DDR; AGP,HYPER ZIP 39 ASIC1 & AT123(PCI ARBITOR)

12-15 SIS963 (SOUTH BIRDGE) 40 SiI3112 Serial ATA

16 CLOCK GENERATOR (CY28381)
C C


17 DDR CLOCK BUFFER

18,19 DDR SDRAM DIMMS 1,2,3,4

20 DDR TERMINATION

21 AGP 8X SLOT

22,23 PCI SLOT 1,2,3,4,5

24 IDE,FRONT USB,PCIRST#

25 LPCIO_IT8705
B B

26 DUAL BIOS

27 COM, LPT, FDD, KB/MS, IR

28 AC 97 ALC650

29 AUDIO JACK,GAME PORT

30 FAN, SMB PORT

31 PANEL,STR LED,FANS ,CI PCB Size: 305*244 mm

COMPONENT SIDE
(1 oz. Copper)
32 VCORE 3-PHASE PWM HIP 6302 + 6602+6601 VCC LAYER
(1 oz. Copper)
GND LAYER
A (1 oz. Copper) A
33 VDDQ,VCC18,VCCVID DC POWER SOLDER SIDE
(1 oz. Copper)



GIGABYTE
Title
COVER SHEET
Size Document Number Rev
Custom 1.0
GA-8SQ800
Date: Thursday, December 26, 2002 Sheet 1 of 40
5 4 3 2 1
5 4 3 2 1




Model Name: 8SQ800 Circuit or PCB layout change
for next version
Version:1.0 Date Change Item Reason
D D



AUTOBOM
Component value change history 91/10/09
Date Change Item Reason
Remove Dual BIOS, RAID, LAN
91.11.28 1.0A ,S-ATA, SPDIF_IN

91.12.06 1.0B Add VCC3 1000uF*2 RADEON9700Burn-in fail issue

91.12.18 1.0C Remove RN121 Fixed Logitech thunder pad can not calibration issue

Add "9A" BOM Bundle GC-S1394 daughter card

91.12.19 1.0D Add force AGP4X circuit For PM request

Disable Hyper Threading For PM request

C
Improve DDR over-clock margin For DDR Compatibility C


Add "9A" BOM Bundle GC-S1394 daughter card

91.12.25 1.0DA Manual For A0 chipset support HT Limitation list

Add "9A" BOM Bundle GC-S1394 daughter card

91.12.25 1.0C1 Enable Hyper Threading For A0 chipset support HT

Modify CPU RM For A0 chipset support HT

Add "9A" BOM Bundle GC-S1394 daughter card




B B




A A




GIGABYTE
Title
BOM & PCB MODIFY HISTORY
Size Document Number Rev
Custom 1.0
GA-8SQ800
Date: Thursday, December 26, 2002 Sheet 2 of 40
5 4 3 2 1
5 4 3 2 1




8SQ800 BLOCK DIAGRAM

INTEL Pentium4 (478)

D D

CLOCK GENERATOR
VID0~4
PWM/OTHER POWER
VCORE = 1.75V (>1GHZ) / SLEEP : 1.3V
VCC25 = 2.5V(I/O,MEMORY/I,ZLINK/I) VCCA = 2.5V ; 2_5V = 2.5V PAGE 4, 5, 6 VCORE = 1.75V (650-1100MHZ) / SLEEP : 1.3V
VCC3 = 3.3V PAGE 16 5VSB,-12V,+12V,VCC,VCC3,3VDUAL
DDRVTT,DDR25V,3VSTR,VCC25 PAGE 32~34




MAA0~14
MDD0~63
-DQSD0~8
DDR SDRAM DIMM X 2
GAD0~31 SIS655 NORTH BRIDGE DDR25V = 2.5V(SUSPEND POWER)
DDRVTT = 1.25V
AD_STB0,-AD_STB0 PAGE 18
AD_STB1,-AD_STB1
SBA0~7 MAAB~14
AGP SLOT 4X/8X SB_STB,-SB_STB MDDB0~63

VDDQ = 1.5V (AGP POWER 8X/4X) -GBE0~3
-DQSDB0~8 DDR SDRAM DIMM X 2
VCC3 = 3.3V VCORE = 1.75V (650-1100MHZ) / SLEEP : 1.3V
+12V = 12V ST0~2 AGP BUS DDR25V = 2.5V(SUSPEND POWER) DDR25V = 2.5V(SUSPEND POWER)
3VDUAL = 3.3V VDDQ = 1.5V (AGP POWER 4X) DDRVTT = 1.25V
VCC = 5V PAGE 21 VCC25 = 2.5V(I/O,MEMORY/I) PAGE 19
VCC18 = 1.8V(ZLINK/I) PAGE 7 ,8 ,9 ,10,11
C C

AGPUSB+ / -


ZAD0~16
CONTROL BUS Z LINK
USB CONN
SIS963 SOUTH BRIDGE PCI LAN
PAGE 24,36



USB PORTS 0~5 IDE Primary and Secondary
VCC25 = 2.5V(I/O,MEMORY/I)
VCC = 5V 3VDUAL = 3.3V(SUSPEND POWER)
5VSB = 5V VCC3 = 3.3V
5VUSB = 5V PAGE 14 RTCVDD = 3.3V VCC = 5V PAGE 24
VCC18 = 1.8V(ZLINK/I)
PAGE 12,13,14,15


PCI BUS
B B




PCI SLOT 1,2,3,4,5 DUAL BIOS SST39SF040
+12 = 12V
-12 = -12V
VCC = 5V
VCC3 = 3V VCC = 5V
3VDUAL = 3V PAGE 22,23 VCC3 = 3V PAGE 26



RTL8101L 10/100 LAN LPC BUS
3VDUAL = 3.3V
PAGE 36
AC97 CODEC ALC650 LPC I/O IT8705
+12V = 12V
VCC3 = 3.3V
VCC = 5V
SiI3112 Serial ATA VCC = 5V
5VSB = 5V
AVDD = 5V PAGE 28 AC97 LINK VBAT = 3V PAGE 25
PAGE 40




A
AUDIO PORTS : FRONT AUDIO FRONT PANEL /FANS I/O PORTS : A




LIN_ OUT LINE_IN MIC
TELE CD_IN AUX_IN GAME PORT VCC = 5V
5VSB = 5V
COMA COMB LPT PS2 IR FDD
+12 = 12V
PAGE 29 PVCC = 5V PAGE 31 PAGE 27

GIAGBYTE
Title
BLOCK DIAGRAM
Size Document Number Rev
Custom 1.0
GA-8SQ800
Date: Thursday, December 26, 2002 Sheet 3 of 40
5 4 3 2 1
8 7 6 5 4 3 2 1




VCORE VCORE VCORE VCORE For Hyper Threading CPU disable circuit.
10U/12/X/6.3V/X 10U/12/X/6.3V 100U/SP-CAP/2V 100U/SP-CAP/2V 10U/12/X/6.3V/X 10U/12/X/6.3V/X 10U/12/X/6.3V/X 4.7U/8/Y/10V/X Close to CPU,
R1
Length 500mil.
BC1 BC2 BC3 BC4 BC5 BC6 BC7 BC8 BC9 BC10 BC11 BC12 BC13 BC14 BC15 BC16 BC17 BC18 BC19 VCC3
HA31 7




3
1K/6




3
10U/12/X/6.3V/X 10U/12/X/6.3V/X 10U/12/X/6.3V 10U/12/X/6.3V/X 100U/SP-CAP/2V/X 100U/SP-CAP/2V/X 10U/12/X/6.3V/X 10U/12/X/6.3V/X 10U/12/X/6.3V/X 10U/12/X/6.3V/X 4.7U/8/Y/10V/X Q1 Q2
MMBT2222A/SOT23 D 2N7002/SOT23
D D
SOT23
R2 G S




2

1
Socket3SP-CAP
-CPURST
61206LAYOUT




2

1
8.2K/6
VCORE Socket1SP-CAP
21206LAYOUT

BC20



4.7U/8/Y/10V/X


2SP-CAP 100uF,
210U/X5R

VCORE




C C




AD11


AD19




AC18
AC16
AC14
AC12
AC10

AD17
AD15
AD13
AE18
AE16
AE14
AE12
AE10


AE20
AB15
AB13
AB11


AB19
AD9
AD7




AC8
AE8
AE6




AB9
AB7




E14
E12
E10

E20
E8
SOCKET_478A




VCORE1
VCORE2
VCORE3
VCORE4
VCORE5
VCORE6
VCORE7
VCORE8
VCORE9
VCORE10
VCORE11
VCORE12
VCORE13
VCORE14
VCORE15
VCORE16
VCORE17
VCORE18
VCORE19
VCORE20
VCORE21
VCORE22
VCORE23
VCORE24
VCORE25
VCORE26
VCORE27
VCORE28
VCORE29
VCORE30
VCORE31
VCORE32
HA[3..16]
7 HA[3..16]
HA16 N5
HA15 A16
N4 A15
HA14 N2 G1 -ADS
A14 ADS -ADS 7
HA13 M1 AC1
HA12 A13 AP0 R3
N1 A12 AP1 V5
HA11 M4 AA3 Z7 39/6/X
A11 BINIT VCORE
HA10 M3 G2 -BNR
A10 BNR -BNR 7
HA9 L2
HA8 A9
M6 A8 DP3 L25
HA7 L3 K26
HA6 A7 DP2
K1 A6 DP1 K25
HA5 L6 J26
HA4 A5 DP0
K4 A4
HA3 K2 U6
-HA_STB0 A3 TESTHI8
7 -HA_STB0 L5 ADSTB0 TESTHI9 W4
-HREQ4 H3 Y3
7 -HREQ4 REQ4 TESTHI10 TESTHI8_10 5
-HREQ3 J3 H6 -BREQ0
7 -HREQ3 REQ3 BR0 -BREQ0 5,7
-HREQ2 J4
7 -HREQ2 REQ2
-HREQ1 K5 D2 -BPRI
7 -HREQ1 REQ1 BPRI -BPRI 7
-HREQ0 J1
7 -HREQ0 REQ0
H5 -DBSY
DBSY -DBSY 7
AB1 E2 -DEFER
A35 DEFER -DEFER 7 VCORE
HA[17..31] Y1 H2 -DRDY
B 7 HA[17..31] A34 DRDY -DRDY 7 B
W2 F3 -HIT
A33 HIT -HIT 7
V3 E3 -HITM
A32 HITM -HITM 7
HA31 U4 R4
HA30 A31 1K/6
T5 A30 IERR AC3 -IERR 5
HA29 W1
HA28 A29 -CPUINIT
R6 A28 INIT W5 -CPUINIT 13
HA27 V2
HA26 A27 -HLOCK C1
T4 A26 LOCK G4 -HLOCK 7
HA25 U3 100P/4/N/50V/X
HA24 A25
P6 A24 MCERR V6
HA23 U1
HA22 A23 -CPURST
T2 A22 RESET# AB25 -CPURST 5,7
HA21 R3 F4 -RS2
A21 RS2 -RS2 7
HA20 P4 G5 -RS1
A20 RS1 -RS1 7
HA19 P3 F1 -RS0 C2
A19 RS0 -RS0 7
HA18 R2 AB2 100P/4/N/50V/X
HA17 A18 RSP -HTRDY
T1 A17 TRDY J6 -HTRDY 7
-HA_STB1 R5
7 -HA_STB1 ADSTB1
AD1 GND10
AD23GND11
AD21GND12
AE17GND13
AE15GND14
AE13GND15
AE11GND16
AE9 GND17
AE26GND18
AB20GND19
AC17GND20
AC15GND21
AC13GND22
AC11GND23
AC9 GND24
AC7 GND25
AC5 GND26
AC2 GND27
AC25GND28
AC22GND29
AC19GND30
AD18GND31
AD16GND32
AA4 GND33
AA1 GND34
AA23GND35
AA19GND36
AB18GND37
AB16GND38
AB14GND39
AB12GND40
AB10GND41
AB8 GND42
AB6 GND43
AB3 GND44
AB24GND45
AB21GND46
V4 GND47
V1 GND48
V23 GND49
W6 GND50
W3 GND51
W24 GND52
W21 GND53
Y5 GND54
Y2 GND55
Y25 GND56
Y22 GND57
AA17GND58
AA15GND59
AA13GND60
AE7 GND1
AE24GND2
AE22GND3
AE19GND4
AD14GND5
AD12GND6
AD10GND7
AD8 GND8
AD4 GND9




SK478/GD/W



A A




GIAGBYTE
Title
WILLAMETTE 1/3
Size Document Number Rev
B 1.0
GA-8SQ800
Date: Thursday, December 26, 2002 Sheet 4 of 40
8 7 6 5 4 3 2 1
8 7 6 5 4