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with Dual UARTs Parallel Port and IDE Interface
PC87311A PC87312 (SuperI O II III) Floppy Disk Controller
October 1993




PC87311A PC87312 (SuperI O TM II III)
Floppy Disk Controller with Dual UARTs
Parallel Port and IDE Interface
General Description Features
The PC87311A 12 incorporates a floppy disk controller Y 100% compatible with IBM PC XT and AT architec-
(FDC) two full function UARTs a bidirectional parallel port tures (PC87311A) or ISA EISA and Micro Channel ar-
and IDE interface control logic in one chip The PC87311A chitectures (PC87312)
includes standard AT XT address decoding for on-chip Y FDC
functions and a Configuration Register offering a single Software compatible with the DP8473 the 765A and
chip solution to the most commonly used IBM PC the N82077
PC-XT and PC-AT peripherals The PC87312 includes 16-byte FIFO (default disabled)
standard AT address decoding for on-chip functions and a Burst and Non-Burst modes
Configuration Register set offering a single chip solution to Perpendicular Recording drive support
the most commonly used ISA EISA and Micro Channel pe- High performance internal analog data separator (no
ripherals external filter components required)
The on-chip FDC is software compatible to the PC8477 Low power CMOS with power down mode
which contains a superset of the DP8473 and NEC mPD765 Y UARTs
and the N82077 floppy disk controller functions The on- Software compatible with the INS8250N-B and the
chip analog data separator requires no external compo- NS16450 (PC87311A) or PC16550A and PC16450
nents and supports the 4 Mb drive format as well as the (PC87312)
other standard floppy drives used with 5 25 and 3 5 me- Y Parallel Port
dia Bidirectional under either software or hardware
In the PC87311A the UARTs are equivalent to two control
INS8250N-Bs or NS16450s The bidirectional parallel port Compatible with all IBM PC XT and AT architectures
maintains complete compatibility with the IBM PC XT and (PC87311A) or all ISA EISA and Micro Channel ar-
AT In the PC87312 the UARTs are equivalent to two chitectures (PC87312)
NS16450s or PC16550s The bidirectional parallel port Back Voltage protection circuit against damage
maintains complete compatibility with the ISA EISA and Mi- caused when printer is powered up
cro Channel parallel ports Y IDE Control Logic
The IDE control logic provides a complete IDE interface ex- Provides a complete IDE interface except for option-
cept for the signal buffers The Configuration Registers con- al buffers
sist of three byte-wide registers An Index and a Data Regis- Y Address Decoder
ter which can be relocated within the ISA I O address space Provides selection of all primary and secondary ISA
access the Configuration Registers addresses including COM 1