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A B C D E




A8E/A8S Merom/GM965/PM965 BLOCK DIAGRAM
BATTERY
1
Sub block Diagram / TYPE
1



BOM option 3S2P
64
CLOCK GEN
ICS9LPR363AGLF-T
29
CPU
CPU
MEROM 3,4 .... CAP 5
POWER
SEQENCE
LFB LFB LFB LFB 2
DVI Dual HOST BUS




/
2 2
CH. 47
Nvidia




/x
PCI-E
CRT & TV
VGA NB8x series VGA x16
DDR2 SDRAM 533/667MHz
DDR2 533/667
DDR
DCIN
CON 46
CON ATI CON CRESTLINE SODIMM X2
.... CAP/RES
RTC
M7x series




su
GM965/PM965 +1.8V 9 FAN CON.
+0.9VS
7,8
LVDS & INV VGA BAORD 70 11~15
CON




p.
45
THERMAL
X4 DMI CONTROL50




om
VCORE USB2.0
USB x4 PCI EXPRESS X1
3 52 SATA 3
SYSTEM
PCI_BUS 3.3V, 33MHz




yc
ICH8M
1.5VS & 1.05VS PATA
B/T ACZ
61
SATA ODD 20~24




m
HDD Master CARDBUS LAN 1G MINI CARD NEW
DDR & VTT x2 CARD
Camera 51 51 4 IN 1 RICOH RTL8111B
FingerPrint R5C833 53 43
CARD 33
68
//
+3VAO & +2.5VS READER
LPC, 33MHz 42
p:

RJ11,RJ45
CHARGER Azalia
LAN IO CON
4 ALC660 34 4
tt


PIC
TPM 62
KBC Module
h



OP MDC SW & LED
DETECT IT8511E TPA0212 CON 56
34
NEW CARD
PROTECT
KB (DEBUG)
67 60
ISA
ROM AC & BAT CON
USB x1 FAN CTRL
LOAD SWITCH PHONE
55
T/P SIO 50
5 FLOWCHART 30,31 LPC47N217
5
1394
MIC_IN
SLOT Title : BLOCKDIAGRAM
40 ASUSTeK COMPUTER INC Engineer:
SIGNAL
FIR Size Project Name Rev
Custom A8ES 2.0
Date: , 29, 2007 Sheet 1 of 94

A B C D E
5 4 3 2 1




Reset
IC

PWRSW#_EC 6 Power On
2 SWITCH
D D


+5VA
AC_BAT_SYS 1 7 PM_PWRBTN#
+3VA_EC SLP_S4#
+3VA EC
To EC
+3VA_EC 5 PM_RSMRST# ICH8
IT8511E SLP_S3#
3 VSUS_ON SLP_S3# + VRMPWRGD
VRMPWRGD
EC_CLK_EN
PWROK + VRMPWRGD
CL_PWROK
13 PWROK
+3VSUS 4




/
SUS_PWRGD
+5VSUS




/x
+12VSUS




su
C
8 16 16 C




SUSC_ON




p.
+1.8V
+3V




om
+5V
+12V 17
H_CPURST#
965PM Merom




yc
10 15
CL_PWROK
PM_PWROK



m
PWROK
12
+0.9VS
B
// B
+1.5VS 14
+1.25VS
CLK_PWRGD
p:

+2.5VS CLK
9 +3VS Gen.
+5VS
tt


SUSB_ON CLK_PWRGD asserted when both
+12VS PM_SUSB# and VRM_PWRGD are
high.
h




Delay
99ms
11 CPU_VRON Power On Sequence
+VCORE Check
A
sequence 14&15 1 17 A




Title : PowerOn sequence
ASUSTeK COMPUTER INC Engineer:
Size Project Name Rev
Custom A8ES 1.0
Date: , 11, 2006 Sheet 2 of 94
5 4 3 2 1
5 4 3 2 1




10 H_D#[63:0] H_D#[63:0]


H_A#[35:3]
10 H_A#[35:3]
D T0301 D

H_REQ#[4:0] T0302
TPC26T
10 H_REQ#[4:0]
TPC26T




CPU1A CPU1B
H_A#3 J4 H1 H_D#0 E22 Y22 H_D#32
A[3]# ADS# H_ADS# D[0]# D[32]#
H_A#4 L5 E2 H_D#1 F24 AB24 H_D#33
A[4]# BNR# H_BNR# D[1]# D[33]#
H_A#5 L4 G5 H_D#2 E26 V24 H_D#34
A[5]# BPRI# H_BPRI# D[2]# D[34]#
H_A#6 K5 H_D#3 G22 V26 H_D#35
H_A#7 A[6]# H_D#4 D[3]# D[35]# H_D#36
M3 A[7]# DEFER# H5 H_DEFER# F23 D[4]# D[36]# V23
H_A#8 N2 F21 H_D#5 G25 T22 H_D#37
A[8]# DRDY# H_DRDY# D[5]# D[37]#
H_A#9 J1 E1 H_D#6 E25 U25 H_D#38
A[9]# DBSY# H_DBSY# D[6]# D[38]#
H_A#10 N3 H_D#7 E23 U23 H_D#39
H_A#11 A[10]# H_D#8 D[7]# D[39]# H_D#40
P5 A[11]# BR0# F1 H_BR0# K24 D[8]# D[40]# Y25
H_A#12 P2 +VCCP_CPU H_D#9 G24 W22 H_D#41
H_A#13 A[12]# D[9]# D[41]#
L2 D20 H_IERR# R0301 56Ohm H_D#10 J24 Y23 H_D#42




/
H_A#14 A[13]# IERR# H_D#11 D[10]# D[42]# H_D#43
P4 A[14]# INIT# B3 H_INIT# 20 J23 D[11]# D[43]# W24
H_A#15 P1 H_D#12 H22 W25 H_D#44
H_A#16 A[15]# H_D#13 D[12]# D[44]# H_D#45
R1 A[16]# LOCK# H4 H_LOCK# F26 D[13]# D[45]# AA23




/x
M1 H_D#14 K22 AA24 H_D#46
H_ADSTB#0 ADSTB[0]# D[14]# D[46]#
C1 H_D#15 H23 AB25 H_D#47
RESET# H_CPURST# D[15]# D[47]#
H_REQ#0 K3 F3 H_RS#0 J26 Y26
REQ[0]# RS[0]# H_RS#0 10 H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 10
H_REQ#1 H2 F4 H_RS#1 H26 AA26
REQ[1]# RS[1]# H_RS#1 10 10 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 10
H_REQ#2 K2 G3 H_RS#2 H25 U22
REQ[2]# RS[2]# H_RS#2 10 10 H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 10
H_REQ#3 J3 G2
REQ[3]# TRDY# H_TRDY#




su
C H_REQ#4 L1 C
REQ[4]# H_D#16 H_D#48
HIT# G6 H_HIT# 10 N22 D[16]# D[48]# AE24
H_A#17 Y2 E4 H_D#17 K25 AD24 H_D#49
A[17]# HITM# H_HITM# D[17]# D[49]#
H_A#18 U5 H_D#18 P26 AA21 H_D#50
H_A#19 A[18]# T0303 H_D#19 D[18]# D[50]# H_D#51
R3 A[19]# BPM[0]# AD4 1 R23 D[19]# D[51]# AB22
H_A#20 W6 AD3 XDP_BPM#1 TPC26T H_D#20 L23 AB21 H_D#52




p.
H_A#21 A[20]# BPM[1]# T0304 H_D#21 D[20]# D[52]# H_D#53
U4 A[21]# BPM[2]# AD1 1 M24 D[21]# D[53]# AC26
H_A#22 Y5 AC4 1 T0305
TPC26T H_D#22 L22 AD20 H_D#54
H_A#23 A[22]# BPM[3]# T0306 H_D#23 D[22]# D[54]# H_D#55
U1 A[23]# PRDY# AC2 1 TPC26T M23 D[23]# D[55]# AE22
H_A#24 R4 AC1 H_PREQ# TPC26T H_D#24 P25 AF23 H_D#56
H_A#25 A[24]# PREQ# H_TCK H_D#25 D[24]# D[56]# H_D#57
T5 AC5 P23 AC25




om
H_A#26 A[25]# TCK H_TDI H_D#26 D[25]# D[57]# H_D#58
T3 A[26]# TDI AA6 P22 D[26]# D[58]# AE21
H_A#27 W2 AB3 H_TDO +VCCP_CPU H_D#27 T24 AD21 H_D#59
H_A#28 A[27]# TDO H_TMS H_D#28 D[27]# D[59]# H_D#60
W5 A[28]# TMS AB5 R24 D[28]# D[60]# AC22
H_A#29 Y4 AB6 H_TRST# H_D#29 L25 AD23 H_D#61
H_A#30 A[29]# TRST# H_DBR# H_D#30 D[29]# D[61]# H_D#62 Comp0,2 connect with Zo=27.4 ohm,
U2 A[30]# DBR# C20 T25 D[30]# D[62]# AF22
H_A#31 V4 R0302 H_D#31 N25 AC23 H_D#63 make trace length shorter than 0.5".
H_A#32 A[31]# 1KOhm D[31]# D[63]#
W3 A[32]# 10 H_DSTBN#1 L26 DSTBN[1]# DSTBN[3]# AE25 H_DSTBN#3 10 Comp 1,3 connect with Z0=55 ohm,




yc
H_A#33 AA4 THERMAL 1% M26 AF24
A[33]# H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 make trace length shorter than 0.5".
H_A#34 AB2 N24 AC20
A[34]# 10 H_DINV#1 DINV[1]# DINV[3]# H_DINV#3
H_A#35 AA3 D21 H_PROCHOT_S#
A[35]# PROCHOT# GTL_REF H_COMP0 R0303 27.4Ohm
H_ADSTB#1 V1 ADSTB[1]# THRMDA A24 CPU_THERM_DA 50 AD26 GTLREF COMP[0] R26 1 2
T0307 1 B25 R0304 2 @ 1% 1 1KOhm C23 MISC U26 H_COMP1 R0307 1 2 54.9Ohm
THRMDC CPU_THERM_DC 50 TEST1 COMP[1]
TPC26T A6 R0306 2 @ 1% 1 1KOhm D25 AA1 H_COMP2 R0308 1 2 27.4Ohm
20 H_A20M#




m
A20M# R0305 T0308 TEST2 COMP[2] H_COMP3 R0309 54.9Ohm
20 H_FERR# A5 FERR# THERMTRIP# C7 PM_THRMTRIP# 11,20 1 C24 TEST3 COMP[3] Y1 1 2
C4 C0301 2KOhm T0309
TPC26T 1 AF26
20 H_IGNNE# IGNNE# TEST4
T0310 1 0.1UF/10V 1% T0311
TPC26T 1 AF1 E5
TEST5 DPRSTP# H_DPRSTP# 11,20,80
TPC26T D5 T0312
TPC26T 1 A26 B5
20 H_STPCLK# STPCLK# TEST6 DPSLP# H_DPSLP# 20
C6 H CLK TPC26T D24
B
20
20
H_INTR
H_NMI B4
LINT0
LINT1 BCLK[0] A22 CLK_CPU_BCLK
// CPU_BSEL0 B22 BSEL[0]
DPWR#
PWRGOOD D6
H_DPWR#
H_PWRGD 20 B
20 H_SMI# A3 SMI# BCLK[1] A21 CLK_CPU_BCLK# CPU_BSEL1 B23 BSEL[1] SLP# D7 H_CPUSLP# 10
CPU_BSEL2 C21 BSEL[2] PSI# AE6 PM_PSI#
T0313 1 M4 1
T0314 RSVD1 Zo=55 ohm, 0.5" max SOCKET478B T0315
TPC26T 1 N5 RSVD2 1
T0316
TPC26T 1 T2 for GTLREF 1 T0317
TPC26T
p:

T0318 RSVD3 T0319
TPC26T 1 V3 RSVD4 TPC26T
T0320
TPC26T 1 B2 TPC26T
T0321 RSVD5
TPC26T 1 C3 RSVD6
T0322
TPC26T 1 D2
T0323 RSVD7
TPC26T 1 D22
tt


T0324 RSVD8
TPC26T 1 D3 RSVD9
T0325
TPC26T 1 F6 RSVD10
TPC26T Default Strapping When Not Used +VCCP_CPU
h



SOCKET478B +VCCP_CPU

XDP_BPM#1 R0311 1 @ 2 54.9Ohm 1% R0312
H_PREQ# R0310 1 2 54.9Ohm 1%
H_TDI R0313 150Ohm 1% 68Ohm
1 2
H_TDO R0315 1 @ 2 54.9Ohm 1%
H_TMS R0314 1 2 39Ohm 5%
H_PROCHOT_S#
H_DBR# R0316 1 @ 2 1KOhm1% +3VS 3
D Q0301
H_TCK R0318 1 2 27.4Ohm 1%
H_TRST# R0317 1 2649Ohm
1
THRO_CPU 30
G
S 2
A GND 2N7002 A




Title : MEROM CPU (1)
ASUSTeK COMPUTER INC Engineer:
Size Project Name Rev
Custom A8ES 1.0
Date: , 06, 2007 Sheet 3 of 94

5 4 3 2 1
5 4 3 2 1




CPU1D
D
A4 VSS1 VSS82 P6 D
A8 VSS2 VSS83 P21
+VCORE +VCORE A11 P24
VSS3 VSS84
A14 VSS4 VSS85 R2
A16 VSS5 VSS86 R5
CPU1C A19 R22
VSS6 VSS87
A7 VCC1 VCC68 AB20 A23 VSS7 VSS88 R25
A9 VCC2 VCC69 AB7 AF2 VSS8 VSS89 T1
A10 VCC3 VCC70 AC7 B6 VSS9 VSS90 T4
A12 VCC4 VCC71 AC9 B8 VSS10 VSS91 T23
A13 VCC5 VCC72 AC12 B11 VSS11 VSS92 T26
A15 VCC6 VCC73 AC13 B13 VSS12 VSS93 U3
A17 VCC7 VCC74 AC15 B16 VSS13 VSS94 U6
A18 VCC8 VCC75 AC17 B19 VSS14 VSS95 U21
A20 VCC9 VCC76 AC18 B21 VSS15 VSS96 U24
B7 VCC10 VCC77 AD7 B24 VSS16 VSS97 V2
B9 VCC11 VCC78 AD9 C5 VSS17 VSS98 V5
B10 VCC12 VCC79 AD10 C8 VSS18 VSS99 V22
B12 VCC13 VCC80 AD12 C11 VSS19 VSS100 V25
B14 VCC14 VCC81 AD14 C14 VSS20 VSS101 W1
B15 AD15 C16 W4




/
VCC15 VCC82 VSS21 VSS102
B17 VCC16 VCC83 AD17 C19 VSS22 VSS103 W23
B18 VCC17 VCC84 AD18 C2 VSS23 VSS104 W26
B20 VCC18 VCC85 AE9 C22 VSS24 VSS105 Y3




/x
C9 VCC19 VCC86 AE10 C25 VSS25 VSS106 Y6
C10 VCC20 VCC87 AE12 D1 VSS26 VSS107 Y21
C12 VCC21 VCC88 AE13 D4 VSS27 VSS108 Y24
C13 VCC22 VCC89 AE15 D8 VSS28 VSS109 AA2
C15 VCC23 VCC90 AE17 D11 VSS29 VSS110 AA5
C17 VCC24 VCC91 AE18 D13 VSS30 VSS111 AA8




su
C C18 VCC25 VCC92 AE20 D16 VSS31 VSS112 AA11 C
D9 VCC26 VCC93 AF9 D19 VSS32 VSS113 AA14
D10 VCC27 VCC94 AF10 D23 VSS33 VSS114 AA16
D12 VCC28 VCC95 AF12 D26 VSS34 VSS115 AA19
D14 VCC29 VCC96 AF14 E3 VSS35 VSS116 AA22
D15 AF15 E6 AA25




p.
VCC30 VCC97 VSS36 VSS117
D17 VCC31 VCC98 AF17 E8 VSS37 VSS118 AB1
D18 VCC32 VCC99 AF18 E11 VSS38 VSS119 AB4
E7 VCC33 VCC100 AF20 E14 VSS39 VSS120 AB8
E9 VCC34 E16 VSS40 VSS121 AB11
E10 G21 E19 AB13




om
VCC35 VCCP1 +VCCP_CPU VSS41 VSS122
E12 VCC36 VCCP2 V6 E21 VSS42 VSS123 AB16
E13 VCC37 VCCP3 J6 E24 VSS43 VSS124 AB19
E15 VCC38 VCCP4 K6 F5 VSS44 VSS125 AB23
E17 VCC39 VCCP5 M6 F8 VSS45 VSS126 AB26
E18 VCC40 VCCP6 J21 F11 VSS46 VSS127 AC3
E20 VCC41 VCCP7 K21 F13 VSS47 VSS128 AC6
F7 M21 +1.5VS F16