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CR-1

8 7 6 5 4 3 2 1
CK ENG
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. APPD APPD
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. REV ZONE ECN DESCRIPTION OF CHANGE
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. DATE DATE

D PRODUCTION RELEASED
263646 ?
02/26/03
PAGE TABLE OF CONTENTS
1 COVER PAGE
D 2,3 BLOCK DIAGRAM, SYSTEM, POWER & PCB INFO D
4,5 MPC7450 MAXBUS
6,7 CPU SPEED & CONFIG OPTIONS
8
9
BOOTBANGER
CPU LA CONNECTORS, ESP, CPU BYPASS
Q26C MLB
10 CLOCKS GEN X
11
12,13
INTREPID MAX IF (SECTION 1)
INTREPID POWER & BYPASS (SECTION 8 & 9)
REV A (DVT)
14 INTREPID DDR CONTROL LAST_MODIFIED=Thu Jun 19 19:15:19 2003
15 DDR MUXES
16,17 SO-DIMM, BIG DIMM POWER RAIL DEFINITIONS
C 18 INTREPID AGP (SECTION 3) RUN SLEEP SHUTDOWN C
19 NVIDIA AGP (SECTION 1) +2_5V_MAIN ON ON OFF
20 NVIDIA FRAME BUFFER (SECTIONS 3 & 4) +3V_MAIN ON ON OFF
21 NVIDIA FB SERIES TERMS, CLK DELAYS
22,23 GRAPHICS MEMORIES +5V_MAIN ON ON OFF
24,25 NVIDIA DAC/DVI, CLOCKS & STRAPS (SECTIONS 2 & 5) +5V_SLEEP ON OFF OFF
26,27 TMDS & EXTERNAL VGA CONNECTORS +12V_MAIN ON ON ON
28,29 NVIDIA POWER-ON RESET CONFIGURATION STRAPS +12V_SLEEP ON OFF OFF
30 INTREPID GPIOS, INTERRUPTS & SERIAL PORTS (SECTION 6) FW_PWR ON ON OFF
31 MODEM, BLUETOOTH, KITCHEN SINK & SERIAL DOWNLOAD +1.8V_SLEEP ON OFF OFF
+MAXBUS_SLEEP ON OFF OFF
32 INTREPID PCI, ROM (SECTION 7)
33 WIRELESS PCI
B 34 USB2 CONTROLLER SCHEMATIC AND PCB SUPPORT B
35 USB POWER & CONNECTORS PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION
051-6496 1 SCHEM,MLB,Q26C,GENX SCH1 CRITICAL


36 INTREPID ETHERNET & FIREWIRE (SECTION 4) 820-1501 1 PCB,MLB,IMACG4 PCB1 CRITICAL


37 ETHERNET PHY 825-2029 1 LBL,SER #,BARCODE PCB1
056-1158 1 DESIGN GUIDE,MCO,IMACG4 PCB1 CRITICAL
38 FIREWIRE PHY 057-0040 1 DFM,PNLZN DWG,MLB,Q26 PCB1 CRITICAL



39 INTREPID UATA/IDE (SECTION 5) 630-4766 1 630-4766,PCBA,H,Q26C,EEE PVL HYNIX OMIT
630-4767 1 630-4767,PCBA,S,Q26C,EEE PVM SAMSUNG OMIT
40 ATA CD/HD CONNECTORS
41 AUDIO CODEC & VOLTAGE REGS
42,43 LINE IN/OUT BUFFERS
44,45 SPEAKER/MIC AMPS DIMENSIONS ARE IN MILLIMETERS
Apple Computer Inc.
METRIC
46 POWER MANAGER UNIT XX


A X.XX
DRAFTER DESIGN CK NOTICE OF PROPRIETARY PROPERTY A
47-53 +5V/+12V, AUDIO, FW & TMDS POWER CONVERTERS X.XXX
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
ENG APPD MFG APPD
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
54-61 CONSTRAINT TABLES ANGLES II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
QA APPD DESIGNER TITLE
DO NOT SCALE DRAWING
62-66 NET TABLES RELEASE SCALE SCHEM,MLB,Q26,GEN X
NONE

67-74 PART TABLES SIZE DRAWING NUMBER
MATERIAL/FINISH
NOTED AS D 051-6496 REV.
A
THIRD ANGLE PROJECTION APPLICABLE SHT 1 OF 74

8 7 6 5 4 3 2 1 DRAWING
CR-2

8 7 6 5 4 3 2 1




FW - B Inverter LCD Panel
Connector KITCHEN Connector VGA/SVIDEO OUT

P.38 P.31 P.26 D
D VGA
Connector
TMDS P.27
FW - A Ethernet EDID (I2C)




RGB
Connector Connector
P.38 P.37 GRAPHICS
MEMORY
NVIDIA P.22
NV18B (EXTERNAL MEM)


GRAPHICS
FireWire Ethernet 64MB MEMORY
P.23
PHY PHY P.19-29 (EXTERNAL MEM)
P.38 P.37
C WIRELESS C
AGP BUS P.33
1394 OHCI 1.5V/3.3V
3.3V 32BITS
66MHZ
8BIT TX/RX

32BITS
USB
CONN(QTY3) FIREWIRE ETHERNET 4X AGP
P.35 400 MB/S 10/100 PCI PCI BUS
P.36 P.36 P.18 P.32

USB2
CONTROL
USB
P.30 INTREPID
P.34 DDR MEMORY I2C MAXBUS BOOTROM BOOT ROM
P.14 P.36 P.11 P.32 1M X 8
MODEM P.32
B BLUETOOTH B
P.31 MEMORY BUS I2C MAXBUS
2.5V
167MHZ 167MHZ
64BITS 32BIT ADDRESS
64BIT DATA
PMU
P.46
CPU PLL
Config
PCK2059
DDR CLOCK
DDR MUXES APOLLO P.6
P.15
P.10 CPU
P.4-5

DDR SDRAM DIMM 0 SYSTEM BLOCK
A P.17 NOTICE OF PROPRIETARY PROPERTY
A
LAST_MODIFIED=Thu Jun 19 19:13:13 2003
DDR SDRAM DIMM 1 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
SO-DIMM Connector I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT

P.16 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.


APPLE COMPUTER INC.
D 051-6496 A
SCALE SHT OF
NONE 2 74
8 7 6 5 4 3 2 1 DRAWING
CR-3

8 7 6 5 4 3 2 1



DUAL 5.1V TMDS
+12V DC/DC LDO 3.65V
D (EZ1582) D
(LTC3707)
3.3V


USB
5.1V
(SWITCH)
LAYER THICKNESS COPPER TRACE WIDTH
FW (MILS) (OZ) (MILS)
12V
---------------- ------------ -------- --------------
(SWITCH) EXTERNAL
VIDEO 5.1V 1 - SIGNAL-TOP 0.7 0.5 4
PREPREG 3 ---
(SWITCH) 2 - GROUND1 1.4 1 ---
C ---
C
PREPREG 3
3 - SIGNAL 0.7 0.5 4
GRAPHIC ---
1.6V HARD FILLER 17.4
DC/DC 2 ---
DRIVE 5.1V 4 - POWER 2.8
(SC2602) PREPREG 4 ---
(SWITCH) 5 - POWER 2.8 2 ---
FILLER 17.4 ---
6 - SIGNAL 0.7 0.5 4
PREPREG 3 ---
CPU OPTICAL 1 ---
DRIVE 7 - GROUND2 1.4
DC/DC 1.55V 5.1V ---
PREPREG 3
(LTC3707) (SWITCH) 8 - SIGNAL-BOTTOM 0.7 0.5 4

B ================ ============ ======== ============= B
TOTAL 62.0 --- ---
INTREPID
DC/DC 1.7V
BACKLIGHT
600V RMS (SC2602)
INVERTER
(OZ960)

MAXBUS I/O
1.8V
LDO
DDR (EZ1582)
DC/DC 2.5V PWR BLOCK,PCB INFO
A NOTICE OF PROPRIETARY PROPERTY
A
(SC2602) LAST_MODIFIED=Thu Jun 19 19:13:14 2003
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGP AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

3.3V LDO 1.5V II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.

(EZ1582) D 051-6496 A
POWER SYSTEM ARCHITECTURE APPLE COMPUTER INC.
SCALE
NONE 3
SHT

74
OF




8 7 6 5 4 3 2 1 DRAWING
CR-4

8 7 6 5 4 3 2 1

CPU INTERNAL PLL FILTERING CPU_VCORE_SLEEP 4D7 9B6 9C2 47B3 47C1 54C6 61B4 61D7
1
48D4 54C6 61C7 R901
+MAXBUS_SLEEP 6D8 7A3 7B3 7C3 7C5 7C7 8D3 9B2 10
9D2 9D4 11B8 11D8 46B7 46D1 46D2 47D2 1%
61D7 61B4 54C6 47C1 47B3 9C2 9B6 4D3 CPU_VCORE_SLEEP 1/16W
MF
1 2 603
R891
470 54C6 CPU_AVDD
5%
1/16W
MF 1 C1036 1 C1035
402 2

D 0.1UF 2.2UF D




H10
H12




J11
J13


K10
K12
K14



L11
L13


M10
M12




C12


E18


G18




P11


R13
R16




U12
U16



V10
V14
20% 20%




H8



J7
J9



K8




L7
L9



M8




B4
C2


D5


F2


H3
J5
K2
L5
M3
N6
P2
P8


R4




T6
T9
U2



V4
V7




A8
10V
2 CERM 10V
2 CERM
402 805
VDD OVDD AVDD

58D3 11D3 9C5 7C7 CPU_BR_L D2 BR* BVSEL B7 CPU_BUS_VSEL 7C4
58D3 11D3 9B5 7B7 M1
CPU_BG_L BG*
A10 11A4 58C3
SYSCLK SYSCLK_CPU
58D3 11D3 9C7 7C7 L4 H2 NO_TEST
CPU_TS_L TS* CLKOUT NC_CPU_CLKOUT NOSTUFF
B8 6C6 9A8 1
PLLCFG0 CPU_PLL_CFG<0>
R895
7C5 4A3 E11 C8 6C6 9A8
CPU_PULLDOWN A0 PLLCFG1 CPU_PLL_CFG<1> 47
5%
H1 C7 6C6 9A8 RC GLITCH FILTER
A1 PLLCFG2 CPU_PLL_CFG<2> 1/16W
MF
C11 A2 PLLCFG3 D7 CPU_PLL_CFG<3> 6C6 9A8 402 2 PLACE CLOSE TO PIN
G3 A3 PLL_EXT A7 CPU_PLL_CFGEXT 6C6 9A8
58D3 11D3 9C5 CPU_ADDR<0> F10 A4 DBG* M2 CPU_DBG_L 7B7 9C8 11B1 58C3 R850
0
58D3 11D3 9C6 CPU_ADDR<1> L2
A5 DRDY* R3 58C3 CPU_DRDY_L_UF 1 2 CPU_DRDY_L 7B7 9B6 11B1 58C3
58D3 11D3 9C5 D11 G1 7C5
CPU_ADDR<2> A6 DTI0 CPU_EDTI 5%
1/16W NOSTUFF
58D3 11D3 9B8 D1 K1 9B7 11A1 58C3
CPU_ADDR<3> A7 DTI1 CPU_DTI<0> MF
402 1 C954
58D3 11D3 9C6 C10 P1 9B5 11A1 58C3
CPU_ADDR<4> A8 DTI2 CPU_DTI<1>
10PF
58D3 11D3 9B7 G2 N1 9B5 11A1 58C3 5%
CPU_ADDR<5> A9 DTI3 CPU_DTI<2>