Text preview for : DELL_INSPIRON_1427_Compal_LA-4841P.pdf part of Dell DELL INSPIRON 1427 Compal LA-4841P Dell DELL_INSPIRON_1427_Compal_LA-4841P.pdf



Back to : DELL_INSPIRON_1427_Compal | Home

A B C D E




1 1




2 Compal Confidential 2




Schematic Document
Cantiga + ICH9
2008 / 12 / 10 Rev:1.0
3 3




4 4




Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/1/15 Deciphered Date 2008/1/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4841P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, December 15, 2008 Sheet 1 of 45
A B C D E
A B C D E




Compal confidential
File Name : LA-4841P
MLK 14
ZZZ1




Thermal Sensor Penryn -4MB (Socket P)
PCB
1
ADT7421ARMZ 1



P.4 uFCPGA-478 CPU
P.4,5,6 CK505 TSSOP-64
Clock Generator
Fan conn ICS9LPRS397AKLFT
P.4 H_A#(3..35)
CRT FSB
H_D#(0..63) 667/800MHz 1.05V
P.17 P.15
DDR2 667/800MHz 1.8V DDR2-SO-DIMM X2
BANK 0, 1, 2, 3 P.13,14

LVDS Panel Interface Intel Cantiga MCH
Dual Channel
P.16 MXM II VGA/B 1329pin BGA
NB9M-GS 512M
P.33 P.7,8,9,10,11,12
USB conn x 4
P.30
2 2



CardBus Controller PCI DMI X4 C-Link
O2MICRO OZH24
P.26
USB2.0

Intel ICH9-M Azalia
BT Conn
1394 Media Card P.30

PCI-E BUS 676pin BGA SATA Master
SATA Slave
P.18,19,20,21 Camera
P.30

10/100/1000 LAN Mini-CardX1 Mini-CardX1 Express Card Express Card
REALTEK P.22 (WLAN)
P.27
P.27
RTL8111C-GR P.24 P.24
3 3
Mini-Card-3 P.23


RJ45/11 CONN
LPC BUS

Audio CODEC AMP & Audio Jack
ALC272 P.25 P.25
ENE KB926
P.28
SATA HDD Connector
P.23
Touch Pad CONN. Int.KBD BIOS(System/EC)
Power On/Off CKT.
P.29 P.29 P.28
CDROM Conn.
4
P.23 4


DC/DC Interface CKT. RTC CKT.

Security Classification Compal Secret Data Compal Electronics, Inc.
2007/1/15 2008/1/15 Title
Power Circuit DC/DC Power OK CKT. Issued Date Deciphered Date
Block diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4841P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, December 15, 2008 Sheet 2 of 45
A B C D E
A




O MEANS ON X MEANS OFF
Voltage Rails


Symbol Note :
+5VS
+3VS
+1.5VS : means Digital Ground
power
plane +0.9V
+VCCP
+5VALW +1.8V +CPU_CORE : means Analog Ground
+B
+3VALW +VGA_CORE @ : means just reserve , no build
+2.5VS
[email protected] : means just reserve for debug.
State +1.8VS
+1.2VS
+0.9VGA




S0
O O O O
S1
O O O O
S3
O O O X
S5 S4/AC
O O X X
S5 S4/ Battery only
O X X X
S5 S4/AC & Battery
1
don't exist X X X X SMBUS Control Table
1




THERMAL
SERIAL SENSOR
SOURCE INVERTER BATT EEPROM (CPU) SODIMM CLK CHIP MINI CARD LCD


SMB_EC_CK1
SMB_EC_DA1
KB926 X V V X X X X X
SMB_EC_CK2
SMB_EC_DA2
KB926 X X X V X X X X
V V V
SMB_CK_CLK1
SMB_CK_DAT1 ICH9 X X X X X
V
LCD_CLK
LCD_DAT Cantiga
X X X X X X X




I2C / SMBUS ADDRESSING

DEVICE HEX ADDRESS
DDR SO-DIMM 0 A0 10100000
DDR SO-DIMM 1 A4 10100100
CLOCK GENERATOR (EXT.) D2 11010010
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/03/10 Deciphered Date 2006/03/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4841P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, December 15, 2008 Sheet 3 of 45
A
5 4 3 2 1




No need in check list +3VS


XDP_DBRESET# 1 2 1K_0402_5%
@ R51
+VCCP


XDP_TDI R5 1 2 54.9_0402_1%

XDP_TMS R4 1 2 54.9_0402_1%
D D



XDP_TRST# R11 1 2 54.9_0402_1%

XDP_TCK R35 1 2 54.9_0402_1%

[email protected] This shall place near CPU
7 H_A#[3..16]
JCPU1A
H_A#3 J4 H1 H_ADS#
A[3]# ADS# H_ADS# 7




ADDR GROUP_0
H_A#4 L5 E2 H_BNR#
A[4]# BNR# H_BNR# 7
H_A#5 L4 G5 H_BPRI#
A[5]# BPRI# H_BPRI# 7
H_A#6 K5
H_A#7 A[6]# H_DEFER#
M3 A[7]# DEFER# H5 H_DEFER# 7
H_A#8 N2 F21 H_DRDY#
A[8]# DRDY# H_DRDY# 7
H_A#9 J1 E1 H_DBSY#
A[9]# DBSY# H_DBSY# 7
H_A#10 N3
H_A#11 A[10]# H_BR0#
P5 A[11]# BR0# F1 H_BR0# 7
H_A#12 P2 A[12]#




CONTROL
H_A#13 L2 D20 H_IERR#
H_A#14 A[13]# IERR# H_INIT#
P4 A[14]# INIT# B3 H_INIT# 19
H_A#15 P1
H_A#16 A[15]# H_LOCK#
R1 A[16]# LOCK# H4 H_LOCK# 7
H_ADSTB#0 M1
7 H_ADSTB#0 ADSTB[0]#
C1 H_RESET#
RESET# H_RESET# 7
H_REQ#0 K3 F3 H_RS#0
7 H_REQ#0 REQ[0]# RS[0]# H_RS#0 7
H_REQ#1 H2 F4 H_RS#1
7 H_REQ#1 REQ[1]# RS[1]# H_RS#1 7
H_REQ#2 K2 G3 H_RS#2
7 H_REQ#2 REQ[2]# RS[2]# H_RS#2 7
H_REQ#3 J3 G2 H_TRDY#
7 H_REQ#3 REQ[3]# TRDY# H_TRDY# 7
H_REQ#4 L1
7 H_REQ#4 REQ[4]#
G6 H_HIT#
7 H_A#[17..35] HIT# H_HIT# 7
H_A#17 Y2 E4 H_HITM#
C A[17]# HITM# H_HITM# 7 C
H_A#18 U5
H_A#19 A[18]#
R3 A[19]# BPM[0]# AD4
ADDR GROUP_1




H_A#20 W6 AD3
H_A#21 A[20]# BPM[1]# +3VS
U4 AD1
H_A#22 Y5
A[21]#
A[22]#
BPM[2]#
BPM[3]# AC4 Thermal Sensor EMC1402-1-ACZL-TR
XDP/ITP SIGNALS




H_A#23 U1 AC2
H_A#24 A[23]# PRDY#
R4 A[24]# PREQ# AC1




0.1U_0402_16V4Z
H_A#25 T5 AC5 XDP_TCK 1
H_A#26 A[25]# TCK XDP_TDI
T3 A[26]# TDI AA6
H_A#27 W2 AB3 C13
H_A#28 A[27]# TDO XDP_TMS
W5 A[28]# TMS AB5
H_A#29 XDP_TRST# 2
Y4 A[29]# TRST# AB6
H_A#30 U2 C20 XDP_DBRESET# U2
A[30]# DBR# XDP_DBRESET# 20
H_A#31 V4 1 8 EC_SMB_CK2 EC_SMB_CK2 29,33
H_A#32 A[31]# VDD SCLK
W3 A[32]#
H_A#33 AA4 THERMAL H_THERMDA 2 7 EC_SMB_DA2
A[33]# D+ SDATA EC_SMB_DA2 29,33
H_A#34 AB2 H_PROCHOT# R146 2 1 56_0402_5% +VCCP C5
H_A#35 A[34]# H_THERMDC
AA3 A[35]# PROCHOT# D21 1 2 3 D- ALERT# 6
H_ADSTB#1 V1 A24 H_THERMDA_R R57 1 2 100_0402_5% H_THERMDA 2200P_0402_50V7K
7 H_ADSTB#1 ADSTB[1]# THERMDA
B25 H_THERMDC_R R53 1 2 100_0402_5% H_THERMDC L_THERM# 4 5
H_A20M# THERMDC THERM# GND
19 H_A20M# A6 A20M#
ICH




H_FERR# A5 C7 H_THERMTRIP# R16
19 H_FERR# FERR# THERMTRIP# H_THERMTRIP# 7,19
H_IGNNE# C4 +3VS 1 2 EMC1402-2-ACZL-TR MSOP 8P
19 H_IGNNE# IGNNE#
H_THERMDA, H_THERMDC routing together, 10K_0402_5%
19 H_STPCLK#
H_STPCLK# D5 STPCLK#
Address:100_1100
19 H_INTR
H_INTR C6 H CLK Trace width / Spacing = 10 / 10 mil
H_NMI LINT0 CLK_CPU_BCLK
19 H_NMI B4 LINT1 BCLK[0] A22 CLK_CPU_BCLK 15
H_SMI# A3 A21 CLK_CPU_BCLK#
19 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 15
C76
M4
N5
RSVD[01] FAN Control circuit 10U_1206_16V4Z~N
2 1
RSVD[02] +5VS
T2 RSVD[03]
B C88 B
V3 RSVD[04]
RESERVED




B2 1000P_0402_50V7K~N 1 2
RSVD[05] C77 10U_1206_16V4Z~N
D2 RSVD[06] 2 1
D22 RSVD[07]
D3 U3
RSVD[08]
F6 RSVD[09] 1 VEN GND 8
2 VIN GND 7
FAN1_POWER 3 6
EN_DFAN1 VO GND
29 EN_DFAN1 4 VSET GND 5

Penryn +3VS RT9027BPS SO 8P




1
JFAN1
R61
40mil
1 1
+VCCP 10K_0402_5% 2 2
3 3




2
29 FAN_SPEED1 4 GND
1




@ 2 5
R17 GND
56_0402_5% C94 ACES_85205-03001
0.01U_0402_16V7K [email protected]
1
2 2




FAN1
B
E




H_PROCHOT# 3 1 OCP#
OCP# 20
C




@ Q2
MMBT3904_SOT23


+VCCP
A A
2




R18
56_0402_5%
1




H_IERR# Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/02/13 Deciphered Date 2006/03/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Penryn(1/3)-AGTL+/ITP-XDP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4841P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, December 15, 2008 Sheet 4 of 45
5 4 3 2 1
5 4 3 2 1




+CPU_CORE +CPU_CORE
7 H_D#[0..15] [email protected] [email protected]
H_D#[32..47] 7
JCPU1B JCPU1C
H_D#0 E22 Y22 H_D#32 A7 AB20
H_D#1 D[0]# D[32]# H_D#33 VCC[001] VCC[068]
F24 D[1]# D[33]# AB24 A9 VCC[002] VCC[069] AB7
H_D#2 E26 V24 H_D#34 A10 AC7
D[2]# D[34]# VCC[003] VCC[070]




DATA GRP 0
H_D#3 G22 V26 H_D#35 A12 AC9




DATA GRP 2
D H_D#4 D[3]# D[35]# H_D#36 VCC[004] VCC[071] D
F23 D[4]# D[36]# V23 A13 VCC[005] VCC[072] AC12
H_D#5 G25 T22 H_D#37 A15 AC13
H_D#6 D[5]# D[37]# H_D#38 VCC[006] VCC[073]
E25 D[6]# D[38]# U25 A17 VCC[007] VCC[074] AC15
H_D#7 E23 U23 H_D#39 A18 AC17
H_D#8 D[7]# D[39]# H_D#40 VCC[008] VCC[075]
K24 D[8]# D[40]# Y25 A20 VCC[009] VCC[076] AC18
H_D#9 G24 W22 H_D#41 B7 AD7
H_D#10 D[9]# D[41]# H_D#42 VCC[010] VCC[077]
J24 D[10]# D[42]# Y23