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ZZZ1 PJP1 ZZZ2 ZZZ3 ZZZ4 ZZZ5 ZZZ6 ZZZ7




PCB 45@ DCIN LA-5981P LS-5981P LS-5982P LS-5983P LS-5984P LS-5986P
DAZ@ DA2@ DA2@ DA2@ DA2@ DA2@ DA2@




1 1




Compal Confidential
2 2




NCQF0 M/B Schematics Document
Intel Arrandale/Clarksfield Processor with DDRIII + Ibex Peak-M



3
2010-04-18 3




REV:1.A




4 4




Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/08/25 Deciphered Date 2010/08/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NCQF0 M/B LA-5981P Schematic1.0
Date: Sunday, April 18, 2010 Sheet 1 of 63
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Clock Generator
Compal Confidential IDT: 9LRS3199AKLFT
Model Name : NCQF0 SILEGO: SLG8SP587
133/120/100/96/14.318MHZ to PCH
File Name : LA5981P Fan Control
page 44
27MHz no SSC to VGA
page 12
1 1




100MHz PCI-E 2.0x16 5GT/s PER LANE
ATI PEG(DIS) Intel Memory BUS(DDRIII)
MADISON-Pro/Broadway-Pro 133MHz Dual Channel 204pin DDRIII-SO-DIMM X4
Arrandale / Clarksfield BANK 0, 1, 2, 3 page 10,11
page 1.5V DDRII: ARD 800/1066MT/S
22,23,24,25,26,27,28 (UMA/DIS) CF: 1066/1333MT/S
6.4G/8.5G/10.6G
LVDS(DIS) Processor
100M/133M/166M(CFD)

LVDS Conn. rPGA988A
page 4,5,6,7,8,9
HDMI(DIS) CRT(DIS) page 29

FDI x8 DMI x4 USB conn x2 Bluetooth CMOS Camera TV Tuner
USB port 0,1
(UMA) USB port 8 HS USB
Conn
CRT SW. CRT Conn. LVDS SW USB Port 2 (eSATA) USB port 10 USB port 3 USB port 5
HDMI Conn. 100MHz 100MHz
page 29 page 36 page 35 page 29 page 38
page 30 page 30 2.7GT/s 1GB/s x4
page 31 3.3V 48MHz
2
LVDS(UMA) USBx14 2




Intel 3.3V 24MHz
CRT(UMA) HD Audio
Ibex Peak-M
SATA x 6 (GEN1 1.5GT/S ,GEN2 3GT/S) 100MHz
PCI-Express x 8 (ABD PCIE1 2.5GT/S CKD PCIE1/2 2.5/5GT/S) 100MHz PCH HDA Codec
page 13,14,15,16,17
18,19,20,21 ALC669X
port 5 port 2 port 1 SPI page 42

CardReader MINI Card x1 LAN(GbE) port 0 port 1 port 4
JMB38037 WLAN BCM57780 SATA HDD SATA ODD eSATA
page page 33 SPI ROM x1 Audio AMP
page 38
page 13
Conn. Conn. Conn.
page 32 page 32 page 36
TPA6017
page 43



3
RJ45 LPC BUS 3

page 34
33MHz Phone Jack x 3
Int. Speaker
+SubWoofer
ENE KB926 page 43 page 43
Sub-board
page 39
LS-5981P
RTC CKT. Power/B
page 40
page 35
Touch Pad Int.KBD
LS-5982P page 35 page 40
ARCADE/B
Power On/Off CKT. page29
page 41 EC I/O Buffer BIOS ROM
LS-5983P page 39 page 40
FP/B
page 43
DC/DC Interface CKT.
4
page 45,46 LS-5984P 4

USB/B
page 43

Power Circuit DC/DC LS-5986P Security Classification Compal Secret Data Compal Electronics, Inc.
TP/B 2009/08/25 2010/08/25 Title
Issued Date Deciphered Date
page 47~61 page 35 Block Diagrams
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NCQF0 M/B LA-5981P Schematic
Date: Sunday, April 18, 2010 Sheet 2 of 63
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Voltage Rails SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Power Plane Description S1 S3 S5 DGPU DGPU
(UMA) (DIS) Full ON HIGH HIGH HIGH HIGH ON ON ON ON
VIN Adapter power supply (19V) N/A N/A N/A
S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
B+ AC or battery power rail for power circuit. N/A N/A N/A
+CPU_CORE Core voltage for CPU ON ON OFF S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
+0.75VS 0.75V switched power rail for DDR terminator ON OFF OFF
1
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF 1
+1.05VS 1.05V switched power rail for PCH ON OFF OFF
+1.1VS_VTT 1.1V switched power rail (1.05 for AUB CPU) ON OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+1.5V 1.5V power rail for DDRIII ON ON OFF
+1.5VS 1.5V switched power rail ON OFF OFF
+1.8VS 1.8V switched power rail ON OFF OFF Board ID / SKU ID Table for AD channel
+3VALW 3.3V always on power rail ON ON ON* Vcc 3.3V +/- 5%
+3V 3.3V power rail for PCH ON ON ON Ra/Rc/Re 100K +/- 5%
+3V_LAN 3.3V power rail for LAN ON ON ON* Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
+3VS 3.3V switched power rail ON OFF OFF 0 0 0 V 0 V 0 V
+5VALW 5V always on power rail ON ON ON* 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
+5VS 5V switched power rail ON OFF OFF 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+5V 5V power rail for PCH ON ON ON 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
+VSB VSB always on power rail ON ON ON* 4 56K +/- 5% 1.036 V 1.185 V 1.264 V
+RTCVCC RTC power ON ON ON 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
+5VSDGPU 5V power rail for GPU OFF ON 6 200K +/- 5% 1.935 V 2.200 V 2.341 V
+1.5VSDGPU 1.5V power rail for VRAM OFF ON 7 NC 2.500 V 3.300 V 3.300 V
2 2
+1.8VSDGPU 1.8V switched power rail for GPU OFF ON

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF. BOARD ID Table BTO Option Table
BTO Item BOM Structure
Board ID PCB Revision
External PCI Devices DIS Only DIS@
* 0 0.1
DGPU VGA@
Device IDSEL# REQ#/GNT# Interrupts 1
Broadway WAY@
2
Madison MAD@
3
Park PAR@
4
5
6
7



EC SM Bus1 address EC SM Bus2 address USB Port Table
4 External
3 USB 2.0 USB 1.1 Port USB Port 3
Device Address Device Address
Smart Battery 0001 011X b Switchable
0 USB Conn. SG@
UHCI0 Graphics
1 USB/B
2 eSATA USB
UHCI1
3 CMOS Camera
EHCI1
4 Mini Card 1
UHCI2
Ibex SM Bus address 5 Mini Card 2
6 BOM Config
Device Address UHCI3 Switchable Graphics (PARK)SKU: SG@/VGA@/PAR@
7
Clock Generator 1101 0010b
Switchable Graphics (MADISON)SKU: SG@/VGA@/MAD@
(9LRS3199AKLFT, SLG8SP587) 8 USB Conn. DIS ONLY (BROADWAY): DIS@/VGA@/WAY@
DDR DIMM0 1001 000Xb
UHCI4
9
DDR DIMM2 1001 010Xb 10 Blue Tooth
ISL90727 0101 1100b
EHCI2 UHCI5
ISL90728 0111 1100b
11 Finger Print
12
4 UHCI6 4
13


Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/08/25 Deciphered Date 2010/08/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NCQF0 M/B LA-5981P Schematic1.0
Date: Sunday, April 18, 2010 Sheet 3 of 63

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5 4 3 2 1

JCPU1E

JCPU1A R659 AJ13
PEG_IRCOMP RSVD32
PEG_ICOMPI B26 1 2 49.9_0402_1% RSVD33 AJ12
PEG_ICOMPO A26
DMI_PTX_HRX_N0 A24 B27 R669 AP25
DMI_PTX_HRX_N1 DMI_RX#[0] PEG_RCOMPO EXP_RBIAS RSVD1
C23 DMI_RX#[1] PEG_RBIAS A25 1 2 750_0402_1% AL25 RSVD2 RSVD34 AH25
DMI_PTX_HRX_N2 B22 AL24 AK26
DMI_PTX_HRX_N3 DMI_RX#[2] PEG_GTX_C_HRX_N15 RSVD3 RSVD35
A21 DMI_RX#[3] PEG_RX#[0] K35 PEG_GTX_C_HRX_N15 <22> AL22 RSVD4
J34 PEG_GTX_C_HRX_N14 AJ33 AL26
PEG_RX#[1] PEG_GTX_C_HRX_N14 <22> RSVD5 RSVD36
DMI_PTX_HRX_P0 B24 J33 PEG_GTX_C_HRX_N13 AG9 AR2
DMI_RX[0] PEG_RX#[2] PEG_GTX_C_HRX_N13 <22> RSVD6 RSVD_NCTF_37
DMI_PTX_HRX_P1 D23 G35 PEG_GTX_C_HRX_N12 M27
DMI_RX[1] PEG_RX#[3] PEG_GTX_C_HRX_N12 <22> RSVD7




DMI
DMI_PTX_HRX_P2 B23 G32 PEG_GTX_C_HRX_N11 L28 AJ26
DMI_RX[2] PEG_RX#[4] PEG_GTX_C_HRX_N11 <22> RSVD8 RSVD38
D DMI_PTX_HRX_P3 A22 F34 PEG_GTX_C_HRX_N10 J17 AJ27 D
DMI_RX[3] PEG_RX#[5] PEG_GTX_C_HRX_N10 <22> <10> H_DIMMA_REF SA_DIMM_VREF (CFD Only) RSVD39
F31 PEG_GTX_C_HRX_N9 H17
PEG_RX#[6] PEG_GTX_C_HRX_N9 <22> <11> H_DIMMB_REF SB_DIMM_VREF (CFD Only)
DMI_HTX_PRX_N0 D24 D35 PEG_GTX_C_HRX_N8 G25
DMI_TX#[0] PEG_RX#[7] PEG_GTX_C_HRX_N8 <22> RSVD11
DMI_HTX_PRX_N1 G24 E33 PEG_GTX_C_HRX_N7 G17
DMI_TX#[1] PEG_RX#[8] PEG_GTX_C_HRX_N7 <22> RSVD12
DMI_HTX_PRX_N2 F23 C33 PEG_GTX_C_HRX_N6 E31 AP1
DMI_TX#[2] PEG_RX#[9] PEG_GTX_C_HRX_N6 <22> RSVD13 RSVD_NCTF_40
DMI_HTX_PRX_N3 H23 D32 PEG_GTX_C_HRX_N5 E30 AT2
DMI_TX#[3] PEG_RX#[10] PEG_GTX_C_HRX_N5 <22> RSVD14 RSVD_NCTF_41
B32 PEG_GTX_C_HRX_N4
PEG_RX#[11] PEG_GTX_C_HRX_N4 <22>
DMI_HTX_PRX_P0 D25 C31 PEG_GTX_C_HRX_N3 AT3
DMI_TX[0] PEG_RX#[12] PEG_GTX_C_HRX_N3 <22> RSVD_NCTF_42
DMI_HTX_PRX_P1 F24 B28 PEG_GTX_C_HRX_N2 AR1
DMI_TX[1] PEG_RX#[13] PEG_GTX_C_HRX_N2 <22> RSVD_NCTF_43
DMI_HTX_PRX_P2 E23 B30 PEG_GTX_C_HRX_N1
DMI_TX[2] PEG_RX#[14] PEG_GTX_C_HRX_N1 <22>
DMI_HTX_PRX_P3 G23 A31 PEG_GTX_C_HRX_N0
DMI_TX[3] PEG_RX#[15] PEG_GTX_C_HRX_N0 <22>
J35 PEG_GTX_C_HRX_P15 AL28
PEG_RX[0] PEG_GTX_C_HRX_P15 <22> RSVD45
PEG_RX[1] H34 PEG_GTX_C_HRX_P14
PEG_GTX_C_HRX_P14 <22>
WW41 Recommend not 1 @ 2 CFG0 AM30 CFG[0] RSVD46 AL29
H33 PEG_GTX_C_HRX_P13 pull down R136 3.01K_0402_1% AM28 AP30
PEG_RX[2] PEG_GTX_C_HRX_P13 <22> CFG[1] RSVD47
H_FDI_TXN0 E22 F35 PEG_GTX_C_HRX_P12 PCIE2.0 Jitter is AP31 AP32
FDI_TX#[0] PEG_RX[3] PEG_GTX_C_HRX_P12 <22> CFG[2] RSVD48
H_FDI_TXN1 D21 G33 PEG_GTX_C_HRX_P11 1 2 CFG3 AL32 AL27
H_FDI_TXN2 FDI_TX#[1] PEG_RX[4] PEG_GTX_C_HRX_P10
PEG_GTX_C_HRX_P11 <22> over on ES1 R139 @ 3.01K_0402_1% CFG4 CFG[3] RSVD49
D19 FDI_TX#[2] PEG_RX[5] E34 PEG_GTX_C_HRX_P10 <22> 1 2 AL30 CFG[4] RSVD50 AT31
H_FDI_TXN3 D18 F32 PEG_GTX_C_HRX_P9 R138 3.01K_0402_1% AM31 AT32
FDI_TX#[3] PEG_RX[6] PEG_GTX_C_HRX_P9 <22> CFG[5] RSVD51
H_FDI_TXN4 G21 D34 PEG_GTX_C_HRX_P8 AN29 AP33
FDI_TX#[4] PEG_RX[7] PEG_GTX_C_HRX_P8 <22> CFG[6] RSVD52
H_FDI_TXN5 PEG_GTX_C_HRX_P7 @ CFG7
H_FDI_TXN6
E19
F21
FDI_TX#[5]
FDI_TX#[6]
PCI EXPRESS -- GRAPHICS PEG_RX[8]
PEG_RX[9]
F33
B33 PEG_GTX_C_HRX_P6
PEG_GTX_C_HRX_P7 <22>
PEG_GTX_C_HRX_P6 <22>
1
R137
2
3.01K_0402_1%
AM32
AK32
CFG[7]
CFG[8]
RSVD53
RSVD_NCTF_54
AR33
AT33
Intel(R) FDI

H_FDI_TXN7 G18 D31 PEG_GTX_C_HRX_P5 AK31 AT34




RESERVED
FDI_TX#[7] PEG_RX[10] PEG_GTX_C_HRX_P5 <22> CFG[9] RSVD_NCTF_55
A32 PEG_GTX_C_HRX_P4 AK28 AP35
PEG_RX[11] PEG_GTX_C_HRX_P4 <22> CFG[10] RSVD_NCTF_56