Text preview for : Compal_LA-8511P_2012-01-18_V1.0.pdf part of Compal Compal LA-8511P 2012-01-18 V1.0 Compal Compal_LA-8511P_2012-01-18_V1.0.pdf
Back to : Compal_LA-8511P_2012-01-1 | Home
A B C D E
ZZZ0
PCB
MB
1 1
Compal Confidential
PICASSO M Schematics Document
2 2
Nvdia(T30S) + LPDDRII
QAJA0-LA-8511P
2012-01-18 REV: 1.0
3
The content in this document contains confidential information of Compal Electronics, Inc. 3
that is protected under all applicable trade secrets laws and regulations.
If you are not the intended recipient or otherwise authorized to receive such information,
please do not copy, distribute or otherwise use the information contained herein and please
destroy this communication accordingly.
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/06/20 Deciphered Date 2012/06/20 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Picasso 2 R04
Date: Wednesday, January 18, 2012 Sheet 1 of 38
A B C D E
A B C D E
Compal Confidential
Model Name : NVIDIA T30S System Block Diagram
26MHz
32KHz
1
LPDDR2 1
512MB/1GB
PMIC CORE_PWR_REQ P.9
TPS659110
Power ON CPU_PWR_REQ JTAG Debug
Test Point
P.7
VIN SYS_RESET_N I2S
Audience Audio Codec Audio AMP Speaker x 2
PMU_32K_IN UART4 eS305 WM8903 APA2010 (1W)
P.14 P.15 P.15 P.15
PWR_I2C
P.31~P.33
GPS Antenna MIC & Audio Jack
P.15
UART2 Broadcom
2 2
HDMI_DDC BCM47511
Micro HDMI HDMI Switch Nvidia P.21
P.19 (1.8V/3.3V) T30S BT/WLAN Antenna
P.13
UART3
Touch Panel SDIO AzureWave
Control AW-AH660
P.13 DAP
P.22
10.1" LCD LVDS Transmitter 3G Modem Antenna
1920*1200 (V105A)
P.12
USB2 3G Modem Module SIM Card
Client P.18 P.18
Micro USB Signal Switch Host
P.20 P.20
3
P-Senser 3
IQS12800100TSR
CAMERA Dock/B
CIS(MIPI)
5M(CJAA525) I2C
2M(CBFA152) CAM_I2C
P.17
CAM_I2C CAM_I2C CAM_I2C
SDIO4 SDIO1
EEPROM (1.8V) (3.3V) GYRO Sensor Light Sensor E-Compass
MPU-3050 STK2203 AKM8975
P.10
eMMC Micro SD slot P.16 Func/B Dock/B
P.11 P.20
IME
4
G-Sensor 4
KXTF9-4100
P.16
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/06/20 Deciphered Date 2012/06/20 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SYSTEM BLOCK
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Picasso 2 R04
Date: Wednesday, January 18, 2012 Sheet 2 of 38
A B C D E
5 4 3 2 1
Board ID
Voltage Rails
Power Plane Description
VIN Adapter power supply (19V) PICASSO 2
B+ AC or battery power rail for power circuit.
+VDD_1V2_RTC_TEGRA Power for RTC and always-on core logic.
VDD_1V2_SOC Power for remainder of core logic
D D
+AVDD_1V1_PLL_TEGRA AVDD_PLL power rail
+VDD_1V8_PMU_VRTC RTC power rail
+VDD_1V8_SYS_TEGRA System power rail
+AVDD_3V3_USB_TEGRA USB power rail
+VDD_2V85_EMMC Core voltage for EMMC
+VDD_1V8_CAM_TEGRA Core voltage for CAMERA
+AVDD_3V3_HDMI_S HDMI power rail
VDD_1V8_GEN 1.8V switched power rail for standby mode
+VDD_3V3_DDR_RX_TEGRA DDR RX power rail
+3VS 3.3V switched power rail for standby mode
+5VS 5V switched power rail for standby mode
+VDD_LED_BL LED power rail
+VDD_3V3_SDMMC1_TEGRA Micro SD power rail
+VDD_VCM_3V3 CAMERA power rail
+VDD_1V2_DDR_MEM DDR power rail
C C
GEN1_I2C <+VDD_1V8_SENSOR >
Device Address
Gyro 0xD0 , 0xD1
E Compass 0x18 , 0x19
Light Senser 0x38 , 0x39
PICASSO M
LPDDR2
B GEN2_I2C / TS_I2C < +VDD_3V3_GMI_TEGRA > B
Device Address
Touch Screen 0x98 , 0x99
CAM_I2C < +VDD_1V8_CAM_TEGRA >
Device Address
LVDS strap pin
Camera 5M 0x78 , 0x79
Camera 2M 0x20 , 0x21
Flash LED 0x66 , 0x67
PWR_I2C < +VDD_1V8_SYS_TEGRA>
Device Address
Thermal Senser 0x98 , 0x99
A
ES305 0x3E A
Codec 0x34 , 0x35
PMU 0x2D
TPS62361 0x60
BATT Conn 0xAA , 0xAB
EEPROM (Low level) 0xA0 , 0xA1
Security Classification Compal Secret Data Compal Electronics, Inc.
EEPROM (High level) 0xA2 , 0xA3 2011/06/20 2012/06/20 Title
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Picasso 2 R04
Date: Tuesday, January 17, 2012 Sheet 3 of 38
5 4 3 2 1
5 4 3 2 1
+VDD_3V3_GMI_TEGRA
+VDD_3V3_GMI_TEGRA
R453 L49 27NH_LQG15HS27NJ02D_5%_0402
NV_LCD_PCLK 2 1 LCD_PCLK_R 1 2 U1E
LCD_PCLK <12>
47_0402_5% 1 1 NAND_D0 R1 2 1 100K_0201_5%
C165 C164
4/21 GMI BOOT_PD R2 2 1 100K_0201_5%
12P_0201_50V8J 12P_0201_50V8J (1.8/3.3V)
2 2 P12 J7 Z NAND_D0
VDDIO_GMI_1 GMI_AD00 BOOT_PD
RF T12 K6 Z 8/22 Change BOM structure to LPDDR2 & EMMC
VDDIO_GMI_2 GMI_AD01
J3 Z
3300P_0201_16V6K
0.1U_0201_10V6K
GMI_AD02
2 1 2 H2 Z
GMI_AD03 NAND_D4 +VDD_3V3_GMI_TEGRA
P4 Z
4.7U_0402_6.3V6M
+VDD_3V3_LCD_TEGRA GMI_AD04
C3
U1I C147 C4 P6 Z NAND_D5
GMI_AD05 NAND_D6
8/21 LCD N3 Z X76_SAM_1GB@
1 2 1 GMI_AD06 NAND_D7 NAND_D4
R3 Z R38 2 1 100K_0201_5%
GMI_AD07
(1.8/3.3V) G3 PD LCD_PWM_OUT <13>
PD NV_LCD_PCLK GMI_AD08 NAND_D5
AG23 AN21 E1 PD DISPOFF# <13,31>
R43 2 @ 1 100K_0201_5%
VDDIO_LCD_1 LCD_PCLK GMI_AD09
AH24 J5 PD EN_T30S_FUSE_3V3 <23>
D VDDIO_LCD_2 PU GMI_AD10 NAND_D6 D
AK24 J1 PD R84 2 @ 1 100K_0201_5%
0.1U_0201_10V6K
LCD_WR* GMI_AD11 LCD_DCR <13>
1 2 AR19 PD F2 Z PCB_ID0
LCD_DE PU LCD_DE <12> GMI_AD12
AK20 F4 Z PCB_ID1 NAND_D7 R85 2 @ 1 100K_0201_5%
4.7U_0402_6.3V6M
LCD_HSYNC LCD_HSYNC <12> GMI_AD13
C1
C2 AL17 PU P2 Z PCB_ID2
LCD_VSYNC LCD_VSYNC <12> GMI_AD14
R5 Z EN_SENSOR_3V3 <23>
2 1 PD GMI_AD15 X76_ELP_1GB@
AR17 LCD_D00 <12>
LCD_D00 PD NAND_D4 R5
AP26 LCD_D01 <12> 11/6 Add for COMPAL EMI request. 2 1 100K_0201_5%
LCD_D01 PD
AM18 LCD_D02 <12>
LCD_D02 PD NAND_D5 R6
AN19 LCD_D03 <12> P8 VIB_EN_T30S <20> 2 1 100K_0201_5%
LCD_D03 PD GMI_A16
AJ23 LCD_D04 <12> M8 TS_PWR_EN <13>
LCD_D04 PD GMI_A17 NAND_D6 R7
AR23 LCD_D05 <12> N9 EN_VDDLCD_T30S <13> 2 1 100K_0201_5%
LCD_D05 PD GMI_A18
AK16 LCD_D06 <12> R9 EN_WIFI_VDD <22>
LCD_D06 PD GMI_A19 NAND_D7 R8
AK22 LCD_D07 <12> 2 1 100K_0201_5%
LCD_D07 PD
AU21 LCD_D08 <12>
LCD_D08 PD PU
AM26 LCD_D09 <12> R11 TS_INT# <13>
LCD_D09 PD GMI_CS0* PU EN_SENSOR_3V3
AR21 LCD_D10 <12> P10 CHARGER_STAT <27>
LCD_D10 PD GMI_CS1* 1 BOARD_ID0 R158 0_0201_5%
AU27 LCD_D11 <12> G5
LCD_D11 PD GMI_CS2* 1 BOARD_ID1 2 +VDD_3V3_GMI_TEGRA
AT18 LCD_D12 <12> K8 1 EN_P_SENSOR EN_P_SENSOR <20> 8/22 Change BOM structure
LCD_D12 GMI_CS3*
1
AJ17 PD H4 PU
LCD_D13 PD LCD_D13 <12> GMI_CS4* PU POUT_3G_1 <20>
AH18 M10 R18
LCD_D14 LCD_D14 <12> GMI_CS6* TEMP_ALERT# <7>
AL21 PD L9 PU 100K_0201_5% PCB_ID0 R63 2 1 100K_0201_5%
LCD_D15 PD LCD_D15 <12> GMI_CS7* POUT_WIFI <16>
AM22 QAJ70@
LCD_D16 PD LCD_D16 <12>
AJ19 PCB_ID1 R87 2 1 100K_0201_5%
LCD_D17 <12>
2
LCD_D17 PD BOOT_PD
AT20 LCD_D18 <12> M4 1 NH660@
LCD_D18 PD GMI_ADV* PCB_ID2 R100 2
AT24 LCD_D19 <12> 1 100K_0201_5%
LCD_D19 PD
AN27 LCD_D20 <12> L1 0 LTE@
LCD_D20 PD GMI_CLK BOARD_ID0 R78
AU23 LCD_D21 <12> 2 1 100K_0201_5%
LCD_D21 PD
AR27 LCD_D22 <12> L5 0 EN_HDMI_5V0 <19>
LCD_D22 PD GMI_RST* TS_PWR_EN BOARD_ID1
AM24 LCD_D23 <12> N5 PU 3G_DISABLE# <18>
R88 2 1 100K_0201_5%
LCD_D23 GMI_WAIT
L3 PU 3G_WAK