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8 7 6 5 4 3 2 1




INTEL (R)
MS-6562 Brookdale/ICH2 BRIIKDALE PLATFORM POWER DELIVERYT MAP
3.3V 5V 5VSB1A 12V
CHIPSET
Pentium 4 in 478 pinPackage/Northwood
D
Processor SCHEMATICS PROCESSOR CORE
D


VRM PROCESSOR VTT
Title Page
Cover Sheet 1 MCH CORE 1.5V
Block Diagram 2
1.5V VREG MCH VTT
Processor Sockets 3,4
Clock Synthesizer CK408 5 MCH AGP
MCH BROOKDALE 6,7,8 MCH HUB INTERFACE 1.8V
DIMM 1 & 2 & 3 9,10
ICH2 CPU/AC97/SYS 11 1.8V VREG MCH SYSTEM MEMORY SDRAM 3.3V
ICH2 LPC/USB/PWR 12
IDE1 & IDE2 13
FWHUB 14
PCI Connectors 15,16,17 3.3V VREG
C
USB 18 C



AGP 19 ICH2 CORE 1.8V
CNR RISER 20
ICH2 I/O 3.3V
S/W AUDIO 21
AUDIO GAME PORT 22 1.8V VREG ICH2 RESUME 1.8V
LPC/Flopy Connector 23
ICH2 RESUME I/O 3.3V
Hardware Monitor 24
Parallel Port TERMINATION 25 ICH2 RTC 3.3V
Parallel Port/Serial Port 26 ICH2 5V
KB / MOUSE CONNECTOR 27
PULL UP RESISTOR 28
Front Pannel 29
VRM 9.1 30 3.3 VREG
ACPI POWER 31
B D_LED & OVER VOLTAGE 32 B


MANUAL PART 33
VERSION HISTORY 34
GPIO SPEC 35
FWH 3.3V



LPC SUPER I/O 3.3V




CK-408 3.3V




A A




MICRO-STAR
Title
COVER

Size D o c u m e n t Number Rev
Custom MS-6562 10A

Date: M o n d a y , F e b r u a r y 1 8, 2002 Sheet 1 of 35
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1



Power
Supply VRM9.1 Pentium4 Socket478 CK_408 Clock
CONN
Scalable Bus
AGP 4X 4X (266MHz) AGP DIMM 1:3
AGP MCH: Memory
CONN DOUBLE DATA
Controller HUB RATE SDRAM
D D
VRM
AGP
CONN
HUB Interface



Heceta Hardware SM Bus
Monitor ICH2: I/O PCI (33MHz)

Controller HUB
IDE CONN 1&2




LPC Bus AC Link
USB Port 1:3 CNR Riser
Brookdale (Shared slot)
C Chipset C



S/W AUDIO
USB Port 4 FWH: Firmware HUB
AMP
FRNL Panel Winbond I/O
Line Out
Telephone In
MIC In
Audio In
Line In POWER CONSUMPTION
PS2 Mouse & Parallel (1) Floppy Disk
CD-ROM
Keyboard Serial (2) Drive CONN VCCP VCC_AGP VCC1_8 VCC3_DIMM VCC3 VCC5 VCC5_SB +12V -12V
CPU 69.0A 0 0 0 0 0 0 NOTE4 0
PMCH 2.4A NOTE1 0.2A 2.0A 0 0 0 0 0
ICH2 0 0 NOTE3 0 NOTE3 0 NOTE3 0 0
CLOCK 0 0 0 0 0 0 0 0 0
CODEC 0 0 0 0 0 0 0 0
FWH 0 0 0 0 0 0 0 0
LAN 0 0 0 0 0 0 0 0
SIO 0 0 0 0
782D 0 0 0 0
SC2433 0 0 0 0 0 0 0 0 0
SC1205 0 0 0 0 0 0 0 0 0
SC1547 0 0 0 0 0 0
B DIMM 0 0 0 NOTE2 0 0 NOTE2 0 0 B
CNR 0 0 0 0 0 0
AGP 0 8.0A 0 0 6.0A 2.0A ? 1.0A 0
PCI 0 0 0 0 0 0 0
USB 0 0 0 0 0 0 0 0 0
FAN 0 0 0 0 0 0 0 0 0
TTL 0 0 0 0 0 0 0
OTHER 0

N O T E 1 --- MCH
VCC_AGP = V C C1_5 (1.5A) + V C C _ AGP (0.37A)

N O T E 2 --- DIMM
S 0 S T A T E - - - 2 . 0 A * 3 = 6 . 0A ---> VCC3
S 1 / S 3 S T A T E - - - 2 0 0 m A * 3 = 6 0 0 m A - --> VCC3_SB
V C C 3 _ S B - - > 6 0 0 m A * 3 . 3 V / 5 V = 3 9 6 m A - - > VCC5_SB

N O T E 3 --- ICH2
Power S0 S1 S3/S4/S5
1.8V 300mA 100mA N/A H / W P r o j e c t L e a d e r : Andy Chen
1.8V_LAN 36mA 28mA N/A H / W P r o j e c t E n g i n e e r : P r udence Wang
VCC1_8SB 45mA 30mA 7mA
VCC3 410mA 5mA N/A
VCC3+562ET 230mA 210mA N/A
VCC3_SB 25mA 0.6mA N/A

VCC3_SB =
A
VCC1_8SB = A
VCC5_SB = VCC3_SB + VCC1_8SB




MICRO-STAR
Title
B l ock Diagram

Size D o c u m e n t Number Rev
Custom MS-6562 10A

Date: M o n d a y , F e b r u a r y 1 8, 2002 Sheet 2 of 35
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
VCCP
HINIT#

C325
R114
X103p HA#[3..31]
6 HA#[3..31]
49.9
VID[0..4] 32
VCCP




HA#31
HA#30
HA#29
HA#28
HA#27
HA#26
HA#25
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#18
HA#17
HA#16
HA#15
HA#14
HA#13
HA#12
HA#11
HA#10
HA#9
HA#8
HA#7
HA#6
HA#5
HA#4
HA#3
R113 C141 C181 C157




VID4
VID3
VID2
VID1
VID0
R124
D 100 X220p 220p 1u D




AD26
AC26
AE25
AB1




AE1
AE2
AE3
AE4
AE5
W2



W1
X49.9




M1

M4
M3

M6
T5



T4



T2




T1
U4


R6


U3

U1

R3


R2

N5
N4
N2

N1
Y1

V3




V2


P6



P4
P3




K1

K4
K2




A5
A4
L2

L3

L6
HDBI#[0..3] U9A
6 HDBI#[0..3]




A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
A26#
A25#
A24#
A23#
A22#
A21#
A20#
A19#
A18#
A17#
A16#
A15#
A14#
A13#
A12#
A11#
A10#
A9#
A8#
A7#
A6#
A5#
A4#
A3#


DBR

VCC_SENSE




VID4#
VID3#
VID2#
VID1#
VID0#
VSS_SENSE

ITP_CLK1
ITP_CLK0
HDBI#0 E21 C146 C155 C174
HDBI#1 DBI0# R123
G25 AA21
HDBI#2 DBI1# GTLREF3 220p 220p X1u
P26 AA6
HDBI#3 DBI2# GTLREF2 X100
V21 F20
DBI3# GTLREF1 F6
GTLREF0
AC3
IERR# BPM#5 RN32
V6 AB4
FERR# MCERR# BPM5# BPM#4 BPM#0
11,28 FERR# B6 AA5 1 2
STPCLK# Y4 FERR# BPM4# Y6 BPM#5 3 4
11 STPCLK# STPCLK# BPM3# BPM#1
AA3 AC4 5 6
HINIT# BINIT# BPM2# BPM#1 BPM#4
W5 AB5 7 8
11,14,28 HINIT# INIT# BPM1# BPM#0 VCCP
AB2 AC6
RSP# BPM0#
56
HDBSY# H5 H3 HREQ#4 HREQ#[0..4]
6 HDBSY# DBSY# REQ4# HREQ#[0..4] 6
HDRDY# H2 J3 HREQ#3
6 HDRDY# DRDY# REQ3#
HTRDY# J6 J4 HREQ#2
6 HTRDY# TRDY# REQ2#
K5 HREQ#1
HADS# REQ1# HREQ#0
6 HADS# G1 J1
HLOCK# G4 ADS# REQ0# AD25 R297 56
C 6 HLOCK# HBNR# LOCK# TESTHI12 R125 56 C
6 HBNR# G2 A6
HIT# BNR# TESTHI11
6 HIT# F3 Y3
HITM# HIT# TESTHI10
6 HITM# E3 W4
HBPRI# HITM# TESTHI9 R146 56
6 HBPRI# D2 U6
HDEFER# BPRI# TESTHI8
6 HDEFER# E2 AB22
DEFER# TESTHI7
AA20
TDI_CPU TESTHI6 R115 56
28 TDI_CPU C1 AC23
TDI TESTHI5
AC24
TESTHI4
AC20
TDO_CPU D5 TESTHI3 AC21
28 TDO_CPU TDO TESTHI2 R144 56
AA2 VCCP
TESTHI1
AD24
TMS_CPU TESTHI0
28 TMS_CPU F7
TMS CPUCLK#
AF23 CPUCLK# 5
TRST#_CPU BCLK1# CPUCLK
28 TRST#_CPU E6 AF22 CPUCLK 5
TRST# BCLK0#
TCK_CPU D4 F4 HRS#2 HRS#[0..2]
28 TCK_CPU TCK RS2# HRS#[0..2] 6
G5 HRS#1
VTIN2 RS1# HRS#0
23,24 VTIN2 B3 F1
VAGND C4 THERMDA RS0#
23,24 VAGND THERMTRIP# THERMDC
28 THERMTRIP# A2 V5
THERMTRIP# AP1#
AC1
R145 AP0#
H6 HBR#0
BR0# HBR#0 6,28
B VCCP C3 B
IGNNE# PROCHOT# R148
11 IGNNE# B2 P1
SMI# IGNNE# COMP1
11 SMI# B5
SMI# COMP0
L24 SHORT TRACE
62 A20M# C6 49.9
11 A20M# A20M
SLP# AB26 L25 R155
11 SLP# SLP# DP3#
A22 K26
A7 RESERVED DP2# K25
RESERVED DP1# 49.9
AD2 J26
RESERVED DP0#
AD3
PROCHOT# RESERVED HADSTB#1
12,23 PROCHOT# AE21 R5 HADSTB#1 6
RESERVED ADSTB1# HADSTB#0
AF24 L5 HADSTB#0 6
RESERVED ADSTB0# HDSTBP#3
AF25 W23 HDSTBP#3 6
VCCP CPU_PWRGD AB23 RESERVED DSTBP3# HDSTBP#2
12,28 CPU_PWRGD P23 HDSTBP#2 6
HCPURST# PWRGOOD DSTBP2# HDSTBP#1
6,28 HCPURST# AB25 J23 HDSTBP#1 6
HD#63 RESET# DSTBP1# HDSTBP#0
AA24 F21 HDSTBP#0 6
HD#62 AA22 D63# DSTBP0#