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01_Block Diagram
02_Power Sequence
03_Clock Gen_ICS9LPRS427C
1001PX 1.2G
CLOCK GEN
ICS9LPRS427CGLFT
04.PineView-M_1 (LVDS_DMI_CPU)
05.PineView-M_2 (DDR2_XDP_CRT)
D 06.PineView-M_3 (PWR&GND) 2010_0428_1600 THERMAL CONTROL D


07.XDP
08.Tigerpoint_DMI_USB
09.Tigerpoint_SYS
10.Tigerpoint_PWR
11.DDR2 SODIMM LCD Board
12.DDR2-Termination
CPU SODIMM 200P
13.Onboard VGA LCD LVDS 2 TTL
14.LCD Conn_LID PineView-M
15.SATA SSD
16.LAN_AR8132_**** CRT
17.WLAN FCBGA437
18.3G_CON_****
19.Bluetooth
C
20.LED C

21.CR_AU6433 LINE OUT/EXT MIC
22.USB Port1 Retasking
23.G_Senser_****
24.EC_ENE KB3310 Debug Conn
25.KB_TP
AZALIA CODEC
26.Fan_debug
SOUTH Realtek ALC269 Speaker
27.Overclocking EC BRIDGE
28.DUA_CON ENE KBC3310
29.PWR Jack INT MIC
30_Discharge TIGERPOINT
31.Srew Hole SPI ROM Internal KB Touch Pad
32.EMI
33.Power Flow
34.Power_Charger
B B
35.Vcore
36.Power System
37.Power_+1.8V & VTTDDR USB Port x2
38.Power_VCCP MINICARD WLAN
39.Power_+0.89VS
40.Power_+1.5VS_+1.2VS SD/MMC Card Reader
41.Power Latch AU6433-GLF Atheros
Card Reader LAN RJ-45
42_EC Pin Define AR8132
43.history
Camera
BLUETOOTH
SATA HDD SATA
A
Conn A






Title :
ASUSTek Computer INC. Engineer: C. A. Lai
Size Project Name Rev
Custom 1.0G
Date: Friday, June 25, 2010 Sheet 1 of 51
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http://hobi-elektronika.net
5 4 3 2 1

21
24
For Adapter Mode: (1) -> (2) -> (3) -> (4) -> (5) -> ...
For Battery Mode: (1) -> (2) - > (3) -> (4) -> (4a) -> (4b) -> (5) -> ... AC_BAT_SYS
2 5 +5VA +3VA 6 UP6111 +1.8V 16
3 UP7714 8 +5VSUS
A/D_DOCK_IN VCC
AC_BAT_SYS AC_BAT_SYS
Adapter 15 SUSC_ON
RT8205C +5VA 5 8 +5VSUS EN
MB39A132 +5VS 16
2 4b PS-ON
Latch EN 15 SUSB_ON AP4800 +5V_USB 16 16 +1.8V
D BAT D
4 AC_OK VCNTL +VTTDDR 17
Battery +5VSUS 8
8 +3VSUS 16 +5VS UP7711
+3VSUS 8 +3VS 16
7 VSUS_ON 15 SUSB_ON AP4800
Signal S0/S1 S3 S4/S5 Power EN 16 +1.8V
+1.5VS 17
VSUS_ON H H Adapter H VSB VSUS_PWRGD 9 APL5912
1 16 +5VS
Battery L 4 AC_BAT_SYS VCC
+0.89VS +1.5VS_PWRGD 18
BAT_IN




SUSB_ON H L L Main UP6111 +VCCP 20 15 SUSB_ON




AC_OK
16 +5VS EN
SUSC_ON H H L DUAL VCC
21
19 CPU_VRON EN
VCCP_PWRGD 16 +1.8V
+1.2VS 17
9 VSUS_PWRGD UP7704
+5VS
PM_RSMRST# 11 16 VCC
6 +3VA SUSC_ON 10 EC_RSMRST# AND NO Vcore solution 23
15 CLK_EN 16 +5VS
ENE KB3310 SUSB_ON 21 EN
7 VSUS_ON 15
CPU_VRON VCCP_PWRGD
55ms 19 9 VSUS_PWRGD MOSFET 25 16 +1.8V
9 VSUS_PWRGD
C
PM_PWROK 29 VRM_PWRGD +1.8VS 22 C
VRM_PWRGD 25 28 EC_PWROK AND
4b PS-ON 21 VCCP_PWRGD AP9452

PWR_SW# EC_PWROK +VCCP 20 +VCORE
4a 12 26
160ms
+3VS
AC_BAT_SYS 3
10 PCI_RST# 21 +1.8VS VID[6:0] 21
EC_RSMRST# 13 C_PCI_EC 24 +0.89VS +5VS 16
22 +VCORE VCC
+1.5VS
PM_PWRBTN#




VCCP_PWRGD 21
SUSB#

SUSC#




+1.8V PINEVIEW RT8152 EN
C_FSB_CPU 24
+VCCP CLK_EN# 23
C_FSB_NB 24
+1.2VS
11 PM_RSMRST# (internal) C_PCIE_NB 24 4.7ms VRM_PWRGD 25
14 14 C_96M_NB
PM_PWROK 24
26 PWROK C_LCD_LVDS
0 24
VRM_PWRGD 25 27 H_PWRGD
+VCC_RTC VRMPWRGD CPUPWRGOOD
B
+ PM_PWROK 26 28 S_PCIRST# B
BATT PWROK PLT_RST# MCLK_DDR EC
28 CPURST# 29
+5VSUS Tiger Point PCI_RST# 28 SODIMM
1ms 3G
+3VSUS PLT_RST# 28
+1.5VSUS WLAN
(internal)
C_PCIE_SB 24 8 +3VSUS 28 PLT_RST#
+5VS AR8132
C_SATA_SB 24 FSB CLK 166M
+3VS CPU ITP 24
C_48M_USB 24 23 CLK_EN#
+1.5VS VTT_PWRGD/PD# SPLTRST#
C_PCI_SB 24 BUFFER PINEVIEW RSTIN#
+VCCP REF CLK 14M
C_14M_SB 24 SB 1.8ms
24 PCIE CLK 100M XDP
USB CLK 48M CPU, SB
H_PWRGD CLK Stable WIFI, LAN 24
27 SB, CARD READER
24 3G/WIMAX SYS_RESET# TPT SYS_RESET#
RSTBTN
CLK Gen
24 PCI CLK 33M ICS9LPRS427C
SB EC DEBUG LVDS CLK 100M 24
A CPU RESET MAP A





24 SATA CLK 100M UMA CLK 96M 24
SB CPU Title :
ASUSTek Computer INC. Engineer: C. A. Lai
Size Project Name Rev


http://hobi-elektronika.net
A3 1.0G
Date: Friday, June 25, 2010 Sheet 2 of 51
5 4 3 2 1
5 4 3 2 1
1:Disable C_SATA_SB CC50 2 1 10PF/50V
/X
0:Enable C_SATA_SB# CC51 2 1 10PF/50V
/X
PEREQ1:PCIEx0 & FS4 Function
CR1 1MOhm /X
1 2 PCIEx1
PEREQ2:PCIEx2 & C_LCD_LVDS#
FIXED PLL (Asynchronous) CC54 2 1 10PF/50V
PCIEx3 & SATA H /X
CX1 14.31818Mhz C_LCD_LVDS CC55 2 1 10PF/50V
C_XIN C_XOUT +3VSUS +3V_CLK
PEREQ3:PCIEx4 & /X
1 3
D 1
CL1
2
PCIEx5 & PCIEx6 L PCI/PCIEX PLL(synchronize) STP_PCI# EC7 2 1 10PF/50V
D
1




1
01/21 EMI /EMI/X
CC12 CC13 120Ohm/100Mhz STP_CPU# EC10 2 1 10PF/50V
2

4




18PF/50V 18PF/50V N/A C_LAN_25_R /EMI/X
+3V_CLK_VDDA C_PCI_SB_R CC36 2 1 10PF/50V
2




2
CL4 /X
1 2 FS4 CC37 2 1 10PF/50V




1
GND 01/12 fine tune 15p->18p GND /X




1




1




1




1




1




1




1




1




1




1




1




1
CC1 CC58 CC2 CC3 CC4 CC5 CC6 CC7 CC8 CC9
CC10 120Ohm/100Mhz CC48 CC555 S_SMBDATA EC14 2 1 10PF/50V
10UF/6.3V N/A /EMI/X
c0603 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 33PF/50V S_SMBCLK EC15 2 1 10PF/50V




2
/EMI/LAN25M /EMI/X




2




2




2




2




2




2




2




2




2




2




2




2
C_DOC_REQ EC16 2 1 10PF/50V
12/24 reserve for static OC CC58 for RF , /EMI/X
C_FSLC CC39 2 1 10PF/50V
CR7 /X
close to pin 42 /X
0Ohm 1 2 C_FSLB GND GND C_FSLA CC40 2 1 10PF/50V
(24) SOC
/X
place close CR5 +3V_CLK_VDDA C_48M_R CC35 2 1 10PF/50V
/X
+3V_CLK 01/28
change For RF,EMI
+3V_CLK 12/15 add C_LAN_25M GND
CU1
1 56 C_LAN_25_R 47Ohm 1 2 CR6 C_LAN_25M
VDD1 25MHz/FREERUN C_LAN_25M (28)
2 55 /LAN25M
GND1 PCI&PCIEX_STOP# STP_PCI# (9)
PEREQ1# 3 54 +3V_CLK
C_REQ#_WLAN PEREQ1# CPU_STOP# STP_CPU# (9)
4 53 C_FSLC 33Ohm 1 2 CR4
PEREQ2# REF0/FSLC C_14M_SB (9)
33Ohm/DEBUG FS4 CLK_PEREQ#3
C (26) C_PCI_DEBUG
CR8 1 2 5
6
FS4/PCICLK0
GND2
DOC_PEREQ3#
GND4
52
51
C_DOC_REQ 0Ohm 1 2 CR22 /X
C_FSLB CR5 1 2 10KOhm
C
CRN8B 3 C_XIN 12/15 del for Lan 25M
(24) C_LPC_EC 22Ohm 4 7 VDDPCI X1 50
CRN8A 1 C_PCI_SB_R C_XOUT CR32 2 1 8.2KOhm /X
(8) C_PCI_SB 22Ohm 2 8 ITP_EN/PCICLK_F0 X2 49
CR12 1 2 33Ohm C_48M_R 9 48
(21) C_48M_CARD_READER CLK_EN SEL12_48#/12_48MHz VDDREF S_SMBDATA
10 Vtt_PwrGd/PD# SDATA 47 S_SMBDATA (9)
11 46 S_SMBCLK GND
VDD2 SCLK S_SMBCLK (9)
CR3 1 2 33Ohm C_FSLA 12 45
(8) C_48M_USB FSLA/USB_48MHz GND5
13 GND3 CPUT_LR0 44 C_FSB_CPU (4)
14 43 +3V_CLK
(5) C_96M_NB DOTT_96MHzLR CPUC_LR0 C_FSB_CPU# (4)
(5) C_96M_NB# 15 DOTC_96MHzLR VDDCPU 42
C_FSLB 16 41 C_FSLA CR33 2 1 8.2KOhm
FSLB CPUT_LR1 C_FSB_NB (5)
(5) C_LCD_LVDS 17 PCIeT_LR0 CPUC_LR1 40 C_FSB_NB# (5)
18 39 C_RESET# 1 2 CR21 C_FSLC CR34 2 1 8.2KOhm
(5) C_LCD_LVDS# PCIeC_LR0 RESET# SYS_RESET# (7,9)
19 38 /X C_48M_R CR35 2 1 8.2KOhm
(4) C_PCIE_NB PCIeT_LR1 GNDA 0Ohm
(4) C_PCIE_NB# 20 PCIeC_LR1 VDDA 37
21 VDDPCIEX1 CPUITPT_LR2/PCIeT_LR6 36 H_ITP_CLK (7)
12/14 del 3G 22 PCIeT_LR2 CPUITPC_LR2/PCIeC_LR6 35 H_ITP_CLK# (7) GND
23 PCIeC_LR2 VDDPCIEX3 34
(17) C_PCIE_WLAN 24 PCIeT_LR3 PCIeT_LR5 33 C_PCIE_LAN (28)
(17) C_PCIE_WLAN# 25 PCIeC_LR3 PCIeC_LR5 32