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8S650GXM Schematics Revision 1.0
SHEET TITLE
D 1 COVER SHEET D



2 BOM & PCB MODIFY HISTORY

3 BLOCK DIAGRAM

4,5,6 INTEL CPU_WMT_478

7-10 SIS651/645DX (NORTH BRIDGE) HOST; DDR; AGP,HYPER ZIP

11-14 962 (SOUTH BIRDGE)

15 CKG(ICS952004) + CKBF (ICS93722)

C
16,17 DDR SDRAM DIMMS 1,2 & DDR TERMINATION C



18 AGP SLOT

19 VGA Connector

20 PCI SLOT 1-3

21 IDE,USB

22 Winbond W83697HF

23 BIOS

24 COM,PRT,FDD,KB/MS,IR
B B


25 CNR SLOT

26 AUDIO AC 97 CODEC

27 AUDIO JACK,GAME PORT

28 RTL8100B & USB CONNECTOR

29 PANEL,STR LED,FANS ,CPU GN

30 VCORE PHASE PWM HIP 6301 + 6601
COMPONENT SIDE
(1 oz. Copper)
GND SIDE
31 ALL POWER CIRCUIT (1 oz. Copper)
VCC SIDE
A A
(1 oz. Copper)
SOLDER SIDE
32 ATX & ATX12V CONN (1 oz. Copper)



33 GPIO Connecttion GIGABYTE
Title
COVER SHEET
34 TEST POINT Size Document Number Rev
Custom 1.0
GA-8S650GXM
Date: Wednesday, May 07, 2003 Sheet 1 of 32
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Model Name: 8S650GXM Circuit or PCB layout change
for next version
Version:1.0 Date Change Item Reason
D
08/06 BOM MODIFY U39 change to SIS962L REV:A2 D

DEL R948 1K/6 ADD R950 470/6
Component value change AUTOBOM 08/12 BOM MODIFY R949 10/6 change to 22/6

history 2002/06/04 EC1,2,3,5,34,40,46 330U/25V change to 1200U/6.3V
08/13 BOM MODIFY EC54 22U change to 100U
Date Change Item Reason
R939 200K/6 change to 240K/6
02/04 LAYOUT PLACEMENT DEL 1394 CONNECTOR(LAYOUT ISSUE) BOM MODIFY ST9721 change to ALC101

SWAP NET PCB MODIFY REV:2.01 CHANGE TO2.1

02/05 LAYOUT LIB COIL-8P---->COIL-8P_SHORT 09/12 BOM MODIFY EC37 100U change to 22U

02/06 VGA/COM DUAL LAYOUT 10/14 BOM MODIFY R935,R943 2.2 ohm Change to 4.7 ohm

DDRVTT (R&D 109) DDRVTT DECOUPLING X14 PCS (0.1U/8P4C CAP) 10/28 BOM MODIFY U12 ADD W83697HF/UB

02/06-1 LAYOUT LIB MODIFY USB2.0 CHOKE (NO SHORT) FOR MEMO change

C AGP SLOT-->AGP_N 11/15 PCB MODIFY PCB size ADD 0.5 cm(SPEC change) C


02/19 NET SWAP BC345-->SC60(COMP-->SOLDER SIDE) 12/09 PCB MODIFY PCB text modify
02/20 EMI ISSUE CLOSE U16(75232) -NTXD2 ADD CAP 180P/6(BC349) 12/09 BOM MODIFY DEL BC20,23 ADD BC21,BC26 10U/12


02/21 LAYOUT ISSUE BC344-->SC61(COMP-->SOLDER SIDE) C110,C111 ADD 1K ohm C182 add 150 ohm


SWAP NET R8 75/6/1 change to 100/6/1


LIB MODIFY MOSFET LIB TO263,252 CO LAYOUT(Q_TO263-252) PCB change to REV:3.01


04/22 BOM MODIFY AC97 CODEC --->ALC650 12/26 PCB MODIFY ADD HT SUPPORT REV:3.02
PCB REV1.9 PWM 2 PHASE FAN5093M/C(VOCRE CAP COST DOWN) 01/03 PCB MODIFY ADD HT SUPPORT REV:3.1
INTEL F_PANEL+F_USB1,2,F_AUDIO 12/09 BOM MODIFY R722,724,726 22 ohm change to 33 ohm

DDRVTT CAP 0.1U/8P4C X9PCS U39 SIS962L/A2 change to SIS962L/C1


04/23 PCB MODIFY reduced PCB size(COST DOWN) ADD C857 10P/6
B B

04/29 DEL MH6,ADD CAP MIC FOR EMI 02/12 PCB MODIFY 962L/C1 SUPPORT REV:3.2
05/08 PCB MODIFY rename to GA-8SIMLH 02/24 PCB MODIFY text modify
BOM MODIFY SIS651+SIS962 02/27 BOM MODIFY PCB change to REV:3.21


05/13 BOM MODIFY cost down CAP & FB AUDIO CHANGE TO ALC650

ALC650 change to ST9721 04/16 BOM MODIFY FOR NOISE & EMI
ISSUE
05/21 PCB MODIFY DEL BC218 ,ADD R1011 FOR F_MIC FOR FAN5093/ C3

TEXT MODIFY 04/21 PCB MODIFY CHANGE TO GA-8S650GXM
BOM MODIFY PCB CHANGE TO REV:2.0 1 04/21 BOM MODIFY SIS651 change to SIS650GX


06/04 BOM MODIFY R867 10k/6 change to 470/6 05/07 BOM MODIFY R722,R726 33 ohm change to 22 ohm , C855,C857 add 22P

R921 324/1/6 change to 487/1/6 C859 10P change to 22P FOR EMI ISSUE

A A
ADD CN14,15,16,17 180P/8P4C

ADD C944,C65 180P/N/50V/6

08/04 BOM MODIFY IDE,PANEL,USB GIGABYTE
Title
FDD,SMBUS,22U TO 100U BOM & PCB MODIFY HISTORY
Size Document Number Rev
Custom 1.0
GA-8S650GXM
Date: Wednesday, May 07, 2003 Sheet 2 of 32
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8SIMLH-P BLOCK DIAGRAM
INTEL Pentium4 (478)

D D


CLOCK GENERATOR
(ICS952004+ICS93722) VID0~4
PWM/OTHER POWER
VCORE = 1.75V (650-1100MHZ) / SLEEP : 1.3V
VCC25 = 2.5V(I/O,MEMORY/I,VLINK/I) VCCA = 2.5V ; 2_5V = 2.5V PAGE 4, 5, 6 VCORE = 1.75V (650-1100MHZ) / SLEEP : 1.3V
VCC3 = 3.3V PAGE 15 5VSB,-12V,+12V,VCC,VCC3,3VDUAL
DDRVTT,DDR25V,3VSTR,VCC25 PAGE 30,31,32




VGA CONNECTOR
(R,G,B)
PAGE 19 GAD0~31 SIS651/645DX NORTH
AD_STB0,-AD_STB0 BRIDGE
AD_STB1,-AD_STB1
SBA0~7 MAA0~14
AGP SLOT 2X/4X SB_STB,-SB_STB MDD0~63 DDR SDRAM DIMM X 2
-DQSD0~8
VDDQ = 1.5V (AGP POWER 4X) -GBE0~3
VCC3 = 3.3V VCORE = 1.75V (650-1100MHZ) / SLEEP : 1.3V
MPD0~7 DQM0~7
+12V = 12V ST0~2 AGP BUS DDR25V = 2.5V(SUSPEND POWER) DDR25V = 2.5V(SUSPEND POWER)
3VDUAL = 3.3V VDDQ = 1.5V (AGP POWER 4X) DDRVTT = 1.25V
VCC = 5V PAGE 18 VCC25 = 2.5V(I/O,MEMORY/I,VLINK/I) PAGE 16,17
PAGE 7 ,8 ,9,10
C C

AGPUSB+ / -


ZAD0~15
CONTROL BUS Z LINK
RTL8100 & USB CONN
SIS962 SOUTH PCI LAN
BRIDGE PAGE 28



USB PORTS 0~5 IDE Primary and Secondary
F_USB1,2(USB POWER)
VCC25 = 2.5V(I/O,MEMORY/I,VLINK/I)
VCC = 5V AC97 LINK 3VDUAL = 3.3V(SUSPEND POWER)
5VSB = 5V VCC3 = 3.3V
5VUSB = 5V PAGE 14 RTCVDD = 3.3V VCC = 5V PAGE 21
PAGE 11,12,13


PCI BUS
B B




PCI SLOT 1,2,3 BIOS SST39SF020
+12 = 12V
-12 = -12V
VCC = 5V
VCC3 = 3V VCC = 5V
3VDUAL = 3V PAGE 20 VCC3 = 3V PAGE 23




LPC BUS
AC97 CODEC REALTEK LPC W83697HF
ALC201A -F
+12V = 12V
VCC3 = 3.3V VCC = 5V
VCC = 5V 5VSB = 5V
AVDD = 5V PAGE 26 VBAT = 3V PAGE 22




A
AUDIO PORTS : FRONT PANEL /FANS I/O PORTS : A




LIN_ OUT LINE_IN MIC
TELE CD_IN AUX_IN GAME PORT VCC = 5V
5VSB = 5V
COMA COMB LPT IR FDD
+12 = 12V
PAGE 27 PVCC = 5V PAGE 29 PAGE 24

GIAGBYTE
Title
BLOCK DIAGRAM
Size Document Number Rev
Custom 1.0
GA-8S650GXM
Date: Wednesday, May 07, 2003 Sheet 3 of 32
5 4 3 2 1
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(X5R) X11 1206(10U) NOTE:GIGA
VCORE

10U/12/Y/10V/X


BC2 BC3 BC5


10U/12/Y/10V/X 10U/12/X5/10V



D D

VCORE

10U/12/Y/10V/X


BC8



VCORE




AD11


AD19




AC18
AC16
AC14
AC12
AC10

AD17
AD15
AD13
AE18
AE16
AE14
AE12
AE10


AE20
AB15
AB13
AB11


AB19
VCORE 10/29




AE8
AE6




AB9
AB7
AD9
AD7




AC8



E14
E12
E10

E20
E8
10U/12/Y/10V/X 10U/12/Y/10V/X P4A




VCORE1
VCORE2
VCORE3
VCORE4
VCORE5
VCORE6
VCORE7
VCORE8
VCORE9
VCORE10
VCORE11
VCORE12
VCORE13
VCORE14
VCORE15
VCORE16
VCORE17
VCORE18
VCORE19
VCORE20
VCORE21
VCORE22
VCORE23
VCORE24
VCORE25
VCORE26
VCORE27
VCORE28
VCORE29
VCORE30
VCORE31
VCORE32
HA[3..16]
[7] HA[3..16]
BC11 BC12 BC13 BC15 BC20 HA16 N5
HA15 A16
N4
HA14 A15 -ADS
N2 G1 -ADS [7]
10U/12/Y/10V/X 10U/12/Y/10V/X 10U/12/X5/10V/X HA13 A14 ADS
M1 AC1
HA12 A13 AP0 R1 39/6/X
N1 V5
HA11 A12 AP1 Z7
M4 AA3 VCORE
HA10 A11 BINIT -BNR
M3 G2 -BNR [7]
HA9 A10 BNR
L2
HA8 A9
M6 L25
C HA7 A8 DP3 C
L3 K26
HA6 A7 DP2
K1 K25
HA5 A6 DP1
L6 J26
HA4 A5 DP0
K4
HA3 A4
K2 U6
-HA_STB0 A3 TESTHI8
[7] -HA_STB0 L5 W4
-HREQ4 ADSTB0 TESTHI9
[7] -HREQ4 H3 Y3 TESTHI8_10 [5]
-HREQ3 REQ4 TESTHI10 -BREQ0
[7] -HREQ3 J3 H6 -BREQ0 [5,7]
-HREQ2 REQ3 BR0
[7] -HREQ2 J4
-HREQ1 REQ2 -BPRI
[7] -HREQ1 K5 D2 -BPRI [7]
-HREQ0 REQ1 BPRI
[7] -HREQ0 J1
REQ0 -DBSY
H5 -DBSY [7]
DBSY -DEFER
AB1 E2 -DEFER [7]
VCORE 10/29 HA[17..31] A35 DEFER -DRDY VCORE
[7] HA[17..31] Y1 H2 -DRDY [7]
A34 DRDY -HIT
W2 F3 -HIT [7]
10U/12/X5/10V 10U/12/X5/10V A33 HIT -HITM
V3 E3 -HITM [7]
HA31 A32 HITM R511
U4
HA30 A31 56/6
T5 AC3
BC21 BC22 BC23 BC24 BC25 HA29 A30 IERR -IERR [5]
W1
HA28 A29 -CPUINIT
R6 W5 -CPUINIT [12]
HA27 A28 INIT
V2
10U/12/Y/10V 10U/12/X5/10V/X 10U/12/X5/10V HA26 A27 -HLOCK C1
T4 G4 -HLOCK [7]
HA25 A26 LOCK 100P/6/N/50V
U3
HA24 A25
P6 V6
HA23 A24 MCERR
U1
HA22 A23 -CPURST
T2 AB25 -CPURST [5,7]
HA21 A22 RESET# -RS2
R3 F4 -RS2 [7]
VCORE HA20 A21 RS2 -RS1 C2
P4 G5 -RS1 [7]
HA19 A20 RS1 -RS0 0.01U/6/X/16V/X
P3 F1 -RS0 [7]
10U/12/Y/10V/X 10U/12/Y/10V/X HA18 A19 RS0
R2 AB2
HA17 A18 RSP -HTRDY
T1 J6 -HTRDY [7]
B -HA_STB1 A17 TRDY B
[7] -HA_STB1 R5
BC26 BC27 BC28 BC29 BC30 ADSTB1




GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
GND21
GND22
GND23
GND24
GND25
GND26
GND27
GND28
GND29
GND30
GND31
GND32
GND33
GND34
GND35
GND36
GND37
GND38
GND39
GND40
GND41
GND42
GND43
GND44
GND45
GND46
GND47
GND48
GND49
GND50
GND51
GND52
GND53
GND54
GND55
GND56
GND57
GND58
GND59
GND60
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
10U/12/Y/10V 10U/12/X5/10V 10U/12/X5/10V
AD14
AD12
AD10



AD23
AD21




AC17
AC15
AC13
AC11




AC25
AC22
AC19
AD18
AD16
AE24
AE22
AE19




AE17
AE15
AE13
AE11

AE26
AB20




AA23