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A B C D E
4 4
TITLE SHEET
Cover Sheet 1
Block Diagram 2
General Spec 3
Change List 4
Processor 5,6
North Bridge 7,8,9,10
3
South Bridge 11,12,13 3
Clock & Buffer 14
DDR SDRAM 15~19 VER : 1.2
AGP Slot 20
PCI Slot 21,22,23
IDE Connector 24
ATX Power 25
USB, Front Panel, FDD 26
USB, PS2, COM, LPT 27
AC97 CODEC 28
2 VCC_CORE DC-DC Converter 29 2
MIS DC-DC Converter 30
LPC I/O, FDD, BIOS 31
BLANK 32
VGA Connector 33
CNR Slot 34
LAN RTL8201BL 35
BOM 36
1 1
Title
Size
COVER SHEET
Document Number Rev
Custom P4M8P-M7A 1.2
Date: Tuesday, April 18, 2006 Sheet 1 of 36
A B C D E
A
INTEL
FSB P4-775PIN
PROCESSOR
533/800MHZ
CONTROL ADD DATA
HOST BUS
64-Bit MEMORY CLOCK BUFFER
AGP VIA 2 DDR DIMM
8X ICS953001EF
P4M800
VGA PRO
CONN
PCI BUS
AC' 97 VIA 8 USB
CODEC CONN(V2.0)
ADDR/DATA
CNTL
A
VT8237R A
USB
USB
USB
USB
KEYBOARD
PCI CONN LAN
LPC
MOUSE RTL8201BL
PCI CONN
IDE
IDE
PCI CONN
ITE RJ45
BIOS
IT8705AF
SATA
SATA
FLOPPY PRT
CONN. CONN.
SER.
CONN.
SER.
CONN.
Title
Size
BLOCK DIAGRAM
Document Number Rev
Custom P4M8P-M7A 1.2
Date: Tuesday, April 18, 2006 Sheet 2 of 36
A
A B C D E
PCI Solt IDE SEL INT# GNT# REQ# CLOCK
1 19 A 0 0 PCLK5 P4M80-M7
2 20 B 1 1 PCLK0 1. CPU --- INTEL P4 Socket 775(3-Phase Power)
4 4
3 21 C 2 2 PCLK1
2. CHIPSET --- VIA P4M800 CE PRO+ VT8237R
4
5 3. MEMORY --- 2 DDR SDRAM(Max. 2GB)
6 4. SLOTS --- AGP(8X)x1, PCIx3, CNRx1
5. CODEC --- Realtek ALC655 6-Channel Audio
Chips IDE SEL INT# GNT# REQ# CLOCK 6. LAN --- VT6103L
LPC I/O PCLK3 7. PCB Size --- 2438.4Mmx201.68mm, 4-Layer
LAN
3
RAID 3
S ATA
WIRE LESS
CARD READER
S/B SPCLK
AT123S
SLOT GPIO PRI. SEC.
AMR
2 2
CNR
ACR
H/W SOUND
22U/25DE 5*7 mm D
O
100U/16DE 6.3*11 mm D A D C KA
220U/10DE 6.3*11 mm
470U/16DE 8*11 mm I GO E BC ECB
1000U/10DE 8*14 mm G S A O I C R G S B E A K
G S
1500U/16DE 10*25 mm
TO-263 TO-252 SOT-223 SOT-23 SOT-23 SOT-23 SOT-23 TO-92 TO-92 TO-92
3300U/25DE 10*25 mm
PHB55N03 20N03 AMS1117 LM431 2N7002 2N3904 BAT54C LM431 2N2222A HSD882-D
90N02 TM3055TL-S SI2303S 2N3906 BAT54S 78L05-D 2N2097A
PHD55N03 SI2301S MMBT2907A LM432
1 2N2222A 1
Title
Size
GENERAL SPEC
Document Number Rev
Custom P4M8P-M7A 1.2
Date: Tuesday, April 18, 2006 Sheet 3 of 36
A B C D E
A B C D E
Trace 5mil,Space 7mil,Max
1 OF 7 2 OF 7 3 OF 7 1500mil(TESTI[0:12])
7 HA[3:33] CPU1A CPU1B CPU1C
HA3 L5 D2 -ADS -SMI P2 F26 TESTHI0
A03# ADS# -ADS 7 7 HD[0:63] HD[0:63] 7 13 -SMI SMI# TESTHI00
HA4 P6 C2 -BNR HD0 B4 G16 HD32 -A20M K3 W3 TESTHI1
A04# BNR# -BNR 7 D00# D32# 13 -A20M A20M# TESTHI01
HA5 M5 D4 -HIT HD1 C5 E15 HD33 -FERR R3 P1 TESTHI11
A05# HIT# -HIT 7 D01# D33# 13 -FERR FERR#/PBE# TESTHI11
HA6 L4 H4 HD2 A4 E16 HD34 INTR K1 W2 TESTHI12
HA7 A06# RSP# -BPRI HD3 D02# D34# HD35 13 INTR NMI_SB LINT0 TESTHI12
M4 A07# BPRI# G8 -BPRI 7 C6 D03# D35# G18 13 NMI_SB L1 LINT1 TESTHI02 F25
HA8 R4 B2 -DBSY HD4 A5 G17 HD36 -IGNNE N2 G25
A08# DBSY# -DBSY 7 D04# D36# 13 -IGNNE IGNNE# TESTHI03
HA9 T5 C1 -DRDY HD5 B6 F17 HD37 -STPCLK M3 G27 TESTHI_7_2
A09# DRDY# -DRDY 7 D05# D37# 13 -STPCLK STPCLK# TESTHI04
HA10 U6 E4 -HITM HD6 B7 F18 HD38 G26
A10# HITM# -HITM 7 D06# D38# TESTHI05
4
HA11 T4 AB2 -IERR HD7 A7 E18 HD39 VCCA A23 G24 4
HA12 A11# IERR# -CPUINIT HD8 D07# D39# HD40 VSSA VCCA TESTHI06
U5 A12# INIT# P3 -CPUINIT 13 A10 D08# D40# E19 B23 VSSA TESTHI07 F24
HA13 U4 C3 -HLOCK HD9 A11 F20 HD41 D23 AK6 RSVD_AK6 R704 62 /NI
A13# LOCK# -HLOCK 7 D09# D41# RSVD5 RSVD10 VTT_OUT_RIGHT
HA14 V5 E3 -HTRDY HD10 B10 E21 HD42 VCCIOPLL C23 G6 RSVD_G6 R1012 62 /NI VTT_OUT_LEFT
HA15 A14# TRDY# -HTRDY 7 HD11 D10# D42# HD43 VCCIOPLL RSVD11
V4 A15# BINIT# AD3 C11 D11# D43# F21
HA16 W5 G7 -DEFER HD12 D8 G21 HD44 L2 TESTHI13
A16# DEFER# -DEFER 7 D12# D44# SLP#
N4 F2 HD13 B12 E22 HD45 29 CPU_VID0 CPU_VID0 AM2 AH2
RSVD1 EDRDY# HD14 D13# D45# HD46 CPU_VID1 VID0 RSVD12 PWRGD_CPU
P5 RSVD2 MCERR# AB3 C12 D14# D46# D22 29 CPU_VID1 AL5 VID1 PWRGOOD N1 PWRGD_CPU 25
-HREQ0 K4 HD15 D11 G22 HD47 29 CPU_VID2 CPU_VID2 AM3 AL2 -PROCHOT
7 -HREQ0 REQ0# D15# D47# VID2 PROCHOT#
-HREQ1 J5 U2 -DBI0 A8 D19 -DBI2 CPU_VID3 AL6 M2 -TRIP
7 -HREQ1
-HREQ2 REQ1# AP0# -HAP0 7 7 -DBI0 -HD_STBN0 DBI0# DBI2# -HD_STBN2 -DBI2 7 29 CPU_VID3
CPU_VID4 VID3 THERMTRIP#
7 -HREQ2 M6 REQ2# AP1# U3 -HAP1 7 7 -HD_STBN0 C8 DSTBN0# DSTBN2# G20 -HD_STBN2 7 29 CPU_VID4 AK4 VID4
-HREQ3 K6 -HD_STBP0 B9 G19 -HD_STBP2 CPU_VID5 AL4
7 -HREQ3
-HREQ4 REQ3# -BREQ0 7 -HD_STBP0 DSTBP0# DSTBP2# -HD_STBP2 7 29 CPU_VID5 VID5 COMP0 R988 62
7 -HREQ4 J6 REQ4# BR0# F3 -BREQ0 7 HD[0:63] 7 AM5 VID6 COMP0 A13
-HA_STB0 R6 G3 TESTHI8 7 HD[0:63] HD16 G9 D20 HD48 AM7 T1 COMP1
7 -HA_STB0 ADSTB0# TESTHI08 TESTHI9 HD17 D16# D48# HD49 R1004 62 VID7 COMP1 COMP2
G5 PCREQ# TESTHI09 G4 Trace 5mil,Space 7mil,Max F8 D17# D49# D17 AN7 VID_SELECT COMP2 G2
H5 TESTHI10 HD18 F9 A14 HD50 F28 R1 COMP3
HA17 AB6
TESTHI10 1500mil(TESTI[0:12]) HD19 E9
D18# D50#
C15 HD51 14 CPU_CLK
G28
BCLK0 COMP3
J2 COMP4
HA18 A17# HD20 D19# D51# HD52 14 -CPU_CLK BCLK1 COMP4 COMP5
W6 A18# DP0# J16 D7 D20# D52# C14 COMP5 T2
HA19 Y6 H15 HD21 E10 B15 HD53 AE8 Y3 COMP6
HA20 A19# DP1# HD22 D21# D53# HD54 12 CPUMISS SKTOCC# COMP6 COMP7
Y4 A20# DP2# H16 D10 D22# D54# C18 COMP7 AE3
HA21 AA4 J17 HD23 F11 B16 HD55
HA22 A21# DP3# HD24 D23# D55# HD56
AD6 A22# F12 D24# D56# A17 31 D+ AL1 THERMDA Trace 15mil,Space 7mil,Max
HA23 AA5 E24 HD25 D13 B18 HD57 AK1
A23# MCH_GTLREF MCH_GTLREF 7 D25# D57# 31 D- THERMDC 1200mil(COMP[0:5])
HA24 AB5 H1 CPU_GTLREF0 HD26 E13 C21 HD58 N5
HA25 A24# GTLREF0 CPU_GTLREF1 HD27 D26# D58# HD59 RSVD13
AC5 A25# GTLREF1 H2 G13 D27# D59# B21 AN3 VCCSENSE RSVD14 AE6
HA26 AB4 H29 GTLREF_SEL HD28 F14 B19 HD60 AN4 C9
HA27 A26# GTLREF_SEL GTLREF_SEL 7 HD29 D28# D60# HD61 VCC_SENSE VSSSENSE RSVD15
AF5 A27# G14 D29# D61# A19 29 VCC_SENSE AN5 RSVD7 RSVD16 G10
HA28 AF4 G23 -CPURST HD30 F15 A22 HD62 VSS_SENSE AN6 D16
HA29 A28# RESET# -CPURST 7 HD31 D30# D62# HD63 29 VSS_SENSE RSVD8 RSVD17
3 AG6 A29# G15 D31# D63# B22 RSVD18 A20 3
HA30 AG4 B3 -RS0 -RS0 7 -DBI1 G11 C20 -DBI3
HA31 A30# RS0# -RS1 7 -DBI1 -HD_STBN1 DBI1# DBI3# -HD_STBN3 -DBI3 7
AG5 A31# RS1# F5 -RS1 7 7 -HD_STBN1 G12 DSTBN1# DSTBN3# A16 -HD_STBN3 7 F29 RSVD9
HA32 AH4 A3 -RS2 -RS2 7 -HD_STBP1 E12 C17 -HD_STBP3
HA33 A32# RS2# 7 -HD_STBP1 DSTBP1# DSTBP3# -HD_STBP3 7
AH5 A33#
AJ5 The LGA775 ball pitch is 1.09 mm x 1.17 mm. BOOTSELECT Y1 E23 CPU_BOOT
A34# LGA775 DIP BOOTSELECT RSVD19
AJ6 A35# V2 LL_ID0 RSVD21 F23
7 HA[3:33] AC4 For motherboards designed using the English BR834 0 /NI AA2 J3
RSVD3 VTT_OUT_RIGHT LL_ID1 RSVD24 NMI_SB
AE4 RSVD4 system, pad pitch of 43 mils x 46 mils should 1 2 VTT_OUT_LEFT
-HA_STB1 AD5 TESTHI13 3 4 RN215
7 -HA_STB1 ADSTB1# be used. 5 6 62 8P4R
LGA775 DIP LGA775 DIP COMP2 7 8
BR19 0.69 * VTT COMP4 R997 62
VTT_OUT_LEFT VTT_OUT_LEFT
100 1% COMP5 R998 62
BR42 COMP6 BR9 62
TESTHI13 BR835 0 /NI -SLP CPU_GTLREF0 COMP7 BR10 62
-SLP 13 VTT_OUT_RIGHT
VTT
0.1UF 25V Y5V
4 OF 7 10 VTT_OUT_RIGHT
1
1
1
CPU1D
TCK VTT BR18 -IERR BR16 62
0.1UF 25V Y5V
AE1 TCK VTT1 A29
BC3
TDI 210 1% CPU_BOOT BR709 1K 1%
1UF 10V Y5V
AD1 B25
0.01UF 50V X7R
TDI VTT2
1
TDO -TRIP R989 62 PWRGD_CPU BR710 100 1% VID_PWRGD R713 680 /NI
2
2
2
AF1 TDO VTT3 B29
TMS AC1 B30 -FERR BR990 62 -PROCHOT BR836 120
TMS VTT4
C799
-TRST AG1 C29 TESTHI_7_2 R991 62 BC801 BOOTSELECT BR837 62
TRST# VTT5
BC5
BC4
TESTHI0 R992 62 PCT12 VTT 1000P 50V X7R /NI BPM5
2
VTT6 A26 1 2
B27 680UF 4V 8X8 -CPURST 1 2 BPM0 3 4 RN3
VTT7
BPM0 AJ2 C28 1 TESTHI1 3 4 RN193 Close to CPU BPM1 5 6 51 8P4R
+
BPM0# VTT8 VTT_OUT_LEFT
BPM1 AJ1 BPM1# VTT9 A25 2 TESTHI9 5 6 62 8P4R pin"J1" BPM3 7 8
BPM2 C800 TESTHI10 BPM2 Close to CPU
-
AD2 BPM2# VTT10 A28 7 8 1 2
2
BPM3 AG2 BPM3# VTT11 A27 TESTHI11 1 2 560P 50V X7R /NI -BREQ0 BR4 62 TDI 3 4 RN4 pin"AA1" 2
BPM4 AF2 C30 -SMI 3 4 RN194 TESTHI8 BR5 62 5